You are an expert in writing code in many different languages. Your goal is to perform code completion for the following code, keeping in mind the rest of the code and the file meta data.
    Metadata details:
    filename: aarch64.rs
    path of file: ./repos/rustfmt/tests/target/cfg_if/detect/os/linux
    
    the code of the file until where you have to start completion: //! Run-time feature detection for Aarch64 on Linux.

use super::{auxvec, cpuinfo};
use crate::detect::{bit, cache, Feature};

/// Performs run-time feature detection.
#[inline]
pub fn check_for(x: Feature) -> bool {
    cache::test(x as u32, detect_features)
}

/// Try to read the features from the auxiliary vector, and if that fails, try
/// to read them from /proc/cpuinfo.
fn detect_features() -> cache::Initializer {
    if let Ok(auxv) = auxvec::auxv() {
        let hwcap: AtHwcap = auxv.into();
        return hwcap.cache();
    }
    if let Ok(c) = cpuinfo::CpuInfo::new() {
        let hwcap: AtHwcap = c.into();
        return hwcap.cache();
    }
    cache::Initializer::default()
}

/// These values are part of the platform-specific [asm/hwcap.h][hwcap] .
///
/// [hwcap]: https://github.com/torvalds/linux/blob/master/arch/arm64/include/uapi/asm/hwcap.h
struct AtHwcap {
    fp: bool,    // 0
    asimd:
    
    fn cache(self) -> cache::Initializer {
        let mut value = cache::Initializer::default();
        {
            let mut enable_feature = |f, enable| {
                if enable {
                    value.set(f as u32);
                }
            };

            enable_feature(Feature::fp, self.fp);
            // Half-float support requires float support
            enable_feature(Feature::fp16, self.fp && self.fphp);
            enable_feature(Feature::pmull, self.pmull);
            enable_feature(Feature::crc, self.crc32);
            enable_feature(Feature::lse, self.atomics);
            enable_feature(Feature::rcpc, self.lrcpc);

            // SIMD support requires float support - if half-floats are
            // supported, it also requires half-float support:
            let asimd = self.fp && self.asimd && (!self.fphp | self.asimdhp);
            enable_feature(Feature::asimd, asimd);
            // SIMD extensions require SIMD support:
            enable_feature(Feature::rdm, self.asimdrdm && asimd);
            enable_feature(Feature::dotprod, self.asimddp && asimd);
            enable_feature(Feature::sve, self.sve && asimd);

            // Crypto is specified as AES + PMULL + SHA1 + SHA2 per LLVM/hosts.cpp
            enable_feature(
                Feature::crypto,
                self.aes && self.pmull && self.sha1 && self.sha2,
            );
        }
        value
    }