Editing intel/xeon e/e-2126g (section) - WikiChip
Editing intel/xeon e/e-2126g (section)
== Cache == {{main|intel/microarchitectures/coffee_lake#Memory_Hierarchy|l1=Coffee Lake § Cache}} {{cache size |l1 cache=384 KiB |l1i cache=192 KiB |l1i break=6x32 KiB |l1i desc=8-way set associative |l1d cache=192 KiB |l1d break=6x32 KiB |l1d desc=8-way set associative |l1d policy=write-back |l2 cache=1.5 MiB |l2 break=6x256 KiB |l2 desc=4-way set associative |l2 policy=write-back |l3 cache=12 MiB |l3 break=6x2 MiB |l3 desc=16-way set associative |l3 policy=write-back }}
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