drivers: watchdog: stm32 iwdg: max prescaler value
In some stm32 MUCs maximum prescaler value can be 1024.
#include "wdt_iwdg_stm32.h"
#define IWDG_PRESCALER_MIN (4U)
+
+#if defined(LL_IWDG_PRESCALER_1024)
+#define IWDG_PRESCALER_MAX (1024U)
+#else
#define IWDG_PRESCALER_MAX (256U)
+#endif
#define IWDG_RELOAD_MIN (0x0000U)
#define IWDG_RELOAD_MAX (0x0FFFU)
/*
* Status register needs 5 LSI clock cycles divided by prescaler to be updated.
- * With highest prescaler (256) and considering clock variation, we will wait
+ * With highest prescaler and considering clock variation, we will wait
* maximum 6 cycles (48 ms at 32 kHz) for register update.
*/
#define IWDG_SR_UPDATE_TIMEOUT (6U * IWDG_PRESCALER_MAX * \
