Pass address of va to va_block_arg_builtin for riscv in interp.
@@ -1725,7 +1725,7 @@ static void interp (MIR_context_t ctx, MIR_item_t func_item, va_list va, MIR_val
case MIR_T_P:
case MIR_T_RBLK: arg_vals[i].a = va_arg (va, void *); break;
default: mir_assert (MIR_blk_type_p (type)); arg_vals[i].a = alloca (arg_vars[i].size);
-#if defined(__PPC64__) || defined(__aarch64__) || defined(_WIN32)
+#if defined(__PPC64__) || defined(__aarch64__) || defined(__riscv) || defined(_WIN32)
va_block_arg_builtin (arg_vals[i].a, &va, arg_vars[i].size, type - MIR_T_BLK);
#else
va_block_arg_builtin (arg_vals[i].a, va, arg_vars[i].size, type - MIR_T_BLK);
