Doc: Update bustrace starting cycle to tce_tour
Bustrace starting cycle must now be 6 in order for the
bus traces to match with ttasim traces.
@@ -1645,7 +1645,7 @@ function units should have implementations.
\item%
Enable bus tracing from the Implementation-dialog's IC / Decoder Plugin tab.
Set the bustrace plugin parameter to ``yes'' and the bustracestartingcycle to
-``5''. The generated processor will now get a component which writes the bus
+``6''. The generated processor will now get a component which writes the bus
value from every cycle to a text file for verification purposes. Notice that
this option should not be used if the processor will be synthesized.
