FIG. 1 shows an electronic system that transmits data or other signals using pseudo-differential signaling. The system includes a first integrated circuit 10 that transmits the signals, and a second integrated circuit 12 that receives the signals. The signals comprise voltages that are conducted between the two integrated circuits by a plurality of signal lines 14. The signal lines are typically metallic traces on a printed circuit board.
In addition to the signals themselves, a reference voltage is transmitted from first integrated circuit 10 to second integrated circuit 12, over a reference line 16. The signal voltages represent values in terms of relationships between the signal voltages and the reference voltage. In a binary system, for example, a high voltage—one which is higher than the reference voltage—might represent a binary “1”. A low voltage—one that is less than the reference voltage—might represent a binary “0”.
FIG. 2 illustrates how the values of signal lines are determined within the receiving integrated circuit 12. A signal comparator 20, often in the form of a comparator, is associated with each signal voltage VSIG. Each signal line is routed to a first input of the associated signal comparator 20. The reference voltage VREF is routed in common to the second input of each signal comparator 20. The signal comparator produces a high logic level within integrated circuit 12 if the signal voltage is higher than the reference voltage. The signal comparator produces a low logic level within integrated circuit 12 if the signal voltage is not higher than the reference voltage.
This type of signaling technique reduces or cancels the effect of any electrical noise that is induced in signal lines 14 between the two integrated circuits. The technique works on the assumption that any noise induced in a signal line will be similarly induced in the common reference line. This assumption, in turn, relies on the further assumption that the signal lines are subject to the same noise inducing influences as the reference line.
These assumptions are generally correct, at least to a degree. In high-speed data transfer circuits, however, it is often desired to utilize very small differentials between “high” and “low” signal voltages. The use of such small voltage differentials accentuates the effect of any differences in induced noise between the signal lines and the reference line.
In sensitive circuits such as these, even small differences in induced noise can become significant. One reason such differences arise is that the reference line is routed to many more components than an individual signal line. Specifically, a signal line is routed (within the receiving integrated circuit) to only a single signal comparator. The reference line, on the other hand, is routed to all of the signal comparators. Each connection to signal comparator introduces a new source of noise coupling. Furthermore, additional routing lengths are usually required to reach the signal comparators, which also adds coupling capacitance.
FIG. 3 shows a simplified model of a reference line 30 and a signal line 32. The lines are driven by devices having equal output impedances, and the transmission lines are carefully designed to have the same distributed line impedances. The transmission line and driver impedances are represented as RC in FIG. 3.
At the receiving integrated circuit, the reference line and signal line are connected to a package pin. This pin introduces a parasitic inductance LI. Within the integrated circuit, both of the lines are capacitively coupled to the substrate (VSS) of the integrated circuit. This coupling is mainly through the capacitances of the input pad, existing electrostatic discharge (ESD) circuitry, and the inputs of the signal comparators. Since the reference line drives a multitude of signal comparators and has a longer routing path, its coupling capacitance CREF is significantly larger than the capacitance CIN of the signal line. Moreover, depending on the length and the resistivity of the reference routing wire, the additional capacitance of the reference line may behave as a distributed RC line.
The capacitive coupling CREF and CIN result in noise injection from the integrated circuit's power supply rails to the signal and reference lines. If CREF and CIN were equal, the noise injection would be common mode and would not affect the interpretation of the signal. But because CREF is so much greater than CIN in a pseudo-differential interface, the noise injection on the reference line is fundamentally larger than that on the signal line. This results in a reduction of common mode noise rejection by the signal comparators, especially at high frequencies.
The technique described below reduces the effect of noise injection in pseudo-differential interfaces such as shown in FIGS. 1–3.