There is a trend in the semiconductor industry to reduce the geometry of semiconductor devices to thereby increase the number of such devices available in a given area. This reduction of the geometry of the semiconductor device results in increased density of an integrated circuit (IC) chip. As the integration degree of semiconductor devices becomes high, the device size must be gradually reduced. The increased density of semiconductor devices in a given area of an IC chip results in an increased performance by the IC chip, including faster operating speeds and power consumption necessary to supply the IC chip.
The size of a semiconductor device is in large part dependent on the critical length of a "channel" in a semiconductor device. A "channel" is a thin region of the device that supports conduction. Channel lengths have continuously shrunk to the submicron range. State of the art channel lengths range from approximately 0.18 .mu.m to 0.25 .mu.m.
If a semiconductor device below 0.1 micron size is manufactured, there may be a need to use multiple threshold voltages. For instance, random logic may be located on the same chip as the memory when using semiconductor devices below 0.1 micron size. The random logic may require a low threshold voltage while the memory may require a higher threshold voltage. Conventionally, it is typically very difficult to manufacture a single IC chip which allows the use of multiple threshold voltages. Many additional masking steps would be required to produce such an IC chip in the conventional manner.
Accordingly, what is needed is a device which is smaller than the conventionally sized semiconductor devices which can allow the threshold voltages to be adjusted, and a method for producing such a device. The present invention addresses such a need.