def create_normal_add_op(names, op_code, shifts, BW_in, BW_out, module_name,
    reset_name, depth):
    """
    Creates an add or subtract operation
    names = [ out_name, a_name, b_name, c_name ]
    op_code = 0 -> - a - b - c
    op_code = 1 -> - a - b + c
    op_code = 2 -> - a + b - c
    op_code = 3 -> - a + b + c
    op_code = 4 ->   a - b - c
    op_code = 5 ->   a - b + c
    op_code = 6 ->   a + b - c
    op_code = 7 ->   a + b + c
    shifts = [ shift_a, shift_b, shift_c ]
    BW_in -> the bitwidth of the input
    BW_out -> the bitwidth of the output
    module_name -> the name to call the adder
    reset_name -> the reset to use, will assert the reset on the cycle before use ( not used in this op )
    depth -> how deep the op is down the tree, inputs have a depth of 0 ( not used in this op )
    """
    op_str = ''
    op_mod = 4
    for n, s in zip(names[1:], shifts):
        if op_code < op_mod:
            op_str += ' - '
        elif op_mod != 4:
            op_str += ' + '
        op_code = op_code % op_mod
        op_mod = op_mod >> 1
        op_str += '( $signed( ' + n + ' ) '
        if s < 0:
            op_str += ' >> ' + str(-s) + ' )'
        elif s > 0:
            op_str += ' << ' + str(s) + ' )'
        else:
            op_str += ')'
    add_op = 'reg [' + str(BW_in - 1) + ':0] ' + names[0
        ] + """;
always @( posedge clock ) begin
""" + names[0
        ] + ' <= ' + op_str + ';\nend\n'
    return add_op, BW_in
