An embedded system usually consists of a set of sensors cooperating with one or more decisions centres. The design of such a system complicates in respect of both a complicated scheme of components interconnections and their parallel execution. In practice, the latter one excludes testing as a way to guarantee an expected level of a system quality. Thus, a formal verification of such systems is necessary. Alvis is a novel modelling language designed especially for embedded systems. However, it can be used for modelling any information system with concurrent activities. The key concept of Alvis is an agent that denotes any distinguished part of the system under consideration with defined identity persisting in time. The behaviour of agents is defined using Alvis Code Language (AlvisCL) that resembles high level programming languages. Interconnections among agents are defined using Communication Diagrams (AlvisCD) - a visual hierarchical modelling notation. For formal verification purposes, an LTS graph (Labelled Transition System) is generated for an Alvis model. The paper deals with the problem of encoding time relationships with LTS graphs if a model with agents that run concurrently is considered. As a solution, snapshot reachability graphs are proposed.
['Marcin Szpyrka', 'Leszek Kotulski']
Snapshot reachability graphs for Alvis models