Concurrent designs can be automatically verified by transforming them into an automata-based representation and by model checking the resulting model. However, when transforming a concurrent design into an automata-based representation, each method has to be translated into a single automaton. This produces a significant overhead for model checking. In this paper, we present an optimization  of our previously proposed transformation from SystemC into Uppaal timed automata.    The main idea is that we analyze whether SystemC methods can be executed atomically and then we use the results for generating a reduced automata model. We have implemented the optimized transformation in our      SystemC to     T    imed     A    utomata     T    ransformation     E    ngine (    STATE    ) and demonstrate the effect of our optimization with     experimental results from micro benchmarks, a simple producer-consumer example, and from an Anti-Slip Regulation and Anti-lock Braking System (ASR/ABS).
['Marcel Pockrandt', 'Paula Herber', 'Holger Gross', 'Sabine Glesner']
Optimized Transformation and Verification of SystemC Methods