Intensive arithmetic computations in 3D graphic applications and scientific computations demand parallel division. A high throughput divider implemented in output prediction logic (OPL) is presented. By combining the carry-free nature of a redundant number system and the high-speed characteristics of OPL, the performance of the dividing unit is tremendously improved. Fabricated in 0.18/spl mu/m/1.8V CMOS, the radix-4 divider is capable of achieving an operating frequency of 1.2GHz.
['Xinyu Guo', 'Carl Sechen']
A high throughput divider implementation