This paper proposes a multiple-divide technique using by-2, by-3, and by-4 frequency dividers to realize a lower phase-noise LC-VCO, and explores the design space of low-phase-noise VCO using the multiple-divide technique. In the simulated results using 90-nm CMOS model parameters, the optimum frequency range, achieving better than -191dBc/Hz of FoM, can be extended from 6-12 GHz to 1.5-12 GHz.
['Shoichi Hara', 'Takeshi Ito', 'Kenichi Okada', 'Akira Matsuzawa']
Design space exploration of low-phase-noise LC-VCO using multiple-divide technique