A 4-transistor (4-T) CMOS voltage reference with two high PSRR output voltages is presented. The output voltages are equal to the scaled voltage difference of two threshold voltages at absolute zero temperature. The temperature coefficients' (TCs) difference of the two threshold voltages is compensated by another transistor-size-controlled temperature coefficient to achieve zero TC outputs. A CMOS voltage reference with 0.5V–1.2V supply voltage, two output voltages of 182mV and 85.5mV, is implemented with a 0.13µm CMOS process. Simulation results show that temperature coefficients of 32ppm/°C and 52.5ppm/°C from 0 to 100 °C, and line sensitivities of 0.095%/V and 0.104 %/V are achieved for the two reference voltages, respectively. The supply current is 3nA under all the supply voltage range at room temperature. Moreover, the power supply rejection ratios (PSRRs) of two outputs are −63.83dB and −70.4dB at 100Hz, and −77dB and −98dB at 100kHz, respectively.
['Xiaocheng Jing', 'Philip K. T. Mok', 'Cheng Huang', 'Fan Yang']
A 0.5V nanoWatt CMOS voltage reference with two high PSRR outputs