A generalized interconnect model for data path synthesis is presented. This is a multi-level interconnect model designed for synthesis under interconnect constraints. Two novel algorithms for dynamic interconnect allocation and interconnect synthesis are also described. These algorithms help implement the generalized interconnect model in the Elf hardware compiler.
['Tai A. Ly', 'W. Lloyd Elwood', 'Emil F. Girczyc']
A generalized interconnect model for data path synthesis