For FPGA based coprocessors for elliptic curve cryptography, a significant performance gain can be achieved when hybrid coordinates are used to represent points on the elliptic curve. We provide a new area/performance tradeoff analysis of different hybrid representations over fields of characteristic two. Moreover, we present a new generic cryptoprocessor architecture that can be adapted to various area/performance constraints and finite field sizes, and show how to apply high level synthesis techniques to the controller design.
['Marcus Bednara', 'M. Daldrup', 'J. von zur Gathen', 'Jamshid Shokrollahi', 'J. Teich']
Reconfigurable implementation of elliptic curve crypto algorithms