A methodology is proposed to reduce power/ground and substrate coupling noise by randomizing the clock signal. A pseudo-random number generation algorithm is used to produce a pseudo-random clock. A probability adjustment technique is introduced to compensate for the speed loss, permitting the average frequency of the pseudo-random clock to be determined. The proposed method achieves more than 24 dB attenuation in noise at the center frequency at a cost ooff less than 4% reduction in speed.
['Selçuk Köse', 'Emre Salman', 'Zeljko Ignjatovic', 'Eby G. Friedman']
Pseudo-random clocking to enhance signal integrity