Transaction-level modeling (TLM) has been proposed as the leading strategy to address the always increasing complexity of digital systems. However, modeling a complex system completely at transaction level (TL) could be inconvenient when IP cores are available on the market, usually modeled at RT level. In this context, modeling and verification methodologies based on transactors allow one to reuse RTL IP-cores in TL-RTL mixed designs, thus guaranteeing a considerable saving of time. Even if practical advantages of such an approach are evident, mixed TL-RTL designs cannot completely benefit from the well-known effectiveness provided by TLM. Thus, this paper proposes a methodology to abstract RTL IPs into corresponding TL descriptions. The possibility of automating the methodology is deeply analyzed. In particular, the paper shows which abstraction levels can be reached without requiring human intervention, according to the characteristics of the design to be refined. A set of experimental results are finally reported to confirm the effectiveness of the methodology.
['Nicola Bombieri', 'Franco Fummi', 'Graziano Pravadelli']
A methodology for abstracting RTL designs into TL descriptions