Piecewise approximate circuit simulation has proven to be a reliable and efficient technique for the transient simulation of digital integrated circuits. The method permits variable accuracy event-driven simulation both across runs of the simulator and across portions of the circuit, allowing the user to control the tradeoff between accuracy and efficiency. Variable accuracy is achieved by using table models built at different voltage resolution levels. This paper presents a timing error criterion based on which dynamic stepsize control has been implemented in a piecewise approximate circuit simulator. The stepsize control enables each device to take the largest possible current/voltage step while staying within prescribed error bounds. Thus steady state level accuracy is improved to within the minimum table model resolution. Further, the stepsize control scheme combined with a new steady state algorithm allows the efficient simulation of “stifl” circuits.
['Chandramouli Visweswariah']
Stepsize Control in Piecewise Approximate Circuit Simulation