Continued scaling of switching capacity in the Internet core is threatened by power considerations. Internet service providers face increased carbon footprint and operational costs, while router manufacturers encounter upper limits on switching capacity per rack. This paper studies the role of packet buffer memory on the power consumption of backbone routers. Our first contribution is to estimate from published datasheets the energy costs of static RAM/dynamic RAM packet-buffer memory, showing that it accounts for over 10% of power consumption in a typical router line-card; we then show, using empirical data from core and enterprise networks, that much of this memory is used for only a small fraction of time. Our second contribution is to develop a simple yet practical algorithm for putting much of the memory components to sleep and waking them as needed, while being able to control resulting traffic performance degradation in the form of packet loss during transient congestion. Finally, we conduct a comprehensive evaluation of our scheme, via analytical models pertaining to long-range-dependent traffic, using simulations of offline traffic traces taken from carrier/enterprise networks as well as online Transmission Control Protocol flows in ns2, and by implementing our scheme on a programmable-router test bed. This paper is the first to show the feasibility of, and energy savings from, dynamic management of packet buffer memory in core routers in the market today.
['Vijay Sivaraman', 'Arun Vishwanath', 'Diethelm Ostry', 'Marina Thottan']
Greening Router Line-Cards via Dynamic Management of Packet Memory