In hardware implementation of a cryptographic algorithm, one may achieve leakage of secret information by creating scopes to introduce controlled faulty bit(s) even though the algorithm is mathematically a secured one. The technique is very effective in respect of crypto processors embedded in smart cards. In this paper few fault detecting archi- tectures for RC4 algorithm are designed and implemented on Virtex5(ML505) FPGA. The results indicate that the proposed architectures can handle most of the faults without loss of throughput consuming marginally additional hardware and power.
['Rourab Paul', 'Amlan Chakrabarti', 'Ranjan Ghosh']
Fault Detection for RC4 Algorithm and its Implementation on FPGA Platform