This paper presents the hardware design procedures of the modulator and demodulator for the in-vehicle system (IVS) of the 3GPP eCall system. The modules are designed, synthesized and simulated in Xilinx ISE tool as a step of developing all modules of the IVS on a single chip. The designed modules are implemented on a Field Programmable Gate Array (FPGA) and the design is optimized to reduce the processing time for the IVS modem on a single chip. The simulated and generated waveforms and results are shown and analyzed for a complete set of input signals to the modules. Multiple clock frequencies are used to test and verify the modules. The verified range of clock frequencies does not only give flexibility of the inter interface between the modules of the IVS modem but also optimizes the processing time of the modules.
['Majeed Nader', 'John Q. Liu']
Developing modulator and demodulator for the EU eCall in-vehicle system in FPGAs