This work proposed to use a two-element array of coupled PLLs to generate quadrature signals. The main advantage of this technique is that phase noise performance and quadrature accuracy do not trade-off. A dual-mode quadrature VCO designed in a digital 0.13 mum CMOS technology is used as test vehicle to verify the viability of the proposed concept.
['Andrea Bevilacqua', 'Christoph Sandner', 'Andrea Gerosa', 'Andrea Neviani']
Quadrature VCOs Based on Coupled PLLs