It allows the converters to seamlessly regulate the output voltage at any desired level without suffering large leakage current and latch-up. In addition, an automatic supply voltage multiplexing scheme is presented to significantly improve power efficiency and reduce chip area. The proposed ASSM circuit was fabricated with an IBM 130-nm CMOS process. Experimental results show a 4.44-mV/ns switching speed with a switching voltage ranging from 0.9 to 2.5 V. Due to an accurate voltage comparison, the tracking error in steady state is effectively minimized below 5 mV. The circuit only occupies a 0.015-mm 2  silicon area, with maximum static power of 227 μW.
['Chen Zheng', 'Dongsheng Ma']
Design of a Monolithic Automatic Substrate/Supply Multiplexer for DVS-Enabled Adaptive Power Converters