A low-complexity soft-output Max-log-MAP (maximum a posteriori probability) detector for N 2 -QAM is exemplified for a 64-QAM 2timesM multiple-input-multiple-output (MIMO) system, exhibiting the following novel features: (1) hierarchical formulation of the exhaustive metric calculation to reduce the number of candidate tests by a factor of N per received symbol, and (2) multiplier-free implementation of the exhaustive search with 8-fold parallelization. The computational complexity is reduced by a factor of about 250, resulting in a chip area of 0.031 mm 2  using 65 nm CMOS.
['Nils Graef', 'Joachim S. Hammerschmidt', 'Carl-Erik W. Sundberg']
A low-complexity max-log-MAP detector