We propose a multimedia SoC platform with a crossbar on-chip bus which can reduce the bottleneck of on-chip communication by multi-channels. The platform consists of RISC processor, WISHBONE crossbar on-chip bus, memory interface, VGA controller, DMA, AC97 controller, debug interface and UART. The crossbar on-chip bus supports up to 8 masters and 16 slaves, WISHBONE compatible peripheral IPs and allows more than one master to use the bus because of multiple channels. As a result of the test program, the proposed platform has better efficiency by 26.58% than the SoC platform with shared bus on-chip bus.
['Hongkyun Jung', 'Xianzhe Jin', 'Younjin Jung', 'Ok Kim', 'Byoung-Yup Lee', 'Jungbum Heo', 'Kwangki Ryoo']
Design of Multimedia SoC Platform with a Crossbar On-Chip Bus for Embedded Systems