Reduction of worst-case delay and delay uncertainty due to capacitive coupling is a still unsolved problem in physical design. We describe a routing only layout solution-swizzling-which reduces worst-case coupling delay for long parallel wires such as in wide on-chip global buses. We understand that swizzling is a folklore in structured-custom design community but we are the first to describe the method and analyze the potential benefits in literature. We give a general method for construction of good swizzling patterns. We also give empirically determined, optimal swizzling patterns for various technology nodes and typical repeater intervals. From our results, we see up to 31.5% reduction in worst-case delay and 34% reduction in delay uncertainty.
['Puneet Gupta', 'Andrew B. Kahng']
Wire swizzling to reduce delay uncertainty due to capacitive coupling