This paper presents hardware architecture to perform the basic arithmetic operation addition using cellular automata (CA). This age old problem of addition were previously solved by ripple circuit or carry look ahead circuit or by using a combination of them. Each of these circuits is purely combinational in nature and their complexity is centered on the number of logic gates and the associated gate delays. On the contrary, in our CA based design the complexity is mainly centered on the number of clock cycles required to finish the computation instead of the gate delays.
['Pabitra Pal Choudhury', 'Sudhakar Sahoo', 'Mithun Chakraborty']
Implementation of Basic Arithmetic Operations Using Cellular Automaton