Loop tiling is an effective loop transformation technique that tiles the iteration space of loop nests to improve the data locality. The appropriate data layout and transfer strategies are also important to assist loop tiling. This paper describes an approach to enhance data reuse and reduce off-chip memory access after loop tiling. Data tiles due to loop tiling may have overlapped elements, which will lead to more larger data transfer cost. This also provides us with the challenge to exploit data reuse between data tiles. Using our approach we are able to reduce these unnecessary data transfers and improve the performance compared to traditional pure loop tiling.
['Guiming Wu', 'Jinhui Xu', 'Yong Dou', 'Miao Wang']
Computation rotating for data reuse