The paper deals with the design of a charge pump circuit after analyzing the current mismatch problem. Charge sharing problem is eliminated by using transistors. For enhancing the matching characteristics a cascode type current mirror circuit is used. This design provides a technique by which the value of I up  and I dn  is matched in way that there is no time mismatch between the UP and DN signals. The proposed design has a added advantage of low power consumption. All simulations are done at 1.8v power supply.
['Monika Bhardwaj', 'Sujata Pandey']
Design of a wide output range and reduced current mismatch charge pump PLL with improved performance