Some constraints imposed on the design of components for mobile devices are the size of the handheld device, safety for handling, heat dissipation, and in-system electromagnetic interference. This paper discusses challenges in designing the next generation low power DRAM subsystem operating at multi-gigabits per second. A new mobile DRAM interface that can meet the challenges and some test data are presented.
['Tsunwai Gary Yip', 'Philip Yeung', 'Ming Li', 'Deborah Dressler']
Challenges in designing high speed memory subsystem for mobile applications