Asynchronous interfaces, being a popular way of dealing with timing closure problems in deep submicron SoCs, pose a serious problem for on-line testing. Their behavior is specified not as a traditional clocked automaton, but as an asynchronous protocol with timing which depends on the clocks of the communicating blocks, wire and gate delays. The problem is exacerbated by the use of non-encoded bundled data buses, whose transitions cannot be reliably detected, as opposed to very expensive self-timed data encodings. This paper presents a further development of our low-cost checkers for asynchronous handshake protocol, which now support bundled data and are interfaced to the scan chains to assist diagnosis and debugging. Further reduction of area requirements for the delay elements, possibilities to define separate delays for each protocol phase, test results collection and checking the timing relationships between the handshake and the data signals are discussed. An application of the data transition detectors to checking of synchronous SDR/DDR protocols is shown.
['Steffen Zeidler', 'Alex Bystrov', 'Milos Krstica', 'Rolf Kraemer']
On-line testing of bundled-data asynchronous handshake protocols