The ubiquitous processor has been developed under the strategy to unify PC processors, mobile processors, cryptography processors, RFID tags, etc. These devices have obviously supported the trend of ubiquitous network, computing, environment, etc. The unification of these devices has been effective to achieve power consciousness for Green IT and secureness for ubiquitous environment. The authors have developed a ubiquitous processor architecture named HCgorilla and have implemented it in CMOS standard cell chips. Then, the target of this study is the shift of HCgorilla to SoC, considering adaptability to SoC and resource-constrained implementation is cutting edge microprocessor tendency. Since this requires the total improvement of HCgorilla, the complicated clock schemes are optimized together. HCgorilla has so far applied gated clock, scan path, and waved MFU (multifunctional unit). Although the first two processor techniques have been supported by regular CAD tools, the wave-pipelining has been mainly done by manual tuning because it has not always been so popular. The specific features of the improved HCgorilla and its implementation in CMOS standard cell chips are described in this article.
['Masa-aki Fukase', 'Harunobu Uchiumi', 'Kazuki Narita', 'Tatsuya Takaki', 'Naomichi Mimura', 'Kohei Ichinohe', 'Tomoaki Sato', 'Atsushi Kurokawa']
Development of a next generation ubiquitous processor chip