Cache structures in a multicore system are considerably susceptible to soft errors. Protecting all caches using fault tolerance techniques has notable overheads on performance and power consumption. In this paper, we propose an enhanced protection mechanism for reliability-based critical code regions of the applications on asymmetrically reliable cores which have different error-tolerant cache structures. In this system, software threads which execute reliability-based critical code regions are mapped onto the protected cores, whereas the threads which execute non-critical regions are mapped to the unprotected ones, dynamically during the execution. Our experimental evaluations indicate that the proposed system improves Silent Data Corruption SDC rate by 66i¾ź% with 22i¾ź% performance loss and 1.2i¾ź% more power consumption for selected applications relative to the unprotected caches on average.
['Sanem Arslan', 'Haluk Rahmi Topcuoglu', 'Mahmut T. Kandemir', 'Oguz Tosun']
Protecting Code Regions on Asymmetrically Reliable Caches