This paper presents an application of a new analytic signal method for measuring clock skews in the clock distribution network of microprocessors. The method can measure skews between the master system clock and distributed clocks, between two distributed clocks, or between clocks whose frequencies are related by frequency division. Experimental data using a PowerPC/sup TM/ microprocessor is presented for validation.
['Takahiro J. Yamaguchi', 'Mani Soma', 'Jim Nissen', 'David Halter', 'Rajesh Raina', 'Masahiro Ishida']
Testing clock distribution circuits using an analytic signal method