This paper proposes the design of parallel and pipelined architectures to the first step of the JPEG compression: the color space conversion from RGB to YCbCr. The design of these parallel architectures uses a non-parallel architecture designed in previous works. The parallelism makes possible a great gain in terms of pixels processing rate, with a very small impact in terms of resources usage. The proposed architectures were described in VHDL and synthesized for Altera Flex 10KE FPGAs family, reaching frequencies near to 40 MHz. The parallel architectures reach a processing rate higher than 10 million pixels per second. These architectures are able to convert the color space of more than 40 color images of 640 × 480 pixels at each second.
['Luciano Volcan Agostini', 'Ivan Saraiva Silva', 'Sergio Bampi']
Parallel color space converters for JPEG image compression