Matching input/output (I/O) driver output resistance to transmission line impedance is critical for high-speed I/O operation in source series termination environments. Tuning driver output resistance can be accomplished through the use of calibration circuitry. Under ideal conditions, calibration circuitry can properly calibrate an I/O driver. Operating in an environment with die process, voltage, and temperature variations, that same calibration circuitry may perform improperly. This brief presents an I/O driver design that is less sensitive to process, voltage, and temperature variations. The proposed driver design provides a near linear or flat, output resistance response verses output voltage. Advantages of the proposed I/O driver architecture lie in applications where the output DC operating point may have a large variation, thus, reducing the error in matching output resistance.
['Gerald Esch', 'Tom Chen']
Near-linear CMOS I/O driver with less sensitivity to process, voltage, and temperature variations