The paper presents a novel fully-integrated AC-coupling circuit with hybrid common-mode voltage generation and baseline-wander compensation. The on-chip generated and dynamically maintained Vcm offers the maximum freedom for circuit optimization. The BLW compensation can deal with wanders immersed in excessive channel-limiting ISI, and imposes `zero' resistive or capacitive loads to the high-speed data line. The high-frequency kick-back noise contamination is also mitigated. The proposed circuit is implemented in 90nm standard CMOS and validated on silicon.
['Yikui Dong', 'Cathy Liu', 'Freeman Y. Zhong']
Integrated Linear AC-coupling Circuit for DC-Balanced and Non-Balanced Traffics