This paper presents the hardware architecture and template matching using distance transform. In the proposed method, the extracted Canny edge image is used as a template for matching processing. The distance images are transformed from the Canny edge image to produce a searching template. Then matching processing will start to find the template in distance image. We implement the template matching hardware architecture on a Xilinx Virtex5 XC5LVX330 Field Programmable Gate Array (FPGA) and Verilog Hardware Description Language (Verilog HDL). The maximum operating frequency of this implementation is 110 MHz. It can run more than 240 frames per second with VGA (640x480) resolution image.
['Seong-Wook Jang', 'Byeong-Oh Jo', 'SangJun Lee', 'Jae Wook Jeon']
The Development of the Hardware Architecture to Perform Template Matching using Distance Transform