The performance of integrated circuits has been growing exponentially, which has resulted in the development of a variety of VLSI products for communications, computers, and medical applications. The increase in the performance is mainly due to the decrease in the dimensions of the integrated circuit chip. To sustain this improvement, the industry has to overcome several technological challenges in scaling the devices and interconnects. Metal interconnects have become a significant performance limiter. Carbon Nanotubes have been proposed as a possible replacement for copper as an interconnect material. Multiplier circuit is used as one of the important building block in most of the digital circuits. In this paper carry-save-adder-array multiplier has been taken for study and the effects of copper interconnect and carbon nanotube interconnect are discussed. The performance of critical delay with respect to device technology is presented.
['C. Thiruvenkatesan', 'J. Raja']
Studies on the Application of Carbon Nanotube as Interconnects for Nanometric VLSI Circuits