A program for automatic extraction of a gate-level description from a transistor-level description based on the layout of a CMOS VLSI circuit is presented. The extraction algorithm combines transistors to gates to arbitrary complexity without the help of any cell library. The resulting gate-level description provides the input for a digital logic simulator for further investigations. >
['Michael Boehner']
LOGEX—an automatic logic extractor form transistor to gate level for CMOS technology