Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The multilayer stochastic neural network and its associated VLSI array neuroprocessors are presented for VLSI optical flow computing. This network is ll-suited to VLSI implementation due to the high parallelism and local connectivity. Instead of using deterministic scheme, a stochastic decision rule implemented with electronic annealing techniques is used to search optimal solutions. VLSI array neuroprocessor architecture is proved to be an effective supercomputing hardware for real-time optical flow applications. A prototype 25-neuron chip for this VLSI array neuroprocessors (called a velocity-selective hyperneuron chip) has been implemented using MOSIS 2- mu m CMOS technology. A real-time optical flow machine is feasible by using arrays of hyperneuron chips. >
['Wai-Chi Fang', 'Bing J. Sheu', 'Ji-Chien Lee']
I am writing a research paper on a idea Real-time computing of optical flow using adaptive VLSI neuroprocessors
[{"from": "human", "value": "I am writing a research paper on a idea Real-time computing of optical flow using adaptive VLSI neuroprocessors"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The multilayer stochastic neural network and its associated VLSI array neuroprocessors are presented for VLSI optical flow computing. This network is ll-suited to VLSI implementation due to the high parallelism and local connectivity. Instead of using deterministic scheme, a stochastic decision rule implemented with electronic annealing techniques is used to search optimal solutions. VLSI array neuroprocessor architecture is proved to be an effective supercomputing hardware for real-time optical flow applications. A prototype 25-neuron chip for this VLSI array neuroprocessors (called a velocity-selective hyperneuron chip) has been implemented using MOSIS 2- mu m CMOS technology. A real-time optical flow machine is feasible by using arrays of hyperneuron chips. >"}]