Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: , based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder with high throughput is proposed. Following the top-down design methodology, algorithm analyzing and dataflow modeling in both high and low granularities are performed to achieve the proposed architecture. According to the analysis for algorithm, the similarity beten CABAC decoder and Viterbi decoder is found to extend the degree of parallelism for binary arithmetic decoding. The application of proposed design is specified to support AVC/H.264 High Profile, 4.2 Level, and 1920×1088 resolution at 64 frames per second. By increasing the degree of parallelism of bin decoding, the throughput of the proposed architecture is shown by the experiments to have improved 3.5 times as compared to the sequential bin decoding, and the decoded bin per second can reach 378M at clock speed 108MHz.
['Jia-Wei Liang', 'He-Yuan Lin', 'Gwo Giun Lee']
I am writing a research paper on a idea A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder
[{"from": "human", "value": "I am writing a research paper on a idea A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: , based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder with high throughput is proposed. Following the top-down design methodology, algorithm analyzing and dataflow modeling in both high and low granularities are performed to achieve the proposed architecture. According to the analysis for algorithm, the similarity beten CABAC decoder and Viterbi decoder is found to extend the degree of parallelism for binary arithmetic decoding. The application of proposed design is specified to support AVC/H.264 High Profile, 4.2 Level, and 1920\u00d71088 resolution at 64 frames per second. By increasing the degree of parallelism of bin decoding, the throughput of the proposed architecture is shown by the experiments to have improved 3.5 times as compared to the sequential bin decoding, and the decoded bin per second can reach 378M at clock speed 108MHz."}]