Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Reducing the effects of off-chip memory access latency is a key factor in exploiting efficiently embedded multi-core platforms.  consider architectures that admit a multi-core computation fabric, having its own fast and small memory to which the data blocks to be processed are fetched from external memory using a DMA (direct memory access) engine, employing a double- or multiple-buffering scheme to avoid processor idling.   focus on application programs that process two-dimensional data arrays and  determine automatically the size and shape of the portions of the data array which are subject to a single DMA call, based on hardware and applications parameters. When the computation on different array elements are completely independent, the asymmetry of memory structure leads always to prefer one-dimensional horizontal pieces of memory, while when the computation of a data element shares some data with its neighbors, there is a pressure for more "square" shapes to reduce the amount of redundant data transfers.  provide an analytic model for this optimization problem and validate our results by running a mean filter application on the Cell simulator.
['Selma Saidi', 'Pranav Tendulkar', 'Thierry Lepley', 'Oded Maler']
I am writing a research paper on a idea Optimizing two-dimensional DMA transfers for scratchpad Based MPSoCs platforms
[{"from": "human", "value": "I am writing a research paper on a idea Optimizing two-dimensional DMA transfers for scratchpad Based MPSoCs platforms"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Reducing the effects of off-chip memory access latency is a key factor in exploiting efficiently embedded multi-core platforms.  consider architectures that admit a multi-core computation fabric, having its own fast and small memory to which the data blocks to be processed are fetched from external memory using a DMA (direct memory access) engine, employing a double- or multiple-buffering scheme to avoid processor idling.   focus on application programs that process two-dimensional data arrays and  determine automatically the size and shape of the portions of the data array which are subject to a single DMA call, based on hardware and applications parameters. When the computation on different array elements are completely independent, the asymmetry of memory structure leads always to prefer one-dimensional horizontal pieces of memory, while when the computation of a data element shares some data with its neighbors, there is a pressure for more \"square\" shapes to reduce the amount of redundant data transfers.  provide an analytic model for this optimization problem and validate our results by running a mean filter application on the Cell simulator."}]