Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: In the next-generation visual surveillance systems, content analysis tools will be integrated. , to accelerate these tools, it is proposed to integrate a hardware content analysis engine into a smart camera system-on-a-chip (SoC). A smart camera SoC hardware architecture with the proposed visual content analysis engine is first presented. This engine consists of dedicated accelerators and a programmable morphology coprocessor. Stream processing design concept, frame-level pipelining, and subword level parallelism are employed together to efficiently utilize the bandwidth of the system bus and achieve high throughput. The implementation results show that, with 168 K logic gates and 40.63 Kb on-chip memory, a processing speed of 30 640 x 480 frames/s can be achieved, while the operations of video object segmentation, object description and tracking, and face detection and scoring are supported.
['Wei-Kai Chan', 'Jing-Ying Chang', 'Tse-Wei Chen', 'Yu-Hsiang Tseng', 'Shao-Yi Chien']
I am writing a research paper on a idea Efficient Content Analysis Engine for Visual Surveillance Network
[{"from": "human", "value": "I am writing a research paper on a idea Efficient Content Analysis Engine for Visual Surveillance Network"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: In the next-generation visual surveillance systems, content analysis tools will be integrated. , to accelerate these tools, it is proposed to integrate a hardware content analysis engine into a smart camera system-on-a-chip (SoC). A smart camera SoC hardware architecture with the proposed visual content analysis engine is first presented. This engine consists of dedicated accelerators and a programmable morphology coprocessor. Stream processing design concept, frame-level pipelining, and subword level parallelism are employed together to efficiently utilize the bandwidth of the system bus and achieve high throughput. The implementation results show that, with 168 K logic gates and 40.63 Kb on-chip memory, a processing speed of 30 640 x 480 frames/s can be achieved, while the operations of video object segmentation, object description and tracking, and face detection and scoring are supported."}]