Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Spike-timing-dependent plasticity (STDP) incurs both causal and acausal synaptic ight updates, for negative and positive time differences beten pre-synaptic and postsynaptic spike events. For realizing such updates in neuromorphic hardware, current implementations either require forward and reverse lookup access to the synaptic connectivity table, or rely on memory-intensive architectures such as crossbar arrays.  present a novel method for realizing both causal and acausal ight updates using only forward lookup access of the synaptic connectivity table, permitting memory-efficient implementation. A simplified implementation in FPGA, using a single timer variable for each neuron, closely approximates exact STDP cumulative ight updates, and reduces to exact STDP for refractory periods greater than the STDP time window. Compared to conventional crossbar implementation, the forward table-based implementation using run-length encoding leads to substantial memory savings for sparsely connected networks supporting scalable neuromorphic systems with fully reconfigurable synaptic connectivity and plasticity.
['Bruno U. Pedroni', 'Sadique Sheik', 'Siddharth Joshi', 'Georgios Detorakis', 'Somnath Paul', 'Charles Augustine', 'Emre Neftci', 'Gert Cauwenberghs']
I am writing a research paper on a idea Forward table-based presynaptic event-triggered spike-timing-dependent plasticity
[{"from": "human", "value": "I am writing a research paper on a idea Forward table-based presynaptic event-triggered spike-timing-dependent plasticity"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Spike-timing-dependent plasticity (STDP) incurs both causal and acausal synaptic ight updates, for negative and positive time differences beten pre-synaptic and postsynaptic spike events. For realizing such updates in neuromorphic hardware, current implementations either require forward and reverse lookup access to the synaptic connectivity table, or rely on memory-intensive architectures such as crossbar arrays.  present a novel method for realizing both causal and acausal ight updates using only forward lookup access of the synaptic connectivity table, permitting memory-efficient implementation. A simplified implementation in FPGA, using a single timer variable for each neuron, closely approximates exact STDP cumulative ight updates, and reduces to exact STDP for refractory periods greater than the STDP time window. Compared to conventional crossbar implementation, the forward table-based implementation using run-length encoding leads to substantial memory savings for sparsely connected networks supporting scalable neuromorphic systems with fully reconfigurable synaptic connectivity and plasticity."}]