Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Majority of existing works on system level por estimation have focused on the processor, while there are very few that address por consumption of peripherals in a SoC. With the presence of complex cores in current day embedded system-on-chip devices, the problem of complete system level por estimation is gaining significance. Transaction level models for SoCs are gaining increasing attention with emerging architectural modeling standards like SystemC.   present a methodology for performing system por estimation for different scenarios or applications being executed on these transaction level models.  describe techniques and a setup for transaction level por characterization, and an approach to augment SystemC transaction level models to perform transaction level por estimation.  also present experimental results to validate the accuracy and speed of our approach.
['Nagu R. Dhanwada', 'Ing-Chao Lin', 'Vijaykrishnan Narayanan']
I am writing a research paper on a idea A power estimation methodology for systemC transaction level models
[{"from": "human", "value": "I am writing a research paper on a idea A power estimation methodology for systemC transaction level models"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Majority of existing works on system level por estimation have focused on the processor, while there are very few that address por consumption of peripherals in a SoC. With the presence of complex cores in current day embedded system-on-chip devices, the problem of complete system level por estimation is gaining significance. Transaction level models for SoCs are gaining increasing attention with emerging architectural modeling standards like SystemC.   present a methodology for performing system por estimation for different scenarios or applications being executed on these transaction level models.  describe techniques and a setup for transaction level por characterization, and an approach to augment SystemC transaction level models to perform transaction level por estimation.  also present experimental results to validate the accuracy and speed of our approach."}]