Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: ,  propose a partially-parallel irregular LDPC decoder for IEEE 802.11n standard. The design is based on a novel sum-delta message passing schedule to achieve high throughput and low area cost design.  further improve the design with pipeline structure and parallel computation. The synthesis result in TSMC 0.18 CMOS technology demonstrates that for (648,324) irregular LDPC code, our decoder achieves 7.5X improvement in throughput, which reaches 402 Mbps at the frequency of 200MHz, with 11% area reduction.
['Wen Ji', 'Yuta Abe', 'Takeshi Ikenaga', 'Satoshi Goto']
I am writing a research paper on a idea A high performance LDPC decoder for IEEE802.11n standard
[{"from": "human", "value": "I am writing a research paper on a idea A high performance LDPC decoder for IEEE802.11n standard"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: ,  propose a partially-parallel irregular LDPC decoder for IEEE 802.11n standard. The design is based on a novel sum-delta message passing schedule to achieve high throughput and low area cost design.  further improve the design with pipeline structure and parallel computation. The synthesis result in TSMC 0.18 CMOS technology demonstrates that for (648,324) irregular LDPC code, our decoder achieves 7.5X improvement in throughput, which reaches 402 Mbps at the frequency of 200MHz, with 11% area reduction."}]