Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Available statistical skew model is too conservative to estimate the expected clock skew of a ll-balanced H-tree. New closed form model is presented for accurately estimating the expected values and the variances of both clock skew and the largest clock delay of a ll-balanced H-tree. Based on the new model, clock period optimization of wafer scale H-tree clock network is investigated under two clocking modes.  find that when the conventional clocking mode is used, clock period optimization of wafer scale H-tree is reduced to the minimization of expected largest clock delay under both area restriction and por restriction. On the other hand, when the pipelined clocking mode is considered, the optimization is reduced to the minimization of expected clock skew under por restriction.
['Xiaohong Jiang', 'Susumu Horiguchi']
I am writing a research paper on a idea Optimization of wafer scale H-tree clock distribution network based on a new statistical skew model
[{"from": "human", "value": "I am writing a research paper on a idea Optimization of wafer scale H-tree clock distribution network based on a new statistical skew model"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Available statistical skew model is too conservative to estimate the expected clock skew of a ll-balanced H-tree. New closed form model is presented for accurately estimating the expected values and the variances of both clock skew and the largest clock delay of a ll-balanced H-tree. Based on the new model, clock period optimization of wafer scale H-tree clock network is investigated under two clocking modes.  find that when the conventional clocking mode is used, clock period optimization of wafer scale H-tree is reduced to the minimization of expected largest clock delay under both area restriction and por restriction. On the other hand, when the pipelined clocking mode is considered, the optimization is reduced to the minimization of expected clock skew under por restriction."}]