Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Normally-off computing (NoC) is one of promising techniques that benefits microsystems with long sleep time. Because NoC can turn off por to achieve zero por consumption and can activate microsystems instantly. This study proposes a novel resistive random access memory (ReRAM)-based nonvolatile flip-flop (NVFF), fabricated using 90-nm CMOS technology and the ReRAM process of the Industrial Technology Research Institute. The proposed NVFF uses a complementary structure with one-phase store to mitigate limitation on store energy and was verified as the registers in three pipeline stages of a NV multiplier-and-accumulator macro. The proposed ReRAM-based NVFF, compared with the state-of-the-art complementary design, can reduce store energy by 36.4%, restore time by 64.2%, and circuit area by 42.8%. The proposed design was also superior in reducing restoration error (by 9.44%) under hardship condition compared to NVFFs with a single NV device.
['Tsai-kan Chien', 'Lih-Yih Chiou', 'Yao-Chun Chuang', 'Shyh-Shyuan Sheu', 'Heng-Yuan Li', 'Pei-Hua Wang', 'Tzu-Kun Ku', 'Ming-Jinn Tsai', 'Chih-I Wu']
I am writing a research paper on a idea A low store energy and robust ReRAM-based flip-flop for normally off microprocessors
[{"from": "human", "value": "I am writing a research paper on a idea A low store energy and robust ReRAM-based flip-flop for normally off microprocessors"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Normally-off computing (NoC) is one of promising techniques that benefits microsystems with long sleep time. Because NoC can turn off por to achieve zero por consumption and can activate microsystems instantly. This study proposes a novel resistive random access memory (ReRAM)-based nonvolatile flip-flop (NVFF), fabricated using 90-nm CMOS technology and the ReRAM process of the Industrial Technology Research Institute. The proposed NVFF uses a complementary structure with one-phase store to mitigate limitation on store energy and was verified as the registers in three pipeline stages of a NV multiplier-and-accumulator macro. The proposed ReRAM-based NVFF, compared with the state-of-the-art complementary design, can reduce store energy by 36.4%, restore time by 64.2%, and circuit area by 42.8%. The proposed design was also superior in reducing restoration error (by 9.44%) under hardship condition compared to NVFFs with a single NV device."}]