Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: To develop IoT sensor, research on low-cost and low-por wireless transceiver is necessary. Inside wireless transceiver, Viterbi decoder (VD) is one of the most complex but important block. VD is used in a receiver for decoding convolutional code from the transmitter and simultaneously correct bit errors. In addition, it is ceaselessly working circuit in a wireless transceiver, therefore it consumes a lot of por. This means that developing small and low por VD is one of the steps to make a wireless transceiver for IoT applications. ,  propose K-best VD to simplify the circuit while keeping the same error correction performance. The K-best VD is narrowing down the number of paths of the trellis to K, on the basis of M-algorithm.  evaluate the performance of K-best VD by running the simulation and implement it with Verilog HDL. Our simulation result shows that the K-best VD achieves the same Packet Error Rate (PER) when K = 4 as the conventional. Finally, as an ASIC synthesis results, our hardware can reduce 91% of por consumption and 69% of the area.
['Hiromasa Kato', 'Thi Hong Tran', 'Yasuhiko Nakashima']
I am writing a research paper on a idea ASIC design of a low-complexity K-best Viterbi decoder for IoT applications
[{"from": "human", "value": "I am writing a research paper on a idea ASIC design of a low-complexity K-best Viterbi decoder for IoT applications"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: To develop IoT sensor, research on low-cost and low-por wireless transceiver is necessary. Inside wireless transceiver, Viterbi decoder (VD) is one of the most complex but important block. VD is used in a receiver for decoding convolutional code from the transmitter and simultaneously correct bit errors. In addition, it is ceaselessly working circuit in a wireless transceiver, therefore it consumes a lot of por. This means that developing small and low por VD is one of the steps to make a wireless transceiver for IoT applications. ,  propose K-best VD to simplify the circuit while keeping the same error correction performance. The K-best VD is narrowing down the number of paths of the trellis to K, on the basis of M-algorithm.  evaluate the performance of K-best VD by running the simulation and implement it with Verilog HDL. Our simulation result shows that the K-best VD achieves the same Packet Error Rate (PER) when K = 4 as the conventional. Finally, as an ASIC synthesis results, our hardware can reduce 91% of por consumption and 69% of the area."}]