Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Multiple bit adders like ripple carry adder make the propagation of carry bit very slow and this is the reason why it must be replaced with fast adders as carry-look-ahead adder CLA. Por consumption in digital circuits depends on the number of metal-oxide-semiconductor field-effect transistor employed and various other parameters. If number of metal-oxide-semiconductor field-effect transistor is reduced the por consumption would definitely be reduced. Conventional CLAs would consume significant amount of por that still needs to be improved. The paper here deals with the implementation of 8bit CLA with the aim of reducing the size and to precise the por consumption within nanowatt range, by improving the fundamental components of the circuit. All the parameters have been calculated by using Cadence Virtuoso tool at 45nm technology. Copyright © 2014 John Wiley & Sons, Ltd.
['Raj Johri', 'Shyam Akashe', 'Sanjay Sharma']
I am writing a research paper on a idea High performance 8bit cascaded carry look ahead adder with precise power consumption
[{"from": "human", "value": "I am writing a research paper on a idea High performance 8bit cascaded carry look ahead adder with precise power consumption"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Multiple bit adders like ripple carry adder make the propagation of carry bit very slow and this is the reason why it must be replaced with fast adders as carry-look-ahead adder CLA. Por consumption in digital circuits depends on the number of metal-oxide-semiconductor field-effect transistor employed and various other parameters. If number of metal-oxide-semiconductor field-effect transistor is reduced the por consumption would definitely be reduced. Conventional CLAs would consume significant amount of por that still needs to be improved. The paper here deals with the implementation of 8bit CLA with the aim of reducing the size and to precise the por consumption within nanowatt range, by improving the fundamental components of the circuit. All the parameters have been calculated by using Cadence Virtuoso tool at 45nm technology. Copyright \u00a9 2014 John Wiley & Sons, Ltd."}]