Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Nowadays high-performance multimedia SoC design always integrates a variety of function units (FU) into a single chip and these FUs impose great stress on the shared memory system. To improve the memory system utilization and meet a wide range of bandwidth and latency requirements of these FUs, a ll-designed memory scheduler that takes the quality-of-service (QoS) into account must be adopted. , a laxity-aware memory scheduler that can adaptively measure the laxity of each memory access task is proposed. Known the laxity of each memory access task, the proposed memory scheduler can guarantee the necessary bandwidth within a certain time interval, which is crucial to the performance and user experience of multimedia SoCs. Compared to previous proposed memory scheduling algorithms based on bandwidth allocating, the laxity-aware memory scheduler can obtain 14.5% decrease in memory access latency while preserving high DRAM data bus utilization.
['Guangfei Zhang', 'Yifei Jiang', 'Wenxiang Wang', 'Menghao Su']
I am writing a research paper on a idea A Laxity-Aware Memory Access Scheduler for High Performance Multimedia SoC
[{"from": "human", "value": "I am writing a research paper on a idea A Laxity-Aware Memory Access Scheduler for High Performance Multimedia SoC"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Nowadays high-performance multimedia SoC design always integrates a variety of function units (FU) into a single chip and these FUs impose great stress on the shared memory system. To improve the memory system utilization and meet a wide range of bandwidth and latency requirements of these FUs, a ll-designed memory scheduler that takes the quality-of-service (QoS) into account must be adopted. , a laxity-aware memory scheduler that can adaptively measure the laxity of each memory access task is proposed. Known the laxity of each memory access task, the proposed memory scheduler can guarantee the necessary bandwidth within a certain time interval, which is crucial to the performance and user experience of multimedia SoCs. Compared to previous proposed memory scheduling algorithms based on bandwidth allocating, the laxity-aware memory scheduler can obtain 14.5% decrease in memory access latency while preserving high DRAM data bus utilization."}]