Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: High defect rate in emerging nano-devices mandates new computational models that can tolerate defects thereby rendering reliability of operation and reasonable manufacturing yield. In a bottom-up system design approach using nano-crossbar applications are typically mapped into a crossbar using either PLA or lookup table (LUT) implementation of a logic circuits. LUT-based implementation has some definite advantages over PLA-based one due its easy reconfigurability. ,  consider a LUT-based logic design paradigm using nano-crossbar and propose a novel application mapping technique that can effectively take advantage of certain defects in the LUTs. The main idea is: 1) to identify and localize the unidirectional stuck-at faults in the LUTs and 2) then map an application in such a way that the a particular defective LUT is used to map a Boolean function which is compatible with the behavior of the LUT. The idea of exploiting certain defects to implement a function (as opposed to discard the defective location as unusable), improves yield considerably in LUT-based configurable nanocomputing. Our simulation with 5times5 and 5times1 LUT shows an average improvement of 87% in number of mapped function over conventional mapping for a defect rate of 10%.
['Somnath Paul', 'Rajat Subhra Chakraborty', 'Swarup Bhunia']
I am writing a research paper on a idea Defect-Aware Configurable Computing in Nanoscale Crossbar for Improved Yield
[{"from": "human", "value": "I am writing a research paper on a idea Defect-Aware Configurable Computing in Nanoscale Crossbar for Improved Yield"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: High defect rate in emerging nano-devices mandates new computational models that can tolerate defects thereby rendering reliability of operation and reasonable manufacturing yield. In a bottom-up system design approach using nano-crossbar applications are typically mapped into a crossbar using either PLA or lookup table (LUT) implementation of a logic circuits. LUT-based implementation has some definite advantages over PLA-based one due its easy reconfigurability. ,  consider a LUT-based logic design paradigm using nano-crossbar and propose a novel application mapping technique that can effectively take advantage of certain defects in the LUTs. The main idea is: 1) to identify and localize the unidirectional stuck-at faults in the LUTs and 2) then map an application in such a way that the a particular defective LUT is used to map a Boolean function which is compatible with the behavior of the LUT. The idea of exploiting certain defects to implement a function (as opposed to discard the defective location as unusable), improves yield considerably in LUT-based configurable nanocomputing. Our simulation with 5times5 and 5times1 LUT shows an average improvement of 87% in number of mapped function over conventional mapping for a defect rate of 10%."}]