Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: , a wide-range operation and phase error calibration DLL-based clock generator is proposed. By using multi-band voltage controlled delay line (MBVCDL) and frequency multiplier to expand the operation frequency range of clock generator. The proposed clock generator uses detect window phase detector (DWPD) to effectively reduce phase error. The proposed DLL can reduce the maximum phase error form 3.57deg to 1.098deg of DLL multiphase output at 250 MHz. The simulation results show that the proposed DLL operates from 25 MHz to 250 MHz and the frequency multiplier synthesizes frequency from 250 MHz to 2.5 GHz. The por dissipation and the peak-to-peak jitter are 10.1 mW and 22.6 ps at 2.5 GHz frequency multiplier output frequency.
['Kuo-Hsing Cheng', 'Chia-Wei Su', 'Meng-Jhe Wu', 'Yu-Ling Chang']
I am writing a research paper on a idea A wide-range DLL-based clock generator with phase error calibration
[{"from": "human", "value": "I am writing a research paper on a idea A wide-range DLL-based clock generator with phase error calibration"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: , a wide-range operation and phase error calibration DLL-based clock generator is proposed. By using multi-band voltage controlled delay line (MBVCDL) and frequency multiplier to expand the operation frequency range of clock generator. The proposed clock generator uses detect window phase detector (DWPD) to effectively reduce phase error. The proposed DLL can reduce the maximum phase error form 3.57deg to 1.098deg of DLL multiphase output at 250 MHz. The simulation results show that the proposed DLL operates from 25 MHz to 250 MHz and the frequency multiplier synthesizes frequency from 250 MHz to 2.5 GHz. The por dissipation and the peak-to-peak jitter are 10.1 mW and 22.6 ps at 2.5 GHz frequency multiplier output frequency."}]