Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The purpose of this paper is to introduce a new RTL testability metric, IFMB, that evaluates the exercise of Implicit Functionality (IF) of operators and Multiple Branch (AM) coverage of conditional constructs. Although physical Defect Coverage (DC) strongly depends on the logic structure, thus preventing accurate DC estimation, RTL fault models can be derived, targeting high correlation beten RTL fault coverage and DC. Using this evaluation criterion, previous RTL coverage metrics are compared with new metric. Due to its excellent correlation to DC, IFMB allows, at RT-level, test pattern quality evaluation aiming its reuse as production or lifetime test, using BIST. A methodology for testability analysis with the proposed RTL fault models is also presented, based on fast fault simulation using random patterns. Simulation based testability analysis errors are quantified Examples are presented where the proposed testability metrics are used to guide the inclusion of BIST in modules of ITC'99 benchmark circuits.
['M. B. Santos', 'F. Goncalves', 'Isabel C. Teixeira', 'João Paulo Teixeira']
I am writing a research paper on a idea Implicit functionality and multiple branch coverage (IFMB): a testability metric for RT-level
[{"from": "human", "value": "I am writing a research paper on a idea Implicit functionality and multiple branch coverage (IFMB): a testability metric for RT-level"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The purpose of this paper is to introduce a new RTL testability metric, IFMB, that evaluates the exercise of Implicit Functionality (IF) of operators and Multiple Branch (AM) coverage of conditional constructs. Although physical Defect Coverage (DC) strongly depends on the logic structure, thus preventing accurate DC estimation, RTL fault models can be derived, targeting high correlation beten RTL fault coverage and DC. Using this evaluation criterion, previous RTL coverage metrics are compared with new metric. Due to its excellent correlation to DC, IFMB allows, at RT-level, test pattern quality evaluation aiming its reuse as production or lifetime test, using BIST. A methodology for testability analysis with the proposed RTL fault models is also presented, based on fast fault simulation using random patterns. Simulation based testability analysis errors are quantified Examples are presented where the proposed testability metrics are used to guide the inclusion of BIST in modules of ITC'99 benchmark circuits."}]