Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Convolutional Neural Networks (ConvNets) are a porful Deep Learning model, providing state-of-the-art accuracy to many emerging classification problems. Hover, ConvNet classification is a computationally heavy task, suffering from rapid complexity scaling.  presents fpgaConvNet, a novel domain-specific modelling framework together with an automated design methodology for the mapping of ConvNets onto reconfigurable FPGA-based platforms. By interpreting ConvNet classification as a streaming application, the proposed framework employs the Synchronous Dataflow (SDF) model of computation as its basis and proposes a set of transformations on the SDF graph that explore the performance-resource design space, while taking into account platform-specific resource constraints. A comparison with existing ConvNet FPGA works shows that the proposed fully-automated methodology yields hardware designs that improve the performance density by up to 1.62x and reach up to 90.75% of the raw performance of architectures that are hand-tuned for particular ConvNets.
['Stylianos I. Venieris', 'Christos-Savvas Bouganis']
I am writing a research paper on a idea fpgaConvNet: A Framework for Mapping Convolutional Neural Networks on FPGAs
[{"from": "human", "value": "I am writing a research paper on a idea fpgaConvNet: A Framework for Mapping Convolutional Neural Networks on FPGAs"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Convolutional Neural Networks (ConvNets) are a porful Deep Learning model, providing state-of-the-art accuracy to many emerging classification problems. Hover, ConvNet classification is a computationally heavy task, suffering from rapid complexity scaling.  presents fpgaConvNet, a novel domain-specific modelling framework together with an automated design methodology for the mapping of ConvNets onto reconfigurable FPGA-based platforms. By interpreting ConvNet classification as a streaming application, the proposed framework employs the Synchronous Dataflow (SDF) model of computation as its basis and proposes a set of transformations on the SDF graph that explore the performance-resource design space, while taking into account platform-specific resource constraints. A comparison with existing ConvNet FPGA works shows that the proposed fully-automated methodology yields hardware designs that improve the performance density by up to 1.62x and reach up to 90.75% of the raw performance of architectures that are hand-tuned for particular ConvNets."}]