Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Most of Block based motion estimation algorithms are based on computing the sum of absolute differences (SAD) beten candidate and reference block.  a FPGA design for fast computing of the minimum SAD is proposed. Thanks to the use of the on-line arithmetic (OLA) two goal are achieved: it is possible to implement a full 16 x 16 macroblock SAD in a single FPGA device and it permits us to speed up the computation by early truncation of the SAD calculation. Reconfigurable devices allows us to change 8 x 8 or 16 x 16 pixels per block models. Comparison with other related works are provided.
['Joaquín Olivares', 'Javier Hormigo', 'Julio Villalba', 'Ignacio Benavides']
I am writing a research paper on a idea Minimum sum of absolute differences implementation in a single FPGA device
[{"from": "human", "value": "I am writing a research paper on a idea Minimum sum of absolute differences implementation in a single FPGA device"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Most of Block based motion estimation algorithms are based on computing the sum of absolute differences (SAD) beten candidate and reference block.  a FPGA design for fast computing of the minimum SAD is proposed. Thanks to the use of the on-line arithmetic (OLA) two goal are achieved: it is possible to implement a full 16 x 16 macroblock SAD in a single FPGA device and it permits us to speed up the computation by early truncation of the SAD calculation. Reconfigurable devices allows us to change 8 x 8 or 16 x 16 pixels per block models. Comparison with other related works are provided."}]