Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The energy efficiency of systems-on-a-chip can be much improved if one re to vary the supply voltage dynamically at run time.  describe the synthesis of systems-on-a-chip based on core processors, while treating voltage (and correspondingly the clock frequency) as a variable to be scheduled along with the computation tasks during the static scheduling step. In addition to describing the complete synthesis design flow for these variable voltage systems,  focus on the problem of doing the voltage scheduling while taking into account the inherent limitation on the rates at which the voltage and clock frequency can be changed by the por supply controllers and clock generators. Taking these limits on rate of change into account is crucial, since changing the voltage by even a volt may take time equivalent to 100 s to 10000 s of instructions on modern processors.  present both an exact but impractical formulation of this scheduling problem as a set of nonlinear equations, as ll as a heuristic approach based on reduction to an optimally solvable restricted ordered scheduling problem. Using various task mixes drawn from a set of nine real life applications, our results show that  are able to reduce por consumption to within 7% of the lor bound obtained by imposing no limit at the rate of change of voltage and clock frequencies.
['Inki Hong', 'Gang Qu', 'Miodrag Potkonjak', 'M.B. Srivastavas']
I am writing a research paper on a idea Synthesis techniques for low-power hard real-time systems on variable voltage processors
[{"from": "human", "value": "I am writing a research paper on a idea Synthesis techniques for low-power hard real-time systems on variable voltage processors"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The energy efficiency of systems-on-a-chip can be much improved if one re to vary the supply voltage dynamically at run time.  describe the synthesis of systems-on-a-chip based on core processors, while treating voltage (and correspondingly the clock frequency) as a variable to be scheduled along with the computation tasks during the static scheduling step. In addition to describing the complete synthesis design flow for these variable voltage systems,  focus on the problem of doing the voltage scheduling while taking into account the inherent limitation on the rates at which the voltage and clock frequency can be changed by the por supply controllers and clock generators. Taking these limits on rate of change into account is crucial, since changing the voltage by even a volt may take time equivalent to 100 s to 10000 s of instructions on modern processors.  present both an exact but impractical formulation of this scheduling problem as a set of nonlinear equations, as ll as a heuristic approach based on reduction to an optimally solvable restricted ordered scheduling problem. Using various task mixes drawn from a set of nine real life applications, our results show that  are able to reduce por consumption to within 7% of the lor bound obtained by imposing no limit at the rate of change of voltage and clock frequencies."}]