Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: With aggressive technology scaling in deep submicron era, burgeoning transistors make chips more susceptible to failures. It is inevitable that process variation is gradually becoming a crucial challenge in the IC design. In addition, aging leads to faults, shortening the lifetime of the circuits. Networks-on-chip also come to the problems caused by variations and aging, leading to degraded performance and erroneous behaviors. Faults may occur in numerous locations of the on-chip networks and once they occur in the control path, more severe effects such as deadlock and livelock are expected. ,  present a fine-grained mechanism to tolerate faults in the routing computation units without disabling the faulty routers. By applying this mechanism, routing and packet-receiving services are separated. The faulty routing computation unit is replaced by a light-ight redundant circuit, providing static but reliable routing services. The other components in this router are still functional retaining the on-chip performance. Experimental results indicate that the on-chip network with the proposed mechanism is fault-tolerant when 14% of all routing computation modules are suffering from faults. The area overhead and por consumption of the proposed method is around 7.29% and 6.20% over the baseline approach.
['Xiaofan Zhang', 'Masoumeh Ebrahimi', 'Letian Huang', 'Guangjun Li']
I am writing a research paper on a idea Fault-resilient routing unit in NoCs
[{"from": "human", "value": "I am writing a research paper on a idea Fault-resilient routing unit in NoCs"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: With aggressive technology scaling in deep submicron era, burgeoning transistors make chips more susceptible to failures. It is inevitable that process variation is gradually becoming a crucial challenge in the IC design. In addition, aging leads to faults, shortening the lifetime of the circuits. Networks-on-chip also come to the problems caused by variations and aging, leading to degraded performance and erroneous behaviors. Faults may occur in numerous locations of the on-chip networks and once they occur in the control path, more severe effects such as deadlock and livelock are expected. ,  present a fine-grained mechanism to tolerate faults in the routing computation units without disabling the faulty routers. By applying this mechanism, routing and packet-receiving services are separated. The faulty routing computation unit is replaced by a light-ight redundant circuit, providing static but reliable routing services. The other components in this router are still functional retaining the on-chip performance. Experimental results indicate that the on-chip network with the proposed mechanism is fault-tolerant when 14% of all routing computation modules are suffering from faults. The area overhead and por consumption of the proposed method is around 7.29% and 6.20% over the baseline approach."}]