Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Low-por, small-area, 20MHz-BW ADCs that can be integrated in nanoscale CMOS technologies are of immense interest to the wireless communication industry. Implementation of high-performance analog circuits in nanometric technologies faces several challenges [1]. Time-domain digital signal processing (TDSP) [2] can be used as an alternative for some analog circuits to overcome these challenges. The TDSP technique utilizes the high timing resolution available in nanoscale technologies, and can be implemented using digital circuits that are inherently less susceptible to noise. Circuits using this technique also become faster, smaller and consume less por with technology scaling. Hence, solutions using TDSP with as many digital circuits as possible are desired. An ADC architecture that uses a VCO-based time-domain quantizer is presented in [3]. This architecture uses a conventional feedback element (multi-element DAC with DEM) and 950MHz sample rate that leads to high por consumption. In this work, a pulse-width modulator (PWM) and an all-digital time-to-digital converter (TDC) are used to implement the quantizer as ll as the feedback element in the time domain. This approach achieves the necessary linearity in the feedback path without DEM or calibration, and allows a low output rate of 250MS/s.
['Vijay Dhanasekaran', 'Manisha Gambhir', 'Mohamed M. Elsayed', 'Edgar Sánchez-Sinencio', 'Jose Silva-Martinez', 'C. S. Mishra', 'L. Chen', 'Erik J. Pankratz']
I am writing a research paper on a idea A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element
[{"from": "human", "value": "I am writing a research paper on a idea A 20MHz BW 68dB DR CT \u0394\u03a3 ADC based on a multi-bit time-domain quantizer and feedback element"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Low-por, small-area, 20MHz-BW ADCs that can be integrated in nanoscale CMOS technologies are of immense interest to the wireless communication industry. Implementation of high-performance analog circuits in nanometric technologies faces several challenges [1]. Time-domain digital signal processing (TDSP) [2] can be used as an alternative for some analog circuits to overcome these challenges. The TDSP technique utilizes the high timing resolution available in nanoscale technologies, and can be implemented using digital circuits that are inherently less susceptible to noise. Circuits using this technique also become faster, smaller and consume less por with technology scaling. Hence, solutions using TDSP with as many digital circuits as possible are desired. An ADC architecture that uses a VCO-based time-domain quantizer is presented in [3]. This architecture uses a conventional feedback element (multi-element DAC with DEM) and 950MHz sample rate that leads to high por consumption. In this work, a pulse-width modulator (PWM) and an all-digital time-to-digital converter (TDC) are used to implement the quantizer as ll as the feedback element in the time domain. This approach achieves the necessary linearity in the feedback path without DEM or calibration, and allows a low output rate of 250MS/s."}]