Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: A methodology for standard cell or gate array designs is described. A new approach is introduced whereby the placement process is divided into a global step and a detailed step. The timing drive placement (TDP) system balances wirability and timing constraints so that the final released design meets timing criteria. This is achieved by dynamically evaluating the timing of critical paths during placement. TDP is significant because convergence to a timed wirable solution early in the physical design cycle is achieved, or else it becomes apparent that logic changes are required. >
['Wilm E. Donath', 'Reini J. Norman', 'Bhuwan K. Agrawal', 'Stephen E. Bello', 'Sang Yong Han', 'Jerome M. Kurtzberg', 'Paul Lowy', 'Roger I. Mcmillan']
I am writing a research paper on a idea Timing driven placement using complete path delays
[{"from": "human", "value": "I am writing a research paper on a idea Timing driven placement using complete path delays"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: A methodology for standard cell or gate array designs is described. A new approach is introduced whereby the placement process is divided into a global step and a detailed step. The timing drive placement (TDP) system balances wirability and timing constraints so that the final released design meets timing criteria. This is achieved by dynamically evaluating the timing of critical paths during placement. TDP is significant because convergence to a timed wirable solution early in the physical design cycle is achieved, or else it becomes apparent that logic changes are required. >"}]