Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely:  propose an emulation-based diagnosis technique for combinational circuits in this paper. To verify our approach, a hardware emulator is implemented by using Altera MAX+Plus II CPLD Development System. Our approach reduces the CPU time required by a software-based diagnosis technique significantly, and greatly eliminates the hardware requirements with circuit partitioning techniques and novel fault injection elements (FIEs). Moreover, our diagnosis algorithm also decreases the times of simulation when performing diagnosis. Experimental results for ISCAS-85 benchmark circuits show that our emulation system is 45 times faster than Kokan's (1999) on the average.
['Shyue-Kung Lu', 'Jianlong Chen', 'Cheng-Wen Wu', 'Ken-Feng Chang', 'Shi-Yu Huang']
I am writing a research paper on a idea Combinational circuit fault diagnosis using logic emulation
[{"from": "human", "value": "I am writing a research paper on a idea Combinational circuit fault diagnosis using logic emulation"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely:  propose an emulation-based diagnosis technique for combinational circuits in this paper. To verify our approach, a hardware emulator is implemented by using Altera MAX+Plus II CPLD Development System. Our approach reduces the CPU time required by a software-based diagnosis technique significantly, and greatly eliminates the hardware requirements with circuit partitioning techniques and novel fault injection elements (FIEs). Moreover, our diagnosis algorithm also decreases the times of simulation when performing diagnosis. Experimental results for ISCAS-85 benchmark circuits show that our emulation system is 45 times faster than Kokan's (1999) on the average."}]