Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Block-based motion estimation is widely used in video compression for removing video temporal redundancy. Frame-level pipelined full-search block-matching motion estimation architecture supports frame-level pipelined operation by exploiting the explicit parallelism among blocks. , a scalable improved frame-level pipelined architecture for FSBM motion estimation is proposed. The design efforts are focused on extending the array's MAD computation capability while still keeping nearly 100% processor utilization and low hardware overhead. Based on this architecture, a special frame-level pipelined architecture for the case of search range [N,N 1] is presented, in which internal buffers FIFO1 and FIFO2 are removed and the array's computation capability is 4 times compared with previous W.F. He and Z.G. Mao's architecture. As a result, this architecture offers a feasible solution for HDTV and SHDTV video pictures
['Weifeng He', 'Menglian Zhao', 'Chi-Ying Tsui', 'Zhigang Mao']
I am writing a research paper on a idea A Scalable Frame-Level Pipelined Architecture for FSBM Motion Estimation
[{"from": "human", "value": "I am writing a research paper on a idea A Scalable Frame-Level Pipelined Architecture for FSBM Motion Estimation"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Block-based motion estimation is widely used in video compression for removing video temporal redundancy. Frame-level pipelined full-search block-matching motion estimation architecture supports frame-level pipelined operation by exploiting the explicit parallelism among blocks. , a scalable improved frame-level pipelined architecture for FSBM motion estimation is proposed. The design efforts are focused on extending the array's MAD computation capability while still keeping nearly 100% processor utilization and low hardware overhead. Based on this architecture, a special frame-level pipelined architecture for the case of search range [N,N 1] is presented, in which internal buffers FIFO1 and FIFO2 are removed and the array's computation capability is 4 times compared with previous W.F. He and Z.G. Mao's architecture. As a result, this architecture offers a feasible solution for HDTV and SHDTV video pictures"}]