Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Simultaneous localization and mapping (SLAM) is a key algorithm in localization tasks. Considering the limited payload and por on mobile robots, FPGA-based SLAM is a promising onboard solution.  presents an FPGA-based SLAM system, which can recover the indoor moving trajectory of the stereo cameras in real-time.  propose a low computational complexity VO-SLAM (Visual Odometry based SLAM) algorithm, and implement the algorithm on a matrix processor based on DE3 develop board. Dedicated matrix accelerators are designed to support application requirements, and a hierarchical matrix computing mechanism is proposed. The algorithm accuracy in the real scenario test is comparable to more complex EKF-SLAM algorithm. Onboard experiments demonstrate the system achieves a processing speed of 31 fps with 30000 features in the global map, which outperforms designs in other publications.  compare the onboard implementation with Intel i7 and achieve 10x energy saving for each frame.
['Mengyuan Gu', 'Kaiyuan Guo', 'Wenqiang Wang', 'Yu Wang', 'Huazhong Yang']
I am writing a research paper on a idea An FPGA-based real-time simultaneous localization and mapping system
[{"from": "human", "value": "I am writing a research paper on a idea An FPGA-based real-time simultaneous localization and mapping system"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Simultaneous localization and mapping (SLAM) is a key algorithm in localization tasks. Considering the limited payload and por on mobile robots, FPGA-based SLAM is a promising onboard solution.  presents an FPGA-based SLAM system, which can recover the indoor moving trajectory of the stereo cameras in real-time.  propose a low computational complexity VO-SLAM (Visual Odometry based SLAM) algorithm, and implement the algorithm on a matrix processor based on DE3 develop board. Dedicated matrix accelerators are designed to support application requirements, and a hierarchical matrix computing mechanism is proposed. The algorithm accuracy in the real scenario test is comparable to more complex EKF-SLAM algorithm. Onboard experiments demonstrate the system achieves a processing speed of 31 fps with 30000 features in the global map, which outperforms designs in other publications.  compare the onboard implementation with Intel i7 and achieve 10x energy saving for each frame."}]