Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: In recent years, chip multiprocessor architectures have emerged to scale performance while staying within tight por constraints. This trend motivates per-core/block dynamic voltage and frequency scaling (DVFS) with fast voltage transition. Given the high cost and bulk of off-chip DC/DC converters to implement multiple on-chip por domains, there has been a surge of interest in on-chip converters.  presents the design and experimental results of a fully integrated 3-level DC/DC converter [1] that merges characteristics of both inductor-based buck [2–4] and switched-capacitor (SC) converters [5]. While off-chip buck converters show high conversion efficiency, their on-chip counterparts suffer from loss due to low quality inductors. With the help of flying capacitors, the 3-level converter requires smaller inductors than the buck converter, reducing loss and on-die area overhead. Compared to SC converters that need more complex structures to regulate higher than half the input voltage, 3-level converters can efficiently regulate the output voltage across a wide range of levels and load currents. Measured results from a 130nm CMOS test-chip prototype demonstrate nanosecond-scale voltage transition times and peak conversion efficiency of 77%.
['Wonyoung Kim', 'David M. Brooks', 'Gu-Yeon Wei']
I am writing a research paper on a idea A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation
[{"from": "human", "value": "I am writing a research paper on a idea A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: In recent years, chip multiprocessor architectures have emerged to scale performance while staying within tight por constraints. This trend motivates per-core/block dynamic voltage and frequency scaling (DVFS) with fast voltage transition. Given the high cost and bulk of off-chip DC/DC converters to implement multiple on-chip por domains, there has been a surge of interest in on-chip converters.  presents the design and experimental results of a fully integrated 3-level DC/DC converter [1] that merges characteristics of both inductor-based buck [2\u20134] and switched-capacitor (SC) converters [5]. While off-chip buck converters show high conversion efficiency, their on-chip counterparts suffer from loss due to low quality inductors. With the help of flying capacitors, the 3-level converter requires smaller inductors than the buck converter, reducing loss and on-die area overhead. Compared to SC converters that need more complex structures to regulate higher than half the input voltage, 3-level converters can efficiently regulate the output voltage across a wide range of levels and load currents. Measured results from a 130nm CMOS test-chip prototype demonstrate nanosecond-scale voltage transition times and peak conversion efficiency of 77%."}]