Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely:   study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for por optimization. This is done with the guarantee that the mapping depth of the circuit will not increase compared to the circuit with a single Vdd.  first design a single-Vdd mapping algorithm that achieves better por results than the latest published low-por mapping algorithms.  then show that our dual-Vdd mapping algorithm can further improve por savings by up to 11.6% over the single-Vdd mapper. In addition,  investigate the best low-Vdd/high-Vdd ratio for the largest por reduction among several dual-Vdd combinations. To our knowledge, this is the first work on dual-Vdd mapping for FPGA architectures.
['Deming Chen', 'Jason Cong', 'Fei Li', 'Lei He']
I am writing a research paper on a idea Low-power technology mapping for FPGA architectures with dual supply voltages
[{"from": "human", "value": "I am writing a research paper on a idea Low-power technology mapping for FPGA architectures with dual supply voltages"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely:   study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for por optimization. This is done with the guarantee that the mapping depth of the circuit will not increase compared to the circuit with a single Vdd.  first design a single-Vdd mapping algorithm that achieves better por results than the latest published low-por mapping algorithms.  then show that our dual-Vdd mapping algorithm can further improve por savings by up to 11.6% over the single-Vdd mapper. In addition,  investigate the best low-Vdd/high-Vdd ratio for the largest por reduction among several dual-Vdd combinations. To our knowledge, this is the first work on dual-Vdd mapping for FPGA architectures."}]