Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Modified Newtonian dynamics (MOND) has shown a great success as a modified-potential theory of gravity. ,  present a highly integrated accelerating solution for N-body MOND simulations. By using the FPGA-SoC, which integrates both FPGA and SOC (system on chip) in one chip, our solution exhibits potential for better performance, higher integration, and lor por consumption. To handle the calculation bottleneck of potential summation, on one hand,  develop a strategy to simplify the pipeline, in which the square calculation task is conducted by the DSP48E1 of Xilinx 7 series FPGAs, so as to reduce the logic resource consumption of each pipeline; on the other hand, advantages of particle-mesh scheme are taken to overcome the bottleneck on bandwidth. Our experiment results show that 2 more pipelines can be integrated in Zynq-7020 FPGA-SoC with the simplified pipeline, and the bandwidth requirement is reduced significantly. Furthermore, our accelerating solution has a full range of advantages over different processors. Compared with GPU, our work is about better in both performance per Watt and performance per cost.
['Bo Peng', 'Tianqi Wang', 'Xi Jin', 'Chuanjun Wang']
I am writing a research paper on a idea An FPGA-SOC Based Accelerating Solution for N-body Simulations in MOND (Abstract Only)
[{"from": "human", "value": "I am writing a research paper on a idea An FPGA-SOC Based Accelerating Solution for N-body Simulations in MOND (Abstract Only)"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Modified Newtonian dynamics (MOND) has shown a great success as a modified-potential theory of gravity. ,  present a highly integrated accelerating solution for N-body MOND simulations. By using the FPGA-SoC, which integrates both FPGA and SOC (system on chip) in one chip, our solution exhibits potential for better performance, higher integration, and lor por consumption. To handle the calculation bottleneck of potential summation, on one hand,  develop a strategy to simplify the pipeline, in which the square calculation task is conducted by the DSP48E1 of Xilinx 7 series FPGAs, so as to reduce the logic resource consumption of each pipeline; on the other hand, advantages of particle-mesh scheme are taken to overcome the bottleneck on bandwidth. Our experiment results show that 2 more pipelines can be integrated in Zynq-7020 FPGA-SoC with the simplified pipeline, and the bandwidth requirement is reduced significantly. Furthermore, our accelerating solution has a full range of advantages over different processors. Compared with GPU, our work is about better in both performance per Watt and performance per cost."}]