Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: In large System-on-Chip (SoC) architectures, balancing the clock network is increasingly difficult. Globally Asynchronous Locally Synchronous (GALS) removes the need for global clock net, and also provides efficient means for managing the complexity and re-use in large architectures. Hover, quantitative comparisons of GALS against similar synchronous structures are rare for full SoC architectures. ,  compare our SoC GALS architectures to a synchronous architecture with a fully functional MPEG-4 video encoder on FPGA. The results show that the area and performance overhead of GALS is only 1%. That is negligible compared to the benefits of the GALS architecture such as multiple clock frequencies for Intellectual Property (IP) blocks and dynamic frequency/voltage scaling, clock tree removal, and re-usability. Our architecture does not require modifications to the IP blocks already used with synchronous architectures, providing an ideal solution for rapid switch to GALS architecture.
['Ari Kulmala', 'Timo D. Hämäläinen', 'Marko Hännikäinen']
I am writing a research paper on a idea Comparison of GALS and Synchronous Architectures with MPEG-4 Video Encoder on Multiprocessor System-on-Chip FPGA
[{"from": "human", "value": "I am writing a research paper on a idea Comparison of GALS and Synchronous Architectures with MPEG-4 Video Encoder on Multiprocessor System-on-Chip FPGA"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: In large System-on-Chip (SoC) architectures, balancing the clock network is increasingly difficult. Globally Asynchronous Locally Synchronous (GALS) removes the need for global clock net, and also provides efficient means for managing the complexity and re-use in large architectures. Hover, quantitative comparisons of GALS against similar synchronous structures are rare for full SoC architectures. ,  compare our SoC GALS architectures to a synchronous architecture with a fully functional MPEG-4 video encoder on FPGA. The results show that the area and performance overhead of GALS is only 1%. That is negligible compared to the benefits of the GALS architecture such as multiple clock frequencies for Intellectual Property (IP) blocks and dynamic frequency/voltage scaling, clock tree removal, and re-usability. Our architecture does not require modifications to the IP blocks already used with synchronous architectures, providing an ideal solution for rapid switch to GALS architecture."}]