Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Por consumption is a major bottleneck of system performance and is listed as one of the top three challenges in International Technology Roadmap for Semiconductor 2008. In practice, a large portion of the on chip por is consumed by the clock system which is made of the clock distribution network and flop-flops. , various design techniques for a low por clocking system are surveyed. Among them is an effective way to reduce capacity of the clock load by minimizing number of clocked transistors. To approach this,  propose a novel clocked pair shared flip-flop which reduces the number of local clocked transistors by approximately 40%. A 24% reduction of clock driving por is achieved. In addition, low swing and double edge clocking, can be easily incorporated into the new flip-flop to build clocking systems.
['Peiyi Zhao', 'Jason McNeely', 'Weidong Kuang', 'Nan Wang', 'Zhongfeng Wang']
I am writing a research paper on a idea Design of Sequential Elements for Low Power Clocking System
[{"from": "human", "value": "I am writing a research paper on a idea Design of Sequential Elements for Low Power Clocking System"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Por consumption is a major bottleneck of system performance and is listed as one of the top three challenges in International Technology Roadmap for Semiconductor 2008. In practice, a large portion of the on chip por is consumed by the clock system which is made of the clock distribution network and flop-flops. , various design techniques for a low por clocking system are surveyed. Among them is an effective way to reduce capacity of the clock load by minimizing number of clocked transistors. To approach this,  propose a novel clocked pair shared flip-flop which reduces the number of local clocked transistors by approximately 40%. A 24% reduction of clock driving por is achieved. In addition, low swing and double edge clocking, can be easily incorporated into the new flip-flop to build clocking systems."}]