Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Memory system optimizations have been ll studied on single-threaded systems; hover, the wide use of simultaneous multithreading (SMT) techniques raises questions over their effectiveness in the new context. In this study,  thoroughly evaluate contemporary multi-channel DDR SDRAM and Rambus DRAM systems in SMT systems, and search for new thread-aware DRAM optimization techniques. Our major findings are: (1) in general, increasing the number of threads tends to increase the memory concurrency and thus the pressure on DRAM systems, but some exceptions do exist; (2) the application performance is sensitive to memory channel organizations, e.g. independent channels may outperform ganged organizations by up to 90%; (3) the DRAM latency reduction through improving row buffer hit rates becomes less effective due to the increased bank contentions; and (4) thread-aware DRAM access scheduling schemes may improve performance by up to 30% on workload mixes of memory-intensive applications. In short, the use of SMT techniques has somewhat changed the context of DRAM optimizations but does not make them obsolete.
['Zhichun Zhu', 'Zhao Zhang']
I am writing a research paper on a idea A performance comparison of DRAM memory system optimizations for SMT processors
[{"from": "human", "value": "I am writing a research paper on a idea A performance comparison of DRAM memory system optimizations for SMT processors"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Memory system optimizations have been ll studied on single-threaded systems; hover, the wide use of simultaneous multithreading (SMT) techniques raises questions over their effectiveness in the new context. In this study,  thoroughly evaluate contemporary multi-channel DDR SDRAM and Rambus DRAM systems in SMT systems, and search for new thread-aware DRAM optimization techniques. Our major findings are: (1) in general, increasing the number of threads tends to increase the memory concurrency and thus the pressure on DRAM systems, but some exceptions do exist; (2) the application performance is sensitive to memory channel organizations, e.g. independent channels may outperform ganged organizations by up to 90%; (3) the DRAM latency reduction through improving row buffer hit rates becomes less effective due to the increased bank contentions; and (4) thread-aware DRAM access scheduling schemes may improve performance by up to 30% on workload mixes of memory-intensive applications. In short, the use of SMT techniques has somewhat changed the context of DRAM optimizations but does not make them obsolete."}]