Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Fault coverage and test time have important roles in using built in self-test (BIST). Two parameters are crucial and effective in BIST design: LFSR's polynomial (or configuration) and its initial seed.   propose a practical method for finding near optimal LFSR with genetic algorithm (GA) and show that LFSR is a good TPG compared with other TPGs. In this method, the candidate seeds are achieved through a deterministic approach, and an evolutionary approach is employed to obtain the LFSR configurations for the desired fault coverage under test time constraint. The configurations are encoded in binary chromosomes. The evolution process evolves the fittest configurations to achieve the maximum fault coverage within minimum test time. Some of ISCAS'85, ISCAS'89 and ITC'99 test cases are used to evaluate the proposed approach. Experimental results show good performance in BIST hardware and test time with constrained fault coverage.
['Mehdi Kamal', 'Mehdi Salmani Jelodar', 'Shaahin Hessabi']
I am writing a research paper on a idea GABIST: A New Methodology to Find near Optimal LFSR for BIST Structure
[{"from": "human", "value": "I am writing a research paper on a idea GABIST: A New Methodology to Find near Optimal LFSR for BIST Structure"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Fault coverage and test time have important roles in using built in self-test (BIST). Two parameters are crucial and effective in BIST design: LFSR's polynomial (or configuration) and its initial seed.   propose a practical method for finding near optimal LFSR with genetic algorithm (GA) and show that LFSR is a good TPG compared with other TPGs. In this method, the candidate seeds are achieved through a deterministic approach, and an evolutionary approach is employed to obtain the LFSR configurations for the desired fault coverage under test time constraint. The configurations are encoded in binary chromosomes. The evolution process evolves the fittest configurations to achieve the maximum fault coverage within minimum test time. Some of ISCAS'85, ISCAS'89 and ITC'99 test cases are used to evaluate the proposed approach. Experimental results show good performance in BIST hardware and test time with constrained fault coverage."}]