Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The goal of this work is to gain insight into whether processing-in-memory (PIM) technology can be used to accelerate the performance of link discovery algorithms, which represent an important class of emerging knowledge discovery techniques. PIM chips that integrate processor logic into memory devices offer a new opportunity for bridging the growing gap beten processor and memory speeds, especially for applications with high memory-bandwidth requirements. As LD algorithms are data-intensive and highly parallel, involving read-only queries over large data sets, parallel computing por extremely close (physically) to the data has the potential of providing dramatic computing speedups. For this reason,  evaluated the mapping of LD algorithms to a processing-in-memory (PIM) workstation-class architecture, the DIVA/Godiva hardware testbeds developed by USC/ISI. Accounting for differences in clock speed and data scaling, our analysis shows a performance gain on a single PIM, with the potential for greater improvement when multiple PIMs are used. Measured speedups of 8x are shown on two additional bandwidth benchmarks, even though the Itanium-2 has a clock rate 6X faster.
['Jafar Adibi', 'Tim Barrett', 'Spundun Bhatt', 'Hans Chalupsky', 'Jacqueline Chame', 'Mary W. Hall']
I am writing a research paper on a idea Processing-in-memory technology for knowledge discovery algorithms
[{"from": "human", "value": "I am writing a research paper on a idea Processing-in-memory technology for knowledge discovery algorithms"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: The goal of this work is to gain insight into whether processing-in-memory (PIM) technology can be used to accelerate the performance of link discovery algorithms, which represent an important class of emerging knowledge discovery techniques. PIM chips that integrate processor logic into memory devices offer a new opportunity for bridging the growing gap beten processor and memory speeds, especially for applications with high memory-bandwidth requirements. As LD algorithms are data-intensive and highly parallel, involving read-only queries over large data sets, parallel computing por extremely close (physically) to the data has the potential of providing dramatic computing speedups. For this reason,  evaluated the mapping of LD algorithms to a processing-in-memory (PIM) workstation-class architecture, the DIVA/Godiva hardware testbeds developed by USC/ISI. Accounting for differences in clock speed and data scaling, our analysis shows a performance gain on a single PIM, with the potential for greater improvement when multiple PIMs are used. Measured speedups of 8x are shown on two additional bandwidth benchmarks, even though the Itanium-2 has a clock rate 6X faster."}]