Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Recent progress in scaled CMOS technologies can enhance signal bandwidth and clock frequency of analog-digital mixed VLSIs. Hover, the inevitable reduction of supply voltage causes a signal voltage mismatch beten a non-scaled analog chip and a scaled A-D mixed chip. To overcome this problem,  present a Delta-Amplifier (DeltAMP) which can handle larger signal amplitude than the supply voltage. DeltaAMP folds a delta signal of an input voltage within a window using a virtual ground amplifier, modulation switches and comparators. For reconstruction of the folded delta signal to the ordinal signal, Analog-Time-Digital conversion (ATD) was also proposed, in which pulse-width analog information obtained at the comparators in DeltAMP was converted to a digital signal by counting. A test chip of DeltAMP with ATD was designed and fabricated using a 90nm CMOS technology. A 2Vpp input voltage range and 50µW por consumption re achieved by the measurements with a 0.5V supply. High accuracy of 62dB SNR was obtained at signal bandwidth of 120kHz.
['Yoshihiro Masui', 'Takeshi Yoshida', 'Atsushi Iwata']
I am writing a research paper on a idea A 2.0Vpp Input, 0.5V Supply Delta Amplifier with A-to-D Conversion
[{"from": "human", "value": "I am writing a research paper on a idea A 2.0Vpp Input, 0.5V Supply Delta Amplifier with A-to-D Conversion"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Recent progress in scaled CMOS technologies can enhance signal bandwidth and clock frequency of analog-digital mixed VLSIs. Hover, the inevitable reduction of supply voltage causes a signal voltage mismatch beten a non-scaled analog chip and a scaled A-D mixed chip. To overcome this problem,  present a Delta-Amplifier (DeltAMP) which can handle larger signal amplitude than the supply voltage. DeltaAMP folds a delta signal of an input voltage within a window using a virtual ground amplifier, modulation switches and comparators. For reconstruction of the folded delta signal to the ordinal signal, Analog-Time-Digital conversion (ATD) was also proposed, in which pulse-width analog information obtained at the comparators in DeltAMP was converted to a digital signal by counting. A test chip of DeltAMP with ATD was designed and fabricated using a 90nm CMOS technology. A 2Vpp input voltage range and 50\u00b5W por consumption re achieved by the measurements with a 0.5V supply. High accuracy of 62dB SNR was obtained at signal bandwidth of 120kHz."}]