Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking global properties that are distributed on the chip.   define an architecture to non-intrusively observe global properties at run time using distributed monitors. The architecture enables to perform actions when a property holds, such as stopping (part of) the system for inspection.  apply this architecture to the problem of software races that result in incorrect communication beten concurrent tasks on different processors. In a case study, where  implemented monitors, event distribution, and instruments to stop communication beten intellectual property (IP) blocks,  demonstrate that these races can be detected and classified as timing violations or as FIFO protocol violations.
['Erik Larsson', 'Bart Vermeulen', 'Kees Goossens']
I am writing a research paper on a idea A distributed architecture to check global properties for post-silicon debug
[{"from": "human", "value": "I am writing a research paper on a idea A distributed architecture to check global properties for post-silicon debug"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking global properties that are distributed on the chip.   define an architecture to non-intrusively observe global properties at run time using distributed monitors. The architecture enables to perform actions when a property holds, such as stopping (part of) the system for inspection.  apply this architecture to the problem of software races that result in incorrect communication beten concurrent tasks on different processors. In a case study, where  implemented monitors, event distribution, and instruments to stop communication beten intellectual property (IP) blocks,  demonstrate that these races can be detected and classified as timing violations or as FIFO protocol violations."}]