Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: This work presents a CMOS cycle time-to-digital converter (CDC) integrated circuit utilizing a two-level conversion scheme. The technique that allows the achievement of wide dynamic range is presented. The CDC is based on a multi-phase sampling and vernier delay line (VDL) used in conjunction with a synchronous read-out circuitry. The proposed CDC can provide high resolution with the high conversion rate. The CDC achieves 83.3 MEvents/sec conversion rate and 23-ps resolution, stabilized by the dual DLL. The DNL is less than plusmn 0.34 LSB (23 ps). The INL is plusmn 0.33 LSB.
['Hong-Yi Huang', 'Sheng-Da Wu', 'Yi-Jui Tsai']
I am writing a research paper on a idea A New Cycle-Time-to-Digital Converter With Two Level Conversion Scheme
[{"from": "human", "value": "I am writing a research paper on a idea A New Cycle-Time-to-Digital Converter With Two Level Conversion Scheme"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: This work presents a CMOS cycle time-to-digital converter (CDC) integrated circuit utilizing a two-level conversion scheme. The technique that allows the achievement of wide dynamic range is presented. The CDC is based on a multi-phase sampling and vernier delay line (VDL) used in conjunction with a synchronous read-out circuitry. The proposed CDC can provide high resolution with the high conversion rate. The CDC achieves 83.3 MEvents/sec conversion rate and 23-ps resolution, stabilized by the dual DLL. The DNL is less than plusmn 0.34 LSB (23 ps). The INL is plusmn 0.33 LSB."}]