Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: , a novel CMOS-nano hybrid reconfigurable field-prgrammable gate array architecture (rFPGA) is introduced based on resistive memory (RRAM) devices. Different from the existing crossbar-based CMOS-nano architectures, rFPGA consists of mainly 1T1R RRAM structures that can be fabricated by using a CMOS-compatible process. These devices can efficiently establish FPGA block memories. More importantly, novel RRAM routing switches are developed to replace the CMOS routing switches to achieve significant density enhancement and por reduction. The simulation results demonstrate that 2-D and 3-D rFPGAs provide at least 2× -3× overall improvement in terms of area with 20% lor por consumption, compared with the corresponding CMOS FPGAs.
['Sansiri Tanachutiwat', 'Ming Liu', 'Wei Wang']
I am writing a research paper on a idea FPGA Based on Integration of CMOS and RRAM
[{"from": "human", "value": "I am writing a research paper on a idea FPGA Based on Integration of CMOS and RRAM"}, {"from": "gpt", "value": "Thats a unique idea.You should consider the following idea to enhance your idea so that it would impact uniquely: , a novel CMOS-nano hybrid reconfigurable field-prgrammable gate array architecture (rFPGA) is introduced based on resistive memory (RRAM) devices. Different from the existing crossbar-based CMOS-nano architectures, rFPGA consists of mainly 1T1R RRAM structures that can be fabricated by using a CMOS-compatible process. These devices can efficiently establish FPGA block memories. More importantly, novel RRAM routing switches are developed to replace the CMOS routing switches to achieve significant density enhancement and por reduction. The simulation results demonstrate that 2-D and 3-D rFPGAs provide at least 2\u00d7 -3\u00d7 overall improvement in terms of area with 20% lor por consumption, compared with the corresponding CMOS FPGAs."}]