Synopsys, Samsung expand team up on IP portfolio to reduce design risk, silicon success
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Synopsys (NASDAQ:SNPS) said it expanded its collaboration with Samsung Foundry to develop a broad portfolio of IP to reduce design risk and accelerate silicon success for automotive, mobile, high-performance computing (HPC) and multi-die designs.
This agreement expands Synopsys' partnership with Samsung to boost the Synopsys IP offering for Samsung's advanced 8LPU, SF5, SF4 and SF3 processes and includes Foundation IP, USB, PCI Express, 112G Ethernet, UCIe, LPDDR, DDR, MIPI, among others.
In addition, Synopsys will optimize IP for Samsung's SF5A and SF4A automotive process nodes to meet Grade 1 or Grade 2 temperature and AEC-Q100 reliability requirements. This would enable automotive chip designers to reduce their design effort and accelerate AEC-Q100 qualification, according to the companies.
The companies added that the auto-grade IP for ADAS SoCs (system-on-chip) will include design failure mode and effect analysis reports which can save months of development effort for automotive SoC applications.
"Extending this partnership across Samsung's full range of advanced nodes gives designers access to the industry's broadest IP portfolio, enabling them to meet the performance, power and area requirements of their target applications with less risk and faster time-to-market," said Jongshin Shin, corporate executive vice president of Foundry IP Development, Samsung Electronics (OTCPK:SSNLF).
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