APPROACH TO THE ORGANIZATION OF A COMPUTATIONAL PROCESS OF A HYBRID COMPUTING SYSTEM USING INTEL XEON PHI
Background. Processing large amounts of information, performing various types of forecasting, carrying out machine learning, all these tasks require the organization of an effective parallel computing process focused on high-performance computing. To improve the performance of a computing system, the principle of hybridity can be used, combining the capabilities of central, graphic, and other co-processor devices. To increase the efficiency and accuracy of the computational process, unconventional arithmetic systems can be used, for example, a system of residue number system. The paper shows a variant of constructing a hybrid parallel computing structure with additional coprocessors and graphics processors. The aim of the work is to develop and study ways of organizing parallel computing structures and the computing process. Methods. The conducted research is based on the application of the theory of construction of parallel computing systems, as well as on the principles of functioning of the residue number system. Results. The inclusion of a streaming data scheduler between the graphic and coprocessor unit in the computer system allows the necessary data switching depending on the arithmetic operation being performed. This allows you to use graphics processors only to perform operations in the basis of the system of residual classes, due to the presence of a larger number of processing cores. Transformation of data from positional number system to non-positional one is performed by means of a mathematical coprocessor, in the role of which Intel Xeon Phi is used. The use of a hybrid scheme for the organization of a computing system allows one to more efficiently perform a computational process using a system of residual classes. Conclusions. The proposed approach consists in the integrated use of graphics and coprocessor devices, which makes it possible to efficiently organize a computational process based on modular arithmetic due to its natural parallelism, as well as by performing the procedure of converting numbers to residue number system and back on an Intel Xeon Phi coprocessor.