FEATURES OF LOGIC CELL COMBINATIONS FPGA QUARTUS II FIRM ALTERA
The synthesis of a finite state machine that implements the so-called majority function or the function of the voting by a majority vote (choice of 2 of 3) in the Quartus II system (firm Altera). Decrypts the configuration logic elements codes (Logic Cell Comb) type LUT (Look Up Table) FPGA, describing the contents of the corresponding truth table functions that depend on the input variables of the machine. Are presented the results of a study the LUT FPGA truth tables using a Map Viewer. Shows the change of codes in the optimization scheme executed by the system Quartus II, with a possible change in the order of variables and matching LUT inputs with four inputs, but the logic function is not changed. By using FPGAs Stratix II GX, having a so-called adaptive logic modules ALM that have 6 inputs, Quartus II uses 64-bit code. The article analyzes the characteristics of the corresponding coding logic elements.