`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    22:46:47 09/23/2013 
// Design Name: 
// Module Name:    Comparador 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module Comparador(clock, reset, write_value, read_value, 
	read_value_reg_en, led_success, led_fail);
	
	input clock, reset, read_value_reg_en;
	input [3:0] write_value, read_value;
	output led_success, led_fail;

	//Variable que guarda el valor del valor leido
	reg [3:0] read_value_reg;
	
	assign led_success = (write_value == read_value_reg);
	assign led_fail = ~led_success;
				
	//Guarda el valor leido en un registro con el enable
	always @( posedge clock or posedge reset)
		begin
			if(reset)
				begin
					read_value_reg <= 4'b0;
				end
			else if (read_value_reg_en)
				begin
					read_value_reg <= read_value;
				end
		end
		
endmodule
