// $Id: vcr_vc_alloc_mac.v 1534 2009-09-16 16:10:23Z dub $

/*
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*/



// VC allocator
module vcr_vc_alloc_mac
  (clk, reset, route_port_ip_ivc, inc_rc_ip_ivc, elig_op_ovc, req_ip_ivc, 
   gnt_ip_ivc, gnt_ip_ivc_ovc, gnt_op_ovc, gnt_op_ovc_ip, gnt_op_ovc_ivc);
   
`include "c_functions.v"
`include "c_constants.v"
`include "vcr_constants.v"
   
   // number of message classes (e.g. request, reply)
   parameter num_message_classes = 2;
   
   // number of resource classes (e.g. minimal, adaptive)
   parameter num_resource_classes = 2;
   
   // total number of packet classes
   localparam num_packet_classes = num_message_classes * num_resource_classes;
   
   // number of VCs per class
   parameter num_vcs_per_class = 1;
   
   // number of VCs
   localparam num_vcs = num_packet_classes * num_vcs_per_class;
   
   // number of input and output ports on switch
   parameter num_ports = 5;
   
   // width required to select an individual port
   localparam port_idx_width = clogb(num_ports);
   
   // select implementation variant for VC allocator
   parameter allocator_type = `VC_ALLOC_TYPE_SEP_IF;
   
   // select which arbiter type to use in allocator
   parameter arbiter_type = `ARBITER_TYPE_ROUND_ROBIN;
   
   parameter reset_type = `RESET_TYPE_ASYNC;
   
   input clk;
   input reset;
   
   // destination port selects
   input [0:num_ports*num_vcs*port_idx_width-1] route_port_ip_ivc;
   
   // transition to next resource class
   input [0:num_ports*num_vcs-1] inc_rc_ip_ivc;
   
   // output VC is eligible for allocation (i.e., not currently allocated)
   input [0:num_ports*num_vcs-1] elig_op_ovc;
   
   // request VC allocation
   input [0:num_ports*num_vcs-1] req_ip_ivc;
   
   // VC allocation successful (to input controller)
   output [0:num_ports*num_vcs-1] gnt_ip_ivc;
   wire [0:num_ports*num_vcs-1] gnt_ip_ivc;
   
   // granted output VC (to input controller)
   output [0:num_ports*num_vcs*num_vcs-1] gnt_ip_ivc_ovc;
   wire [0:num_ports*num_vcs*num_vcs-1] gnt_ip_ivc_ovc;
   
   // output VC was granted (to output controller)
   output [0:num_ports*num_vcs-1] gnt_op_ovc;
   wire [0:num_ports*num_vcs-1] 	gnt_op_ovc;
   
   // input port that each output VC was granted to (to output controller)
   output [0:num_ports*num_vcs*num_ports-1] gnt_op_ovc_ip;
   wire [0:num_ports*num_vcs*num_ports-1] gnt_op_ovc_ip;
   
   // input VC that each output VC was granted to (to output controller)
   output [0:num_ports*num_vcs*num_vcs-1] gnt_op_ovc_ivc;
   wire [0:num_ports*num_vcs*num_vcs-1]   gnt_op_ovc_ivc;
   
   generate
      
      if(allocator_type == `VC_ALLOC_TYPE_SEP_IF)
	begin
	   vcr_vc_alloc_sep_if
	     #(.num_message_classes(num_message_classes),
	       .num_resource_classes(num_resource_classes),
	       .num_vcs_per_class(num_vcs_per_class),
	       .num_ports(num_ports),
	       .arbiter_type(arbiter_type),
	       .reset_type(reset_type))
	   core_sep_if
	     (.clk(clk),
	      .reset(reset),
	      .route_port_ip_ivc(route_port_ip_ivc),
	      .inc_rc_ip_ivc(inc_rc_ip_ivc),
	      .elig_op_ovc(elig_op_ovc),
	      .req_ip_ivc(req_ip_ivc),
	      .gnt_ip_ivc(gnt_ip_ivc),
	      .gnt_ip_ivc_ovc(gnt_ip_ivc_ovc),
	      .gnt_op_ovc(gnt_op_ovc),
	      .gnt_op_ovc_ip(gnt_op_ovc_ip),
	      .gnt_op_ovc_ivc(gnt_op_ovc_ivc));
	end
      else if(allocator_type == `VC_ALLOC_TYPE_SEP_OF)
	begin
	   vcr_vc_alloc_sep_of
	     #(.num_message_classes(num_message_classes),
	       .num_resource_classes(num_resource_classes),
	       .num_vcs_per_class(num_vcs_per_class),
	       .num_ports(num_ports),
	       .arbiter_type(arbiter_type),
	       .reset_type(reset_type))
	   core_sep_of
	     (.clk(clk),
	      .reset(reset),
	      .route_port_ip_ivc(route_port_ip_ivc),
	      .inc_rc_ip_ivc(inc_rc_ip_ivc),
	      .elig_op_ovc(elig_op_ovc),
	      .req_ip_ivc(req_ip_ivc),
		.gnt_ip_ivc(gnt_ip_ivc),
	      .gnt_ip_ivc_ovc(gnt_ip_ivc_ovc),
	      .gnt_op_ovc(gnt_op_ovc),
	      .gnt_op_ovc_ip(gnt_op_ovc_ip),
	      .gnt_op_ovc_ivc(gnt_op_ovc_ivc));
	end
      else if((allocator_type >= `VC_ALLOC_TYPE_WF_BASE) &&
	      (allocator_type <= `VC_ALLOC_TYPE_WF_LIMIT))
	begin
	   vcr_vc_alloc_wf
	     #(.num_message_classes(num_message_classes),
	       .num_resource_classes(num_resource_classes),
	       .num_vcs_per_class(num_vcs_per_class),
	       .num_ports(num_ports),
	       .wf_alloc_type(allocator_type - `VC_ALLOC_TYPE_WF_BASE),
	       .reset_type(reset_type))
	   core_wf
	     (.clk(clk),
	      .reset(reset),
	      .route_port_ip_ivc(route_port_ip_ivc),
	      .inc_rc_ip_ivc(inc_rc_ip_ivc),
	      .elig_op_ovc(elig_op_ovc),
	      .req_ip_ivc(req_ip_ivc),
	      .gnt_ip_ivc(gnt_ip_ivc),
	      .gnt_ip_ivc_ovc(gnt_ip_ivc_ovc),
	      .gnt_op_ovc(gnt_op_ovc),
	      .gnt_op_ovc_ip(gnt_op_ovc_ip),
	      .gnt_op_ovc_ivc(gnt_op_ovc_ivc));
	end
      
   endgenerate
   
endmodule
