`timescale 1 ps / 1 ps

module system_wrapper
   (AC_BCLK,
    AC_MCLK,
    AC_MUTE_N,
    AC_PBLRC,
    AC_RECLRC,
    AC_SDATA_I,
    AC_SDATA_O,
    BLUE_O,
    DDR_addr,
    DDR_ba,
    DDR_cas_n,
    DDR_ck_n,
    DDR_ck_p,
    DDR_cke,
    DDR_cs_n,
    DDR_dm,
    DDR_dq,
    DDR_dqs_n,
    DDR_dqs_p,
    DDR_odt,
    DDR_ras_n,
    DDR_reset_n,
    DDR_we_n,
    FIXED_IO_ddr_vrn,
    FIXED_IO_ddr_vrp,
    FIXED_IO_mio,
    FIXED_IO_ps_clk,
    FIXED_IO_ps_porb,
    FIXED_IO_ps_srstb,
    GREEN_O,
    HDMI_CLK_N,
    HDMI_CLK_P,
    HDMI_D0_N,
    HDMI_D0_P,
    HDMI_D1_N,
    HDMI_D1_P,
    HDMI_D2_N,
    HDMI_D2_P,
    HDMI_OEN,
    HSYNC_O,
    RED_O,
    VSYNC_O,
    btns_4bits_tri_i,
    iic_0_scl_io,
    iic_0_sda_io,
    leds_4bits_tri_o,
    sws_4bits_tri_i);
  output [0:0]AC_BCLK;
  output AC_MCLK;
  output [0:0]AC_MUTE_N;
  output [0:0]AC_PBLRC;
  output [0:0]AC_RECLRC;
  input AC_SDATA_I;
  output [0:0]AC_SDATA_O;
  output [4:0]BLUE_O;
  inout [14:0]DDR_addr;
  inout [2:0]DDR_ba;
  inout DDR_cas_n;
  inout DDR_ck_n;
  inout DDR_ck_p;
  inout DDR_cke;
  inout DDR_cs_n;
  inout [3:0]DDR_dm;
  inout [31:0]DDR_dq;
  inout [3:0]DDR_dqs_n;
  inout [3:0]DDR_dqs_p;
  inout DDR_odt;
  inout DDR_ras_n;
  inout DDR_reset_n;
  inout DDR_we_n;
  inout FIXED_IO_ddr_vrn;
  inout FIXED_IO_ddr_vrp;
  inout [53:0]FIXED_IO_mio;
  inout FIXED_IO_ps_clk;
  inout FIXED_IO_ps_porb;
  inout FIXED_IO_ps_srstb;
  output [5:0]GREEN_O;
  output HDMI_CLK_N;
  output HDMI_CLK_P;
  output HDMI_D0_N;
  output HDMI_D0_P;
  output HDMI_D1_N;
  output HDMI_D1_P;
  output HDMI_D2_N;
  output HDMI_D2_P;
  output [0:0]HDMI_OEN;
  output HSYNC_O;
  output [4:0]RED_O;
  output VSYNC_O;
  input [3:0]btns_4bits_tri_i;
  inout iic_0_scl_io;
  inout iic_0_sda_io;
  output [3:0]leds_4bits_tri_o;
  input [3:0]sws_4bits_tri_i;

  wire [0:0]AC_BCLK;
  wire AC_MCLK;
  wire [0:0]AC_MUTE_N;
  wire [0:0]AC_PBLRC;
  wire [0:0]AC_RECLRC;
  wire AC_SDATA_I;
  wire [0:0]AC_SDATA_O;
  wire [4:0]BLUE_O;
  wire [14:0]DDR_addr;
  wire [2:0]DDR_ba;
  wire DDR_cas_n;
  wire DDR_ck_n;
  wire DDR_ck_p;
  wire DDR_cke;
  wire DDR_cs_n;
  wire [3:0]DDR_dm;
  wire [31:0]DDR_dq;
  wire [3:0]DDR_dqs_n;
  wire [3:0]DDR_dqs_p;
  wire DDR_odt;
  wire DDR_ras_n;
  wire DDR_reset_n;
  wire DDR_we_n;
  wire FIXED_IO_ddr_vrn;
  wire FIXED_IO_ddr_vrp;
  wire [53:0]FIXED_IO_mio;
  wire FIXED_IO_ps_clk;
  wire FIXED_IO_ps_porb;
  wire FIXED_IO_ps_srstb;
  wire [5:0]GREEN_O;
  wire HDMI_CLK_N;
  wire HDMI_CLK_P;
  wire HDMI_D0_N;
  wire HDMI_D0_P;
  wire HDMI_D1_N;
  wire HDMI_D1_P;
  wire HDMI_D2_N;
  wire HDMI_D2_P;
  wire [0:0]HDMI_OEN;
  wire HSYNC_O;
  wire [4:0]RED_O;
  wire VSYNC_O;
  wire [3:0]btns_4bits_tri_i;
  wire iic_0_scl_i;
  wire iic_0_scl_io;
  wire iic_0_scl_o;
  wire iic_0_scl_t;
  wire iic_0_sda_i;
  wire iic_0_sda_io;
  wire iic_0_sda_o;
  wire iic_0_sda_t;
  wire [3:0]leds_4bits_tri_o;
  wire [3:0]sws_4bits_tri_i;

IOBUF iic_0_scl_iobuf
       (.I(iic_0_scl_o),
        .IO(iic_0_scl_io),
        .O(iic_0_scl_i),
        .T(iic_0_scl_t));
IOBUF iic_0_sda_iobuf
       (.I(iic_0_sda_o),
        .IO(iic_0_sda_io),
        .O(iic_0_sda_i),
        .T(iic_0_sda_t));
system system_i
       (.AC_BCLK(AC_BCLK),
        .AC_MCLK(AC_MCLK),
        .AC_MUTE_N(AC_MUTE_N),
        .AC_PBLRC(AC_PBLRC),
        .AC_RECLRC(AC_RECLRC),
        .AC_SDATA_I(AC_SDATA_I),
        .AC_SDATA_O(AC_SDATA_O),
        .BLUE_O(BLUE_O),
        .BTNs_4Bits_tri_i(btns_4bits_tri_i),
        .DDR_addr(DDR_addr),
        .DDR_ba(DDR_ba),
        .DDR_cas_n(DDR_cas_n),
        .DDR_ck_n(DDR_ck_n),
        .DDR_ck_p(DDR_ck_p),
        .DDR_cke(DDR_cke),
        .DDR_cs_n(DDR_cs_n),
        .DDR_dm(DDR_dm),
        .DDR_dq(DDR_dq),
        .DDR_dqs_n(DDR_dqs_n),
        .DDR_dqs_p(DDR_dqs_p),
        .DDR_odt(DDR_odt),
        .DDR_ras_n(DDR_ras_n),
        .DDR_reset_n(DDR_reset_n),
        .DDR_we_n(DDR_we_n),
        .FIXED_IO_ddr_vrn(FIXED_IO_ddr_vrn),
        .FIXED_IO_ddr_vrp(FIXED_IO_ddr_vrp),
        .FIXED_IO_mio(FIXED_IO_mio),
        .FIXED_IO_ps_clk(FIXED_IO_ps_clk),
        .FIXED_IO_ps_porb(FIXED_IO_ps_porb),
        .FIXED_IO_ps_srstb(FIXED_IO_ps_srstb),
        .GREEN_O(GREEN_O),
        .HDMI_CLK_N(HDMI_CLK_N),
        .HDMI_CLK_P(HDMI_CLK_P),
        .HDMI_D0_N(HDMI_D0_N),
        .HDMI_D0_P(HDMI_D0_P),
        .HDMI_D1_N(HDMI_D1_N),
        .HDMI_D1_P(HDMI_D1_P),
        .HDMI_D2_N(HDMI_D2_N),
        .HDMI_D2_P(HDMI_D2_P),
        .HDMI_OEN(HDMI_OEN),
        .HSYNC_O(HSYNC_O),
        .IIC_0_scl_i(iic_0_scl_i),
        .IIC_0_scl_o(iic_0_scl_o),
        .IIC_0_scl_t(iic_0_scl_t),
        .IIC_0_sda_i(iic_0_sda_i),
        .IIC_0_sda_o(iic_0_sda_o),
        .IIC_0_sda_t(iic_0_sda_t),
        .LEDs_4Bits_tri_o(leds_4bits_tri_o),
        .RED_O(RED_O),
        .SWs_4Bits_tri_i(sws_4bits_tri_i),
        .VSYNC_O(VSYNC_O));
endmodule
