// system_acl_iface_acl_kernel_interface_mm_interconnect_0.v

// This file was auto-generated from altera_mm_interconnect_hw.tcl.  If you edit it your changes
// will probably be lost.
// 
// Generated using ACDS version 14.0 200 at 2015.05.04.18:11:56

`timescale 1 ps / 1 ps
module system_acl_iface_acl_kernel_interface_mm_interconnect_0 (
		input  wire        kernel_clk_out_clk_clk,                                    //                                  kernel_clk_out_clk.clk
		input  wire        address_span_extender_0_reset_reset_bridge_in_reset_reset, // address_span_extender_0_reset_reset_bridge_in_reset.reset
		input  wire        kernel_cra_reset_reset_bridge_in_reset_reset,              //              kernel_cra_reset_reset_bridge_in_reset.reset
		input  wire [29:0] address_span_extender_0_expanded_master_address,           //             address_span_extender_0_expanded_master.address
		output wire        address_span_extender_0_expanded_master_waitrequest,       //                                                    .waitrequest
		input  wire [0:0]  address_span_extender_0_expanded_master_burstcount,        //                                                    .burstcount
		input  wire [3:0]  address_span_extender_0_expanded_master_byteenable,        //                                                    .byteenable
		input  wire        address_span_extender_0_expanded_master_read,              //                                                    .read
		output wire [31:0] address_span_extender_0_expanded_master_readdata,          //                                                    .readdata
		output wire        address_span_extender_0_expanded_master_readdatavalid,     //                                                    .readdatavalid
		input  wire        address_span_extender_0_expanded_master_write,             //                                                    .write
		input  wire [31:0] address_span_extender_0_expanded_master_writedata,         //                                                    .writedata
		output wire [29:0] kernel_cra_s0_address,                                     //                                       kernel_cra_s0.address
		output wire        kernel_cra_s0_write,                                       //                                                    .write
		output wire        kernel_cra_s0_read,                                        //                                                    .read
		input  wire [63:0] kernel_cra_s0_readdata,                                    //                                                    .readdata
		output wire [63:0] kernel_cra_s0_writedata,                                   //                                                    .writedata
		output wire [0:0]  kernel_cra_s0_burstcount,                                  //                                                    .burstcount
		output wire [7:0]  kernel_cra_s0_byteenable,                                  //                                                    .byteenable
		input  wire        kernel_cra_s0_readdatavalid,                               //                                                    .readdatavalid
		input  wire        kernel_cra_s0_waitrequest,                                 //                                                    .waitrequest
		output wire        kernel_cra_s0_debugaccess                                  //                                                    .debugaccess
	);

	wire          address_span_extender_0_expanded_master_translator_avalon_universal_master_0_waitrequest;   // address_span_extender_0_expanded_master_agent:av_waitrequest -> address_span_extender_0_expanded_master_translator:uav_waitrequest
	wire    [2:0] address_span_extender_0_expanded_master_translator_avalon_universal_master_0_burstcount;    // address_span_extender_0_expanded_master_translator:uav_burstcount -> address_span_extender_0_expanded_master_agent:av_burstcount
	wire   [31:0] address_span_extender_0_expanded_master_translator_avalon_universal_master_0_writedata;     // address_span_extender_0_expanded_master_translator:uav_writedata -> address_span_extender_0_expanded_master_agent:av_writedata
	wire   [29:0] address_span_extender_0_expanded_master_translator_avalon_universal_master_0_address;       // address_span_extender_0_expanded_master_translator:uav_address -> address_span_extender_0_expanded_master_agent:av_address
	wire          address_span_extender_0_expanded_master_translator_avalon_universal_master_0_lock;          // address_span_extender_0_expanded_master_translator:uav_lock -> address_span_extender_0_expanded_master_agent:av_lock
	wire          address_span_extender_0_expanded_master_translator_avalon_universal_master_0_write;         // address_span_extender_0_expanded_master_translator:uav_write -> address_span_extender_0_expanded_master_agent:av_write
	wire          address_span_extender_0_expanded_master_translator_avalon_universal_master_0_read;          // address_span_extender_0_expanded_master_translator:uav_read -> address_span_extender_0_expanded_master_agent:av_read
	wire   [31:0] address_span_extender_0_expanded_master_translator_avalon_universal_master_0_readdata;      // address_span_extender_0_expanded_master_agent:av_readdata -> address_span_extender_0_expanded_master_translator:uav_readdata
	wire          address_span_extender_0_expanded_master_translator_avalon_universal_master_0_debugaccess;   // address_span_extender_0_expanded_master_translator:uav_debugaccess -> address_span_extender_0_expanded_master_agent:av_debugaccess
	wire    [3:0] address_span_extender_0_expanded_master_translator_avalon_universal_master_0_byteenable;    // address_span_extender_0_expanded_master_translator:uav_byteenable -> address_span_extender_0_expanded_master_agent:av_byteenable
	wire          address_span_extender_0_expanded_master_translator_avalon_universal_master_0_readdatavalid; // address_span_extender_0_expanded_master_agent:av_readdatavalid -> address_span_extender_0_expanded_master_translator:uav_readdatavalid
	wire          rsp_mux_src_endofpacket;                                                                    // rsp_mux:src_endofpacket -> address_span_extender_0_expanded_master_agent:rp_endofpacket
	wire          rsp_mux_src_valid;                                                                          // rsp_mux:src_valid -> address_span_extender_0_expanded_master_agent:rp_valid
	wire          rsp_mux_src_startofpacket;                                                                  // rsp_mux:src_startofpacket -> address_span_extender_0_expanded_master_agent:rp_startofpacket
	wire  [100:0] rsp_mux_src_data;                                                                           // rsp_mux:src_data -> address_span_extender_0_expanded_master_agent:rp_data
	wire    [0:0] rsp_mux_src_channel;                                                                        // rsp_mux:src_channel -> address_span_extender_0_expanded_master_agent:rp_channel
	wire          rsp_mux_src_ready;                                                                          // address_span_extender_0_expanded_master_agent:rp_ready -> rsp_mux:src_ready
	wire          kernel_cra_s0_agent_m0_waitrequest;                                                         // kernel_cra_s0_translator:uav_waitrequest -> kernel_cra_s0_agent:m0_waitrequest
	wire    [3:0] kernel_cra_s0_agent_m0_burstcount;                                                          // kernel_cra_s0_agent:m0_burstcount -> kernel_cra_s0_translator:uav_burstcount
	wire   [63:0] kernel_cra_s0_agent_m0_writedata;                                                           // kernel_cra_s0_agent:m0_writedata -> kernel_cra_s0_translator:uav_writedata
	wire   [29:0] kernel_cra_s0_agent_m0_address;                                                             // kernel_cra_s0_agent:m0_address -> kernel_cra_s0_translator:uav_address
	wire          kernel_cra_s0_agent_m0_write;                                                               // kernel_cra_s0_agent:m0_write -> kernel_cra_s0_translator:uav_write
	wire          kernel_cra_s0_agent_m0_lock;                                                                // kernel_cra_s0_agent:m0_lock -> kernel_cra_s0_translator:uav_lock
	wire          kernel_cra_s0_agent_m0_read;                                                                // kernel_cra_s0_agent:m0_read -> kernel_cra_s0_translator:uav_read
	wire   [63:0] kernel_cra_s0_agent_m0_readdata;                                                            // kernel_cra_s0_translator:uav_readdata -> kernel_cra_s0_agent:m0_readdata
	wire          kernel_cra_s0_agent_m0_readdatavalid;                                                       // kernel_cra_s0_translator:uav_readdatavalid -> kernel_cra_s0_agent:m0_readdatavalid
	wire          kernel_cra_s0_agent_m0_debugaccess;                                                         // kernel_cra_s0_agent:m0_debugaccess -> kernel_cra_s0_translator:uav_debugaccess
	wire    [7:0] kernel_cra_s0_agent_m0_byteenable;                                                          // kernel_cra_s0_agent:m0_byteenable -> kernel_cra_s0_translator:uav_byteenable
	wire          kernel_cra_s0_agent_rf_source_endofpacket;                                                  // kernel_cra_s0_agent:rf_source_endofpacket -> kernel_cra_s0_agent_rsp_fifo:in_endofpacket
	wire          kernel_cra_s0_agent_rf_source_valid;                                                        // kernel_cra_s0_agent:rf_source_valid -> kernel_cra_s0_agent_rsp_fifo:in_valid
	wire          kernel_cra_s0_agent_rf_source_startofpacket;                                                // kernel_cra_s0_agent:rf_source_startofpacket -> kernel_cra_s0_agent_rsp_fifo:in_startofpacket
	wire  [137:0] kernel_cra_s0_agent_rf_source_data;                                                         // kernel_cra_s0_agent:rf_source_data -> kernel_cra_s0_agent_rsp_fifo:in_data
	wire          kernel_cra_s0_agent_rf_source_ready;                                                        // kernel_cra_s0_agent_rsp_fifo:in_ready -> kernel_cra_s0_agent:rf_source_ready
	wire          kernel_cra_s0_agent_rsp_fifo_out_endofpacket;                                               // kernel_cra_s0_agent_rsp_fifo:out_endofpacket -> kernel_cra_s0_agent:rf_sink_endofpacket
	wire          kernel_cra_s0_agent_rsp_fifo_out_valid;                                                     // kernel_cra_s0_agent_rsp_fifo:out_valid -> kernel_cra_s0_agent:rf_sink_valid
	wire          kernel_cra_s0_agent_rsp_fifo_out_startofpacket;                                             // kernel_cra_s0_agent_rsp_fifo:out_startofpacket -> kernel_cra_s0_agent:rf_sink_startofpacket
	wire  [137:0] kernel_cra_s0_agent_rsp_fifo_out_data;                                                      // kernel_cra_s0_agent_rsp_fifo:out_data -> kernel_cra_s0_agent:rf_sink_data
	wire          kernel_cra_s0_agent_rsp_fifo_out_ready;                                                     // kernel_cra_s0_agent:rf_sink_ready -> kernel_cra_s0_agent_rsp_fifo:out_ready
	wire          kernel_cra_s0_agent_rdata_fifo_src_valid;                                                   // kernel_cra_s0_agent:rdata_fifo_src_valid -> kernel_cra_s0_agent:rdata_fifo_sink_valid
	wire   [65:0] kernel_cra_s0_agent_rdata_fifo_src_data;                                                    // kernel_cra_s0_agent:rdata_fifo_src_data -> kernel_cra_s0_agent:rdata_fifo_sink_data
	wire          kernel_cra_s0_agent_rdata_fifo_src_ready;                                                   // kernel_cra_s0_agent:rdata_fifo_sink_ready -> kernel_cra_s0_agent:rdata_fifo_src_ready
	wire          address_span_extender_0_expanded_master_agent_cp_endofpacket;                               // address_span_extender_0_expanded_master_agent:cp_endofpacket -> router:sink_endofpacket
	wire          address_span_extender_0_expanded_master_agent_cp_valid;                                     // address_span_extender_0_expanded_master_agent:cp_valid -> router:sink_valid
	wire          address_span_extender_0_expanded_master_agent_cp_startofpacket;                             // address_span_extender_0_expanded_master_agent:cp_startofpacket -> router:sink_startofpacket
	wire  [100:0] address_span_extender_0_expanded_master_agent_cp_data;                                      // address_span_extender_0_expanded_master_agent:cp_data -> router:sink_data
	wire          address_span_extender_0_expanded_master_agent_cp_ready;                                     // router:sink_ready -> address_span_extender_0_expanded_master_agent:cp_ready
	wire          router_src_endofpacket;                                                                     // router:src_endofpacket -> cmd_demux:sink_endofpacket
	wire          router_src_valid;                                                                           // router:src_valid -> cmd_demux:sink_valid
	wire          router_src_startofpacket;                                                                   // router:src_startofpacket -> cmd_demux:sink_startofpacket
	wire  [100:0] router_src_data;                                                                            // router:src_data -> cmd_demux:sink_data
	wire    [0:0] router_src_channel;                                                                         // router:src_channel -> cmd_demux:sink_channel
	wire          router_src_ready;                                                                           // cmd_demux:sink_ready -> router:src_ready
	wire          kernel_cra_s0_agent_rp_endofpacket;                                                         // kernel_cra_s0_agent:rp_endofpacket -> router_001:sink_endofpacket
	wire          kernel_cra_s0_agent_rp_valid;                                                               // kernel_cra_s0_agent:rp_valid -> router_001:sink_valid
	wire          kernel_cra_s0_agent_rp_startofpacket;                                                       // kernel_cra_s0_agent:rp_startofpacket -> router_001:sink_startofpacket
	wire  [136:0] kernel_cra_s0_agent_rp_data;                                                                // kernel_cra_s0_agent:rp_data -> router_001:sink_data
	wire          kernel_cra_s0_agent_rp_ready;                                                               // router_001:sink_ready -> kernel_cra_s0_agent:rp_ready
	wire          cmd_demux_src0_endofpacket;                                                                 // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
	wire          cmd_demux_src0_valid;                                                                       // cmd_demux:src0_valid -> cmd_mux:sink0_valid
	wire          cmd_demux_src0_startofpacket;                                                               // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
	wire  [100:0] cmd_demux_src0_data;                                                                        // cmd_demux:src0_data -> cmd_mux:sink0_data
	wire    [0:0] cmd_demux_src0_channel;                                                                     // cmd_demux:src0_channel -> cmd_mux:sink0_channel
	wire          cmd_demux_src0_ready;                                                                       // cmd_mux:sink0_ready -> cmd_demux:src0_ready
	wire          rsp_demux_src0_endofpacket;                                                                 // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
	wire          rsp_demux_src0_valid;                                                                       // rsp_demux:src0_valid -> rsp_mux:sink0_valid
	wire          rsp_demux_src0_startofpacket;                                                               // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
	wire  [100:0] rsp_demux_src0_data;                                                                        // rsp_demux:src0_data -> rsp_mux:sink0_data
	wire    [0:0] rsp_demux_src0_channel;                                                                     // rsp_demux:src0_channel -> rsp_mux:sink0_channel
	wire          rsp_demux_src0_ready;                                                                       // rsp_mux:sink0_ready -> rsp_demux:src0_ready
	wire          cmd_mux_src_endofpacket;                                                                    // cmd_mux:src_endofpacket -> kernel_cra_s0_cmd_width_adapter:in_endofpacket
	wire          cmd_mux_src_valid;                                                                          // cmd_mux:src_valid -> kernel_cra_s0_cmd_width_adapter:in_valid
	wire          cmd_mux_src_startofpacket;                                                                  // cmd_mux:src_startofpacket -> kernel_cra_s0_cmd_width_adapter:in_startofpacket
	wire  [100:0] cmd_mux_src_data;                                                                           // cmd_mux:src_data -> kernel_cra_s0_cmd_width_adapter:in_data
	wire    [0:0] cmd_mux_src_channel;                                                                        // cmd_mux:src_channel -> kernel_cra_s0_cmd_width_adapter:in_channel
	wire          cmd_mux_src_ready;                                                                          // kernel_cra_s0_cmd_width_adapter:in_ready -> cmd_mux:src_ready
	wire          kernel_cra_s0_cmd_width_adapter_src_endofpacket;                                            // kernel_cra_s0_cmd_width_adapter:out_endofpacket -> kernel_cra_s0_agent:cp_endofpacket
	wire          kernel_cra_s0_cmd_width_adapter_src_valid;                                                  // kernel_cra_s0_cmd_width_adapter:out_valid -> kernel_cra_s0_agent:cp_valid
	wire          kernel_cra_s0_cmd_width_adapter_src_startofpacket;                                          // kernel_cra_s0_cmd_width_adapter:out_startofpacket -> kernel_cra_s0_agent:cp_startofpacket
	wire  [136:0] kernel_cra_s0_cmd_width_adapter_src_data;                                                   // kernel_cra_s0_cmd_width_adapter:out_data -> kernel_cra_s0_agent:cp_data
	wire          kernel_cra_s0_cmd_width_adapter_src_ready;                                                  // kernel_cra_s0_agent:cp_ready -> kernel_cra_s0_cmd_width_adapter:out_ready
	wire    [0:0] kernel_cra_s0_cmd_width_adapter_src_channel;                                                // kernel_cra_s0_cmd_width_adapter:out_channel -> kernel_cra_s0_agent:cp_channel
	wire          router_001_src_endofpacket;                                                                 // router_001:src_endofpacket -> kernel_cra_s0_rsp_width_adapter:in_endofpacket
	wire          router_001_src_valid;                                                                       // router_001:src_valid -> kernel_cra_s0_rsp_width_adapter:in_valid
	wire          router_001_src_startofpacket;                                                               // router_001:src_startofpacket -> kernel_cra_s0_rsp_width_adapter:in_startofpacket
	wire  [136:0] router_001_src_data;                                                                        // router_001:src_data -> kernel_cra_s0_rsp_width_adapter:in_data
	wire    [0:0] router_001_src_channel;                                                                     // router_001:src_channel -> kernel_cra_s0_rsp_width_adapter:in_channel
	wire          router_001_src_ready;                                                                       // kernel_cra_s0_rsp_width_adapter:in_ready -> router_001:src_ready
	wire          kernel_cra_s0_rsp_width_adapter_src_endofpacket;                                            // kernel_cra_s0_rsp_width_adapter:out_endofpacket -> rsp_demux:sink_endofpacket
	wire          kernel_cra_s0_rsp_width_adapter_src_valid;                                                  // kernel_cra_s0_rsp_width_adapter:out_valid -> rsp_demux:sink_valid
	wire          kernel_cra_s0_rsp_width_adapter_src_startofpacket;                                          // kernel_cra_s0_rsp_width_adapter:out_startofpacket -> rsp_demux:sink_startofpacket
	wire  [100:0] kernel_cra_s0_rsp_width_adapter_src_data;                                                   // kernel_cra_s0_rsp_width_adapter:out_data -> rsp_demux:sink_data
	wire          kernel_cra_s0_rsp_width_adapter_src_ready;                                                  // rsp_demux:sink_ready -> kernel_cra_s0_rsp_width_adapter:out_ready
	wire    [0:0] kernel_cra_s0_rsp_width_adapter_src_channel;                                                // kernel_cra_s0_rsp_width_adapter:out_channel -> rsp_demux:sink_channel

	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (30),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (30),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (1),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (1),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (0),
		.AV_REGISTERINCOMINGSIGNALS  (0)
	) address_span_extender_0_expanded_master_translator (
		.clk                      (kernel_clk_out_clk_clk),                                                                     //                       clk.clk
		.reset                    (address_span_extender_0_reset_reset_bridge_in_reset_reset),                                  //                     reset.reset
		.uav_address              (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_address),       // avalon_universal_master_0.address
		.uav_burstcount           (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_burstcount),    //                          .burstcount
		.uav_read                 (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_read),          //                          .read
		.uav_write                (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_write),         //                          .write
		.uav_waitrequest          (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_waitrequest),   //                          .waitrequest
		.uav_readdatavalid        (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_readdatavalid), //                          .readdatavalid
		.uav_byteenable           (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_byteenable),    //                          .byteenable
		.uav_readdata             (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_readdata),      //                          .readdata
		.uav_writedata            (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_writedata),     //                          .writedata
		.uav_lock                 (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_lock),          //                          .lock
		.uav_debugaccess          (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_debugaccess),   //                          .debugaccess
		.av_address               (address_span_extender_0_expanded_master_address),                                            //      avalon_anti_master_0.address
		.av_waitrequest           (address_span_extender_0_expanded_master_waitrequest),                                        //                          .waitrequest
		.av_burstcount            (address_span_extender_0_expanded_master_burstcount),                                         //                          .burstcount
		.av_byteenable            (address_span_extender_0_expanded_master_byteenable),                                         //                          .byteenable
		.av_read                  (address_span_extender_0_expanded_master_read),                                               //                          .read
		.av_readdata              (address_span_extender_0_expanded_master_readdata),                                           //                          .readdata
		.av_readdatavalid         (address_span_extender_0_expanded_master_readdatavalid),                                      //                          .readdatavalid
		.av_write                 (address_span_extender_0_expanded_master_write),                                              //                          .write
		.av_writedata             (address_span_extender_0_expanded_master_writedata),                                          //                          .writedata
		.av_beginbursttransfer    (1'b0),                                                                                       //               (terminated)
		.av_begintransfer         (1'b0),                                                                                       //               (terminated)
		.av_chipselect            (1'b0),                                                                                       //               (terminated)
		.av_lock                  (1'b0),                                                                                       //               (terminated)
		.av_debugaccess           (1'b0),                                                                                       //               (terminated)
		.uav_clken                (),                                                                                           //               (terminated)
		.av_clken                 (1'b1),                                                                                       //               (terminated)
		.uav_response             (2'b00),                                                                                      //               (terminated)
		.av_response              (),                                                                                           //               (terminated)
		.uav_writeresponserequest (),                                                                                           //               (terminated)
		.uav_writeresponsevalid   (1'b0),                                                                                       //               (terminated)
		.av_writeresponserequest  (1'b0),                                                                                       //               (terminated)
		.av_writeresponsevalid    ()                                                                                            //               (terminated)
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (30),
		.AV_DATA_W                      (64),
		.UAV_DATA_W                     (64),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (8),
		.UAV_BYTEENABLE_W               (8),
		.UAV_ADDRESS_W                  (30),
		.UAV_BURSTCOUNT_W               (4),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (8),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) kernel_cra_s0_translator (
		.clk                      (kernel_clk_out_clk_clk),                       //                      clk.clk
		.reset                    (kernel_cra_reset_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address              (kernel_cra_s0_agent_m0_address),               // avalon_universal_slave_0.address
		.uav_burstcount           (kernel_cra_s0_agent_m0_burstcount),            //                         .burstcount
		.uav_read                 (kernel_cra_s0_agent_m0_read),                  //                         .read
		.uav_write                (kernel_cra_s0_agent_m0_write),                 //                         .write
		.uav_waitrequest          (kernel_cra_s0_agent_m0_waitrequest),           //                         .waitrequest
		.uav_readdatavalid        (kernel_cra_s0_agent_m0_readdatavalid),         //                         .readdatavalid
		.uav_byteenable           (kernel_cra_s0_agent_m0_byteenable),            //                         .byteenable
		.uav_readdata             (kernel_cra_s0_agent_m0_readdata),              //                         .readdata
		.uav_writedata            (kernel_cra_s0_agent_m0_writedata),             //                         .writedata
		.uav_lock                 (kernel_cra_s0_agent_m0_lock),                  //                         .lock
		.uav_debugaccess          (kernel_cra_s0_agent_m0_debugaccess),           //                         .debugaccess
		.av_address               (kernel_cra_s0_address),                        //      avalon_anti_slave_0.address
		.av_write                 (kernel_cra_s0_write),                          //                         .write
		.av_read                  (kernel_cra_s0_read),                           //                         .read
		.av_readdata              (kernel_cra_s0_readdata),                       //                         .readdata
		.av_writedata             (kernel_cra_s0_writedata),                      //                         .writedata
		.av_burstcount            (kernel_cra_s0_burstcount),                     //                         .burstcount
		.av_byteenable            (kernel_cra_s0_byteenable),                     //                         .byteenable
		.av_readdatavalid         (kernel_cra_s0_readdatavalid),                  //                         .readdatavalid
		.av_waitrequest           (kernel_cra_s0_waitrequest),                    //                         .waitrequest
		.av_debugaccess           (kernel_cra_s0_debugaccess),                    //                         .debugaccess
		.av_begintransfer         (),                                             //              (terminated)
		.av_beginbursttransfer    (),                                             //              (terminated)
		.av_writebyteenable       (),                                             //              (terminated)
		.av_lock                  (),                                             //              (terminated)
		.av_chipselect            (),                                             //              (terminated)
		.av_clken                 (),                                             //              (terminated)
		.uav_clken                (1'b0),                                         //              (terminated)
		.av_outputenable          (),                                             //              (terminated)
		.uav_response             (),                                             //              (terminated)
		.av_response              (2'b00),                                        //              (terminated)
		.uav_writeresponserequest (1'b0),                                         //              (terminated)
		.uav_writeresponsevalid   (),                                             //              (terminated)
		.av_writeresponserequest  (),                                             //              (terminated)
		.av_writeresponsevalid    (1'b0)                                          //              (terminated)
	);

	altera_merlin_master_agent #(
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BEGIN_BURST           (84),
		.PKT_BURSTWRAP_H           (76),
		.PKT_BURSTWRAP_L           (76),
		.PKT_BURST_SIZE_H          (79),
		.PKT_BURST_SIZE_L          (77),
		.PKT_BURST_TYPE_H          (81),
		.PKT_BURST_TYPE_L          (80),
		.PKT_BYTE_CNT_H            (75),
		.PKT_BYTE_CNT_L            (72),
		.PKT_ADDR_H                (65),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (66),
		.PKT_TRANS_POSTED          (67),
		.PKT_TRANS_WRITE           (68),
		.PKT_TRANS_READ            (69),
		.PKT_TRANS_LOCK            (70),
		.PKT_TRANS_EXCLUSIVE       (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (86),
		.PKT_SRC_ID_L              (86),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (87),
		.PKT_THREAD_ID_H           (88),
		.PKT_THREAD_ID_L           (88),
		.PKT_CACHE_H               (95),
		.PKT_CACHE_L               (92),
		.PKT_DATA_SIDEBAND_H       (83),
		.PKT_DATA_SIDEBAND_L       (83),
		.PKT_QOS_H                 (85),
		.PKT_QOS_L                 (85),
		.PKT_ADDR_SIDEBAND_H       (82),
		.PKT_ADDR_SIDEBAND_L       (82),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_ORI_BURST_SIZE_H      (100),
		.ST_DATA_W                 (101),
		.ST_CHANNEL_W              (1),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (1),
		.ID                        (0),
		.BURSTWRAP_VALUE           (1),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) address_span_extender_0_expanded_master_agent (
		.clk                     (kernel_clk_out_clk_clk),                                                                     //       clk.clk
		.reset                   (address_span_extender_0_reset_reset_bridge_in_reset_reset),                                  // clk_reset.reset
		.av_address              (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_address),       //        av.address
		.av_write                (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_write),         //          .write
		.av_read                 (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_read),          //          .read
		.av_writedata            (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_writedata),     //          .writedata
		.av_readdata             (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_readdata),      //          .readdata
		.av_waitrequest          (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_waitrequest),   //          .waitrequest
		.av_readdatavalid        (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_readdatavalid), //          .readdatavalid
		.av_byteenable           (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_byteenable),    //          .byteenable
		.av_burstcount           (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_burstcount),    //          .burstcount
		.av_debugaccess          (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_debugaccess),   //          .debugaccess
		.av_lock                 (address_span_extender_0_expanded_master_translator_avalon_universal_master_0_lock),          //          .lock
		.cp_valid                (address_span_extender_0_expanded_master_agent_cp_valid),                                     //        cp.valid
		.cp_data                 (address_span_extender_0_expanded_master_agent_cp_data),                                      //          .data
		.cp_startofpacket        (address_span_extender_0_expanded_master_agent_cp_startofpacket),                             //          .startofpacket
		.cp_endofpacket          (address_span_extender_0_expanded_master_agent_cp_endofpacket),                               //          .endofpacket
		.cp_ready                (address_span_extender_0_expanded_master_agent_cp_ready),                                     //          .ready
		.rp_valid                (rsp_mux_src_valid),                                                                          //        rp.valid
		.rp_data                 (rsp_mux_src_data),                                                                           //          .data
		.rp_channel              (rsp_mux_src_channel),                                                                        //          .channel
		.rp_startofpacket        (rsp_mux_src_startofpacket),                                                                  //          .startofpacket
		.rp_endofpacket          (rsp_mux_src_endofpacket),                                                                    //          .endofpacket
		.rp_ready                (rsp_mux_src_ready),                                                                          //          .ready
		.av_response             (),                                                                                           // (terminated)
		.av_writeresponserequest (1'b0),                                                                                       // (terminated)
		.av_writeresponsevalid   ()                                                                                            // (terminated)
	);

	altera_merlin_slave_agent #(
		.PKT_DATA_H                (63),
		.PKT_DATA_L                (0),
		.PKT_BEGIN_BURST           (120),
		.PKT_SYMBOL_W              (8),
		.PKT_BYTEEN_H              (71),
		.PKT_BYTEEN_L              (64),
		.PKT_ADDR_H                (101),
		.PKT_ADDR_L                (72),
		.PKT_TRANS_COMPRESSED_READ (102),
		.PKT_TRANS_POSTED          (103),
		.PKT_TRANS_WRITE           (104),
		.PKT_TRANS_READ            (105),
		.PKT_TRANS_LOCK            (106),
		.PKT_SRC_ID_H              (122),
		.PKT_SRC_ID_L              (122),
		.PKT_DEST_ID_H             (123),
		.PKT_DEST_ID_L             (123),
		.PKT_BURSTWRAP_H           (112),
		.PKT_BURSTWRAP_L           (112),
		.PKT_BYTE_CNT_H            (111),
		.PKT_BYTE_CNT_L            (108),
		.PKT_PROTECTION_H          (127),
		.PKT_PROTECTION_L          (125),
		.PKT_RESPONSE_STATUS_H     (133),
		.PKT_RESPONSE_STATUS_L     (132),
		.PKT_BURST_SIZE_H          (115),
		.PKT_BURST_SIZE_L          (113),
		.PKT_ORI_BURST_SIZE_L      (134),
		.PKT_ORI_BURST_SIZE_H      (136),
		.ST_CHANNEL_W              (1),
		.ST_DATA_W                 (137),
		.AVS_BURSTCOUNT_W          (4),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) kernel_cra_s0_agent (
		.clk                     (kernel_clk_out_clk_clk),                            //             clk.clk
		.reset                   (kernel_cra_reset_reset_bridge_in_reset_reset),      //       clk_reset.reset
		.m0_address              (kernel_cra_s0_agent_m0_address),                    //              m0.address
		.m0_burstcount           (kernel_cra_s0_agent_m0_burstcount),                 //                .burstcount
		.m0_byteenable           (kernel_cra_s0_agent_m0_byteenable),                 //                .byteenable
		.m0_debugaccess          (kernel_cra_s0_agent_m0_debugaccess),                //                .debugaccess
		.m0_lock                 (kernel_cra_s0_agent_m0_lock),                       //                .lock
		.m0_readdata             (kernel_cra_s0_agent_m0_readdata),                   //                .readdata
		.m0_readdatavalid        (kernel_cra_s0_agent_m0_readdatavalid),              //                .readdatavalid
		.m0_read                 (kernel_cra_s0_agent_m0_read),                       //                .read
		.m0_waitrequest          (kernel_cra_s0_agent_m0_waitrequest),                //                .waitrequest
		.m0_writedata            (kernel_cra_s0_agent_m0_writedata),                  //                .writedata
		.m0_write                (kernel_cra_s0_agent_m0_write),                      //                .write
		.rp_endofpacket          (kernel_cra_s0_agent_rp_endofpacket),                //              rp.endofpacket
		.rp_ready                (kernel_cra_s0_agent_rp_ready),                      //                .ready
		.rp_valid                (kernel_cra_s0_agent_rp_valid),                      //                .valid
		.rp_data                 (kernel_cra_s0_agent_rp_data),                       //                .data
		.rp_startofpacket        (kernel_cra_s0_agent_rp_startofpacket),              //                .startofpacket
		.cp_ready                (kernel_cra_s0_cmd_width_adapter_src_ready),         //              cp.ready
		.cp_valid                (kernel_cra_s0_cmd_width_adapter_src_valid),         //                .valid
		.cp_data                 (kernel_cra_s0_cmd_width_adapter_src_data),          //                .data
		.cp_startofpacket        (kernel_cra_s0_cmd_width_adapter_src_startofpacket), //                .startofpacket
		.cp_endofpacket          (kernel_cra_s0_cmd_width_adapter_src_endofpacket),   //                .endofpacket
		.cp_channel              (kernel_cra_s0_cmd_width_adapter_src_channel),       //                .channel
		.rf_sink_ready           (kernel_cra_s0_agent_rsp_fifo_out_ready),            //         rf_sink.ready
		.rf_sink_valid           (kernel_cra_s0_agent_rsp_fifo_out_valid),            //                .valid
		.rf_sink_startofpacket   (kernel_cra_s0_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
		.rf_sink_endofpacket     (kernel_cra_s0_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
		.rf_sink_data            (kernel_cra_s0_agent_rsp_fifo_out_data),             //                .data
		.rf_source_ready         (kernel_cra_s0_agent_rf_source_ready),               //       rf_source.ready
		.rf_source_valid         (kernel_cra_s0_agent_rf_source_valid),               //                .valid
		.rf_source_startofpacket (kernel_cra_s0_agent_rf_source_startofpacket),       //                .startofpacket
		.rf_source_endofpacket   (kernel_cra_s0_agent_rf_source_endofpacket),         //                .endofpacket
		.rf_source_data          (kernel_cra_s0_agent_rf_source_data),                //                .data
		.rdata_fifo_sink_ready   (kernel_cra_s0_agent_rdata_fifo_src_ready),          // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (kernel_cra_s0_agent_rdata_fifo_src_valid),          //                .valid
		.rdata_fifo_sink_data    (kernel_cra_s0_agent_rdata_fifo_src_data),           //                .data
		.rdata_fifo_src_ready    (kernel_cra_s0_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (kernel_cra_s0_agent_rdata_fifo_src_valid),          //                .valid
		.rdata_fifo_src_data     (kernel_cra_s0_agent_rdata_fifo_src_data),           //                .data
		.m0_response             (2'b00),                                             //     (terminated)
		.m0_writeresponserequest (),                                                  //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                               //     (terminated)
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (138),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) kernel_cra_s0_agent_rsp_fifo (
		.clk               (kernel_clk_out_clk_clk),                         //       clk.clk
		.reset             (kernel_cra_reset_reset_bridge_in_reset_reset),   // clk_reset.reset
		.in_data           (kernel_cra_s0_agent_rf_source_data),             //        in.data
		.in_valid          (kernel_cra_s0_agent_rf_source_valid),            //          .valid
		.in_ready          (kernel_cra_s0_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (kernel_cra_s0_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (kernel_cra_s0_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (kernel_cra_s0_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (kernel_cra_s0_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (kernel_cra_s0_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (kernel_cra_s0_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (kernel_cra_s0_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                          // (terminated)
		.csr_read          (1'b0),                                           // (terminated)
		.csr_write         (1'b0),                                           // (terminated)
		.csr_readdata      (),                                               // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
		.almost_full_data  (),                                               // (terminated)
		.almost_empty_data (),                                               // (terminated)
		.in_empty          (1'b0),                                           // (terminated)
		.out_empty         (),                                               // (terminated)
		.in_error          (1'b0),                                           // (terminated)
		.out_error         (),                                               // (terminated)
		.in_channel        (1'b0),                                           // (terminated)
		.out_channel       ()                                                // (terminated)
	);

	system_acl_iface_acl_kernel_interface_mm_interconnect_0_router router (
		.sink_ready         (address_span_extender_0_expanded_master_agent_cp_ready),         //      sink.ready
		.sink_valid         (address_span_extender_0_expanded_master_agent_cp_valid),         //          .valid
		.sink_data          (address_span_extender_0_expanded_master_agent_cp_data),          //          .data
		.sink_startofpacket (address_span_extender_0_expanded_master_agent_cp_startofpacket), //          .startofpacket
		.sink_endofpacket   (address_span_extender_0_expanded_master_agent_cp_endofpacket),   //          .endofpacket
		.clk                (kernel_clk_out_clk_clk),                                         //       clk.clk
		.reset              (address_span_extender_0_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
		.src_ready          (router_src_ready),                                               //       src.ready
		.src_valid          (router_src_valid),                                               //          .valid
		.src_data           (router_src_data),                                                //          .data
		.src_channel        (router_src_channel),                                             //          .channel
		.src_startofpacket  (router_src_startofpacket),                                       //          .startofpacket
		.src_endofpacket    (router_src_endofpacket)                                          //          .endofpacket
	);

	system_acl_iface_acl_kernel_interface_mm_interconnect_0_router_001 router_001 (
		.sink_ready         (kernel_cra_s0_agent_rp_ready),                 //      sink.ready
		.sink_valid         (kernel_cra_s0_agent_rp_valid),                 //          .valid
		.sink_data          (kernel_cra_s0_agent_rp_data),                  //          .data
		.sink_startofpacket (kernel_cra_s0_agent_rp_startofpacket),         //          .startofpacket
		.sink_endofpacket   (kernel_cra_s0_agent_rp_endofpacket),           //          .endofpacket
		.clk                (kernel_clk_out_clk_clk),                       //       clk.clk
		.reset              (kernel_cra_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_001_src_ready),                         //       src.ready
		.src_valid          (router_001_src_valid),                         //          .valid
		.src_data           (router_001_src_data),                          //          .data
		.src_channel        (router_001_src_channel),                       //          .channel
		.src_startofpacket  (router_001_src_startofpacket),                 //          .startofpacket
		.src_endofpacket    (router_001_src_endofpacket)                    //          .endofpacket
	);

	system_acl_iface_acl_kernel_interface_mm_interconnect_0_cmd_demux cmd_demux (
		.clk                (kernel_clk_out_clk_clk),                                    //       clk.clk
		.reset              (address_span_extender_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_src_ready),                                          //      sink.ready
		.sink_channel       (router_src_channel),                                        //          .channel
		.sink_data          (router_src_data),                                           //          .data
		.sink_startofpacket (router_src_startofpacket),                                  //          .startofpacket
		.sink_endofpacket   (router_src_endofpacket),                                    //          .endofpacket
		.sink_valid         (router_src_valid),                                          //          .valid
		.src0_ready         (cmd_demux_src0_ready),                                      //      src0.ready
		.src0_valid         (cmd_demux_src0_valid),                                      //          .valid
		.src0_data          (cmd_demux_src0_data),                                       //          .data
		.src0_channel       (cmd_demux_src0_channel),                                    //          .channel
		.src0_startofpacket (cmd_demux_src0_startofpacket),                              //          .startofpacket
		.src0_endofpacket   (cmd_demux_src0_endofpacket)                                 //          .endofpacket
	);

	system_acl_iface_acl_kernel_interface_mm_interconnect_0_cmd_mux cmd_mux (
		.clk                 (kernel_clk_out_clk_clk),                       //       clk.clk
		.reset               (kernel_cra_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_src_ready),                            //       src.ready
		.src_valid           (cmd_mux_src_valid),                            //          .valid
		.src_data            (cmd_mux_src_data),                             //          .data
		.src_channel         (cmd_mux_src_channel),                          //          .channel
		.src_startofpacket   (cmd_mux_src_startofpacket),                    //          .startofpacket
		.src_endofpacket     (cmd_mux_src_endofpacket),                      //          .endofpacket
		.sink0_ready         (cmd_demux_src0_ready),                         //     sink0.ready
		.sink0_valid         (cmd_demux_src0_valid),                         //          .valid
		.sink0_channel       (cmd_demux_src0_channel),                       //          .channel
		.sink0_data          (cmd_demux_src0_data),                          //          .data
		.sink0_startofpacket (cmd_demux_src0_startofpacket),                 //          .startofpacket
		.sink0_endofpacket   (cmd_demux_src0_endofpacket)                    //          .endofpacket
	);

	system_acl_iface_acl_kernel_interface_mm_interconnect_0_cmd_demux rsp_demux (
		.clk                (kernel_clk_out_clk_clk),                            //       clk.clk
		.reset              (kernel_cra_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
		.sink_ready         (kernel_cra_s0_rsp_width_adapter_src_ready),         //      sink.ready
		.sink_channel       (kernel_cra_s0_rsp_width_adapter_src_channel),       //          .channel
		.sink_data          (kernel_cra_s0_rsp_width_adapter_src_data),          //          .data
		.sink_startofpacket (kernel_cra_s0_rsp_width_adapter_src_startofpacket), //          .startofpacket
		.sink_endofpacket   (kernel_cra_s0_rsp_width_adapter_src_endofpacket),   //          .endofpacket
		.sink_valid         (kernel_cra_s0_rsp_width_adapter_src_valid),         //          .valid
		.src0_ready         (rsp_demux_src0_ready),                              //      src0.ready
		.src0_valid         (rsp_demux_src0_valid),                              //          .valid
		.src0_data          (rsp_demux_src0_data),                               //          .data
		.src0_channel       (rsp_demux_src0_channel),                            //          .channel
		.src0_startofpacket (rsp_demux_src0_startofpacket),                      //          .startofpacket
		.src0_endofpacket   (rsp_demux_src0_endofpacket)                         //          .endofpacket
	);

	system_acl_iface_acl_kernel_interface_mm_interconnect_0_rsp_mux rsp_mux (
		.clk                 (kernel_clk_out_clk_clk),                                    //       clk.clk
		.reset               (address_span_extender_0_reset_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (rsp_mux_src_ready),                                         //       src.ready
		.src_valid           (rsp_mux_src_valid),                                         //          .valid
		.src_data            (rsp_mux_src_data),                                          //          .data
		.src_channel         (rsp_mux_src_channel),                                       //          .channel
		.src_startofpacket   (rsp_mux_src_startofpacket),                                 //          .startofpacket
		.src_endofpacket     (rsp_mux_src_endofpacket),                                   //          .endofpacket
		.sink0_ready         (rsp_demux_src0_ready),                                      //     sink0.ready
		.sink0_valid         (rsp_demux_src0_valid),                                      //          .valid
		.sink0_channel       (rsp_demux_src0_channel),                                    //          .channel
		.sink0_data          (rsp_demux_src0_data),                                       //          .data
		.sink0_startofpacket (rsp_demux_src0_startofpacket),                              //          .startofpacket
		.sink0_endofpacket   (rsp_demux_src0_endofpacket)                                 //          .endofpacket
	);

	altera_merlin_width_adapter #(
		.IN_PKT_ADDR_H                 (65),
		.IN_PKT_ADDR_L                 (36),
		.IN_PKT_DATA_H                 (31),
		.IN_PKT_DATA_L                 (0),
		.IN_PKT_BYTEEN_H               (35),
		.IN_PKT_BYTEEN_L               (32),
		.IN_PKT_BYTE_CNT_H             (75),
		.IN_PKT_BYTE_CNT_L             (72),
		.IN_PKT_TRANS_COMPRESSED_READ  (66),
		.IN_PKT_BURSTWRAP_H            (76),
		.IN_PKT_BURSTWRAP_L            (76),
		.IN_PKT_BURST_SIZE_H           (79),
		.IN_PKT_BURST_SIZE_L           (77),
		.IN_PKT_RESPONSE_STATUS_H      (97),
		.IN_PKT_RESPONSE_STATUS_L      (96),
		.IN_PKT_TRANS_EXCLUSIVE        (71),
		.IN_PKT_BURST_TYPE_H           (81),
		.IN_PKT_BURST_TYPE_L           (80),
		.IN_PKT_ORI_BURST_SIZE_L       (98),
		.IN_PKT_ORI_BURST_SIZE_H       (100),
		.IN_ST_DATA_W                  (101),
		.OUT_PKT_ADDR_H                (101),
		.OUT_PKT_ADDR_L                (72),
		.OUT_PKT_DATA_H                (63),
		.OUT_PKT_DATA_L                (0),
		.OUT_PKT_BYTEEN_H              (71),
		.OUT_PKT_BYTEEN_L              (64),
		.OUT_PKT_BYTE_CNT_H            (111),
		.OUT_PKT_BYTE_CNT_L            (108),
		.OUT_PKT_TRANS_COMPRESSED_READ (102),
		.OUT_PKT_BURST_SIZE_H          (115),
		.OUT_PKT_BURST_SIZE_L          (113),
		.OUT_PKT_RESPONSE_STATUS_H     (133),
		.OUT_PKT_RESPONSE_STATUS_L     (132),
		.OUT_PKT_TRANS_EXCLUSIVE       (107),
		.OUT_PKT_BURST_TYPE_H          (117),
		.OUT_PKT_BURST_TYPE_L          (116),
		.OUT_PKT_ORI_BURST_SIZE_L      (134),
		.OUT_PKT_ORI_BURST_SIZE_H      (136),
		.OUT_ST_DATA_W                 (137),
		.ST_CHANNEL_W                  (1),
		.OPTIMIZE_FOR_RSP              (0),
		.RESPONSE_PATH                 (0),
		.CONSTANT_BURST_SIZE           (1),
		.PACKING                       (1),
		.ENABLE_ADDRESS_ALIGNMENT      (0)
	) kernel_cra_s0_cmd_width_adapter (
		.clk                  (kernel_clk_out_clk_clk),                            //       clk.clk
		.reset                (kernel_cra_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
		.in_valid             (cmd_mux_src_valid),                                 //      sink.valid
		.in_channel           (cmd_mux_src_channel),                               //          .channel
		.in_startofpacket     (cmd_mux_src_startofpacket),                         //          .startofpacket
		.in_endofpacket       (cmd_mux_src_endofpacket),                           //          .endofpacket
		.in_ready             (cmd_mux_src_ready),                                 //          .ready
		.in_data              (cmd_mux_src_data),                                  //          .data
		.out_endofpacket      (kernel_cra_s0_cmd_width_adapter_src_endofpacket),   //       src.endofpacket
		.out_data             (kernel_cra_s0_cmd_width_adapter_src_data),          //          .data
		.out_channel          (kernel_cra_s0_cmd_width_adapter_src_channel),       //          .channel
		.out_valid            (kernel_cra_s0_cmd_width_adapter_src_valid),         //          .valid
		.out_ready            (kernel_cra_s0_cmd_width_adapter_src_ready),         //          .ready
		.out_startofpacket    (kernel_cra_s0_cmd_width_adapter_src_startofpacket), //          .startofpacket
		.in_command_size_data (3'b000)                                             // (terminated)
	);

	altera_merlin_width_adapter #(
		.IN_PKT_ADDR_H                 (101),
		.IN_PKT_ADDR_L                 (72),
		.IN_PKT_DATA_H                 (63),
		.IN_PKT_DATA_L                 (0),
		.IN_PKT_BYTEEN_H               (71),
		.IN_PKT_BYTEEN_L               (64),
		.IN_PKT_BYTE_CNT_H             (111),
		.IN_PKT_BYTE_CNT_L             (108),
		.IN_PKT_TRANS_COMPRESSED_READ  (102),
		.IN_PKT_BURSTWRAP_H            (112),
		.IN_PKT_BURSTWRAP_L            (112),
		.IN_PKT_BURST_SIZE_H           (115),
		.IN_PKT_BURST_SIZE_L           (113),
		.IN_PKT_RESPONSE_STATUS_H      (133),
		.IN_PKT_RESPONSE_STATUS_L      (132),
		.IN_PKT_TRANS_EXCLUSIVE        (107),
		.IN_PKT_BURST_TYPE_H           (117),
		.IN_PKT_BURST_TYPE_L           (116),
		.IN_PKT_ORI_BURST_SIZE_L       (134),
		.IN_PKT_ORI_BURST_SIZE_H       (136),
		.IN_ST_DATA_W                  (137),
		.OUT_PKT_ADDR_H                (65),
		.OUT_PKT_ADDR_L                (36),
		.OUT_PKT_DATA_H                (31),
		.OUT_PKT_DATA_L                (0),
		.OUT_PKT_BYTEEN_H              (35),
		.OUT_PKT_BYTEEN_L              (32),
		.OUT_PKT_BYTE_CNT_H            (75),
		.OUT_PKT_BYTE_CNT_L            (72),
		.OUT_PKT_TRANS_COMPRESSED_READ (66),
		.OUT_PKT_BURST_SIZE_H          (79),
		.OUT_PKT_BURST_SIZE_L          (77),
		.OUT_PKT_RESPONSE_STATUS_H     (97),
		.OUT_PKT_RESPONSE_STATUS_L     (96),
		.OUT_PKT_TRANS_EXCLUSIVE       (71),
		.OUT_PKT_BURST_TYPE_H          (81),
		.OUT_PKT_BURST_TYPE_L          (80),
		.OUT_PKT_ORI_BURST_SIZE_L      (98),
		.OUT_PKT_ORI_BURST_SIZE_H      (100),
		.OUT_ST_DATA_W                 (101),
		.ST_CHANNEL_W                  (1),
		.OPTIMIZE_FOR_RSP              (1),
		.RESPONSE_PATH                 (1),
		.CONSTANT_BURST_SIZE           (1),
		.PACKING                       (1),
		.ENABLE_ADDRESS_ALIGNMENT      (0)
	) kernel_cra_s0_rsp_width_adapter (
		.clk                  (kernel_clk_out_clk_clk),                            //       clk.clk
		.reset                (kernel_cra_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
		.in_valid             (router_001_src_valid),                              //      sink.valid
		.in_channel           (router_001_src_channel),                            //          .channel
		.in_startofpacket     (router_001_src_startofpacket),                      //          .startofpacket
		.in_endofpacket       (router_001_src_endofpacket),                        //          .endofpacket
		.in_ready             (router_001_src_ready),                              //          .ready
		.in_data              (router_001_src_data),                               //          .data
		.out_endofpacket      (kernel_cra_s0_rsp_width_adapter_src_endofpacket),   //       src.endofpacket
		.out_data             (kernel_cra_s0_rsp_width_adapter_src_data),          //          .data
		.out_channel          (kernel_cra_s0_rsp_width_adapter_src_channel),       //          .channel
		.out_valid            (kernel_cra_s0_rsp_width_adapter_src_valid),         //          .valid
		.out_ready            (kernel_cra_s0_rsp_width_adapter_src_ready),         //          .ready
		.out_startofpacket    (kernel_cra_s0_rsp_width_adapter_src_startofpacket), //          .startofpacket
		.in_command_size_data (3'b000)                                             // (terminated)
	);

endmodule
