hat
Yon achitekti byen li te ye se achitekti Harvard la. Sa a konsepsyon pèmèt pou yon processeur ansanm aksè nan de bank memwa lè l sèvi avèk de kouche endepandan nan otobis yo. Achitekti sa a ka egzekite operasyon matematik pandan y ap pote plis enstriksyon. Yon lòt se Von Neumann achitekti a memwa. Pandan ke gen yon sèl otobis done, operasyon yo pa ka chaje pandan y ap enstriksyon yo chache. Sa lakòz yon konfiti ki finalman ralanti ekzekisyon aplikasyon DSP yo. Pandan ke sa yo processeurs yo sanble ak yon processeur itilize nan yon òdinatè estanda, sa yo processeurs siyal dijital yo espesyalize. Sa souvan vle di ke, fè yon travay, DSPs yo oblije itilize fiks aritmetik-pwen.
eng
One well-known architecture layout is the Harvard architecture. This design allows for a processor to simultaneously access two memory banks using two independent sets of buses. This architecture can execute mathematical operations while fetching further instructions. Another is the Von Neumann memory architecture. While there is only one data bus, operations cannot be loaded while instructions are fetched. This causes a jam that ultimately slows down the execution of DSP applications. While these processors are similar to a processor used in a standard computer, these digital signal processors are specialized. That often means that, to perform a task, the DSPs are required to used fixed-point arithmetic.