hat
Nan kèk ka, parazit Vibration ka pwovoke pa Layout la PCB. Sa a kapab ochilasyon dwe elimine lè yo ajoute eleman yo ki nan lis pi ba a. Remake byen ke dwe valè a CAPACITOR pi bon dwe verifye pa fè tès nan eta aktyèl la monte nan pwodwi a fini. Konekte yon CAPACITOR ak rezisteur (0.1uF ak 2.2) nan seri ant chak Pin pwodiksyon ak tè.
eng
In some cases, parasitic oscillations may be induced by the PCB layout. This oscillation can be eliminated by adding the components listed below. Note that the optimal capacitor value must be verified by testing in the actual mounted state in the end product. Connect a capacitor and resistor (0.1uF and 2.2) in series between each output pin and ground.