in fig1 there is shown an automatic gaming system , preferably an electronic bingo system , constructed in accordance with the invention . the electronic bingo system comprises three major components including a system base station 10 , a plurality of electronic bingo or gaming boards 12 , and a plurality of validation units 14 . the system base station 10 includes a keyboard 16 , a video monitor 18 , a printer 20 , a computer or processor means 22 , a communications cradle 24 , and a dual floppy disk drive 26 . the elements 10 - 26 are connected as a specialized data processing system . the system base station 10 is microprocessor controlled and functions as a system control , point of sale terminal , and an accounting or auditing center . the system base station 10 uses the communications cradle unit 24 to communicate with any of the electronic gaming boards 12 or any of the validation units 14 such that data can be transferred between the devices . the electronic gaming boards 12 are used by players in place of physical paper cards and markers which traditionally have been used in the game of bingo . a software control program is used to operate the system base station 10 . preferably , the processor means 22 is under control of an operating system loaded into the memory of the station 10 through one drive of the dual drive 26 . the software control program is then loaded from the other drive of the dual drive 26 and executed as an application program of the operating system . in general , each electronic gaming board 12 is in turn connected through cradle 24 to the system base station 10 during an initialization step such that the board is downloaded with a gaming schedule so that a player may use it in a series of games termed a gaming session . the electronic gaming boards 12 are also downloaded from the system base station 10 with an assignment code , a validation code , game parameters , and optionally , firmware to execute . preferably , the electronic gaming boards 12 are those having the features described in u . s . pat . no . 4 , 747 , 600 , entitled &# 34 ; gaming board with instant win feature &# 34 ;, issued to john richardson . during a first mode , the player loads game arrays into an electronic gaming board 12 by arbitrarily selecting the symbols ( numbers ) which comprise each of the bingo cards he has purchased . after loading , the gaming boards 12 enter a second or play mode where matching the called numbers from an operator takes place . as the numbers of a particular game are called , the player enters those numbers into the electronic gaming board 12 to determine if they match any numbers of one of the bingo cards contained therein . a particular game in the session is played until one or more of the electronic gaming boards 12 signals , audibly and by a visual indicator , that the game has been won . a payout is made using the validation units 14 and play is resumed until an entire gaming schedule is completed . the validation units 14 are additionally initialized by connection to the cradle 24 of the system base station 10 and receive an assignment code and the validation code for the particular gaming session . when a player scores a bingo , or other type of winning combination , one of the validation units 14 is used to verify that the win wa legitimate . at the time of verification , information specific to a win is recorded within the validation unit 14 and later these stored data records are uploaded to the system base station 10 via the cradle 24 . preferably , the validation units 14 are those having the features described in the richardson application ser . no . 820 , 245 entitled &# 34 ; portable validation unit for gaming system &# 34 ;. as more fully detailed in fig1 and 8 , the electronic gaming boards 12 communicate with either the system base station 10 or one of the validation units 14 through a serial digital communications interface including an adaptor plug 36 ( fig1 ). the adaptor plug 36 is a six pin female type telephone jack which is available for connection with the other devices . the validation unit 14 connects to the adaptor plug 36 through a cable 30 with a male plug end 34 . the cable 30 has another male plug end 32 which connects to a similar adaptor plug 33 of the validation unit 14 . when an operator needs to validate an electronic gaming board 12 , he plugs the cable end 34 into the connector 36 in the bottom of the board 12 and then listens for an audible annunciation by the validation unit 14 . there are several distinguishable audible annunciations available from the validation unit 14 , each indicating a different status for an electronic gaming board 12 . connection of the electronic gaming board 12 to the system base station 10 is through a male plug of the cradle 24 which is received in the adaptor plug 36 . the pins of the adaptor plug 36 form a serial data transmit line txd , a serial data receive line rxd , two low voltage detection lines bat1 , bat2 , a nonconnected pin nc , and ground . these pins connect to similarly labeled pins of the cradle 24 and plug end 34 of the validation units 14 . the validation units 14 additionally communicate with the system base station 10 through the serial communications interface including the adaptor plug 33 . the adaptor plug 33 is a six pin female telephone type jack which is available for connection with the other devices . the coiled cable 30 with two male plugs end 32 , 34 ( fig1 ) extends from the jack to connect the validation unit 14 to the system base station 10 at a female plug of the cradle 24 . the pins of the adaptor plug 33 form a serial data transmit line txd , a serial data receive line rxd , two sense lines - sense b , c , a low battery detection line bat1 , and ground . these pins connect to similarly labeled pins in the cradle 24 and adapter plug 36 of the boards 12 . the system base station 10 can download through the communications interface cradle 24 to an electronic game board 12 three different types of data blocks as illustrated in fig1 a , 10b , and 10c . a gaming schedule is shown in fig1 a and preferably includes 64 bytes of a format list and 265 bytes of win patterns , and ends with a check byte . the second type of data block in fig1 b which can be downloaded into the gaming board 12 is a 1023 bytes of firmware which is terminated by a check byte . the block of firmware is executable by the gaming board 12 upon a special sequence of key actuations or commands . it is used for special security applications or other functions . the last block of data which can be downloaded is a game parameters block shown in fig1 c . the system base station 10 assigns each gaming board 12 an 8 byte serial number defining the board and the player to which it is entrusted for the gaming session . the serial number is used for audit purposes to track the cards in play and is the first 8 bytes of the game parameters . the next 16 bytes of the game parameters is a validation code which is identically input to every gaming board 12 and validation unit 14 to define a gaming session . next in the game parameters block is a byte indicating how many regular cards the player has purchased which can have a value between 0 - 40 . the following byte is the number of special cards , between 0 - 10 , purchased and , thereafter , a byte indicating the number of instant bingo games , between 0 - 255 , purchased . the next to the last byte of information in the block indicates the number of chances available to select instant bingo spaces . the last information byte is a number between 0 - 79 indicating the time in minutes that a player has to load the board before it automatically switches to play mode . this variable is to ensure that play of the game starts all boards at the same actual time . the validation unit 14 can upload a block of data from an electronic game board 12 through its communication interface 33 as illustrated in fig1 d . these game records or parameters are assembled internally within the gaming board 12 and are available upon command from the validation unit 14 . the first six bytes of this block are the values of status indicators for the gaming board 12 at the time of a win or a validation command . the status ( contents ) of the free space , the annunciator bar and the pattern , game , and level of the gaming schedule are uploaded . the next 27 bytes are copies of the initialization information downloaded previously including the serial number , validation code , and the number of regular , special , and instant cards . the block ends with a check byte . a flexible and complex gaming schedule can be formed by the system base station 10 and downloaded into each gaming board 12 . fig1 a , 10e , and 10f illustrate a schedule for a typical 16 game session with up to either 4 sublevels or places for each game . the schedule in fig1 a is separated into a format list shown in detail in fig1 e , and a plurality of win patterns shown in detail in fig1 f . the maximum of 16 games of the session are each assigned four bytes which contain addresses of win pattern groups in the win pattern bytes . therefore , each game area of the format list points to the winning pattern for that particular game . for different game levels , the addresses of the win pattern groups can be different each building into a more complex pattern . for different game places the addresses of the win pattern groups can be repeated . in addition combinations of place and level games may be played in this manner . for example , a two level game with a first and second place for each level can be played by storing the same win group address for the first and second byte of a game and another win group address in the third and fourth byte . it is evident that a 16 game , 4 level or place schedule that is completely in arbitrary choice , or other schedules of this type , can be used . each win pattern group comprises a group count byte and a plurality of 3 byte ( 24 bits ) win patterns . each bit of a win pattern is assigned to one of the 24 spaces of the 5 × 5 bingo array ( free space is excluded ) and a pattern is formed by selecting which spaces must be matched for a win . the selected spaces are marked ( one or zero ) and the remaining bits filled with the other logic value . the group count number identifies the number of ways or win patterns that will result in a win . for example , regular bingo has 12 win patterns ( 5 rows , 5 columns , 2 diagonals ). the validation units 14 receive from the system base station 10 when first powered on , an assignment code of eight bytes in the form of an ascii string and a validation code of sixteen bytes in the form of ascii string ( fig9 a ). the validation code defines the particular game schedule or session of play and can be changed as often as the operator desires . the identical validation code is also stored in each of the electronic gaming boards 12 such that it can be matched with the one stored in the validation unit 14 . the assignment code is a number given by the system base station 10 to the validation unit 14 describing the particular unit and the employee to whom it is entrusted for the session . after the validation of a winning electronic gaming board 12 , an ebc record stored in the board 12 relating to the winning combination is transferred to the validation unit 14 ( fig9 d ). thereafter , a plurality of the win records from a validation unit 14 may be uploaded to the system base station 10 for auditing purposes by two operations that upload a header record ( fig9 b ) and upload a win record ( fig9 c ). the header record is a count kept by the validation unit 14 of the number of win records it has stored and also includes the assignment code of the device and a byte forming the checksum of the information sent . a command to upload the win record causes the validation unit 14 to transfer one of its stored records about a win . the win record of an electronic gaming board 12 contains information as to the place of the win , which board the win occurred on , the win pattern , and game number . further , the information indicates the level of the win and the serial number of the winning bingo board 12 . operationally , when the validation unit 14 is connected to the electronic gaming board 12 , it is used to validate the board , validate either a regular or instant bingo , and upload the ebc records . when the validation unit 14 is connected to the system base station 10 , it is used to receive the initialization record , or to upload the header records or win records . the automatic gaming system uses a communications scheme or interface that allows the system base station 10 , the electronic gaming boards 12 , and the validation units 14 to act as one system . the communications interface uses an asynchronous serial communications protocol with the addition of a special handshaking routine to establish communications . the general communications protocol is a byte serial communications with one start bit , eight data bits ( no parity ), and one stop bit at a data rate of 4800 baud . serial data is transmitted via the transmit line txd of each device and received via the receive line rxd of the others . when the gaming board 12 is connected to either the system base station 10 or the validation unit 14 it acts as a slave unit and waits for the other device to initiate the communication . in one mode , the gaming board 12 uses the bat1 signal to signal the validation unit 14 of a connection with a high logic level . the gaming board 12 uses the bat1 and bat2 signals to test for low battery voltage with the system base station 10 . when the validation unit 14 or system base station 10 detects the high logic level on the bat1 signal line , it will establish a communications link with the gaming board 12 , fig7 a , 7b . the link is accomplished by the master device beginning the communications by placing a zero ( break ) 200 or 202 on the rxd line of the gaming board 12 . this produces an interrupt to the board 12 which will be sensed by internal circuitry . the gaming board 12 will then reply with a low level response 204 or 206 by grounding its txd line of the master device . the master device will again respond by setting the rxd input of the gaming board 12 high 208 or 210 removing the interrupt . thereafter , the board 12 will again reply by bringing its txd line to a high logic level 212 or 214 . once the handshake has been accomplished the link is established and data communications may take place . the system base station 10 or the validation unit 14 will then transmit a one byte command 216 or 218 to the gaming board 12 requesting a particular operation . depending upon which device the gaming board 12 is communicating with , it will perform either a download operation as illustrated in fig7 a or an upload operation as illustrated in fig7 b . the command byte is an ascii numeral from the set 1 , 2 , 3 , 4 , and 5 ( all other numbers are ignored ) specifying one of five commands as follows : after receiving the command byte , the gaming board 12 executes one of the five commanded operations depending upon the value of the byte . if the command byte is a &# 34 ; 1 &# 34 ;, &# 34 ; 2 &# 34 ;, or &# 34 ; 3 &# 34 ; the gaming board 12 prepares to receive ( download ) a block of data 220 from the system base station 10 . the downloaded data blocks have been illustrated previously with respect to fig1 a , 10b , and 10c . if the command byte is a &# 34 ; 4 &# 34 ;, the gaming board 12 will transmit ( upload ) a block of data 222 to the validation unit 14 . the uploaded data block has been previously illustrated with respect to fig1 d . if the command byte is a &# 34 ; 5 &# 34 ; from the system base station 10 or the validation unit 14 , the gaming board 12 will power down and turn itself off . any other command byte value is ignored . after these actions are completed , the gaming board breaks the communication link thereby requiring the link to be re - established for further communication to occur . following the data block transfers regardless of whether data went to or from the gaming board 12 , a checksum byte 224 or 226 is transmitted back to the master unit . the checksum is the arithmetic sum of all the bytes transmitted after the command byte in modulo 256 . for data transmitted from the gaming board 12 , the validation unit 14 must match this checksum 226 to the one it calculates while receiving the data . if they match , the transfer was good and if not , the validation unit 14 is responsible to re - establish the link and reissue the upload command until a good transfer is achieved . for data transmitted to the gaming board 12 , the checksum 224 must equal zero for a good data transfer as a check byte will be included in each block of data 220 to make the check sum equal to zero if the transfer is valid . again , if the checksum 224 transmitted to the system base station 10 is not zero , then it is incumbent upon the base station to re - establish the link and reissue the communications until a good transfer is achieved . the validation units 14 communicate with two external devices , namely the system base station 10 and the electronic gaming boards 12 , through the communication interface . when the validation unit 14 is not connected to any other device , the sense c and sense b lines are held at a low logic level . these lines are used to indicate which of the two external devices are connected to the validation unit 14 . the sense c line is assigned to the system base station 10 while sense b line is assigned to the electronic gaming boards 12 . therefore , the sense c line has a voltage applied to it if the system base station 10 is connected , and the sense b terminal has a voltage applied to it if an electronic gaming boards 12 is connected to the validation unit 14 . a different communications format is used depending on which device the validation unit 14 is communicating with . when the validation unit 14 is connected to an electronic gaming board 12 , it initiates any communication by generating commands as a master unit as shown in fig7 a , 7b . when the validation unit 14 is connected to the system base station 10 , it acts as the slave unit and waits for the system base station 10 to initiate the communication . as seen in fig7 b , when the validation unit 14 detects a high logic level on sense b line , it will establish a communications link with an electronic gaming board 12 . the link is accomplished by the validation unit 14 beginning the communications by placing a zero ( break ) 202 on its transmit line txd . the validation unit 14 will then wait for the electronic gaming board 12 to respond with a zero 206 to its receive line rxd . a low logic level on the rxd line will end an interrupt to the validation unit 14 indicating the electronic gaming board 12 has replied . thereafter , the validation unit 14 responds by setting the data output line txd high again at 210 and waits for the electronic gaming board 12 to do the same to its rxd line at 214 . once this has been accomplished , the link is established and data communications can take place . the validation unit 14 will transmit a one byte command 218 to the electronic gaming board 12 requesting that it transmit its stored audit information about the present card in play and a win pattern if any . the electronic gaming board 12 transmits a block of data 222 to the validation unit 14 in byte serial format and terminates the transmission with a checksum 226 . this communication protocol , more particularly illustrated in fig7 b , is termed an upload operation from an electronic gaming board 12 to a validation unit 14 . the uploaded information is an ebc record as illustrated in fig9 d . conversely , when a validation unit 14 detects a high logic level on the sense c line , this is an indication that it is connected to the system base station 10 . with the system base station 10 , the validation unit 14 does not initiate communication but waits for the system base station 10 to do so . the communications can be either to upload information , fig7 b , or prepare for a download of information , fig7 a . in the manner illustrated , the system base station 10 places a logic zero 200 or 202 on the input data line rxd of the validation unit 14 . after the sense b line has detected a high logic level during the connection , the validation unit 14 continuously checks its interrupt input line to detect a zero condition on its rxd line . when a logic zero on the rxd line appears , the validation unit 14 responds with a logic level zero 204 or 206 on its output data line txd . the handshake is completed when the system base station 10 detects the logic zero , and in response thereto , returns its txd line to a logic level one 208 or 210 . the system base station 10 then waits for the validation unit 14 to sense the return to a high level of the txd line and to brings its output data line back to a logic level of one at 212 or 214 . this procedure establishes the communications link . after the communications link has been established , the validation unit 14 waits to receive a command 216 or 218 from the system base station 10 and will idle waiting for the command as long as the sense c line is held high . if the sense c line goes low , then the link will have to be reestablished before any communications can occur . the system base station 10 thereafter , sends a command byte to the validation unit 14 to request a certain operation . the command byte is an ascii numeral from the set 2 , 5 , 6 , and 7 ( all other numbers are ignored ) specifying one of four commands as follows : after receiving the command byte , the validation unit 14 executes one of the four commanded operations depending upon the value of the byte . if the command byte is a &# 34 ; 2 &# 34 ; the validation unit 14 prepares to receive ( download ) a block of data 220 from the system base station 10 . the data block which is downloaded is as shown in fig9 a . if the command byte is a &# 34 ; 6 &# 34 ; or &# 34 ; 7 &# 34 ;, the validation unit 14 will transmit ( upload ) a block of data 222 as previously described in fig9 b and 9c , respectively . if the command byte is a &# 34 ; 5 &# 34 ; from the system base station 10 , the validation unit 14 will power down and turn itself off . any other command byte value is ignored . after these actions are completed , the validation unit 14 breaks the communications link thereby requiring the link to be reestablished for further communication to occur . following the data block transfers regardless of whether data went to or from the validation unit 14 , a checksum byte 224 or 226 is transmitted to the system base station 10 . the checksum is the arithmetic sum of all the bytes transmitted after the command byte in modulo 256 . for data transmitted from the validation unit 14 ( upload ), the system base station - 0 must match this checksum 226 to the one it calculates while receiving the data . if they match , the transfer was good and , if not , the system base station 10 is responsible to reestablish the link and reissue the command until a good transfer is achieved . for data transmitted to the validation unit 14 ( download ), the checksum 224 must equal zero as a check byte will be included in each block of data to make the checksum equal zero if the transfer is valid . if the checksum transmitted to the system base station 10 is not zero , then it is incumbent upon the system base station 10 to reestablish the link and reissue the communication until a good transfer is achieved . the main program which controls the system base station 10 is an interactive software package which allows an operator of the system base station 10 to perform particular functions for the automatic gaming system . in general , the main operational modes of the system are a manager mode , a cashier mode , and an accounting mode . the manager mode is used to initialize the system parameters , provide security information , and develop a gaming schedule . the cashier mode allows the system base station 10 to operate as a point of sale terminal for initializing the validation units 14 and for selling games on the electronic gaming boards to patrons . further , it permits the cashier to make refunds and payouts during the play of the gaming session . the accounting mode is used after the gaming session to provide an audit record of the card sales , the payouts , and refunds . in this manner an integrated gaming system is provided whereby the system base station forms a focus for providing the functions needed to efficiently and automatically run a gaming session , particularly a bingo gaming session . with respect now to fig2 the main program is entered through a main menu 50 which has a number of selections or choices which the operator can branch to by pressing a particular key . the main menu 50 that the operator will produce on the display 18 during the initial part of the program consists of five selections . the operator can either select the manager mode 52 , the cashier mode 54 , or the accounting mode 56 of the program for the system base station 10 . further , by selecting a fourth routine in block 58 , he can set the current date and time of a real time clock which is used to provide a variable time interval for loading the electronic gaming boards 12 . in general , the routine which embodies the operational block 58 depends upon the internal hardware of the system of the system base station 10 illustrated in fig1 . conventionally disk operating systems which are compatible with ms - dos or pc - dos include means and instructions for setting a real time clock . the routine 58 will produce a prompt on the screen of the display means 18 of the system base station 10 requesting an input of the current date and time from the operator on keyboard 16 . in response to his input , the current date and time will be stored in the real time clock module of the hardware and the system will update that setting in increments of time from that point . the manager mode routine 52 is more fully illustrated in fig3 and is also an interactive menu oriented routine . selecting the routine 52 from the main menu 50 causes a manager menu 52 providing twelve choices or selections to be displayed on the monitor 18 of the system base station 10 . the first choice is a routine 62 which allows the operator to set the validation code . the routine requests the operator by means of a visual prompt on display means 18 to enter a 16 - byte arbitrary code . this code can be input either as numbers , letters , or symbols and in any order . the manager mode 52 is used at this point to set the validation code for the entire gaming session . the validation code can at any time before the start of the play and the programming of the electronic gaming boards 12 and validation units 14 be changed or updated if the operator believes the system has been compromised . another selection of the manager mode 52 allows a routine 64 to be called to set the start time of the gaming session . the routine 64 permits the operator to set one beginning time for the gaming session so that all of the electronic gaming boards 12 will be playable at the same time . further , this feature allows extra cards to be sold during intermissions by ensuring that they will start together at the end of the intermission . when the routine 52 is selected , the operator is prompted with a request to enter the start time on the display 18 . after this operation is successfully completed , the program will return to the manager menu 52 . a selection of routine 66 by the operator when in the manager mode 52 , will provide means for changing the password which is used to gain entrance to the main program . when in this mode the program prompts the operator with a message to enter a new password . in response to the prompt , the operator will type in a six digit or longer identifier which is then sued by the manager to access the main program at the next gaming session . the fourth selection , a routine 68 , allows the operator to set the selling prices of each card . in response to a prompt for each kin of card available , the operator inputs a price which is used thereafter to calculate audit records for the system . a further option , routine 70 , allows a group of package prices to be charged for different combinations of cards and instant bingos . a routine 74 can be selected to set the discount percentages for purchasing any number of games or combination of games . printouts of the selection of variables by these options from operator is shown in fig1 b for price data and discount percentage . fig1 illustrates a printout after the selection of the package variables for the gaming session . three selection of the manager routine namely routine 72 , routine 78 , and routine 80 , allow for the formation of a complex gaming schedule which is completely arbitrary in nature . the program called by the selection of routine 78 allows the gaming operator to set the game formats and routine 80 allows him to call up a format library . an example of a format library which has been printed is shown in fig1 but is in the same data which would be shown on display 18 for the interactive routine . the format library is a set of predetermined win patterns which can be chosen from to select a number of different game formats in the routine 78 . after the format of each game is chosen , the routine 72 is called to set the gaming session schedule by inserting the particular format chosen into a schedule and entering the number of levels and win combinations available to the player . further , data as to the amount of payoff for each game and whether a regular or special card is required are selected . an example of a game schedule selected in this manner is illustrated in fig1 . setting the game format routine 78 produces a separate submenu illustrated in fig5 from which a number of operations may be chosen . the operator or game scheduler may choose to create a format by selecting routine 114 , delete a format by selecting routine 116 , or print a copy of a selected format by routine 118 . further , the entire format library can be printed by the selection of routine 120 . finally , from the format menu routine 80 , the operator has the choice of returning to the manager menu 52 by selecting the choice illustrated in block 122 . fig1 shows an example of a win format which was created with the routine 114 and then printed by routine 118 . after the operator has accomplished all of the functions that are necessary for his particular establishment and gaming session in manager mode , he can return to the main menu by selecting the choice of routine in block 84 . once back in the main menu the system base station 10 is ready to begin the gaming session which may or may not begin immediately . when it is desired to start the gaming session , the main menu 52 is entered by the correct password and the cashier mode 54 is selected . the selection of the cashier mode 54 causes a cashier menu illustrated in fig4 to be displayed on the monitor 18 . the cashier menu allows for the initialization of the validation units 14 by selecting the beginning of a routine 86 . this selection causes the operator to be prompted with a message to insert a validation unit 14 in the communications cradle 24 of the system base station 10 in block 88 . when the operator has finished the insertion step , he will press a carriage return in block 90 and the system will automatically initialize the validation unit 14 with the data previously described . after the routine 86 has successfully completed the initialization , the program will return to the cashier menu in block 110 . this program is repeated if any other validation units 14 are present and need to be initialized . the number of validation units 14 will be proportional to the number of gaming cards sold during a particular gaming session . therefore , the validation units 14 may be initialized in a group before the start of the gaming session if the average number of players is known . alternatively , a validation unit 14 may be initialized at any time during the gaming session when it becomes apparent that that more cards are being sold then was originally anticipated . if the second selection on the cashier menu 54 is taken , then a routine to sell the cards is entered . the card sale routine 92 consists of a prompt to the operator to insert one of the uninitialized electronic gaming boards 12 into the communications cradle 24 . the particular board is assigned the next serial number beginning with a particular offset and the operator is then prompted to input the number of regular cards which the player has purchased . the operator then enters a number from 0 - 40 or none . after the response , the program then prompts with a request to enter the number of special cards purchased . after the operator has responded to this , he must also input the number of instant bingos that the player has purchased . the last input that the operator makes is the number of chances that the player has to produce an instant bingo . once all the information has been loaded into the system and formatted into the correct data blocks , the operator will press the carriage return and cause the system base station 10 to down load the gaming schedule that was developed during the manager mode 52 and the game parameters which were input during selling of the card . after the successful loading of a gaming board 12 , the player is given the board to load with numbers of the arrays he has purchased and a printed receipt of the transaction . an example of a printed receipt showing the purchase during routine 92 is illustrated in fig1 . a routine 94 may be selected to manage other sales and a routine 96 selected to determine whether a discount should be given for any purchases . the selection of a routine 100 allows the operator to enter a message into a special storage area of the system base station 10 . when the players receive their receipts from the sales of the cards , such message will be preprinted thereon as a banner or header advertisement such as on fig1 . further , the cashier menu 54 allows for a selection in block 112 to permit the operator to return to the main menu 50 . the last selection of the cashier menu 54 is a payout routine 98 . the payout routine 98 , when selected , causes a submenu having four choices to be displayed on the monitor 18 of the system base station . the selections of the payout menu 98 include whether the payout is a bingo payout 102 , another payout 104 , or a refund 106 . one last selection allows the operator to return to the cashier menu in block 108 . after the gaming session has been completed and the validation units 14 have been collected , the operator will cause the program to branch back to the main menu 50 ( fig2 ) where the accounting routine 56 is selected . fig6 illustrates a detailed menu displayed on the monitor 18 of the system base station 10 when the accounting routine 56 is selected from the main menu 50 . the accounting menu 56 allows the listing of a number of system parameters on the display screen or alternatively their printout on a paper tape printer 20 . the system base station 10 has been collecting data from all of the sales , payouts , and refunds of the gaming session . the stored information concerning the entire gaming session dynamics is condensed and compressed into a formatted output . a listing of the bingo sales may be obtained by selecting routine 126 or a listing of other sales may be obtained by requesting routine 128 . further , the listings of the bingo payouts or the other payouts may be obtained by requesting either selections for routines 130 , 132 , respectively . in addition , a listing of all refunds may be obtained by selecting block 134 from the accounting menu 56 . a summary of all of the sales and payouts can be collectively obtained by selecting the routine 124 . this routine gives a listing of the sum total of all sales in a category type rather than individual listings as routines 126 - 134 accomplish . an example of a summary report is shown in fig1 . to obtain actual support information for these audit functions from the validation units 14 , a routine 138 is selected and executed . the upload validation routine causes a prompt to be displayed on the monitor 18 of the system base station 10 indicating that the validation unit 14 should be connected to the communications cradle 24 . after the connection task has been accomplished by the operator , he will press the carriage return key and the system base station 10 will automatically interrogate the validation unit 14 to cause an upload of the audit information contained therein . once the audit information has been extracted from the validation unit 14 , the command which causes the validation unit 14 to the powered down is generated by the system base station 10 . this operation turns the validation unit 14 off during those times when the gaming session is not being played . routine 136 of the accounting menu 56 provides a search serial number and customer number routine which can be selected . this routine permits the system to do a global record search of all the audit information that it has stored for a particular serial number or customer number which is entered by the operator . this operation is for checking purposes and allows the operator to quickly find a record if there is some discrepancy between sales , payouts , refunds . the last selection 140 in the accounting menu allows the operator to return to the main menu . as best shown in fig1 , the system base station 10 includes a video monitor 18 , a central processing unit ( cpu ) 22 , a dual floppy disk drive 26 , read - only memory ( rom ) 54 , random - access memory ( ram ) 56 , a keyboard 16 , a universal asynchronous receiver transmitter ( uart ) 58 , and a communications cradle 24 . these devices are configured as a data processing system . the system base station 10 is microprocessor - controlled , functioning as a point - of - sale terminal and accounting center . the system base station 10 uses the communications cradle unit 24 to interface with any of the electronic gaming boards 12 or any of the validation units 14 such that data can be transferred between the devices . the electronic gaming boards 12 are used by respective players in place of physical paper cards and markers which traditionally have been used in the game of bingo . the system base station 10 stores data in the dual floppy disk drive 26 , the rom 54 , and the ram 56 . the dual floppy disk drive stores a library of gaming cards comprised of a plurality of individual game card arrays . rom 54 stores the gaming board instructions which direct the gaming boards 12 to store the game card arrays in the appropriate areas of gaming board memory . the ram 56 , in conjunction with the cpu 22 , assembles a base station program which contains game card arrays as well as the gaming board instructions . the library of gaming cards may be produced by means of a predetermined algorithm . such an algorithm should eliminate the possibility of generating two identical game card arrays . however , the algorithm must preferably meet a more stringent requirement . it is critical to note that the individual game card arrays are stored in the gaming card library as a sequence of records , and that these records are then downloaded sequentially into the gaming boards 12 , one gaming board at a time . therefore , a game player who purchases several game card arrays will obtain a set of arrays which are stored at adjacent locations in the gaming card library . if the predetermined algorithm generates a sequence of gaming card arrays such that substantial similarities exist between any two adjacent arrays , the game player could end up purchasing 40 gaming cards which are virtually identical . granted , one or two numbers in each of these 40 arrays may be different , but the player may justifiably feel as if he is essentially playing the same card 40 times over . therefore , the algorithm should ensure that there are substantial differences between arrays situated at adjacent records within the gaming card library . another method of producing the gaming card library is to use a random number generator . however , the operator should ensure that no two game card arrays are identical prior to their inclusion in the gaming card library . such a procedure may prove time - consuming . however , the random number generator method avoids a problem inherent with many predetermined algorithms in the context of the present embodiment . use of a random number generator is likely to result in adjacent game card arrays which differ substantially from one another . thus , sequential downloading of the game card arrays from the gaming card library will provide the game player who purchases multiple cards with substantially different arrays . the system base station 10 may be employed to create the gaming card library , regardless of which production method is chosen . since the system base station 10 is a microprocessor - based disk operating system capable of running interactive applications routines , receiving operator inputs , and processing data , the base station 10 is capable of executing a wide range of commonly - available routines and algorithms for generating random or quasi - random numbers . once the array numbers for the gaming card library are generated , these numbers are transferred to memory within the disk drive 26 . as will be described in more detail hereinafter , each individual game card array is stored within 12 bytes . therefore , a typical floppy disk which holds 300 , 000 bytes of storage space will be able to accommodate 300 , 000 bytes divided by 12 bytes per record , or 25 , 000 individual game card arrays . since each gaming board 12 can store up to 40 game card arrays , a gaming card library consisting of one or two floppy disks is likely to satisfy most any system application . fig2 depicts a plan view of the electronic gaming board handset 12 . the gaming board 12 is essentially divided into four main sections . first , there is a liquid crystal display ( lcd ) section 202 with 25 array symbol display spaces , each having two 7 - segment digital displays . preferably , the display is in the form of a 5 × 5 array of rows and columns which can be used to display the numbers of a bingo card , as well as other types of information . the second section 204 is an lcd annunciator bar divided into a plurality of status and mode indicators . the annunciators indicate schedule status , i . e ., the game , card , and level numbers of the game presently in play . three additional annunciators indicate gaming board mode , i . e . instant bingo mode , recall called numbers mode , and bingo mode . a go to ( arrow ) annunciator 216 indicates a transfer or shift to special functions . decimal membrane - type key pad 206 for entering digits 0 - 9 into the board . the fourth section 208 allows the player to operate the gaming board 12 by providing a plurality of membrane - type function keys . in this particular gaming board 12 , there are six function keys , providing the player with convenient board operation . the six function keys are : ______________________________________enter 210game ( next game ) 212recall ( correct ) 214go to or shift 216part ( next part ) 218card ( instant ) 220______________________________________ the parenthetical functions of the keys 212 , 214 , 218 and 220 are reached through the sequence of first pressing the shift key 216 and then the desired operation . normal function is obtained for each key 212 , 214 , 218 , and 220 by direct operation . the four sections of the gaming board including the display 202 , annunciator bar 204 , numeric key pad 206 and function keys 208 provide for the facile playing of a complex gaming schedule without the player &# 39 ; s enduring a long familiarization process . a player can easily execute or play a substantial bingo schedule comprising up to 16 independent games with up to four levels or four places per game . for each of the independent games , a player may play up to 40 cards automatically with ease and without any worry that a winning bingo may not be noticed . each game , level or place may contain an arbitrary win pattern which is automatically recognized from the stored gaming schedule . for example , to win the first level of a bingo game , a player might be required to achieve a win pattern consisting of all four corners on a card . the second level might require a player to achieve a win pattern comprising a large square , wherein the entire &# 34 ; b &# 34 ; column , the entire &# 34 ; o &# 34 ; column , the uppermost row , and the lowest row must all be marked . a third level could then require that the entire card be marked . the electronic gaming boards 12 are in a communications mode when connected by a cable 30 to either the system base station 10 or a validation unit 14 ; during a gaming session , the electronic gaming boards are in a play mode . the communications mode interrupts the play mode at any time by connection of the gaming board 12 to one of the external units . in the communications mode , a gaming board 12 is downloaded with game information , such as a gaming schedule , microprocessor instructions , and one or more bingo card arrays 44 . bingo card arrays for up to 40 games are provided in a string of 1025 bytes which is initially sent , byte - by - byte , to a temporary storage area within the external ram 812 of the gaming board 12 . once the string is loaded into external ram 812 , the gaming board 12 is automatically set to the play mode upon disconnection of the cable 30 . play of a bingo game in a session is commenced when a player presses a two - digit number on the key pad 206 and then presses the enter key 210 . this two - digit number is that randomly selected and announced by the caller . the gaming board 12 searches its working storage area 814 corresponding to all of the enabled game cards and marks each match found . on the bingo card array currently displayed , the corresponding square or space is blanked . for other card arrays stored , but not displayed , the match is similarly noted . if a particular win pattern for any card 52 stored in memory is completed by the match , then the gaming board 12 will signal a win indication by displaying the bingo annunciator and by playing an audible tune . the function keys 212 , 214 , 218 and 220 are used in combination with the annunciator bar 204 and center space of the display 202 to provide downloaded game schedule information to a player . for example , by pressing the game key 212 the player will display the game annunciator and the number of the present game of the schedule in the center ( free ) space as long as the key is held down . likewise , pressing the part key 218 will display the level annunciator , and the level number for the present game will be displayed in the center space . pressing the recall key 214 will cause the display to reverse itself , blanking out all numbers except those that have been marked or matched for the particular card being displayed . those marked numbers are now displayed as they were originally , while all others in the array are blank . this allows a player to recall which numbers have been matched on a card . the recalled numbers are displayed along with the recall annunciator as long as the recall key 214 is depressed . in a similar manner , pressing the card key 220 displays the card annunciator , and the number of the present card will be displayed in the center space . these two indicators will be displayed for as long as the card key is held . the function keys 212 , 214 , 218 and 220 also relate to alternative functions which , in combination with the shift key 216 , provide special operations . selection of the shift key 216 displays the arrow annunciator and cautions the player that the next function key pressed , 212 , 214 , 218 or 220 , will create a special operation . the shift key 216 in combination with the next game key 212 causes the gaming board 12 to proceed to the next game in the sequence of the gaming schedule . the sequence of the shift key 216 and the next part key 218 allows a player to move between levels or parts of an individual game . the shift key 216 selected prior to the instant key 220 allows the player to display different cards in the sequence of stored cards . the instant key 220 pressed during the play mode has the function of changing the cards in the display ; if it is pressed prior to the game mode , it will produce an instant game function described more fully hereinafter . the organization of gaming board memory 810 is depicted in fig2 . memory 810 is divided into external ram 812 and the working storage area 814 . external ram 812 includes pages one through four , 816 , 818 , 820 , and 822 . the working storage area includes pages 6 and 7 , 824 and 826 . each individual page contains 256 bytes . pages 1 and 2 , 816 and 818 , will store gaming board instructions which are downloaded from the system base station . pages 3 and 4 , 820 and 822 , will temporarily store the individual game card arrays 52 downloaded from the game card array library 62 , until these individual game card arrays are transferred to pages 6 and 7 , 824 and 826 , of the working storage area 814 . in general , each electronic gaming board 12 is connected through the cradle 24 to the system base station 10 during the communications mode . in the communications mode , the game schedule 66 is downloaded into gaming board memory 810 . next , the base station program 50 , which includes at least one gaming card 52 in addition to the gaming board instructions 46 , is downloaded from the system base station ram 54 into the external ram 812 of the individual gaming boards 12 . fig2 a , 22b , 22c and 22d illustrate a number of storage areas in the memory of the gaming board 12 which assist with the functions previously described . fig2 a illustrates that an area of memory termed display storage contains 26 bytes . this storage area represents the 25 spaces of the display array 202 and the annunciator bar 204 , shown in fig2 . each display byte which corresponds to a space contains the two digits of that display space in the first 7 bits and a blank flag in bit 8 . as matches take place , the flag bits are set so that when the particular card which is stored in the display storage is shown , the numbers which have been called are blanked . by contrast , when a recall function is requested , the spaces which are not flagged are blanked by the display . with reference to fig2 , there is a storage area termed card storage , located in the working storage area 814 , which stores the numbers for all of the individual game card arrays 52 purchased and downloaded from the system base station 10 . the card storage is illustrated in fig2 b , and comprises 480 bytes ( 12 bytes × 40 cards ). if fewer than 40 cards are played , the remaining bytes are valued at binary zero . each number for a space selected in a card is stored in one nibble of a byte . an entire card of 24 numbers is downloaded and stored in 12 bytes by a reduction algorithm which reduces each number to four bits in length . all numbers of a particular column of a bingo card can have one of fifteen values . the position of the column determines an offset which can be added to the numbers 1 - 15 which will yield all fifteen values . the binary equivalent for 1 - 15 can be stored in 4 bits . therefore , once a card is loaded in the display storage , it is reduced to twelve bytes by subtracting a column - dependent offset from each number prior to its storage in card memory . the reverse is true when the card array is to be displayed , such that a position - dependent offset is added to each number when loading the display storage from the card memory . as shown in fig2 b , the offset is 1 for the first column , 16 for the second , 31 for the third , 46 for the fourth , and 61 for the fifth . the numbers shown in the boxes are subtracted from the bingo numbers to give 4 - bit numbers suitable for storage . as play progresses and the player enters numbers into the gaming board 12 , these numbers must be remembered to determine duplicate entries , and for validation purposes . the gaming board 12 stores the called numbers in an area termed the call table 53 , which is illustrated in fig2 c . the numbers are stored in a plurality of sequential bytes having at least one bit for each possible number . in the illustrated example , 75 bits are arranged in 10 bytes of ram where bit 0 in the first byte is not used , bit 1 of the first byte represents the numeral 1 , bit 2 in the first byte represents the numeral 2 , bit 3 in the first byte represents the numeral 3 , and so on . then , bit 0 in byte 2 represents the numeral 8 , and so on . for each card array , the pattern of spaces on the display can be represented , as discussed previously , by 24 bytes , one for each space except the free space . a mask for each enabled card representing the numbers called is stored in an area termed the mask table 51 as illustrated in fig2 d . bit 0 of the first byte of a mask represents space b1 of a card ; bit 1 , space i1 ; bit 2 space n1 , etc . each time a number is entered into the gaming board 12 during the play mode , the board searches all enabled cards to determine if there is a winning bingo . the mask for each card is checked against all win patterns in the current format , as indicated by the schedule determining the game and level being played . if the display mask contains all the blank positions indicated by one of the win patterns , it is a potential bingo . if not , the search proceeds to the next card until all cards have been checked against all patterns in the current format . when the search is complete , the card which was displayed when the call was entered is redisplayed , and the board waits for another entry . fig2 illustrates the transfers of data which take place when individual game card arrays are to be downloaded from the system base station 10 into the gaming boards 12 . the user enters game data 58 into the keyboard 16 . this game data 58 includes the number of game cards , from 1 to 40 , to be downloaded 64 ; the game schedule 66 , which consists of a plurality of win patterns 68 and the order in which these win patterns are to be played ; a validation code 70 specific to a particular gaming session , and an assignment code 72 specific to one individual gaming board 12 . the game data 58 is transferred from the keyboard 16 to the system base station ram 56 . the base station cpu 22 refers to the number of cards to be downloaded 64 when updating the value of a record pointer 60 stored within the base station ram 56 . the record pointer 60 points to an individual game array record 52 located within the game card array library 62 . the individual game array records 52 are stored in a random - access file comprising a game card array library 62 , on the dual floppy disk drive 26 of the system base station 10 . each individual game card array 52 is stored as a single record in the file with the record number used as the serial , or library , number of the card face . for instance , library card number 1079 means that its card array data is the 1079th record in the game card array library 62 . although a bingo card contains 24 two - digit numbers ranging from 1 to 75 ( or 1 to 90 ), it is possible to pack an individual bingo card array 52 into only 12 bytes , or two hexadecimal digits . this packing operation is accomplished by recognizing that each column of a bingo card consists only of the possible numbers 1 to 15 plus a constant offset . thus , the &# 34 ; b &# 34 ; column will only have numbers 1 through 15 ; the &# 34 ; i &# 34 ; column will only have numbers 16 through 30 , or numbers 1 to 15 if a constant offset of 15 is added ; the &# 34 ; n &# 34 ; column will only have numbers 31 through 45 , or numbers 1 through 15 if a constant offset of 30 is added ; the &# 34 ; g &# 34 ; column will only have numbers 46 through 60 , or numbers 1 through 15 if a constant offset of 45 is added ; and , finally , the &# 34 ; o &# 34 ; column will only have numbers 61 through 75 , or numbers 1 through 15 if a constant offset of 60 is added . thus , by organizing the numbers into columns and subtracting the appropriate offset for each column , all the numbers on a bingo card can be reduced to a number between 1 and 15 and thus represented as a hexadecimal digit . since each byte holds two hexadecimal digits , an entire game card array can be stored in 12 bytes . in this manner , approximately 50 , 000 individual game card array records 52 can be stored in a file , or a game card array library 62 , containing 50 , 000 records , each 12 bytes long . the game card array library will be 12 bytes times 50 , 000 records long , for a total of 600 , 000 bytes . therefore , the game card array library 62 will easily fit on a hard disk drive . alternatively , the game card array library 62 will fit on two floppy disks as two files of 300 , 000 bytes each . however , if floppy disks are used , the library card numbers for game card array records 52 beyond the first file , or disk , must be adjusted by the number of cards on the first disk to give the proper record number for that card face on the second disk . when a game card array 52 is to be displayed on the game board 12 , the game card array 52 must be unpacked . unpacking is merely the reverse of the packing operation . each hexadecimal digit is converted to decimal and the offset appropriate to the column of the number is added , thus restoring the original bingo card numbers . the procedure of downloading individual game card arrays 52 from the game card array library 62 into the gaming boards 12 commences when the system base station operator enters the appropriate command into the keyboard 16 . the system base station cpu 22 responds by forming a base station program 50 in the base station ram 56 . the base station program 50 is a sequence , or string , of bytes that is 1024 bytes long . the first 528 bytes are reserved for the gaming board instructions 46 , which are retrieved from the system base station rom 54 , the system base station ram 56 , or the disk drive 26 . the gaming board instructions order the gaming board 12 to move the game card array records 52 from pages 3 and 4 , 820 and 822 , of external ram 812 to pages 6 and 7 , 824 and 826 , of the working storage area 814 . if the gaming board instructions 46 do not require the full 528 bytes allocated , the remaining bytes are filled with binary zeroes . the system base station cpu 22 next loads the individual game card arrays 52 into the base station program 50 . the base station cpu 22 refers to the number of cards to be downloaded 64 , as entered by the user , to update the value of the record pointer 60 stored within the base station ram 56 . the record pointer 60 points to an individual game array record 52 located within the game card array library 62 . knowing the starting library card number from the initial value of the record pointer 60 , and knowing the number of cards 64 to be downloaded from the game card array library 62 , the base station cpu 22 sequentially reads the 12 - byte game array records 52 from the game card array library 62 . the base station cpu 22 then adds these game array records 52 to the base station program starting at the 529th location . since up to 40 game array records may be downloaded into each gaming board 12 , then up to 40 times 12 bytes , or 480 bytes , can be transferred into the base station program 50 . from the end of the card data , the base station program 50 is completed to 1024 bytes by filling in the remaining bytes with binary zeroes . note that the packed representations of the game card arrays are stored in the base station program 50 , and the library card numbers of the individual game card arrays 52 are sequential . furthermore , the initial value of the record pointer 60 is stored in the base station ram 56 . since the initial value of the record pointer 60 contains the starting library card number , and the individual game card arrays 52 are downloaded sequentially , each individual game card array 52 may be positively identified . once the base station program 50 is assembled in the base station ram 54 , an ascii character , &# 34 ; 3 &# 34 ;, is added to the front of the 1024 - byte string . this character instructs the gaming board 12 that a base station program 50 is to follow , and that the program should be loaded into external ram 812 , starting at page 1 ( 818 ) and ending at page 4 ( 824 ), each page being 256 bytes long . next , the base station cpu 22 sends an interrupt signal to the gaming board 12 . this interrupt signal causes the gaming board 12 to stop whatever it is doing and enter the communications mode . the base station program 50 is then transmitted from the system base station 10 to the gaming board 12 based upon the rs - 232 serial communications standard . a transmission rate of 4800 baud is used , with the appropriate start and stop bits around each character . as the gaming board 12 receives each byte , it adds the byte to a running checksum . after a complete 1024 - byte base station program 50 has been received , the gaming board 12 sends the checksum to the base station 10 . the base station cpu 22 compares the checksum received from the gaming board 12 against a checksum the cpu 22 calculated to see if the transmission was successful . the system base station 10 also downloads the validation code 70 , game parameters 74 , and optional microprocessor instructions 76 for execution . while downloading , the system base station cpu 22 notes and records in ram 54 the game card library numbers of those game cards 52 which have been distributed to the gaming boards 12 . the validation code 70 is a unique number corresponding to one specific gaming session . this code ensures that the dishonest player will not win on a game card purchased for use in another game session or at another game location . once the communications are completed , the gaming board 12 microprocessor returns to the point in its control program where it left off before receiving the interrupt from the system base station 10 . one of the periodic operations in the gaming board 12 control program is to call the subroutine on the first page of external ram 816 . normally , there is only a &# 34 ; return &# 34 ; command at this location which sends the gaming board 12 microprocessor back to the control program . but after the aforementioned downloading procedure , the gaming board instructions 46 are at this location and will be executed periodically , every time the subroutine call is made . to avoid repeated executions , these instructions contain a final command . once the instructions have been executed for the first time , the final command orders the gaming board 12 microprocessor to place a &# 34 ; return &# 34 ; instruction at the beginning of page 1 . thus , the gaming board instructions 46 will be executed only once for each downloading operation . note that the individual game card arrays 52 are stored in the working storage area 814 of the gaming board memory 810 in packed form . the individual game card arrays 52 are unpacked only when the gaming board 12 copies an individual game card array 52 to the display ram area . the process of downloading the bingo card arrays 44 into external ram 812 before moving the information into the working storage area 814 can be replaced by a more efficient process which directly loads the bingo card arrays 44 into the working storage area 814 . this more efficient process could be implemented by changing the program code of the gaming board 12 . however , the program code was fixed into the gaming boards 12 before the present downloading procedure was conceived . the fixed program code of the gaming board 12 expects to find the bingo card arrays 44 stored within the working storage area 814 , not the external ram 812 , thus mandating a two - step downloading procedure . when the rom program code of the gaming board microprocessor 300 is changed , it will be possible to have the bingo card arrays 44 sent directly to the working storage area 814 as the base station program 50 is received . this would eliminate the need for downloading the gaming board instructions 46 . furthermore , the bingo card arrays 44 would no longer need to be stored temporarily in the external ram 812 . after this expeditious downloading procedure , the gaming board 12 enters the play mode where the random numbers called by the operator are matched against numbers in the respective bingo card arrays 44 . as the numbers of a particular game are called , the player enters those numbers into his electronic gaming board 12 to determine if they match any of the numbers on one of the bingo cards 52 contained therein . a particular game in the session is played until one of more of the electronic gaming boards 12 signals , audibly and by a visual indicator , that the game has been won . a payout is made using the validation units 14 and play is resumed until an entire gaming schedule is completed . the validation units 14 are initialized by connection to the cradle 24 of the system base station 10 and receive an assignment code and the validation code for the particular gaming session . when a player scores a bingo , or other type of winning combination , the validation units 14 are used to verify that the win was legitimate . at the same time , information specific to a win is recorded within the validation unit 14 and later these stored data records , along with a validation unit identification code , are uploaded to the system base station 12 via the cradle 24 . the system base station 10 can download a data block , such as a system base station program 50 , through the communications interface to a respective gaming board 12 as illustrated in fig2 . the program 50 consists of an ascii 3 followed by a string of 1024 bytes . the first 528 bytes contain gaming board instructions 46 which are used by the gaming board 12 to move data from temporary storage in external ram 812 to the working storage area 814 . the next 480 bytes are devoted to individual game card array 52 storage . as each individual game card array 52 is represented with 12 bytes , 480 bytes allows for for 40 game card arrays . the string is completed to 1023 bytes with binary zeroes , and the final byte is reserved as a check byte . fig2 illustrates a detailed electronic schematic of a gaming board 12 which generally comprises a microprocessor 300 , a memory and memory control circuit 302 , a power supply 304 , a communication interface 306 , a power bistable 308 , an audio annunciator 310 , a keyboard 312 , and display and display driver units 314 . the microprocessor 300 is a standard , single - chip microcomputer having a bidirectional data / address bus d0 - d7 , bidirectional input and output ports p10 - p17 , p20 - p27 , and i / o control lines wr , rd , psen , and prog . further , the microprocessor 300 has pins for handling interrupts int and resets rst . while the microprocessor 300 could be any of a number of single - chip microcomputers , preferably the device is an 80c49 microprocessor manufactured by the intel corporation of santa clara , calif . the pin designations shown will pertain to that device and are more fully described in the operating manual for the intel 80c49 . a single - chip microcomputer of this type includes a central processing unit , 128 bytes of random - access memory ( ram ) and 16 8 - bit registers r0 - r15 . further included are provisions for an 8 - word by 16 - bit memory stack , 96 bytes of general - purpose ram and , as an option , 2 kilobytes of read - only memory ( rom ). communications for the microprocessor 300 with peripheral devices are carried out through the 8 - bit data / address bus d0 - d7 , and the i / o control lines . a 6 - mhz crystal y1 , connected between terminals xtal and * xtal of microprocessor 300 , serves as a frequency reference for an oscillator circuit located within the microprocessor 300 . each terminal of the crystal y1 is further connected to a capacitor , one crystal terminal connecting to c1 , and the other crystal terminal connecting to c2 . the remaining terminals of capacitors c1 and c2 are grounded . the external access pin ea and the single step pin ss for the microprocessor 300 are not used and , therefore , are tied to ground and a high logic level vcc , respectively . normally , a read - only memory 313 of the memory and memory control circuit 302 will contain the control program for the microprocessor 300 . instructions are transferred from the rom 313 via its data output pins d0 - d7 which are connected to the data bus and thereafter to the data ports d0 - d7 of the microprocessor 300 . the rom 313 is accessed through the address bus and address lines a8 , a9 , and a10 . an address byte from the data port pins d0 - d7 is strobed into an address latch 316 with an alternate logic enable signal ale . the data bus and the address bus are similarly utilized for the random - access memory 315 . at the beginning of each memory cycle , the microprocessor 300 places the lowest 8 bits of a memory address on the data bus and then strobes them into the latch 316 with the ale signal . the high address bits a8 - a10 are set by selection of logic levels on port pins p20 - p22 . for the remainder of the cycle , the data bus carries data from the ram 315 or the rom 313 to the microprocessor 300 or from the microprocessor 300 to the ram 315 . control for the direction of data flow , and the memory that data are taken from or written into , is controlled by the write control line wr , read control line rd , and the program sequence pin psen . these signals are connected with the control inputs of the random - access memory 315 and the read - only memory 313 via three memory control logic gates 318 , 320 and 322 which have their outputs connected , respectively , to the read and chip select inputs rd , cs of the random - access memory 315 , and to the output enable and chip select inputs oe , cs of the rom 313 . the write control line wr of the microprocessor 300 is also directly connected to the write input wr of the random access memory 315 . when the microprocessor 300 requests instructions or data from an external memory , it prepares the address bus , as described above , and pulls the signals psen , rd or wr , and prog depending upon whether a read or write operation is to take place . depending upon the state of the psen line , either ram or rom will be accessed . nand gate 322 assures that ram and rom will never be accessed simultaneously . with reference to fig1 and 25 , the gaming board 12 communicates with two devices external to itself , namely the system base station 10 and the validation unit 14 through the communications interface 306 and the cable 30 . the communication interface 306 is designed to consume an absolute minimum of power , particularly when idle , and to be reasonably fast . the communications interface 306 uses an asynchronous communications protocol with the addition of a special handshaking routine to establish communications . the general communications protocol is byte - serial communications with one start bit , eight data bits ( no parity ), and one stop bit at a data rate of 4800 baud . serial data are transmitted via the transmit line txd and received via the receive line rxd . when the gaming board 12 is connected to either the system base station 10 or the validation unit 14 , the board acts as a slave unit and waits for the other device to initiate communications . the gaming board 12 uses the bat1 signal generated through resistor 338 to signal the validation unit 14 of a connection with a high logic level . the gaming board 12 uses the bat1 and bat2 signals generated through resistors 338 and 340 , respectively , to test for low battery voltage with the system base station 10 and the validation unit 14 . when the validation unit 14 or the system base station 10 , as the case may be , detects the high logic level , it will establish a communications link with the gaming board 12 . the link is achieved by the master device beginning the communications by placing a zero ( break ) signal 500 or 520 on the rxd line of the gaming board 12 , as shown in fig7 a and 7b , respectively . with reference to fig2 , this break signal produces an interrupt to the microprocessor 300 by causing a transistor 342 to conduct . the gaming board 12 will then reply with a low - level response at 502 or 516 by applying a high logic level to the base of a transistor 344 through pin p27 , thus grounding the txd line through the transistor 344 . the master unit will again respond by setting the rxd output high at 504 or 520 , removing the interrupt from the int pin of the microprocessor 300 . thereafter , the microprocessor 300 will again reply at 506 or 517 by bringing the txd line to a high logic level by turning off the transistor 344 with pin p27 . once the handshake has been accomplished , the link is established and data communications may take place . the system base station 10 or the validation unit 14 will then transmit a one - byte command 522 , 508 , as shown in fig7 a and 7b , respectively , to the gaming board 12 , requesting a particular operation . depending upon which device it is communicating with , the gaming board 12 will perform either a download operation as illustrated in fig7 a or an upload operation as illustrated in fig7 b . the command byte is an ascii numeral from the set [ 1 , 2 , 3 , 4 , 5 , 6 ], specifying one of six commands as follows : after receiving the command byte , the gaming board 12 executes one of the six commanded operations depending upon the value of the byte . if the command byte is a &# 34 ; 1 &# 34 ;, &# 34 ; 2 &# 34 ;, &# 34 ; 3 &# 34 ; or &# 34 ; 6 &# 34 ;, the gaming board 12 prepares to receive ( download ) a block of data from the system base station 10 . the downloaded data blocks have been discussed above in connection with fig1 a , 10b , 10c and 24 . if the command byte is a &# 34 ; 4 &# 34 ;, the gaming board 12 will transmit ( upload ) a block of data to the validation unit 14 . the uploaded data block has been previously illustrated with respect to fig1 d . if the command byte is a &# 34 ; 5 &# 34 ;, the gaming board 12 will power down and turn itself off . any other command byte value is ignored . after these actions are completed , the gaming board 12 breaks the communications link , thereby requiring the link to be re - established for further communication to occur . following the data block transfers , whether data went to or from the gaming board 12 , a checksum byte is transmitted back to the master unit . the checksum is the arithmetic sum of all the bytes transmitted after the command byte . for data transmitted from the gaming board 12 , the validation unit 14 must match the gaming board checksum to the checksum the validation unit calculated while receiving the data . if they match , the transfer was good and , if not , the validation unit 14 is responsible for re - establishing the link and reissuing the upload command until a good transfer is achieved . for data transmitted to the gaming card 12 , the checksum must equal zero for a good data transfer , as a check byte will be included in each block of data to make the checksum equal to zero if the transfer is valid . again , if the checksum transmitted to the system base station 10 is not zero , then it is incumbent upon the base station to re - establish the link and reissue the communications until a good transfer is achieved . the power supply circuitry 304 and the power supply bistable 308 will now be more fully described with respect to fig2 . the gaming board 12 has no on / off switch . the gaming board 12 is turned off under program control and is turned on by the system base station 10 during initial communications . the main power switch for the gaming card 12 is a p - channel mosfet 343 connected between a battery b and a voltage terminal vcc . when the gate of the mosfet 343 has a low logic level applied to it , the device provides a low - impedance path from the battery b to the terminal vcc . when the gate has a high logic level applied to it , the mosfet turns off , thereby shutting down most of the circuitry within the gaming board 12 and conserving battery power . the gate of the mosfet 343 is controlled by the output * q of a power bistable 345 . the bistable 345 is powered by the battery b directly and , therefore , operates whether the mosfet 343 is on or off . when battery power is first applied to the circuit by connecting the battery b , an rc network 346 and 348 applies a reset to the bistable 345 and clears the device . this turns the mosfet 343 off and insures that the rest of the gaming board is off . when the gaming board is connected to the system base station 10 and current is sourced into pin rxd of the communications connector , a transistor 350 turns on and applies a set signal to the bistable 345 . this operation turns the mosfet 343 on and with it the gaming board circuitry . when the program - controlling microprocessor 300 determines to power down the gaming board 12 , it simply writes a zero into the power control bistable 345 through pin p22 . the q output of the power control bistable 345 is further connected by a diode 352 to its d input . this is to ensure that the bistable 345 will not inadvertently become set during the period when the power supply voltage to the microprocessor 300 is falling . the gaming board 12 uses an audio annunciator which emits audible tones to congratulate a player for scoring a win pattern . audible tones are also used to inform the player that he has lost at instant bingo , and to provide feedback for key presses . the device used to generate sonic energy for these annunciations is a piezoelectric bender 354 . the bender 354 is a high - efficiency , high - impedance , low power audio transducer which can be driven by two alternating logic levels . in the illustrated embodiment , it is driven by the complementary outputs of a d - type bistable 356 . in this manner , the bender element 354 sees a signal with a magnitude of approximately twice the power supply voltage vcc , or about 10 vac . because the driving signal is a square wave , a tone from the bender element 354 is rich in harmonics and quite distinctive . the microprocessor 300 under program control toggles the bistable 356 at various frequency rates to produce different desired tones . the display 314 comprises a display chip 360 , a column driver chip 362 and a row driver chip 364 . the display chip 360 is a large liquid crystal display ( lcd ) having a multiplexed sixteen - row by thirty - column matrix . of the resulting 480 logical display elements , only 358 are actually used . they are arranged in an array of five rows each having five positions , where there are two digits in each position for a total of 50 digits . each digit is in turn composed of seven segments , for a total of 350 segments . the annunciator bar has eight separate segments for annunciator flags . the display elements are normally clear but turn dark when excited by a voltage of sufficient magnitude . the lcd driver chips 362 and 364 require four signals from the microprocessor 300 . the first is a master timing signal lcdosc for the lcd drivers . the lcdosc is generated for the output of pin p20 of the microprocessor 300 after division by a d bistable 367 . a signal lcddat carries data bits which are shifted into the drivers indicating which of the elements are to be displayed and is connected to the d inputs of both driver chips 362 and 364 . the lcddat signal is generated from the output of pin p24 of the microprocessor 300 . a signal rowclk clocks the data bits into the row driver 364 on its falling edge and a signal colclk clocks the data into the column driver 362 on its falling edge . the signals rowclk and colclk are generated from pins p26 , p25 , respectively , of the microprocessor 300 . because the lcd drivers 362 , 364 operate from a power supply that is about 10 v , it is necessary to shift these four logic signals from the microprocessor 300 up to a higher voltage level . this is done through respective voltage level shifters 366 , 368 , 370 and 380 . the lcd driver chips 362 and 364 , and shifters 366 - 370 and 380 , require a voltage supply v dd of about 10 v . the gaming board 12 is powered by a battery b which delivers about 4 . 5 volts when fresh and about 3 . 5 volts when nearing depletion . the 10 volts required to supply the driver chips 362 and 364 is generated by a step - up voltage regulator 382 . an external capacitor 384 on the input cx serves as a timing element for an oscillator internal to the regulator 382 . by pumping current into and out of the capacitor 384 , a triangular waveform is produced with a 50 % duty cycle . the output voltage of the regulator 382 developed on capacitors 386 and 388 is divided down by resistors 390 and 394 and fed back to input vpb where it is compared against an internally generated reference of 1 . 3 v . if the feedback voltage is less than the reference , then the output lx of regulator 382 is turned on for one half - cycle of the oscillator , thereby shorting that point to ground . while the output lx is grounded , current ramps up through an inductor 396 causing energy to be stored in its magnetic field . when the oscillator switches to the other half - cycle , the output lx shuts off and no longer sinks current . however , current continues to flow through the inductor 396 , causing the voltage at a rectifier 398 to increase until it becomes forward - biased . current flows through the rectifier 398 , charging the output filter capacitors 386 and 388 until the energy stored in the inductor 396 is expended . the output voltage of the regulator 382 is controlled to 1 . 3 v * (( r390 + r394 )/ r394 ) , which is designed to be about 10 v . the regulator 382 can also be turned off by control of current to its input pin 1c . when current is removed from pin 1c , the regulator 382 shuts down , drawing almost no current . this prevents the regulator from stepping up the battery voltage , although a path still exists for current to flow from the battery b through the inductor 396 and the rectifier 398 to v dd . to prevent unnecessary current drain when the display power supply is to be shut off , a mosfet 400 is placed between the battery b and the inductor 396 . when the gate of the mosfet 400 is at a low logic level , the device is on , providing a low - impedance path for battery current to flow into the regulator circuit . when the gate of the mosfet 400 is at a high logic level , the device shuts off , preventing current from flowing through the inductor 396 and the rectifier 398 . a bistable 308 is used to turn the step - up regulator 382 on and off . the 1c input is connected to the q output of the bistable 308 ; the gate of mosfet 400 is connected to the * q output of the bistable 308 . the bistable 308 is set or reset by program control via the output pin p2l and the clock signal prog . the bistable 308 is reset upon power on and whenever the gaming card 12 enters a power conservation mode . the gaming board 12 has the sixteen membrane keyboard 312 ( shown electrically in fig2 and mechanically in fig2 ) by which the player inputs numbers and functional commands . the sixteen keys of the keyboard correspond to the digits 0 - 9 and the six function keys described previously . the keyboard is a four - row by four - column key switch electrical matrix which shorts one row to one column when a single key is pressed . the rows and columns of the keyboard 312 are connected to port 1 pins p10 - p17 . the pins p10 - p13 are for columns and the pins p14 - p17 are for rows . to scan the keyboard for a key press , the row pins are pulled , one at a time , to a low logic level through pins p14 - p17 , and the column pins p10 - p13 , normally high , are checked by the microprocessor 300 for a low logic level . if only one row pin going low produces only one column pin low , then exactly one key has been pressed and that key is the one detected . key debounce and edge detection are accomplished by the control program . fig2 a is a system flowchart of the programming for the control program stored in the gaming board 12 which operates to regulate the system . there are two main software portions of the control program , a communications mode routine illustrated as block a9 and a play mode routine illustrated as block a7 . when the gaming board 12 is originally powered up by connection to the system base station 10 , there is an initialization routine which is executed as part of the communications mode routine in block a9 . if the gaming board 12 is not successfully programmed with a schedule of play , as well as game parameters and game cards , it will be powered down . once the gaming board 12 is successfully downloaded it enters the play mode routine in block a7 . the play mode routine allows the player to display all the purchased cards , advance through the gaming schedule , score bingos , play instant bingo , and perform other functions provided by a function key . if a bingo is scored , whether regular or instant , a submode of the play mode routine is entered . a specific sequence of key presses is then required to return the gaming board to the regular play mode routine . this specific sequence is generally provided by the validator after communication with the validation unit 14 . at any time while the gaming board is in the play mode routine , the system base unit 10 or validation unit 14 can initiate communications with the gaming card 12 causing it to enter the communications mode routine . for example , if a bingo is scored , it must be validated , which requires communications with the validation unit 14 . a return from the communications mode routine always places the gaming board 12 in the play mode routine . as shown in fig2 b , the main software routine executes an interrupt routine which is entered on a real - time basis from an internally - generated timer interrupt . at every interrupt , or at a predetermined number of interrupts , the program will branch to the routine and execute a keyboard scan routine in block a11 , a display handler routine in block a13 , and a real - time clock routine in block a15 . after these routines are executed , the program returns to the main program at the location from which control was interrupted . thus , these processes are transparent to the operation of the main part of the program and facilitate its execution . to display a symbol on the display all that is needed is for the main program to store the appropriate symbol in certain memory locations . to use the keyboard , the main program simply checks one memory location to see if the key is ready and another memory location to fetch the key when the key is present . further , to test how much time remains in the load mode , the main program reads a memory location which contains the time remaining . the interrupt routine provides these functions in the interrupt mode , which permits the main program to execute the normal sequence . the keyboard scan routine in block a11 checks the keyboard a number of times a second and determines whether there is a valid key press . if there is a valid key press , a decoding routine places a number in a memory location indicating which key is activated . the display handler routine in block a13 generates the four special signals lcdosc , lcddat , rowclk , and colclk necessary to maintain the display . further , it reads a set of memory locations , and the display storage , to determine which symbols the display should show and converts that data to the lcddat signal . the real - time clock routine in block a15 is used to count interrupts to determine the passage of real time . an activity counter in block a15 determines the time elapsed since the last key activation . fig2 is a detailed flowchart of the communications mode routine for the gaming board 12 . the routine includes an initialization portion comprising blocks a10 , a12 , a14 and a16 . in this initialization portion the activity counter is reset to ten minutes in block a10 and the display is turned off in block a12 . thereafter , the external ram 812 is activated and initialized in block a11 . in this manner , the ram 812 may now copy blocks of data transmitted from the system base station 10 . in block a18 - a30 the communication linkage is developed to communicate with one of the external devices , such as a validation unit 14 or the system base station 10 . block a18 checks to see whether the gaming board 12 has received an interrupt from one of these external devices . if an interrupt is found , this indicates that an external device is requesting communications . otherwise , the program loops through blocks a20 and a18 looking for either an interrupt or a time out . if the time out occurs first , then program control is transferred to the play mode . however , if an external device is attempting to communicate , then in block a22 the gaming board 12 will set its transmit line txd to 0 to respond to the interrupt . the program thereafter loops in block a24 , waiting for the interrupt on the rxd line to end . the disablement of the interrupt indicates that the external device has raised the rxd line back to a logical 1 , responding to the low logic level on the transmit line . thus , the gaming board 12 will again reply in block a26 , establishing the link by setting the transmit line txd to a high logic level . next , in block a28 a subroutine uin is called to input a command byte . if the command is received without a time out , then the program begins decoding it in blocks a32 - a48 . however , if the command is not received or there is an error in the communication , the program transfers to the play mode . depending upon the command value , as tested in blocks a32 , a36 , a40 , a44 , a48 and a52 , the gaming board 12 either downloads a block of information , such as the game schedule routine in block a34 , the game information routine in block a38 , or the special instructions routine in block a42 , uploads a block of game information as in block a46 , downloads gaming cards as in block a54 , or turns off its power supply as in block a50 . if the command is a &# 34 ; 1 &# 34 ;, as determined by an affirmative branch from block a32 , then in block a34 the gaming board downloads the game schedule by calling the download game schedule routine . if the command is a &# 34 ; 2 &# 34 ;, as determined by an affirmative branch from block a36 , then in block a38 the gaming board downloads the game information by calling the download game information routine . in block a40 an affirmative branch calls the download special instructions routine in block a42 to transfer coding to the gaming board 12 . similarly , in block a52 an affirmative branch calls for the downloading of game cards to the gaming board 12 . on a command of &# 34 ; 5 &# 34 ;, control of the program is transferred from block a48 to block a50 , where the power supply is turned off by resetting the power supply bistable . the commands &# 34 ; 1 &# 34 ;, &# 34 ; 2 &# 34 ;, &# 34 ; 3 &# 34 ;, &# 34 ; 5 &# 34 ; and &# 34 ; 6 &# 34 ; are generated to the gaming board 12 by the system base station 10 . if the command is a &# 34 ; 4 &# 34 ;, then the gaming board 12 uploads game information in block a46 by calling the upload game information routine . a command of &# 34 ; 4 &# 34 ; is generated by a validation unit 14 . a command of &# 34 ; 6 &# 34 ; downloads game cards into the gaming board 12 . the downloading occurs under cashier control in block a54 , while selling cards 92 . these cards are stored in a random access file containing a game card array library 62 . the game card array library 62 may be stored in a disk drive 26 , such as a hard drive or a floppy drive . however , other memory means may be used to store the gaming card library , including magnetic tape , read - only memory chips ( roms ), or random - access memory chips ( rams and drams ). fig2 is a flowchart of the subroutine send . ebc executed by the system base station 10 when the user desires to download data from the system base station 10 to the gaming boards 12 . the user may access send . ebc while the system base station 10 is in the cashier operations mode . send . ebc is used to download game information , game schedules , and a base station program 46 into the gaming boards 12 . subroutine send . ebc downloads game information to the gaming board 12 by calling another subroutine , send . game , at block b10 . after a return from send . game , in block b12 subroutine send . ebc downloads the game schedule into the gaming board 12 by calling a subroutine , send . sched . after the system base station cpu 22 executes send . sched , program control returns to block b14 where subroutine firmware is called . firmware downloads the base station program 50 into the gaming board 12 . the base station program 50 includes gaming board instructions 46 as well as individual game array records 52 . upon execution of firmware , program control at the system base station cpu 22 is returned to the cashier operations routine . fig2 is a flowchart setting forth the structure of the base station program 46 which is downloaded from the system base station 10 into the gaming boards 12 . the base station program commences at block b20 by saving registers r0 - r5 in the random - access memory of gaming board 12 . these registers are saved so that the gaming board 12 can resume its activities after the base station program 46 has been executed . then , at block b22 , the individual gaming card arrays 52 are transferred from the gaming board external ram 812 into the gaming board working storage area 814 . in block b24 , registers r0 - r5 are set to satisfy the communications mode . next , a subroutine get key is called from block b26 which retrieves a character from the keyboard on the gaming board 12 . at block b28 , registers r0 - r5 are restored to their initial values . a &# 34 ; return &# 34 ; command is placed at the beginning of external ram page 1 , 816 , in block b30 . block b32 waits for an interrupt ; once an interrupt is received , the gaming board exits the subroutine and returns to play mode operation . fig3 a , 30b , and 30c together comprise a detailed flowchart of the play mode program for the gaming board 12 . the program first clears the flag bits f0 and f1 in block a300 to set the play mode . next in block a302 , if the barline is clear , this indicates that the present pass is the first pass through the play mode , and therefore , a number of parameters must be initialized . this initialization process is performed in blocks a310 - a318 where the memory locations storing the entry of a character and the free space are cleared in block a310 , the enter flag is set in block a312 , and the number of the card to be displayed is set to 1 in block a314 . thereafter , a subroutine labeled get card is called in block a316 to obtain the stored numbers for the first card array so that they can be either matched or displayed . the subroutine get card moves the array symbols from intermediate ram storage to display storage . in addition , the type of card is fetched by calling the subroutine labeled get type in block a318 . after the initialization , the program transfers control to block a304 where the ram memory is updated . if this is not the first pass through the play mode , then the negative branch from block a302 directly transfers control to block a304 . after initialization of the ram in block a304 , block a306 tests for an interrupt . if the interrupt is present , this indicates that the gaming board 12 is connected to either the system base station 10 or the validation unit 14 and a communications request is present . the gaming board 12 will , in response to the request , exit to the communications mode . if there is no communications request , in block a308 the program calls the subroutine get key which reads the key input from the key scan routine . block a320 determines if a new key has been input . upon the receipt of a new key , it is saved in block a322 ; otherwise , the program returns to the address playloop in block a304 . in this manner the program will continuously scan for a new key and if it does not find one , return to the beginning of the loop to check for a communications request . after a new key has been found , and saved in block a322 , the program continues to block a32 where the status of the gaming board is determined by fetching the annunciator byte . in blocks a326 and a328 , the status bits are tested to determine whether bingo is set and whether the instant annunciator is set . if the bingo annunciator is not set ( block a326 ) and the instant annunciator is set ( block a328 ), the program affirmatively branches to block a330 . the program in block a330 tests the key input to determine if it was merely a key release . if the new key is merely a release of the present key , the program will exit back to the address playloop , block a304 . however , if there is an actual new key and the instant annunciator is set , then the program will begin to play instant bingo . this loop is entered through block a332 where the address icntr is tested to determine whether or not it is zero . this address is used to store the number of key pushes that a player is allowed in an attempt to win at an instant game . if the instant counter is zero , as determined by an affirmative branch from block a332 , then the game is finished and the instant bingo flag is cleared in block a346 . further , in block a348 a buzzing sound is generated to alert the player that he has lost the instant game . next , in block a350 , the subroutine getcard is again called to obtain the next card array in line , so that if there are more instant bingo games , the program re - enters this mode at block a304 . before leaving the loop , at block a352 the shift bit is set false . however , if the instant counter icntr is not zero , the player still has a number of pushes with which to win at instant bingo . therefore , the negative branch from block a332 continues the program at block a334 where the counter icntr is decremented . this number is then placed into the free space in block a336 to inform the player of how many pushes he is still allowed . thereafter , in block a338 , the subroutine doib is called to select a random number and to match it against the card in play . the subroutine doib returns to the main program loop with the accumulator set to either 0 or 1 , indicating that instant bingo has been lost or won , respectively . if the program returns with the accumulator set to 1 , program control is transferred to block a342 where the bingo annunciator is set . to alert the player that a bingo for the instant mode has been found , a characteristic tune is played in block a344 with the tone generator by calling the subroutine bmusic . thereafter , the program exits back to playloop , block a304 , after setting the shift annunciator bit in block a352 . when it is determined that the instant annunciator has not been set and the gaming board is either in a bingo or not bingo mode , the program will continue to blocks a354 and a356 where the status of the board is tested . the annunciators are fetched in block a354 and tested in block a356 to determine whether the instant and bingo annunciators are both set . if both are set , the program moves to block a358 , where the input digit is tested . when digit is 0 , this signifies that the player has pushed the key sequence 0 - shift - enter on the gaming board 12 , which will reset the gaming board from the bingo mode to the regular play mode . consequently , if digit is 0 ( block a358 ), or if at least one annunciator is not set ( block a356 ), the gaming board 12 will begin a path in blocks a360 - a378 . if digit is not 0 , the gaming board 12 should not input key strokes ; therefore , the program will loop back to the address playloop , block a304 . block a360 decodes the character entered into the keyboard . if the entered key is a digit between 0 and 9 , control will be transferred to block a416 . if not , successive tests are performed at blocks a362 , a364 , a370 , a372 , a374 , a376 and a378 until an affirmative answer is found or all the tests are negative . if the key entered is a shift command as sensed in block a362 , then control will be transferred to block a366 . if the command is an enter operation , then control will be transferred at block a364 to block a368 . at block a370 , the program determines whether the instant annunciator bit is set . if the annunciator bit is true ( 1 ), then the program loops back to the address playloop , block a304 . however , if the annunciator bit is false ( 0 ), the program will continue decoding the new input key . in block a372 , the recall instruction is decoded ; if the test is affirmative , control is transferred to block a426 . in block a374 , the game key is tested ; if the test is true , a path beginning with block a436 is initiated . in block a376 , the level key is tested . if the test is affirmative , control is transferred to block a448 . the last function to be tested is the card key in block a378 . if the card key was pressed , the program will enter a subroutine at block a456 . however , if none of these keys have been entered , the gaming board 12 determines that an invalid request has been made and resets the bar line in block a380 . further , the recall mode is reset by clearing the function bit f0 in block a382 . the key that was entered is displayed in block a384 before the program transfers to the address playloop , block a304 . if the key entered was determined to be a numeric digit between 0 and 9 , block a416 is executed where the enter flag bit is cleared . block a418 checks for a previous enter flag bit and if there is one , that is , when the enter flag is not zero , block a420 clears both sides of the free space on the gaming board 12 . if not , or after the free space is cleared , in block a422 a subroutine labelled rollis 1 is called . the rollis 1 subroutine places the first digit in the free space on the right - hand side , the left - hand side remaining cleared , i . e ., 0 . the digit that is in the free space is then saved in entry location entry in block a424 before the program exits to the address pdone , block a352 . if a second digit is selected , the loop repeats , shifting program control back to block a422 , where the subroutine rollis1 rolls the first digit to the left - hand side of the free space and admits the second digit to be entered on the right - hand side of the free space . the second digit is saved at block a424 , and the program again exits to pdone , block a352 . the player will presumably press the enter key 210 after making the selection of digits . if the shift key was entered , block a366 sets the shift bit to true in block a366 before exiting to the address playloop , block a304 . likewise , the enter flag is set in block a368 if the enter key was pressed , as after the selection of digits . control is then transferred to block a386 where the last digit entered is checked to determine whether or not it is a &# 34 ; 0 &# 34 ;. if it is , then a path beginning at block a410 is initiated to determine whether a player has pressed the special key sequence of 0 - shift - enter which instructs the gaming card to exit the bingo mode . if the test is not passed , then the negative branch from block a410 exits to the address pdone at block a352 . if a player has entered the special key sequence , the program continues to block a412 where a subroutine beep is called . this subroutine beep causes the gaming card 12 to emit audible tones , warning both the floor worker and the bingo player that the gaming card is no longer in the bingo mode . generally , this sequence is used to reset the card after a bingo has been validated by the instant annunciator bit in block a414 . then the program resumes its search for other bingos by calling the subroutine bcresume in block a396 . the subroutine bcresume places a &# 34 ; 1 &# 34 ; in the accumulator if any of the remaining cards contain winning bingo patterns . at block a398 , a positive test transfers control to block a342 where the bingo annunciator is set . the gaming board plays the winning bingo tune by calling the subroutine bmusic in block a344 . however , if no bingo is found in the rest of the cards and the instant annunciator was not set in block a414 , the instant and bingo annunciators are cleared in block a400 before the program exits to the address dcx . an exit to this address produces a call to the subroutine get card to set the next card in block a350 . the shift annunciator is cleared in block a352 before exiting to playloop in block a304 . if the desired operation is the routine entry of a called number to be checked against the card arrays , the negative branch of the test in block a386 continues the program to block a388 , where , if there are no cards to be played , the program exits to the address playloop at block a304 . however , if there are cards , the shift annunciator is tested in block a390 . if true , the program will continue to block a402 , where the bingo annunciator is tested . a true bit in block a402 will cause the program to exit to address pdone . if the bingo annunciator bit is not set , this indicates the routine entry of a called number , thereupon , the subroutine entercall will be called in block a404 . this subroutine enters the two digits of a called number into the call table so that all the enabled bingo card arrays in present play can be checked against the call table . after the bit in the call table is set , the table is matched against all the cards by a subroutine bing check in block a406 . the subroutine bing check will return with the accumulator set at 1 if a bingo is found . the bingo condition is tested in block a408 ; if the accumulator contains a &# 34 ; 1 &# 34 ;, control is transferred to the address bingo , block a342 . if there is no bingo at this point , then the program loops back to block a400 where the instant flag and the bingo flag in the annunciator bar are cleared . the program thereafter exits to the address playloop after performing the operations in blocks a350 and a352 . fig3 is a detailed flowchart of the interrupt routine illustrated in fig2 a and 26b . when an interrupt occurs from the internal timer , program control is transferred to block a500 , where the background bank of registers is selected . this register bank is used by the interrupt routine which may store information between interrupts . therefore , the main routine should operate without using or modifying the contents of these registers . next , in block a502 , the routine generates the oscillator signal lcdosc from pin 20 of the microprocessor 300 . the master time clock for the display must be toggled precisely every 960 microseconds and cannot wait until other tasks in the main program are completed . therefore , the counter - timer circuit inside the microprocessor is used to generate an interrupt every 60 microseconds . after the oscillator signal has been generated , in block a504 the timer is reloaded to begin timing for the next interrupt . alternate paths are now taken from block a506 depending upon the outcome of a test that determines whether the oscillator logic level is high or low . if lcdosc is low , a test for 16 rows is made in block a508 , until 16 rows have been attained . a negative test result advances the program to block a510 where a string of column data is prepared to be sent to the lcd driver circuits on the next interrupt . if lcdosc is high , blocks a514 and a516 shift the previously - prepared data into the driver circuits . when the 16 rows have been attained as tested in block a508 , the data setup routine sets up annunciator bar data at block a518 as well as data which will drive the seven - segment digital display . the data for the display is completely set up after fifteen passes through the loop ; the sixteenth pass sets up the data for the annunciator bar . during the sixteenth pass , the keyboard scan and real - time clock functions are performed in blocks a520 and a522 , respectively . block a508 transfers control either to block a518 or to block a510 , depending upon the number of times the loop has been executed . the data to be displayed are stored in the 26 bytes of the display storage . the display storage is logically organized as five groups of five bytes where each byte holds two digits . one additional byte holds the eight annunciator bits . in this manner , the main program merely writes a byte to the appropriate location in the display storage . the byte will show up on the display after the interrupt - driven display routine is performed . the display data setup routine in blocks a510 and a512 examines a group of five bytes , looks up the appropriate segment bits from a table , and places the segment bits in a segment storage area . during the next interrupt , the transmit routine in blocks a514 and a516 sends the bits from the storage area to the display hardware . on the sixteenth time through the setup routine , the lookup table is addressed for the annunciator bits . on every 32nd interrupt , the keyboard scan and real - time clock routines in blocks a520 and a522 are executed . the keyboard scan loop probes each of the four rows of the 4 × 4 keypad with a low logic level and looks for a low logic level on one of the column pins . if exactly one row makes exactly one column go low , then one and only one key has been pressed . the row / column pattern is converted to a numerical value by means of a lookup table . if the same key is actuated on two consecutive passes through the keyboard scan routine , then a valid key is detected . if a transition from an invalid key to a valid key is detected , then a flag byte is set to inform the main program that a new key is available . at the same time , the activity counter in block a15 is reinitialized to ten minutes . the real - time clock routine follows the keyboard scan . on every pass through the real - time clock routine , an interrupt is counted which represents 1 / 33 of a second . when a second has been counted , the counter is updated and can be tested by the main routine to determine the time interval since the last key activation . when the activity counter times out , indicating that a key has not been pressed for ten minutes , the gaming board 12 turns off the display power supply to conserve power , and the microprocessor 300 enters an idle loop . in this idle loop , the microprocessor 300 waits for a key to be pressed or for input from an external device . if neither of these events occurs within two hours , the microprocessor 300 will turn off the main power supply and power down completely . if a key is activated after the display power is turned off , but before the main power supply is shut down , the gaming board 12 simply resumes normal operations and executes the required programming steps for interpreting the key . however , once the main power has been shut off , a reconnection to the system base station 10 is required for initialization before power can be turned back on . while a preferred embodiment of the invention has been illustrated , it will be obvious to those skilled in the art that various modifications and changes may be made thereto without departing from the spirit and scope of the invention as defined in the appended claims .
an electronic gaming system for playing games . the electronic gaming system includes a system base station and a plurality of electronic gaming boards . the system base station downloads game instructions , a game schedule , and game card arrays into the gaming boards . these game card arrays are stored in the system base station as a gaming card library . the game schedule stores symbols which are to be matched with randomly generated symbols , particularly where the symbols are numbers and the pattern is a plurality of elements of a 5 × 5 array . the system base station retains auditing information about the distributed gaming cards ; thus , the base station instantly confirms matches between the randomly - called numbers and those on a winning card , and at the same time verifies that such a card was indeed sold . the system base station receives information and performs supervisory functions such as distributing the game cards , storing the distributed game cards in memory , validating potentially winning cards , calculating card cost , calculating prize money for each session , and processing and reporting cumulative audit records stemming from the entire gaming session . the system base station has a number of modes by which an operator performs various functions for a gaming session as either the manager of the gaming session , the cashier of the gaming session , or the accountant of the gaming session . the accounting function produces a comprehensive audit record , including a profit / loss statement and a final cash - on - hand balance , for the entire gaming session .