Intel (Quartus FPGA compiler) | Toronto, ON, Canada
Interested in working on algorithmically-complex C++ code to squeeze out every last bit of performance? Understanding the hardware as well as the software, and building a mission-critical tool used daily by digital circuit designers? Actually using advanced computer science knowledge outside of interviews and programming competitions to optimize graph-based algorithms simultaneously for runtime, memory, and quality of the resulting solution? Then working on Quartus, Intel's compiler for FPGAs, is for you.
You will work in a downtown Toronto location, with an amazing and diverse group of talented engineers, on some of the most intellectually challenging problems in the world, and your work will directly benefit areas like AI, telecommunications, healthcare, aerospace, finance and more.
I am looking to hire specifically for the Timing Analysis team, which is responsible for both a user-visible Timing Analysis tool (used by digital designers to analyze timing problems) and the highly-optimized internal timing engine, which responds to millions of requests during a typical circuit compilation.
Hardware/FPGA knowledge is not required. Ideally, I am looking for some combination of the following: (1) ability to reason about algorithms and code optimization, (2) experience writing well-crafted C++ code as part of a large codebase, and (3) a passion for usability / caring deeply about the customer experience. My colleagues are hiring for other roles. Canadian citizens or Permanent Residents preferred.
Please feel free to ask any questions here in comments, or send a resume to evgeny dot osovetsky at my company name dot com.
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