While process advances will allow ever greater numbers of functional units -LRB- e.g , ALUs -RRB- , the burden of checking instruction dependencies grows so rapidly that the achievable superscalar dispatch limit is fairly small .

While hardware advances will allow greater numbers of functional units -LRB- e.g , ALUs -RRB- , the problem of checking instruction dependencies increases to a limit that the achievable superscalar dispatching limit is somewhat small .
