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1. (Department of Electronics Engineering and Department of BIT Medical Convergence, Kangwon National University, Chuncheon 24341, Korea )

Bluetooth low energy, current-bleeding circuit, current-reuse, IoT, I/Q mixer, gain and phase mismatch, low-IF receiver, low-voltage, quadrature generator, quadrature transconductor

## I. INTRODUCTION

Bluetooth low energy (BLE) is a representative communication standard, that is widely utilized in Internet of Things (IoT) sensor devices. Ultra-low-power BLE transceivers for IoT applications have been actively studied and developed (1-19). Most BLE receivers (RXs) employ a low-intermediate frequency (IF) single-quadrature architecture to achieve low 1/$\textit{f}$ noise with a channel bandwidth of 1 MHz. However, low-IF RXs suffer from a so-called image problem. When the sensitivity degradation, caused by the image signal, is less than 0.3 dB, an image rejection ratio (IRR) greater than 21 dB is required from a carrier-to-image interference ratio ($\textit{C}$/$\textit{I}$$_{\mathrm{Image}}) of {-}9 dB (17,20). In general, quadrature signals for single-quadrature mixing are generated by a quadrature voltage-controlled oscillator or divide-by-two circuit in the local oscillator (LO) path (1-12). Recently, owing to less restrictive IRR requirements, numerous studies on BLE RXs, whose quadrature signals are provided by a quadrature low-noise amplifier (LNA) or a quadrature mixer in the RF path or quadrature LO buffer in the LO path, have been published (15-18,21). In these studies, the quadrature LNA and mixer have a lower voltage gain and degraded noise figure (NF) instead of providing quadrature signals without additional power consumption. Moreover, in terms of the RX sensitivity, it is more advantageous that the quadrature mixer provides the quadrature signals rather than the quadrature LNA. Kwon \textit{et al.} introduced the in-phase/quadrature (I/Q) down-conversion active mixer to generate quadrature signals (21). The quadrature mixer employs a common-source (CS) amplifier with capacitive degeneration and a compensating resistor. In addition, a current-bleeding circuit is used to reduce the 1/\textit{f} noise of the switching stage. If the current consumed by the current-bleeding circuit can be reused to boost the overall transconductance (\textit{g}$$_{\mathrm{m}}$) and generate quadrature signals, the performances of the I/Q mixer can be improved.

Fig. 1. (a) Conventional I/Q mixer architecture with quadrature transconductor (21), (b) proposed I/Q mixer architecture with current-reused quadrature transconductor.

##### (6)
$\omega_{c}=\frac{1}{\sqrt{\left(2 L_{g}+L_{S}\right) C_{T}}}$

and $\textit{Z}$$_{\mathrm{IN}} = \textit{g}$$_{\mathrm{m}}$$\textit{L}$$_{\mathrm{S}}$/2$\textit{C}$$_{\mathrm{T}} = 50 Ω. The voltage gain of the proposed push-pull LNA from the voltage source \textit{V}$$_{\mathrm{S}}$ with source resistance $\textit{r}$$_{\mathrm{S}} to \textit{V}$$_{\mathrm{OUT}}$ can be expressed as

##### (7)
$A_{V L N A}=\frac{V_{O U T}}{V_{S}}=2 Q_{I N} g_{m} Z_{O U T}$

Fig. 5. Schematic of the I/Q down-conversion active mixer using the proposed current-reused quadrature transconductor.

Fig. 6. Simulated gain and phase mismatches of the I/Q mixer.

Here, $\textit{Q}$$_{\mathrm{IN}} is the \textit{Q}-factor of the input impedance network, and \textit{Z}$$_{\mathrm{OUT}}$ denotes the output impedance of the LNA, whose values are given approximately as

##### (8)
$Q_{I N}=\frac{1}{4 R_{S} \omega C_{T}}$

##### (9)
$Z_{\text {OUT }} \approx \frac{1}{s C_{N, M \text { ixer }}}\left\|\frac{r_{O}}{2}\right\| R_{B 3}$

##### (10)
$F_{L N A}=1+\frac{V_{M N 1}^{2}+V_{M P 1}^{2}}{4 k T R_{S} A_{V L M A}^{2}}=1+\frac{\gamma}{8 Q_{N N}^{2} g_{m} R_{S}}$

where $\textit{V}$$^{2}$$_{\mathrm{MN1}}$ and $\textit{V}$$^{2}$$_{\mathrm{MP1}}$ represent the output-referred noise voltages generated by $\textit{M}$$_{\mathrm{N1}} and \textit{M}$$_{\mathrm{P1}}$, and ${\gamma}$ denotes the noise parameter of the transistor. The proposed LNA halves the excess noise factor because its total output-referred noise power is the sum of the noise powers generated by $\textit{M}$$_{\mathrm{N1}} and \textit{M}$$_{\mathrm{P1}}$, and its total voltage gain is the sum of the voltage gains provided by $\textit{M}$$_{\mathrm{N1}} and \textit{M}$$_{\mathrm{P1}}$. Therefore, compared to a conventional CS LNA with inductive source degeneration and additional $\textit{C}$$_{\mathrm{EX}}, the proposed current-reused push-pull LNA with inductive source degeneration can achieve a larger voltage gain and lower noise performance. Fig. 5 shows the I/Q down-conversion active mixer using the proposed current-reused quadrature transconductor. The current-bleeding circuit reduces the 1/\textit{f} noise of the switching stage, performs voltage-to-current conversion, and generates quadrature signals. Therefore, it can enhance the conversion gain and NF. In high frequencies, the parasitic capacitances of main transistors in the current-reused quadrature transconductor (\textit{M}$$_{\mathrm{N1}}$, $\textit{M}$$_{\mathrm{N2}}, \textit{M}$$_{\mathrm{P1}}$, and $\textit{M}$$_{P2}) can cause gain and phase mismatches. To compensate for both mismatches and increase the design degree of freedom, compensating resistors of \textit{r}$$_{\mathrm{N}}$ and \textit{r}_{\mathrm{P}} are added (21). Fig. 6 shows the simulated gain and phase mismatches of the proposed I/Q mixer. As shown in Fig. 6, there is little difference in the BLE band. The proposed I/Q mixer can provide quadrature signals with gain and phase mismatches of less than 0.15 dB and 0.65^{\circ} in the BLE band, respectively. These values are sufficient to provide an IRR of more than 21 dB. The I-path conversion gain of the proposed I/Q mixer can be expressed as ##### (11) A_{V M \text { axer }}=\frac{V_{\text {OUTI }}}{V_{I N}}=\frac{\sqrt{2}}{\pi} g_{m T}\left(R_{L} \| \frac{1}{s C_{L}}\right) The I-path noise factor of the proposed I/Q mixer can be expressed as ##### (12) \begin{aligned} F_{\text {Mxxer }} &=1+\frac{V_{M N}^{2}+V_{M P 1}^{2}+2 V_{M N 3}^{2}+2 V_{M P 3}^{2}+2 V_{R L}^{2}}{4 k T R_{S} A_{V M \times e r}^{2}} \\ & \approx 1+\frac{\pi^{2}}{R_{S}}\left(\frac{\gamma}{4 g_{m T}}+\frac{2 \gamma I_{B}}{g_{m T}^{2} \pi A}+\frac{2 \gamma g_{m P 3}}{g_{m T}^{2}}+\frac{1}{g_{m T}^{2} R_{L}}\right) \end{aligned} where \textit{V}^{2}$$_{\mathrm{MN1}}, \textit{V}$$^{2}$$_{\mathrm{MP1}}, \textit{V}$$^{2}$$_{\mathrm{MN3}}, \textit{V}$$^{2}$$_{\mathrm{MP3}} and \textit{V}$$_{RL} represent the output-referred noise voltages generated by $\textit{M}$$_{\mathrm{N1}}, \textit{M}$$_{\mathrm{P1}}$, $\textit{M}$$_{\mathrm{N3}}, \textit{M}$$_{\mathrm{P3}}$, and $\textit{r}$$_{\mathrm{L}}, respectively, \textit{I}$$_{\mathrm{B}}$ denotes the dc current flowing into $\textit{M}$$_{\mathrm{N3,4}} of the switching stage, and \textit{A} denotes the amplitude of the LO signal. In \textit{f}$$_{\mathrm{Mixer}}$, the switching noises of $\textit{M}$$_{\mathrm{N3}} and \textit{M}$$_{\mathrm{N4}}$ are the dominant noise contributions. Because the proposed I/Q mixer with the current-reused quadrature transconductor enhances the overall transconductance, it has a smaller noise factor compared to that of the conventional quadrature transconductor.

Table 1. Power breakdown of the BLE RX front-end

 Block Current Power LNA 0.4 mA 0.4 mW I/Q mixer 0.6 mA 0.6 mW Total 1 mA 1 mW

Fig. 7. Layout of the proposed BLE RX front-end.

## IV. CONCLUSIONS

In this study, a 2.4 GHz low-power low-IF BLE RX front-end employing the new I/Q down-conversion active mixer with the current-reused quadrature transconductor was designed in a 65 nm CMOS technology. The quadrature signals required for single-quadrature mixing were generated at the transcondcutor of the I/Q mixer to reduce the power consumption and NF. The proposed current-reused current-bleeding circuit of the I/Q mixer improved the overall transconductance of the mixer, provided quadrature signals, and reduced the 1/$\textit{f}$ noise of the switching stage. The designed BLE RX front-end obtained a conversion gain of 37.6 dB, NF of 3.3 dB, and IIP3 of -22.73 dBm.

### ACKNOWLEDGMENTS

This work was supported in part by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education under Grant NRF-2018R1D1A1B07042804 and in part by the Ministry of Science and ICT, Korea, under the Information Technology Research Center Support Program supervised by the Institute for Information and Communications Technology Promotion (IITP) under Grant IITP-2021-2018-0-01433. The chip fabrication and EDA tool were supported by the IC Design Education Center (IDEC), Korea.

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## Author

##### Yoonji Park

Sengjun Jo is currently studying integrated B. S. and M. S. program in Department of Electronics Engi-neering, Kangwon National Univer-sity, Chuncheon, Korea.

His research interests include CMOS mmWave/ RF/analog integrated circuits and RF system design for wireless communications.

##### Ji-Hoon Kim

Hyeonjun Kim is currently studying integrated B. S. and M. S. program in Department of Electronics Engi-neering, Kangwon National Univer-sity, Chuncheon, Korea.

His research interests include CMOS mmWave/ RF/analog integrated circuits and RF system design for wireless communications.

##### Ji-Hoon Kim

Kuduck Kwon received the B.S. and Ph.D. degrees in Electrical Engi-neering and Computer Science from Korea Advanced Institute of Science and Technology (KAIST), in Daejeon, Korea, in 2004 and 2009, respectively.

His doctoral research concerned digital TV tuners and dedicated short-range communication (DSRC) systems.

From 2009 to 2010, he was a Post-Doctoral Researcher with KAIST, where he studied a surface acoustic wave (SAW)-less receiver and developed RF transceivers for DSRC applications.

From 2010 to 2014, he was a Senior Engineer with Samsung Electronics Co. LTD., Suwon, Korea, where he was involved in studying software-defined receiver and developing silicon tuner and cellular RFICs.

In 2014, he joined the Department of Electronics Engineering, Kangwon National University, Chuncheon, Korea, where he is currently an Associate Professor.

His research interests include CMOS mmWave/RF/analog integrated circuits and RF system design for wireless communications.