12035723
Testing and characterization of the one-bit first-order delta-sigma modulator for on-chip analog signal analysis
Delta-sigma modulation has become popular in modern analog-to-digital modulator design due to its relatively high immunity from process variations. We propose efficient characterization techniques to obtain the key performance parameters of the 1-bit first-order delta-sigma modulator which is intended to be used as an on-chip analog signal digitizer for BIST applications. Numerical simulations have been performed to validate the techniques and the results indicate that accurate estimation of the parameters can be obtained at the presence of noise.
11615380
A sigma-delta modulation based BIST scheme for mixed-signal circuits
In this work, we present the analysis of a built-in self-test (BIST) scheme for mixed-signal circuits that is intended to provide on-chip stimulus generation and response analysis. Based on the sigma-delta modulation principle, the proposed scheme can produce high-quality stimuli and obtain accurate measurements without the need of precise analog circuitry. Numerical simulations are conducted to validate our idea and the results show that the scheme is a promising BIST approach for mixed-signal circuits.
9736317
Characterization of a pseudo-random testing technique for analog and mixed-signal built-in-self-test
In this paper, we characterize and evaluate the effectiveness of a pseudo-random-based implicit functional testing technique for analog and mixed-signal circuits. The analog test problem is transformed into the digital domain by embedding the device-under-test (DUT) between a digital-to-analog-converter and an analog-to-digital converter. The pseudo-random testing technique uses band-limited digital white noise (pseudo-random-patterns) as input stimulus. The signature is constructed by computing the cross-correlation between the digitized output response and the pseudo-random input sequence. We have implemented a DSP-based hardware testbed to evaluate the effectiveness of the pseudo-random testing technique. Our results show that we can achieve close to 100% yield and fault coverages by carefully selecting only two cross-correlation samples. Noise level and total harmonic distortion below 0.1% and 0.5%, respectively, do not affect the classification accuracy.
14811510
Specification back-propagation and its application to DC fault simulation for analog/mixed-signal circuits
In this paper we present the specification backpropagation technique which enables one to derive the constraint of an internal functional block with respect to a given DC specification for an analog/mixed-signal system. Based on this technique, we implement an efficient fault simulator which reduces the required efforts by (1) removing undetectable faults from the fault list, and (2) performing fault simulation only locally for the fault block. Simulation results on an industrial design show a speedup factor of 7.2 with 98% correct classification of detected and undetected faults as compared with full-chip DC fault simulation.
1676234
A complete distance field representation
Distance fields are an important volume representation. A high quality distance field facilitates accurate surface characterization and gradient estimation. However, due to Nyquist's law, no existing volumetric methods based on the linear sampling theory can fully capture surface details, such as comers and edges, in 3D space. We propose a novel complete distance field representation (CDFR) that does not rely on Nyquist's sampling theory. To accomplish this, we construct a volume where each voxel has a complete description of all portions of surface that affect the local distance field. For any desired distance, we are able to extract a surface contour in true Euclidean distance, at any level of accuracy, from the same CDFR representation. Such point-based iso-distance contours have faithful per-point gradients and can be interactively visualized using splatting, providing per-point shaded image quality. We also demonstrate applying CDFR to a cutting edge design for manufacturing application involving high-complexity parts at unprecedented accuracy using only commonly available computational resources.
8925570
Auction-Based Spectrum Sharing
We study auction mechanisms for sharing spectrum among a group of users, subject to a constraint on the interference temperature at a measurement point. The users access the channel using spread spectrum signaling and so interfere with each other. Each user receives a utility that is a function of the received signal-to-interference plus noise ratio. We propose two auction mechanisms for allocating the received power. The first is an auction in which users are charged for received SINR, which, when combined with logarithmic utilities, leads to a weighted max-min fair SINR allocation. The second is an auction in which users are charged for power, which maximizes the total utility when the bandwidth is large enough and the receivers are co-located. Both auction mechanisms are shown to be socially optimal for a limiting “large system” with co-located receivers, where bandwidth, power and the number of users are increased in fixed proportion. We also formulate an iterative and distributed bid updating algorithm, and specify conditions under which this algorithm converges globally to the Nash equilibrium of the auction.
14327978
On Exploring the Power-Law Relationship in the Itemset Support Distribution
We identify and explore in this paper an important phenomenon which points out that the power-law relationship appears in the distribution of itemset supports. Characterizing such a relationship will benefit many applications such as providing the direction of tuning the performance of the frequent-itemset mining. Nevertheless, due to the explosive number of itemsets, it will be prohibitively expensive to retrieve characteristics of the power-law relationship in the distribution of itemset supports. As such, we also propose in this paper a valid and cost-effective algorithm, called algorithm PPL, to extract characteristics of the distribution without the need of discovering all itemsets in advance. Experimental results demonstrate that algorithm PPL is able to efficiently extract the characteristics of the power-law relationship with high accuracy.
10675163
Maximal and Minimal Vertex-Critical Graphs of Diameter Two
A graph is vertex-critical if deleting any vertex increases its diameter. We construct, for each??5 except?=6, a vertex-critical graph of diameter two on?vertices with at least 12?2?2?3/2+c1?edges, wherec1is some constant. We show that such a graph contains at most 12?2?(2/2)?3/2+c2?edges, wherec2is some constant. We also construct, for each??5 except?=6, a vertex-critical graph of diameter two on?vertices with at most 12 (5??12) edges. We show that such a graph must contain at least 12 (5??29) edges.
9984897
Structure Alignment Using Bilingual Chunking
A new statistical method called "bilingual chunking" for structure alignment is proposed. Different with the existing approaches which align hierarchical structures like sub-trees, our method conducts alignment on chunks. The alignment is finished through a simultaneous bilingual chunking algorithm. Using the constrains of chunk correspondence between source language (SL) and target language (TL), our algorithm can dramatically reduce search space, support time synchronous DP algorithm, and lead to highly consistent chunking. Furthermore, by unifying the POS tagging and chunking in the search process, our algorithm alleviates effectively the influence of POS tagging deficiency to the chunking result.The experimental results with English-Chinese structure alignment show that our model can produce 90% in precision for chunking, and 87% in precision for chunk alignment.