14557838
AER Auditory Filtering and CPG for Robot Control
Address-event-representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). The event information in an AER system is transferred using a high-speed digital parallel bus. This paper presents an experiment using AER for sensing, processing and finally actuating a robot. The AER output of a silicon cochlea is processed by an AER filter implemented on a FPGA to produce rhythmic walking in a humanoid robot (Redbot). We have implemented both the AER rhythm detector and the central pattern generator (CPG) on a Spartan II FPGA which is part of a USB-AER platform developed by some of the authors
18592302
A Winner-Take-All Circuit with Controllable Soft Max Property
I describe a silicon network consisting of a group of excitatory neurons and a global inhibitory neuron. The output of the inhibitory neuron is normalized with respect to the input strengths. This output models the normalization property of the wide-field direction-selective cells in the fly visual system. This normalizing property is also useful in any system where we wish the output signal to code only the strength of the inputs, and not be dependent on the number of inputs. The circuitry in each neuron is equivalent to that in Lazzaro's winner-take-all (WTA) circuit with one additional transistor and a voltage reference. Just as in Lazzaro's circuit, the outputs of the excitatory neurons code the neuron with the largest input. The difference here is that multiple winners can be chosen. By varying the voltage reference of the neuron, the network can transition between a soft-max behavior and a hard WTA behavior. I show results from a fabricated chip of 20 neurons in a 1.2 µm CMOS technology.
6979172
Encoding the Temporal Statistics of Markovian Sequences of Stimuli in Recurrent Neuronal Networks
Encoding, storing, and recalling a temporal sequence of stimuli in a neuronal network can be achieved by creating associations between pairs of stimuli that are contiguous in time. This idea is illustrated by studying the behavior of a neural network model with binary neurons and binary stochastic synapses. The network extracts in an unsupervised manner the temporal statistics of the sequence of input stimuli. When a stimulus triggers the recalling process, the statistics of the output patterns reflects those of the input. If the sequence of stimuli is generated through a Markov process, then the network dynamics faithfully reproduces all the transition probabilities.
34951314
Spike synchronization in a network of silicon integrate-and-fire neurons
Spike-event based computational processing by neuronal networks depends on a variety of spatio-temporal mechanisms that are distributed across neuronal synapses, dendrites, and somata. The overall processing of spatio-temporal patterns of spike requires global temporal coherence between all these processes both within a neuron, and across all neurons of the network. We are evaluating the use of networks of hybrid analog-digital integrate-and-fire neurons, fabricated using VLSI, for studying real-time event-based processing. These hardware networks have the advantages of real-time operation, and inherent global synchronization by their analog implementation. However, one of the technical challenges in the operation of such networks is the unavoidable fabrication related variance between the different neurons of the network. Here we show that despite this variance, an important behavior of neuronal networks, spike synchronization, can be obtained from a simple network of VLSI neurons interconnected by lateral excitation and global inhibition.
1845062
Adaptive Retina with Center-Surround Receptive Field
Both vertebrate and invertebrate retinas are highly efficient in extracting contrast independent of the background intensity over five or more decades. This efficiency has been rendered possible by the adaptation of the DC operating point to the background intensity while maintaining high gain transient responses. The center-surround properties of the retina allows the system to extract information at the edges in the image. This silicon retina models the adaptation properties of the receptors and the antagonistic center-surround properties of the laminar cells of the invertebrate retina and the outer-plexiform layer of the vertebrate retina. We also illustrate the spatio-temporal responses of the silicon retina on moving bars. The chip has 59×64 pixels on a 6.9×6.8mm2 die and it is fabricated in 2 µm n-well technology.
12793172
Continuous-time adaptive delay system
We have developed an adaptive delay system that adjusts the delay of a delay element so that it matches the temporal disparity between the onset of two input signals. The delay is controlled either by an external bias voltage, or by an intrinsic signal derived from an adaptive block. The operation of the adaptive delay system is similar to that of a charge-pump phase-lock loop, with an extended lock-in range of more than 5 decades. Standard CMOS transistors are used in their subthreshold region. Experimental results from circuits fabricated in 2 /spl mu/m CMOS technology are in agreement with the analysis.<<ETX>>
7160160
QoS-UniFrame: a Petri net-based modeling approach to assure QoS requirements of distributed real-time and embedded systems
Assuring quality of service (QoS) requirements is critical when assembling a distributed real-time and embedded (DRE) system from a repository of existing components. This paper presents a two-level approach for assuring satisfaction of QoS requirements in the context of a reduced design space for DRE systems. A dynamic and parallel approach is introduced to prune off the infeasible design spaces at the first level. Evolutionary algorithms cooperating with a domain-specific scripting language then discard less probable design spaces using statistics. These techniques fulfill the collective objectives of pruning and assuring the design space at system assembly time.
10225840
Generating test data from SOFL specifications
Abstract Software testing can only be formalized and quantified when a solid basis for test generation can be defined. Tests are commonly generated from the source code, control flow graphs, design representations, and specifications/requirements. Formal specifications represent a significant opportunity for testing because they precisely describe what functions the software is supposed to provide in a form that can be easily manipulated. This paper presents a new method for generating tests from formal specifications. This method is comprehensive in specification coverage, applies at several levels of abstraction, and can be highly automated. The paper applies the method to SOFL specifications, describes the technique, and demonstrates the application on a case study. A preliminary evaluation using a code-level coverage criterion (mutation testing), indicates that the method can result in very effective tests.
15212910
A software product line architecture for distributed real-time and embedded systems: a separation of concerns approach
This paper presents a separation of concerns approach to solve the tangling problem of functional and Quality of Service (QoS) concerns in traditional Component-based Software Engineering (CBSE) and Software Product Line (SPL) technologies applied to Distributed Real-time and Embedded (DRE) systems. This problem originates from the interchangeability for fulfilling functional and QoS concerns during composition. The approach utilizes the perspective of QoS to design and analyze a set of software systems represented by a collection of QoS systemic paths, which determine how well functional tasks perform in terms of flows of application-specific and functionality-determined information between components. Our approach not only reserves the virtues of reusability, changeability, productivity and expeditiousness that traditional CBSE and SPL technologies possess, but also dedicates the contributions in terms of separation of concerns, design space exploration, fine-grained commonality and reusability evaluation and less subjective feasibility analyses for a component-based SPL.
11533048
RFID Data Processing with a Data Stream Query Language
RFID technology provides significant advantages over traditional object-tracking technologies and is increasingly adopted and deployed in real applications. RFID applications generate large volume of streaming data, which have to be automatically filtered, processed, and transformed into semantic data, and integrated into business applications. Indeed, RFID data are highly temporal, and RFID observations form complex temporal event patterns which can be very different for various RFID applications. Thus, it is desirable to have a general RFID data processing framework with a powerful language, for the end users to express a variety of queries on RFID data streams, as well as detecting complex events patterns. While data stream management systems (DSMSs) are emerging for optimized stream data processing, they usually lack the language construct support for temporal event detection. In this paper, we discuss a stream query language to provide comprehensive temporal event detection, through temporal operators and extension of sliding-window constructs. With the integration of temporal event detection, a DSMS has the capability to serve as a powerful system for RFID data processing.
5842197
Configurable indexing and ranking for XML information retrieval
Indexing and ranking are two key factors for efficient and effective XML information retrieval. Inappropriate indexing may result in false negatives and false positives, and improper ranking may lead to low precisions. In this paper, we propose a configurable XML information retrieval system, in which users can configure appropriate index types for XML tags and text contents. Based on users' index configurations, the system transforms XML structures into a compact tree representation, Ctree, and indexes XML text contents. To support XML ranking, we propose the concepts of "weighted term frequency" and "inverted element frequency," where the weight of a term depends on its frequency and location within an XML element as well as its popularity among similar elements in an XML dataset. We evaluate the effectiveness of our system through extensive experiments on the INEX 03 dataset and 30 content and structure (CAS) topics. The experimental results reveal that our system has significantly high precision at low recall regions and achieves the highest average precision (0.3309) as compared with 38 official INEX 03 submissions using the strict evaluation metric.