16853040
Local Orientation Smoothness Prior for Vascular Segmentation of Angiography
We present a new generic method for vascular segmentation of angiography. Angiography is used for the medical diagnosis of arterial diseases. To facilitate an effective and efficient review of the vascular information in the angiograms, segmentation is a first stage for other post-processing routines. The method we propose uses a novel a priori — local orientation smoothness prior — to enforce an adaptive regularization constraint for the vascular segmentation within the Bayes’ framework. It aspires to segment a variety of angiographies and is aimed at improving the quality of segmentation in low blood flow regions. Our algorithm is tested on numerical phantoms and clinical datasets. The experimental results show that our method produces better segmentations than the maximum likelihood estimation and the estimation with a multi-level logistic Markov random field model. Furthermore, the novel algorithm produces aneurysm segmentations comparable to the manual segmentations obtained from an experienced consultant radiologist.
1021507
Augmented vessels for quantitative analysis of vascular abnormalities and endovascular treatment planning
Endovascular treatment plays an important role in the minimally invasive treatment of patients with vascular diseases, a major cause of morbidity and mortality worldwide. Given a segmentation of an angiography, quantitative analysis of abnormal structures can aid radiologists in choosing appropriate treatments and apparatuses. However, effective quantitation is only attainable if the abnormalities are identified from the vasculature. To achieve this, a novel method is developed, which works on the simpler shape of normal vessels to identify different vascular abnormalities (viz. stenotic atherosclerotic plaque, and saccular and fusiform aneurysmal lumens) in an indirect fashion, instead of directly manipulating the complex-shaped abnormalities. The proposed method has been tested on three synthetic and 17 clinical data sets. Comparisons with two related works are also conducted. Experimental results show that our method can produce satisfactory identification of the abnormalities and approximations of the ideal post-treatment vessel lumens. In addition, it can help increase the repeatability of the measurement of clinical parameters significantly
14960694
Comparative analysis of gene sets in the gene ontology space under the multiple hypothesis testing framework
The gene ontology (GO) resource can be used as a powerful tool to uncover the properties shared among, and specific to, a list of genes produced by high-throughput functional genomics studies, such as microarray studies. In the comparative analysis of several gene lists, researchers maybe interested in knowing which GO terms are enriched in one list of genes but relatively depleted in another. Statistical tests such as Fisher's exact test or Chi-square test can be performed to search for such GO terms. However, because multiple GO terms are tested simultaneously, individual p-values from individual tests do not serve as good indicators for picking GO terms. Furthermore, these multiple tests are highly correlated, usual multiple testing procedures that work under an independence assumption are not applicable. In this paper we introduce a procedure, based on false discovery rate (FDR), to treat this correlated multiple testing problem. This procedure calculates a moderately conserved estimator of q-value for every GO term. We identify the GO terms with q-values that satisfy a desired level as the significant GO terms. This procedure has been implemented into the GoSurfer software. GoSurfer is a windows based graphical data mining tool. It is freely available at http://www.gosurfer.org.
7147975
Static identification of delinquent loads
The effective use of processor caches is crucial to the performance of applications. It has been shown that cache misses are not evenly distributed throughout a program. In applications running on RISC-style processors, a small number of delinquent load instructions are responsible for most of the cache misses. Identification of delinquent loads is the key to the success of many cache optimization and prefetching techniques. We propose a method for identifying delinquent loads that can be implemented at compile time. Our experiments over eighteen benchmarks from the SPEC suite shows that our proposed scheme is stable across benchmarks, inputs, and cache structures, identifying an average of 10% of the total number of loads in the benchmarks we tested that account for over 90% of all data cache misses. As far as we know, this is the first time a technique for static delinquent load identification with such a level of precision and coverage has been reported. While comparable techniques can also identify load instructions that cover 90% of all data cache misses, they do so by selecting over 50% of all load instructions in the code, resulting in a high number of false positives. If basic block profiling is used in conjunction with our heuristic, then our results show that it is possible to pin down just 1.3% of the load instructions that account for 82% of all data cache misses.
206134104
Coverage testing software architectural design in SDL
Statistical data analysis shows that early fault detection can cut cost significantly. With improved technology for automatic code generation from architectural design specifications, it becomes even more important to have, from the beginning, a highly reliable and dependable architectural design. To ensure this, we have to predict the "quality" of the system early in the development process. The use of traces or execution histories as an aid to testing and analysis is well established for programming languages like C and C++, but it is rarely applied in the field of software specification for designs. We propose a solution by applying our technology at source code level to coverage testing software designs represented in a high-level specification and description language such as SDL. Sophisticated dominator analysis is applied to provide hints on how to generate efficient test cases to increase, as much as possible with as few tests as possible, the control-flow- and data-flow-based coverage of the SDL specification being tested. We extend source code-based coverage testing to the software design specification level for specification validation. A coverage analysis tool, CATSDL, with user-friendly interfaces was developed to support our method. An illustration is provided to demonstrate the feasibility of using our method to validate the architectural design efficiently in terms of higher testing coverage and lower cost.
8251892
Optimal Reinsertion: A New Search Operator for Accelerated and More Accurate Bayesian Network Structure Learning
We show how a conceptually simple search operator called Optimal Reinsertion can be applied to learning Bayesian Network structure from data. On each step we pick a node called the target. We delete all arcs entering or exiting the target. We then find, subject to some constraints, the globally optimal combination of in-arcs and out-arcs with which to reinsert it. The heart of the paper is a new algorithm called ORSearch which allows each optimal reinsertion step to be computed efficiently on large datasets. Our empirical results compare Optimal Reinsertion against a highly tuned implementation of multirestart hill climbing. The results typically show one to two orders of magnitude speed-up on a variety of datasets. They usually show better final results, both in terms of BDEU score and in modeling of future data drawn from the same distribution.
3457072
Using UML 2.0 for system level design of real time SoC platforms for stream processing
While enabling fast implementation and reconfiguration of stream applications, programmable stream processors expose issues of incompatibility and lack of adoption in existing stream modeling languages. To address them we describe a design approach in which specifications are captured in UML 2.0, and automatically translated into SystemC models consisting of simulators and synthesizable code under proper style constraints. As an application case, we explain real time stream processor specifications using new UML 2.0 notations. Then we expound how our translator generates SystemC models and includes additional hardware details. Verifications are made during UML execution as well as assertions in SystemC. The case study demonstrates the feasibility of fast specifications, modifications and generation of real time stream processor designs.