16309496
Scaling to the end of silicon with EDGE architectures
Microprocessor designs are on the verge of a post-RISC era in which companies must introduce new ISAs to address the challenges that modern CMOS technologies pose while also exploiting the massive levels of integration now possible. To meet these challenges, we have developed a new class of ISAs, called explicit data graph execution (EDGE), that will match the characteristics of semiconductor technology over the next decade. The TRIPS architecture is the first instantiation of an EDGE instruction set, a new, post-RISC class of instruction set architectures intended to match semiconductor technology evolution over the next decade, scaling to new levels of power efficiency and high performance.
7556493
Using mixins to build flexible widgets
When it comes to software that runs on devices as varied as cell phones, PDAs and desktops, one size does not fit all. This paper describes how mixin layers, a kind of nested generic type, can be used to implement a graphical user interface library that can be configured to run on platforms with widely dissimilar capabilities. We describe the language support needed to incrementally build software in layers, and we describe how crosscutting concerns can be encapsulated within a layer. We then show how layers can be reconfigured to meet changing requirements. We also show how a new design pattern, the Sibling pattern, can be used with mixin layers to coordinate changes to multiple classes in the same inheritance hierarchy. When used appropriately, the Sibling pattern increases our ability to separate design concerns and to reuse code.
37744315
Research on Network Architecture with Trustworthiness and Controllability
In this paper, the architecture of trustworthy and controllable networks is discussed to meet arising application requirements. After reviewing the lessons and experiences of success and failure in the Internet and summarizing related work, we analyze the basic targets of providing trustworthiness and controllability. Then, the anticipant architecture is introduced. Based on the resulting design, several trustworthy and controllable mechanisms are also discussed.
6012193
Performability Evaluation of Resource Scheduling Algorithms for Computational Grids
Resource scheduling is a fundamental issue in achieving high performance on computational grids. In this paper, we concentrate on parallel resource scheduling problems for hierarchical resource scheduling architecture of computational grids, and propose a stochastic reward nets (SRN) based performability evaluation framework for evaluating the performability of resource scheduling algorithms for computational grid with resource unavailability. Within the proposed framework, performability model of hierarchical resource scheduling is constructed, 36 combinations of 6 global job scheduling algorithms and 6 local processor allocation algorithms are specified in the uniform performability model, and performability metrics are derived
40521773
Cycle decompositions of crowns
Abstract For an integer n ⩾3, the crown S n 0 is defined to be the graph with vertex set { x 0 , x 1 ,…, x n −1 , y 0 , y 1 ,…, y n −1 } and edge set {x i y j : 0⩽i,j⩽n−1, i≠j} . In this paper we give some sufficient conditions for the edge decomposition of the crown into isomorphic cycles.
37848261
A New Force-Directed Graph Drawing Method Based on Edge-Edge Repulsion
The conventional force-directed methods for drawing undirected graphs are based on either vertex-vertex repulsion or vertex-edge repulsion. In this paper, we propose a new force-directed method based on edge-edge repulsion to draw graphs. In our framework, edges are modelled as charged springs, and a final drawing can be generated by adjusting positions of vertices according to spring forces and the repulsive forces, derived from potential fields, among edges. Different from the previous methods, our new framework has the advantage of overcoming the problem of zero angular resolution, guaranteeing the absence of any overlapping of edges incident to the common vertex. Given graph layouts probably generated by classical algorithms as the inputs to our algorithm, experimental results reveal that our approach produces promising drawings (especially for trees and hypercubes) not only preserving the original properties of a high degree of symmetry and uniform edge length, but also preventing zero angular resolution. By allowing vertex-vertex overlapping, our algorithm also results in more symmetrical drawings.
52872372
Modeling and Performance Analysis of a Multiserver Multiqueue System on the Grid
Grid computing has emerged as an important new field, distinguished from conventional distributed computing by its focus on large-scale resource sharing, innovative applications, and high-performance orientation. A Grid integrates and coordinates resources and users that live within different control domains with the goal of delivering nontrivial quality of service (QoS). Consequently, task management and scheduling is of central importance for the Grid-based systems. In this paper, we model the task dispatching and selecting on the distributed Grid computing system by a multiserver multiqueue (MSMQ) model, and propose a modeling and analysis technique based on Stochastic Petri Net (SPN) methods. An approximate analysis technique is also proposed to reduce the complexity of the model.