16628287
I-NET mechanism for issuing multiple instructions
Conventional instruction issuing methods use hardware control mechanism to issue instructions in multiple-functional-unit systems. They reach physical limitations due to the complexity of issuing logic when they intend to issue multiple instruction per cycle. A method called I-NET is proposed to overcome this shortcoming. I-NET uses a postcompiler to detect the data dependencies among instructions. The detected data dependence is then attached to the instruction code to form an instruction unit that can be executed independently with other such units. These precoded instruction units are fetched from the memory and sent to functional units directly. A maximal instruction-issuing rate is achieved by avoiding a lengthy decoding procedure in the hardware. The performance study has shown I-NET to be a very promising method for exploring massive parallelism of a program in a multiple-functional-unit system.<<ETX>>
27793990
Fail Safe Distributed Fault Diagnosis of Multiprocessor Systems
16106791
A microprocessor-controlled asynchronous circuit switching network
This paper describes an asynchronous circuit switching network for multiple-processor systems. Several circuit switching networks for various applications have been proposed and constructed. However, there are problems associated with these networks. The asynchronous circuit switching network possesses several features that can solve these problems. A three-stage fully connected topology is utilized to construct the network. Each switching element is functionally and physically identical and this facilitates a cost-effective LSI implementation and software development. The control structure of the switching element and the routing algorithm are re-organized to fit the asynchronous operation. The network takes advantage of low-cost microcomputers to do the distributed routing control and to implement the communication protocols. The graceful degradation characteristic in the network is provided by independent multiple paths existing between any pair of the source and the destination. A network monitor is incorporated to facilitate an adaptive routing strategy and to have the fault diagnostic capability. Three alternatives for the switching element implementation are described to demonstrate the hardware and software tradeoffs.
19123449
Operating System Kernel for a Reconfigurable Multiprocessor System
15881866
Performance analysis of circuit switching, baseline interconnection networks
Performance evaluation, using both analytical and simulation models, of circuit switching baseline networks is presented. Two configurations of the baseline networks, single and dual, are evaluated. In each configuration, two different conflict resolution strategies, drop and hold, are tried to see the performance difference. Our analytical models are based on a more realistic assumption. New analyses are given and are verified by simulation results. In single network configuration, it is shown that the drop strategy is better than the hold strategy in the case that the data transfer time is longer than 10 cycles under a high request rate. In the dual network configuration, five different communication strategies are investigated and the optimum performance level is shown to be dependent on the length of the data transfer time.
19852972
Distributed Instruction Set Computer Architecture
The Distributed Instruction Set Computer Architecture (DISC) is proposed as a fine-grained multiprocessing computer architecture. DISC uses a parallel instruction set and a distributed control mechanism to explore fine-grained, parallel processing in a multiple-functional-unit system. Multiple instructions are executed in parallel and/or out of order at the highest speed of n instructions/cycle, where n is the number of functional units. Based on this architecture, a hardware system is developed. Extensive studies were conducted on a behavioral DISC system model to investigate the performance level, the effect of program sizes, and the hardware utilization. Simulation showed that a DISC system incorporating 16 functional units can run 7.7 times faster than a single-functional-unit DISC system. >
27585937
Multi-modal Sign Icon Retrieval for Augmentative Communication
This paper addresses a multi-modal sign icon retrieval and prediction technology for generating sentences from ill-formed Taiwanese sign language (TSL) for people with speech or hearing impairments. The design and development of this PC-based TSL augmented and alternative communication (AAC) system aims to improve the input rate and accuracy of communication aids. This study focuses on 1) developing a effective TSL icon retrieval method, 2) investigating TSL prediction strategies for input rate enhancement, 3) using a predictive sentence template (PST) tree for sentence generation. The proposed system assists people with language disabilities in sentence formation. To evaluate the performance of our approach, a pilot study for clinical evaluation and education training was undertaken. The evaluation results show that the retrieval rate and subjective satistactory level for sentence generation was significantly improved.
206015400
Genetic-algorithm-based real-time task scheduling with multiple goals
This paper presents and evaluates a new method for real-time task scheduling in multiprocessor systems. Its objectives are to minimize the number of processors required and the total tardiness of tasks. The minimization is carried out through a multiobjective genetic algorithm (GA), because the problem has non-commensurable and competing objectives to be optimized. The experimental results showed that when compared to five methods used previously, such as list-scheduling algorithms and a specific GA, the performance of our algorithm was comparable or better for 178 out of 180 randomly generated task graphs. Also shown is the impact of the sparsity of a task graph on the performance of our algorithm.
40872599
Timestamp consistency and trace-driven analysis for distributed parallel systems
A continuous stream of event data describing the progress of parallel program execution is realized for trace-driven analysis. Unfortunately, it is often the case that separate streams are produced independently by multiple processors in the system, and the logical order of events cannot be guaranteed due to discrepancy among local clocks. We present an integrated approach for timestamp consistency and performance analysis techniques for IBM SPn systems. The trace facility requires no source code modification, and can generate message passing and system events with minimal trace overhead. Trace-driven analysis tools are developed to extract useful information. Analysis results for NAS kernel benchmarks are reported.<<ETX>>
8586136
Emotion recognition using acoustic features and textual content
The paper presents an approach to emotion recognition from speech signals and textual content. In the analysis of speech signals, thirty-three acoustic features are extracted from the speech input. After principle component analysis (PCA), 14 principle components are selected for discriminative representation. In this representation, each principle component is the combination of the 33 original acoustic features and forms a feature subspace. Support vector machines (SVMs) are adopted to classify the emotional states. In text analysis, all emotional keywords and emotion modification words are manually defined. The emotion intensity levels of emotional keywords and emotion modification words are estimated from a collected emotion corpus. The final emotional state is determined based on the emotion outputs from the acoustic and textual approaches. The experimental result shows that the emotion recognition accuracy of the integrated system is better than each of the two individual approaches.
13639457
On the independence of Boolean functions
Boolean functions are widely used because they can be used to precisely describe logical circuits. Properties of Boolean functions with respect to their applications to cryptography have been studied, but relationship between Boolean functions are rarely studied. This paper studies the independence of Boolean functions, gives necessary and sufficient conditions for judging whether two given Boolean functions are independent. Some enumeration formulae are given.