9924413
On a unified architecture for video-on-demand services
Current video-on-demand (VoD)) systems can be classified into two categories: 1) true-Voll) (TVoD) and 2) near-VoD (NVod)). TVoD systems allocate a dedicated channel for every user to achieve short response times so that the user can select what video to play, when to play it, and perform interactive VCR-like controls at will. By contrast, NVoD systems transmit videos repeatedly over multiple broadcast or multicast channels to enable multiple users to share a single video channel so that system cost can be substantially reduced. The tradeoffs are limited video selections, fixed playback schedule, and limited or no interactive control. TVoD systems can be considered as one extreme where service quality is maximized, while NVoD systems can be considered as the other extreme where system cost is minimized. This paper proposes a novel architecture called Unified VoD) (UVoD) that can be configured to achieve cost-performance tradeoff anywhere between the two extremes (i.e., TVoD and NVoD). Assuming that a video client can concurrently receive two video channels and has local buffers for caching a portion of the video data, the proposed UVoD architecture can achieve significant performance gains (e.g., 400% more capacity for a 500-channel system) over TVoD under the same latency constraint. This paper presents the UVoD architecture, establishes a performance model, and analyzes UVoD's performance via numerical and simulation results.
7513516
A monotonic-decreasing rate scheduler for variable-bit-rate video streaming
Variable-bit-rate (VBR) encoded videos can provide a more consistent visual quality than constant-bit-rate (CBR) encoded videos. However, the long-range bit-rate variations in VBR videos make it difficult to efficiently provide quality-of-service control in a video-on-demand system. Existing scheduling algorithms such as Optimal Smoothing, which requires both downward and upward bandwidth reallocations to adapt to the video bit-rate variations, simply cannot guarantee video delivery in networks with mixed video and data traffic. This study tackles this limitation by investigating a new scheduling algorithm with monotonic-decreasing rate allocations for scheduling video data transmissions. By eliminating upward bandwidth reallocations, the proposed scheduler can guarantee video delivery even in the presence of other data traffic in the same network. Moreover, results show that the proposed scheduler can achieve such performance guarantee without tradeoff in performance or resource requirements. This work presents this new monotonic-decreasing rate scheduler, analyzes its fundamental properties, and evaluates its performance using a large number of real-world VBR video traces (274 DVD movies) in extensive trace-driven simulations.
14452578
Automatically mapping code on an intelligent memory architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high performance with this type of architecture, code needs to be partitioned and scheduled such that each section is assigned to the processor on which it runs most efficiently. In addition, the two processors should overlap their execution as much as possible. With our algorithm, applications are mapped fully automatically using both static and dynamic information. Using a set of standard applications and a simulated architecture, we show average speedups of 1.7 for numerical applications and 1.3 for nonnumerical applications over a single host with plain memory. The speedups are very close and often higher than ideal speedups on a more expensive multiprocessor system composed of two identical host processors. Our work shows that heterogeneity can be cost-effectively exploited and represents one step toward effectively mapping code on intelligent memory systems.
7460855
Automatic Code Mapping on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a high-end host processor and a simpler memory processor. To achieve high performance with this type of architecture, the code needs to be partitioned and scheduled such that each section is assigned to the processor on which it runs most efficiently. In addition, the two processors should overlap their execution as much as possible. With our algorithm, applications are mapped fully automatically using both static and dynamic information. Using a set of standard applications and a simulated architecture, we obtain average speedups of 1.7 for numerical applications and 1.2 for nonnumerical applications over a single host with plain memory. The speedups are very close and often higher than ideal speedups on a more expensive multiprocessor system composed of two identical host processors. Our work shows that heterogeneity can be cost-effectively exploited and represents one step toward effectively mapping code on heterogeneous intelligent memory systems.
346657
A Virtual-Physical On-Chip Cache for Shared Memory Multiprocessors
12522566
Real Time Video Data Mining for Surveillance Video Streams
We extend our previous work [1] of the general framework for video data mining to further address the issue such as how to mine video data using motions in video streams. To extract and characterize these motions, we use an accumulation of quantized pixel differences among all frames in a video segment. As a result, the accumulated motions of segment are represented as a two dimensional matrix. Further, we develop how to capture the location of motions occurring in a segment using the same matrix generated for the calculation of the amount. We study how to cluster those segmented pieces using the features (the amount and the location of motions) we extract by the matrix above. We investigate an algorithm to find whether a segment has normal or abnormal events by clustering and modeling normal events, which occur mostly. In addition to deciding normal or abnormal, the algorithm computes Degree of Abnormality of a segment, which represents to what extent a segment is distant to the existing segments in relation with normal events. Our experimental studies indicate that the proposed techniques are promising.
10444660
A Monitoring Sensor Management System for Grid Environments
Large distributed systems such as Computational Grids require a large amount of monitoring data be collected for a variety of tasks such as fault detection, performance analysis, performance tuning, performance prediction, and scheduling. Ensuring that all necessary monitoring is turned on and that data is being collected can be a very tedious and error-prone task. We have developed an agent-based system to automate the execution of monitoring sensors and the collection of event data.