14515232
An investigation of the approach to specification-based program review through case studies
Software review is an effective means to enhance the quality of software systems. However, traditional review methods emphasize the importance of the way to organize reviews and rely on the quality of the reviewers' experience and personal skills. In this paper we propose a new approach to rigorously reviewing programs based on their formal specifications. The fundamental idea of the approach is to use a formal specification as a standard to check whether all the required functions and properties in the specification are correctly implemented by its program. To help investigate the effectiveness and the weakness of the approach, we conduct two case studies of reviewing two program systems that implement the same formal specification of "A Research Management Policy" using different strategies, and present the evaluation of the case studies. The results show that the review approach is effective in detecting faults when the reviewer is different from the programmer, but less effective when the reviewer is the same as the programmer.
36526611
Formal Engineering for Industrial Software Development - An Introduction to the SOFL Specification Language and Method
Formal methods have been developed as a rigorous approach to computer systems development over last three decades, but have been facing challenges in fighting for industrial acceptance in general. Most commonly used formal methods do not offer comprehensible structuring mechanism for building complex systems; formal refinement is not sufficient to deal with real development situations; and formal verification requires high skills and is time-intensive, and is therefore expensive to be adopted by industry.
10225840
Generating test data from SOFL specifications
Abstract Software testing can only be formalized and quantified when a solid basis for test generation can be defined. Tests are commonly generated from the source code, control flow graphs, design representations, and specifications/requirements. Formal specifications represent a significant opportunity for testing because they precisely describe what functions the software is supposed to provide in a form that can be easily manipulated. This paper presents a new method for generating tests from formal specifications. This method is comprehensive in specification coverage, applies at several levels of abstraction, and can be highly automated. The paper applies the method to SOFL specifications, describes the technique, and demonstrates the application on a case study. A preliminary evaluation using a code-level coverage criterion (mutation testing), indicates that the method can result in very effective tests.
719681
Feature competition in a spike-based winner-take-all VLSI network
Recurrent networks and hardware analogs that perform a winner-take-all computation have been studied extensively. This computation is rarely demonstrated in a spiking network of neurons receiving input spike trains. In this work, we demonstrate this computation not only within a VLSI network but also across networks of integrate-and-fire neurons in a feature competition task. The chip has four populations of neurons receiving input spike trains that represent the outputs of four feature maps. The connectivity within each population is configured so that all the neurons compete with one another. In addition, a second level of competition, which we call the feature competition, can be introduced between all populations (or feature maps). The two levels of competition are useful in a system that has to select both the locations of relevant features and the best feature map that is coded in an input stimulus. The selection process can be completed as fast as after two input spikes
6818133
AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems
A 5-layer neuromorphic vision processor whose components communicate spike events asychronously using the address-event-representation (AER) is demonstrated. The system includes a retina chip, two convolution chips, a 2D winner-take-all chip, a delay line chip, a learning classifier chip, and a set of PCBs for computer interfacing and address space remappings. The components use a mixture of analog and digital computation and will learn to classify trajectories of a moving object. A complete experimental setup and measurements results are shown.
18927685
Developing Quality Software Systems Using the SOFL Formal Engineering Method
Formal Engineering Methods are a bridge from Formal Methods to industrial applications. In this paper I describe the relation between formal engineering methods and formal methods, and present a specific formal engineering method SOFL (Structured Object-Oriented Formal Language) for developing quality software systems. I explain how SOFL can be applied in practice through examples.
10513438
Orientation-Selective aVLSI Spiking Neurons
We describe a programmable multi-chip VLSI neuronal system that can be used for exploring spike-based information processing models. The system consists of a silicon retina, a PIC microcontroller, and a transceiver chip whose integrate-and-fire neurons are connected in a soft winner-take-all architecture. The circuit on this multi-neuron chip approximates a cortical microcircuit. The neurons can be configured for different computational properties by the virtual connections of a selected set of pixels on the silicon retina. The virtual wiring between the different chips is effected by an event-driven communication protocol that uses asynchronous digital pulses, similar to spikes in a neuronal system. We used the multi-chip spike-based system to synthesize orientation-tuned neurons using both a feedforward model and a feedback model. The performance of our analog hardware spiking model matched the experimental observations and digital simulations of continuous-valued neurons. The multi-chip VLSI system has advantages over computer neuronal models in that it is real-time, and the computational time does not scale with the size of the neuronal network.