33855802
Synthesizing efficient out-of-core programs for block recursive algorithms using block-cyclic data distributions
This paper presents a framework for synthesizing I/O-efficient out-of-core programs for block recursive algorithms, such as the fast Fourier transform and matrix transpositions. the programs are synthesized from tensor (Kronecker) product representations of algorithms. These programs are optimized for a striped two-level memory model where in the out-of-core data can have block-cyclic distributions on multiple disks.
1274772
Supporting persistent social groups in ubiquitous computing environments using context-aware ephemeral group service
We analyze the role of the social group in a ubiquitous computing (Ubicomp) environment as a source of contextual information. A model is presented to address the social group member's perceptions of how devices in a ubicomp environment should aid them in collaboration. Based on the model a distributed context-aware group membership management scheme is developed. We then present a prototype implementation for a context-aware ephemeral group membership management scheme, along with a sample application, and experimental results that demonstrate the feasibility of our system.
2580676
Adaptive Distributed Dynamic Channel Allocation for Wireless Networks
Channel allocation schemes in a mobile computing (wireless) environment can be either static or dynamic. Static allocation offers negligible channel acquisition time and zero message complexity and works well at a low system load; the performance steadily decreases as system load increases since many calls are dropped. In the case of even temporary hot spots many calls may be dropped by a heavily loaded switching station even when there are enough idle channels in the interference region of that station. On the other hand, dynamic schemes provide better utilization of the channels at higher loads albeit at the cost of higher channel acquisition time and some additional control messages. Our purpose in the present paper is to propose a combined channel allocation scheme so that each switching station can tune to its own load independent of other stations in its interference region; the objective is to minimize the call drop rate and at the same time maintain a minimum average channel acquisition time and minimum control message complexity.
384064
Proximity based access control in smart-emergency departments
In this paper, we propose a proximity based automated access control (PBAC) model for smart-ED environments which improves the existing ED work-flow by automating mundane administrative procedure for secure information access, allowing caregivers to focus on the treatment of patients. The proposed access model builds on the traditional role-based access control model and extends it by including multiple authentication levels for preventing unauthorized access. We also provide a semi-formal specification for the PBAC model. We further validate it using ultra-wide-band (UWB) based prototype which was tested in ED
3266186
e3D: an energy-efficient routing algorithm for wireless sensor networks
One of the limitations of wireless sensor nodes is their inherent limited energy resource. Besides maximizing the lifetime of the sensor node, it is preferable to distribute the energy dissipated throughout the wireless sensor network in order to minimize maintenance and maximize overall system performance. Any communication protocol that involves synchronization of peer nodes incurs some overhead for setting up the communication. We introduce a new algorithm, e3D (energy-efficient distributed dynamic diffusion routing algorithm), and compare it to two other algorithms, namely directed, and random clustering communication. We take into account the setup costs and analyze the energy-efficiency and the useful lifetime of the system. We compare the algorithms in terms of system lifetime, power dissipation distribution, cost of synchronization, and simplicity of the algorithm. Our simulation results show that e3D performs comparable to its optimal counterpart while having significantly less overhead.
12873659
TARA: Thermal-Aware Routing Algorithm for Implanted Sensor Networks
Implanted biological sensors are a special class of wireless sensor networks that are used in-vivo for various medical applications. One of the major challenges of continuous in-vivo sensing is the heat generated by the implanted sensors due to communication radiation and circuitry power consumption. This paper addresses the issues of routing in implanted sensor networks. We propose a thermal-aware routing protocol that routes the data away from high temperature areas (hot spots). With this protocol each node estimates temperature change of its neighbors and routes packets around the hot spot area by a withdraw strategy. The proposed protocol can achieve a better balance of temperature rise and only experience a modest increased delay compared with shortest hop, but thermal-awareness also indicates the capability of load balance, which leads to less packet loss in high load situations.
12116657
A Step Towards Automated Design of Side Actions in Injection Molding of Complex Parts
Side actions contribute to mold cost by resulting in an additional manufacturing and assembly cost as well as by increasing the molding cycle time. Therefore, generating shapes of side actions requires solving a complex geometric optimization problem. Different objective functions may be needed depending upon different molding scenarios (e.g., prototyping versus large production runs). Manually designing side actions is a challenging task and requires considerable expertise. Automated design of side actions will significantly reduce mold design lead times. This paper describes algorithms for generating shapes of side actions to minimize a customizable molding cost function.
6957855
Random pattern testable logic synthesis
Previous procedures for synthesis of testable logic guarantee that all faults in the synthesized circuits are detectable. However, the detectability of many faults in these circuits can be very low leading to poor random pattern testability. A new procedure to perform logic synthesis that synthesizes random pattern testable multilevel circuits is proposed. Experimental results show that the circuits synthesized by the proposed procedure tstfx are significantly more random pattern testable and smaller than those synthesized using its counterpart fast_extract (fx) in SIS. The proposed synthesis procedure design circuits that require only simple random pattern generators in built-in self-test, thereby obviating the need for complex BIST circuitry.
16692732
Versioned Hypermedia can improve software document management
This research was supported by the U. S. Department of Defense and by NSF CAREER award CCR-9734102. The Software Concordance project is addressing the software document management problem by providing a fine-grained version control model for software documents and their relationships using hypermedia versioning. A set of tools needed to maintain, visualize and analyze software documents is being constructed. This short paper presents research issues, initial results and a scheme for using hypermedia versioning and time stamps to automate detection of possible semantic non-conformance among software artifacts.
10510913
Lower bounds on test resources for scheduled data flow graphs
Lower bound estimations of resources at various stages of high-level synthesis are essential to guide synthesis algorithms towards optimal solutions. In this paper we present lower bounds on the number of test resources (i.e. test pattern generators, signature analyzers and CBILBO registers) required to test a synthesized data path using built-in self-test (BIST). The estimations are performed on scheduled data flow graphs and provide a practical way of selecting or modifying module assignments and schedules such that the resulting synthesized data path requires a small number of test resources to test itself.
6969070
Micro planning for mechanical assembly operations
Significant advances have been made in the area of macro-planning for assembly operations (i.e.,, dividing a product into sub-assemblies, determining the sequence of assembly operations). On the contrary, the state of the art in micro-planning (i.e., tool selection, path planning for tool and part movements) is rather primitive. To generate a realizable assembly plan, both macro-planning and micro-planning problems need to be solved. Tooling considerations are an important component of the micro-planning problem. Therefore, we present a methodology for modeling assembly tools, selecting tools for assembly operations, and generating detailed tool movements. Techniques described in this paper can be combined with macro-planning techniques to result in a complete assembly planner.