3457072
Using UML 2.0 for system level design of real time SoC platforms for stream processing
While enabling fast implementation and reconfiguration of stream applications, programmable stream processors expose issues of incompatibility and lack of adoption in existing stream modeling languages. To address them we describe a design approach in which specifications are captured in UML 2.0, and automatically translated into SystemC models consisting of simulators and synthesizable code under proper style constraints. As an application case, we explain real time stream processor specifications using new UML 2.0 notations. Then we expound how our translator generates SystemC models and includes additional hardware details. Verifications are made during UML execution as well as assertions in SystemC. The case study demonstrates the feasibility of fast specifications, modifications and generation of real time stream processor designs.
5375170
Fast evaluation of the elementary functions in double precision
One of the most spectacular development in computer technology is the growth in memory density and speed. It is with this development in mind that we intend to tackle the old problem of computing the elementary functions. Since the dawn of computing, the fast and accurate computation of the elementary functions has been a constant concern of numerical computing. It now seems possible to use tables of sizes in the range of megabits to aid in such computation. To this end, in this paper, we propose a method called ATA-M (Add-Table Lookup-Add with Multiplication) for evaluating polynomials with the aid of tables. When applied to the elementary functions, we obtained a set of algorithms which computes the reciprocal, square root, exponential, sine, cosine, logarithm, are tangent and the hyperbolic functions in about 3 to 4 double precision floating point multiplication time and utilizing about 2 Mbyte of tables.<<ETX>>
9691799
Targeted Data Prefetching
Given the increasing gap between processors and memory, prefetching data into cache becomes an important strategy for preventing the processor from being starved of data. The success of any data prefetching scheme depends on three factors: timeliness, accuracy and overhead. In most hardware prefetching mechanism, the focus has been on accuracy – ensuring that the predicted address do turn out to be demanded in a later part of the code. In this paper, we introduce a simple hardware prefetching mechanism that targets delinquent loads, i.e. loads that account for a large proportion of the load misses in an application. Our results show that our prefetch strategy can reduce up to 45% of stall cycles of benchmarks running on a simulated out-of-order superscalar processor with an overhead of 0.0005 prefetch per CPU cycle.
1841047
Design and Implementation of Abstract Machine for Parallel Lisp Compilation
18143878
Compiling Parallel Lisp for a Shared Memory Multiprocessor
There is a commonly held idea that although Lisp is a good language for prototyping and software development, it is often too inefcient to be useful in actual implementation. Advances in compiling Lisp have begun to change this notion. However, the situation is less clear in the case of parallel Lisp dialects. In this paper, we report on our experience in implementing a compiler for a parallel Lisp dialect we called BaLinda Lisp for a shared memory multiprocessor. For a class of problems, our compiler was able to achieve performances on Lisp programs that are near, if not equal to, their imperative (C) equivalents. However, on other problems, the situation is less than ideal. We investigate this phenomenum and outline the future challenges in realizing a production strength parallel Lisp compiler.
15634785
The performance model of SilkRoad - a multithreaded DSM system for clusters
Distributed Shared Memory (DSM) is a highly desirable programming model for cluster based computing. Even though a number of software DSMs have been developed with their performance evaluated, few of them have a theoretical performance model. In this paper, we propose and analyze the performance model of the software DSM of SilkRoad,, a multithreaded runtime system for cluster computing. SilkRoad is built on the Cilk system with an extended memory consistency model which we call RC/sub dag/ consistency: Extending Cilk's theoretical performance model, we show that with the RC/sub dag/ consistent DSM, the expected execution.time T/sub P/ of a partially strict multithreaded computation on P processors is O((T/sub 1/(Z, L) + N)/P + /spl mu/HT/sub /spl infin//), where T/sub 1/(Z, L) is the total work of computation, T/sub /spl infin// is the critical path, N is the number of lock acquisitions, /spl mu/ is the service time of a cache miss, and H is the height of memory: Finally, we present experimental evidence that verify the performance model.
38190971
Modeling and Analysis of Performance Aspects for Software Architecture: a Uml-based Approach
Much attention has been focused on the problem of effectively designing software architecture to meet non-functional requirements (NFRs). The significant benefits of such work include detecting and removing defects earlier, which reduces development time and cost while improving the quality of the design; in turn the improved quality of the design makes it easier to maintain as the system evolves. The Formal Design Analysis Framework (FDAF) is an aspect-oriented approach proposed to support the design and analysis of multiple NFRs for distributed, concurrent, and real-time systems. In FDAF, non-functional requirements are realized and represented as reusable aspects in the repository; designs are captured in an extended version of the Unified Modeling Language (UML). FDAF supports the automated translation of extended UML designs into existing formal notations. Subsequently, the analysis of an aspect design is achieved using existing formal analysis tools, which leverages a large body of work in the research community. This paper focuses on the modeling and analysis of the response time performance aspect. The algorithms for translating extended UML diagrams into Rapide, the proofs of correctness for the algorithms, and an illustration of the FDAF approach using the Domain Name System are presented.
1021507
Augmented vessels for quantitative analysis of vascular abnormalities and endovascular treatment planning
Endovascular treatment plays an important role in the minimally invasive treatment of patients with vascular diseases, a major cause of morbidity and mortality worldwide. Given a segmentation of an angiography, quantitative analysis of abnormal structures can aid radiologists in choosing appropriate treatments and apparatuses. However, effective quantitation is only attainable if the abnormalities are identified from the vasculature. To achieve this, a novel method is developed, which works on the simpler shape of normal vessels to identify different vascular abnormalities (viz. stenotic atherosclerotic plaque, and saccular and fusiform aneurysmal lumens) in an indirect fashion, instead of directly manipulating the complex-shaped abnormalities. The proposed method has been tested on three synthetic and 17 clinical data sets. Comparisons with two related works are also conducted. Experimental results show that our method can produce satisfactory identification of the abnormalities and approximations of the ideal post-treatment vessel lumens. In addition, it can help increase the repeatability of the measurement of clinical parameters significantly
1563584
An empirical study of the correlation between code coverage and reliability estimation
Existing time-domain models for software reliability often result in an overestimation, of such reliability because they do not take the nature of testing techniques into account. Since every testing technique has a limit to its ability to reveal faults in a given system, as a technique approaches its saturation region fewer faults are discovered and reliability growth phenomena are predicted from the models. When the software is turned over to field operation, significant overestimates of reliability are observed. We present a technique to solve this problem by addressing both time and coverage measures for the prediction of software failures. Our technique uses coverage information collected during testing to extract only effective data from a given operational profile. Execution time between test cases which neither increase coverage nor cause a failure as reduced by a parameterized factor. Experiments using this technique were conducted on a program created in a simulation environment with simulated faults and on an industrial automatic flight control project which contained several natural faults. Results from both experiments indicate that overestimation of reliability is reduced significantly using our technique. This new approach not only helps reliability growth models make more accurate predictions, but also reveals the efficiency of a testing profile so that more effective testing techniques can be conducted.
206134104
Coverage testing software architectural design in SDL
Statistical data analysis shows that early fault detection can cut cost significantly. With improved technology for automatic code generation from architectural design specifications, it becomes even more important to have, from the beginning, a highly reliable and dependable architectural design. To ensure this, we have to predict the "quality" of the system early in the development process. The use of traces or execution histories as an aid to testing and analysis is well established for programming languages like C and C++, but it is rarely applied in the field of software specification for designs. We propose a solution by applying our technology at source code level to coverage testing software designs represented in a high-level specification and description language such as SDL. Sophisticated dominator analysis is applied to provide hints on how to generate efficient test cases to increase, as much as possible with as few tests as possible, the control-flow- and data-flow-based coverage of the SDL specification being tested. We extend source code-based coverage testing to the software design specification level for specification validation. A coverage analysis tool, CATSDL, with user-friendly interfaces was developed to support our method. An illustration is provided to demonstrate the feasibility of using our method to validate the architectural design efficiently in terms of higher testing coverage and lower cost.
18768398
Coverage testing of Java programs and components
Although software testing is a crucial activity in the software development process, only recently have more sound and consistent testing tools become available for testing Java programs and their components. These tools support mostly functional and control-flow based structural criteria. In this paper we explore control-flow and data-flow based coverage criteria to support the testing of Java programs and/or components. We also describe a testing tool, named JaBUTi, which can be used by both the component developer and the component user to test Java-based components and/or systems. To achieve this goal, the tool works at the bytecode level such that no source code is required during the testing activity. We illustrate these ideas and concepts with an example extracted from the literature.