36301624
Some results on integral sum graphs
Abstract Let Z denote the set of all integers. The integral sum graph of a finite subset S of Z is the graph (S,E) with vertex set S and edge set E such that for u,v∈S, uv∈E if and only if u+v∈S . A graph G is called an integral sum graph if it is isomorphic to the integral sum graph of some finite subset S of Z . The integral sum number of a given graph G , denoted by ζ(G) , is the smallest number of isolated vertices which when added to G result in an integral sum graph. Let ⌈x⌉ denote the least integer not less than the real x . In this paper, we (i) determine the value of ζ(K n −E(K r )) for r⩾⌈2n/3⌉−1 , (ii) obtain a lower bound for ζ(K n −E(K r )) when 2⩽r and n⩾5 , showing by construction that the bound is sharp when r=2 , and (iii) determine the value of ζ(K r,r ) for r⩾2 . These results provide partial solutions to two problems posed by Harary (Discrete Math. 124 (1994) 101–108). Finally, we furnish a counterexample to a result on the sum number of K r,s given by Hartsfiedl and Smyth (Graphs and Matrices, R. Rees (Ed.), Marcel, Dekker, New York, 1992, pp. 205–211).
20672183
An Algorithm to Construct k-Regular k-Connected Graphs with the Maximum k-Diameter
Abstract. Let f(2m,k) be the Maximum k-diameter of k-regular k-connected graphs on 2m vertices. In this paper we give an algorithm and prove that we can construct k-regular k-connected graphs on 2m vertices with the maximum k-diameter using it. We also prove some known results about f(2m,k) and verify that we can get some unknown values of f(2m,k) by our algorithm.
31342656
The Counting Series for Unlabeled Linear Acyclic Hypergraphs
36855127
Some inequalities about connected domination number
Abstract Let G = ( V , E ) be a graph. In this note, γ c , ir, γ, i, β 0 , Γ, IR denote the connected domination number, the irredundance number, the domination number, the independent domination number, the independence number, the upper domination number and the upper irredundance number, respectively. We prove that γ c ⩽ 3 ir − 2 for a connected graph G . Thus, an open problem in Hedetniemi and Laskar (1984) discuss further some relations between γ c and γ, β 0 , Γ, IR, respectively.
31833569
The kth Lower Multiexponent of Tournament Matrices
10079260
The sum number and integral sum number of complete bipartite graphs
Let N denote the set of positive integers. The sum graph G + (S) of a 1nite subset S of N is the graph (S; E) with vertex set S and edge set E such that for u; v ∈ S; uv ∈ E if and only if u + v ∈ S. A graph G is called a sum graph if it is isomorphic to the sum graph G + (S) of some 1nite subset S of N . The sum number � (G) of a graph G is de1ned as the smallest nonnegative integer m for which G ∪ mK1 is a sum graph. Let Z be the set of all integers. By extending the set N to Z in the above de1nitions of sum graphs and sum numbers, Harary [3] introduced the corresponding notions of integral sum graphs and integral sum number of a graph. In this paper, we evaluate the value of the sum number and integral sum number of the complete bipartite graph Kr; s. While the former one corrects the result given in [4], the latter settles completely a problem proposed in [3]. c � 2001 Elsevier Science B.V. All rights reserved.
863906
Per-Flow Queueing by Dynamic Queue Sharing
Per-flow queuing is believed to be able to guarantee advanced Quality of Service (QoS) for each flow. With the dramatic increase of link speed and number of traffic flows, per-flow queuing faces a great challenge since millions of queues need to be maintained for implementation in a traditional sense. In this paper, by setting only a small number of physical queues, we propose a Dynamic Queue Sharing (DQS) mechanism to achieve an equal performance to the pure per-flow queuing with a lower cost. The proposed mechanism is based on an interesting fact that the number of simultaneous active flows in the router buffer is far less than that of in-progress flows. In DQS, a physical queue is dynamically created on-demand when a new flow comes and then dynamically released when the flow temporarily pauses. Hashing and binary sorting tree (or linked list) are combined to manage the mapping between flows and queues, so as to isolate flows in different queues. Theoretical analysis and traces experiments are conducted to evaluate DQS. The results demonstrate that when the parameters are well set, the operation delay is less than two time cycles in average with an extra memory of 16k bits.
14245590
RED with optimized dynamic threshold deployment on shared buffer
Prior survey of RED algorithm deployment on multiqueue system with shared buffer was unfair and sensitive to congestion level by statically setting the parameters. In this paper, our goal is to deploy the Random Early Detection (RED) algorithm in routers on shared buffer and solve these problems. A novel buffer management scheme that dynamically adjusts the parameters of RED named RED-ODT is proposed. Simulations under uniform traffic load and nonuniform traffic load are given, the results of which ascertain and demonstrate the superiority of the proposed scheme in terms of low packet drop ratio, satisfying buffer utilization and fairness. Simulation also shows that RED-ODT is insensitive to congestion level.
1727263
A study of networks simulation efficiency: fluid simulation vs. packet-level simulation
Network performance evaluation through traditional packet-level simulation is becoming increasingly difficult as today's networks grow in scale along many dimensions. As a consequence, fluid simulation has been proposed to cope with the size and complexity of such systems. This study focuses on analyzing and comparing the relative efficiencies of fluid simulation and packet-level simulation for several network scenarios. We use the "simulation event" rate to measure the computational effort of the simulators and show that this measure is both adequate and accurate. For some scenarios, we derive analytical results for the simulation event rate and identify the major factors that contribute to the simulation event rate. Among these factors, the "ripple effect" is very important since it can significantly increase the fluid simulation event rate. For a tandem queueing system, we identify the boundary condition to establish regions where one simulation paradigm is more efficient than the other. Flow aggregation is considered as a technique to reduce the impact of the "ripple effect" in fluid simulation. We also show that WFQ scheduling discipline can limit the "ripple effect", making fluid simulation particularly well suited for WFQ models. Our results show that tradeoffs between parameters of a network model determines the most efficient simulation approach.
3063801
Iteration-Shared Scheduling Algorithms Abolishing the Departure-Time-Compatible Graph in Switch-Memory-Switch Switches
Switch-Memory-Switch (SMS) architecture exhibits an excellent performance due to its emulating the Output Queueing structure. However, in order to achieve the maximal matching, the first stage scheduling operates at a huge computational complexity, which blocks the SMS from practical implementation. In order to put SMS into more effective industrial applications, especially in super-large size switches/routers with multi-services environment, two parallel iterative scheduling algorithms, named IS-RRM and AIS-RRM respectively, are proposed in this paper. The algorithms abolish totally the traditional departure-time-compatible (DTC) graph, and by using iteration-sharing technology, greatly reduce the required iteration number in each time slot. Using a discrete-time Markov chain to model the AIS-RRM algorithm, we obtain its upper bound of cell loss rate. Meanwhile, experimental and theoretical results show that so long as the number of shared memories is twice the switch size, AIS-RRM algorithm can achieve a cell loss rate of 10 when the input buffer size is 15 and the iteration number of each time slot is 6, despite the arrival traffic pattern and the switch size. Furthermore, the iteration number required in each time slot can be further decreased by increasing the input buffer size.
5760901
Statistical gate delay calculation with crosstalk alignment consideration
We study gate delay variation caused by crosstalk aggressor alignment, i.e., difference of signal arrival times in coupled neighboring interconnects. This effect is as significant as multiple-input switching on gate delay variation [2]. We establish a functional relationship between driver gate delay and crosstalk alignment by deterministic circuit simulation, and derive closed form formulas for statistical distributions of driver gate delay and output signal arrival time.Our proposed method can be smoothly integrated into a static timing analyzer, which runtime is dominated by sampling deterministic delay calculation, while probabilistic computation and updating take constant time. Our experimental results on 70nm technology global interconnect structures and 130nm technology industry designs show respectively 159:4% and 147:4% differences in mean and standard deviation of gate delay without crosstalk aggressor alignment consideration, while our method gives within 2:57% and 3:86% offset in gate output signal arrival time mean and standard deviation, respectively.