6353139
Static placement, dynamic issue (SPDI) scheduling for EDGE architectures
Technology trends present new challenges for processor architectures and their instruction schedulers. Growing transistor density increases the number of execution units on a single chip, and decreasing wire transmission speeds causes long and variable on-chip latencies. These trends severely limit the two dominant conventional architectures: dynamic issue superscalars, and static placement and issue VLIWs. We present a new execution model in which the hardware and static scheduler instead work cooperatively, called static placement dynamic issue (SPDI). This paper focuses on the static instruction scheduler for SPDI. We identify and explore three issues SPDI schedulers must consider - locality, contention, and depth of speculation. We evaluate a range of SPDI scheduling algorithms executing on an explicit data graph execution (EDGE) architecture. We find that a surprisingly simple one achieves an average of 5.6 instructions-per-cycle (IPC) for SPEC2000 64-wide issue machine, and is within 80% of the performance without on-chip latencies. These results suggest that the compiler is effective at balancing on-chip latency and parallelism, and that the division of responsibilities between the compiler and the architecture is well suited to future systems.
5795237
The portable parallel implementation of two novel mathematical biology algorithms in ZPL
This paper shows that mathematical models of biological pattern formation are ideally suited to data parallelism. We present two new algorithms, one for simulating the dynamic structure of fibroblasts, and the other for studying the self-organization of motile bacteria. We describe implementations of these algorithms using a high level data parallel language called ZPL, and we give performance results for the Kendall Square Research KSR-2 and the Intel Paragon that include comparisons against sequential Fortran.
7870525
Adaptive History-Based Memory Schedulers
As memory performance becomes increasingly important to overall system performance, the need to carefully schedule memory operations also increases. This paper presents a new approach to memory scheduling that considers the history of recently scheduled operations. This history-based approach provides two conceptual advantages: (1) it allows the scheduler to better reason about the delays associated with its scheduling decisions, and (2) it allows the scheduler to select operations so that they match the program's mixture of Reads and Writes, thereby avoiding certain bottlenecks within the memory controller. We evaluate our solution using a cycle-accurate simulator for the recently announced IBM Power5. When compared with an in-order scheduler, our solution achieves IPC improvements of 10.9% on the NAS benchmarks and 63% on the data-intensive Stream benchmarks. Using microbenchmarks, we illustrate the growing importance of memory scheduling in the context of CMP's, hardware controlled prefetching, and faster CPU speeds.
9009444
A Portable Parallel N-Body Solver
We present parallel solutions for direct and fast n-body solvers written in the ZPL language. We describe the direct solver, compare its performance against a sequential C program, and show performance results for two very different parallel machines; the KSR-2 and the Paragon. We also discuss the implementation of the fast solver in ZPL, including factors pertinent to data movement.
15307682
Accommodating polymorphic data decompositions in explicitly parallel programs
Explicitly parallel programs have the potential for greater performance than their implicitly parallel counterparts. However, this benefit can be accompanied by additional programming difficulties. We address one particular problem that has implications for both scalability and portability: the need for programs do accommodate diverse data decompositions. We explain why programs with explicit communication have difficulties in handling changes in data decomposition, and we present a solution to this problem which involves the notions of derivative functions and configuration parameters. We illustrate the technique by using three different data decompositions to solve the Modified Gram-Schmidt method on four parallel machines.<<ETX>>
27000155
Towards a Machine-Independent Solution of Sparse Cholesky Factorization
1207322
Dynamic integrated scheduling of hard real-time, soft real-time, and non-real-time processes
Real-time systems are growing in complexity and real-time and soft real-time applications are becoming common in general-purpose computing environments. Thus, there is a growing need for scheduling solutions that simultaneously support processes with a variety of different timeliness constraints. Toward this goal we have developed the resource allocation/dispatching (RAD) integrated scheduling model and the rate-based earliest deadline (RBED) integrated multi-class real-time scheduler based on this model. We present RAD and the RBED scheduler and formally prove the correctness of the operations that RBED employs. We then describe our implementation of RBED and present results demonstrating how RBED simultaneously and seamlessly supports hard real-time, soft real-time, and best-effort processes.
43748451
The Use of External Knowledge of Factoid QA
This paper describes recent development in the Webclopedia QA (Question Answering) system, focusing on the use of knowledge resources such as WordNet and a QA typology to improve the basic operations of candidate answer retrieval, ranking, and answer matching.
15949067
Security authentication of 3G-WLAN interworking
With the development of wireless Internet, the interworking of the third generation (3G) wide area wireless networks and wireless local area networks (WLAN) has become a focus of research. 3G systems have their advantages in charging management, roaming, and security facilities, and WLAN systems have the advantages of high bandwidth and low investment cost. Interworking of 3G-WLAN offers characteristics that complement each other perfectly. Several authentication protocols have been proposed to improve security. In this paper, we firstly introduce the architectures of 3G-WLAN interworking and discuss existing problems related to authentication and key agreement procedures. Then, we present two schemes by applying authentication based on EAP-TLS (extensible authentication protocol-transport layer security) and EAP-TTLS (tunneled TLS) into integrated 3G and WLAN to achieve high end-to-end security and authentication for the users. Finally, we conduct a series of performance evaluation on the energy consumption and latency of standard authentication protocols.
37670445
Drawing Graphs with Nonuniform Nodes Using Potential Fields
A potential field approach, coupled with force-directed methods, is proposed in this paper for drawing graphs with nonuniform nodes in 2-D and 3-D. In our framework, nonuniform nodes are uniformly or nonuniformly charged, while edges are modelled by springs. Using certain techniques developed in the field of potential-based path planning, we are able to find analytically tractable procedures for computing the repulsive force and torque of a node in the potential field induced by the remaining nodes. Our experimental results suggest this new approach to be promising, as drawings of good quality for a variety of graphs in 2-D and 3-D can be produced efficiently.
16836522
Real-time gang schedulings with workload models for parallel computers
Gang scheduling has been shown to be an effective job scheduling policy for parallel computers that combines elements of space sharing and time sharing. We propose new policies to enable gang scheduling to adapt to environments with real-time constraints. Our work, to our best knowledge, is the first work to attempt to address the real-time aspects of gang scheduling. Our system guided by a metric, called "task utilization workload", can schedule both real-time and non-real-time tasks at the same time. We report simulation results with a family of scheduling algorithms based on our proposed metric. Our scheme is designed to be a practical scheme to be used for large scale industrial and commercial parallel systems. Preliminary simulation results also show that our proposed policy is an effective scheme to perform real-time scheduling, while scheduling non-real-time jobs with fairness and good throughput.