16235334
Illumination-Invariant Motion Detection Using Colour Mixture Models
This paper tackles the problem of robust change detection in image sequences from static cameras. Motion cues are detected using frame differencing with an adaptive background estimation modelled by a mixture of Gaussians. Illumination invariance and elimination or detection of shadows is achieved by using a colour chromaticity representation of the image data. The combination of the colourand intensity-based models results in some promising applications.
7647514
Tracking football players with multiple cameras
A system is described for tracking the positions of football players during a match. The input is eight video streams from static cameras, each processed to generate measurements of the players for a multi view tracker. The single view processing includes foreground detection and a bounding box tracker designed to split measurements of merged players. In the multi-view process, the measurements, each from a different camera and matched to the same player, are fused into an overall measurement which is then used in the estimate updating. Results are demonstrated on real data.
39351233
Note on Infinite Families of Trivalent Semisymmetric Graphs
A simple undirected graph is said to be semisymmetric if it is regular and edge-transitive but not vertex-transitive. This paper uses the groups PSL (2, p) and PGL (2, p), where p is a prime, to construct two new infinite families of trivalent semisymmetric graphs.
11401451
A regulated transitive reduction (RTR) for longer memory race recording
Now at VMware. Multithreaded deterministic replay has important applications in cyclic debugging, fault tolerance and intrusion analysis. Memory race recording is a key technology for multithreaded deterministic replay. In this paper, we considerably improve our previous always-on Flight Data Recorder (FDR) in four ways: •Longer recording by reducing the log size growth rate to approximately one byte per thousand dynamic instructions. •Lower hardware cost by reducing the cost to 24 KB per processor core. •Simpler design by modifying only the cache coherence protocol, but not the cache. •Broader applicability by supporting both Sequential Consistency (SC) and Total Store Order (TSO) memory consistency models (existing recorders support only SC).These improvements stem from several ideas: (1) a Regulated Transitive Reduction (RTR) recording algorithm that creates stricter and vectorizable dependencies to reduce the log growth rate; (2) a Set/LRU timestamp approximation method that better approximates timestamps of uncached memory locations to reduce the hardware cost; (3) an order-value-hybrid recording methodthat explicitly logs the value of potential SC-violating load instructions to support multiprocessor systems with TSO.
1185541
A serializability violation detector for shared-memory server programs
We aim to improve reliability of multithreaded programs by proposing a dynamic detector that detects potentially erroneous program executions and their causes. We design and evaluate a Serializability Violation Detector (SVD) that has two unique goals: (I) triggering automatic recovery from erroneous executions using backward error recovery (BER), or simply alerting users that a software error may have occurred; and (II) helping debug programs by revealing causes of error symptoms.Two properties of SVD help in achieving these goals. First, to detect only erroneous executions, SVD checks serializability of atomic regions, which are code regions that need to be executed atomically. Second, to improve usability, SVD does not require a priori annotations of atomic regions; instead, SVD approximates them using a heuristic. Experimental results on three widely-used multithreaded server programs show that SVD finds real bugs and reports modest false positives. The goal of this paper is to develop a detector suitable for (I) BER-based avoidance of erroneous program executions; and (II) alerting users as software errors occur. We argue that such a detector should have the following two properties.
7022714
Simulating a $2M Commercial Server on a $2K PC
As dependence on database management systems and Web servers increases, so does the need for them to run reliably and efficiently-goals that rigorous simulations can help achieve. Execution-driven simulation models system hardware. These simulations capture actual program behavior and detailed system interactions. The authors have developed a simulation methodology that uses multiple simulations, pays careful attention to the effects of scaling on workload behavior, and extends Virtutech AB's Simics full system functional simulator with detailed timing models. The Wisconsin Commercial Workload Suite contains scaled and tuned benchmarks for multiprocessor servers, enabling full-system simulations to run on the PCs that are routinely available to researchers.
19879470
The multiscale medial properties of interfering image structures
The multiscale medial axis (MMA) is a robust shape representation in analysing objects in greylevel images. It is computed as ridges in the medialness scale-space of an image. In this paper the multiscale medial properties of overlapping objects are investigated, the result of which is novel to the community in that the existing studies only concentrated on isolated objects. To improve the distinguishability of these objects, a sliding window algorithm is proposed to detect locally optimal scale ridges in scale space. When used in the medialness scale-space of an image, this efficient method can extract a complete set of MMAs for interfering objects, in contrast with the globally optimal scale ridge definition which has been widely used. This is demonstrated in the applications in medical images.