11498402
WCET analysis of instruction caches with prefetching
Instruction prefetching is an effective technique to reduce the instruction cache miss latency for improving the average-case performance. For real-time systems, however, the use of instruction prefetching will only besuitable if a reasonably tight worst-case performance of programs using instruction prefetching can be predicted. This paper presents an approach to modeling and computing the worst-case instruction cache performance with prefetching. Our experimental results indicate that instruction prefetching can benefit both the average-case and worst-case performance; however, the degree of the worst-case performance improvement due to instruction prefetching is less than that of the average-case performance, thus leading to increased time variation for real-time computing. Also, we find that the prefetching distance can significantly impact the worst-case performance analysis with instruction prefetching. Particularly, when the prefetching distance is equal to the L1 miss penalty, the worst-case execution time with instruction prefetching is minimized (i.e., optimal).
12895493
Improvement of HITS-based algorithms on web documents
In this paper, we present two ways to improve the precision of HITS-based algorithms on Web documents. First, by analyzing the limitations of current HITS-based algorithms, we propose a new weighted HITS-based method that assigns appropriate weights to in-links of root documents. Then, we combine content analysis with HITS-based algorithms and study the effects of four representative relevance scoring methods, VSM, Okapi, TLS, and CDR, using a set of broad topic queries. Our experimental results show that our weighted HITS-based method performs significantly better than Bharat's improved HITS algorithm. When we combine our weighted HITS-based method or Bharat's HITS algorithm with any of the four relevance scoring methods, the combined methods are only marginally better than our weighted HITS-based method. Between the four relevance-scoring methods, there is no significant quality difference when they are combined with a HITS-based algorithm.
43025995
Processing Probabilistic Range Query over Imprecise Data Based on Quality of Result
Sensors are employed in many applications to monitor entities such as environment temperature or illumination. Because of limited resources (e.g., battery power and wireless bandwidth), it is impractical for the database to track continuous changing readings from sensors at all times. Consequently, database may produce incorrect query results based on recorded data. However, if the error between the recorded value and the actual value is bounded, probabilistic approach can be applied to process queries over the imprecise data in database. The paper proposes a quality of result based probabilistic range query processing method. Two measures are defined to evaluate the quality of result. A probability model is proposed to estimate the quality of returned results. Based on the model, an algorithm is developed to choose the probability threshold according to user’s requirement on the quality of result.
17633305
The Impact of Cache Organization in Optimizing Microprocessor Power Consumption
In the recent years, power consumption has become increasingly an important design concern as silicon area and performance in modern computer systems design. Several factors have contributed to this trend. Perhaps the most visible have been the remarkable success and growth of Personal Digital Assistants (PDA’s), Cellular phones and pagers, etc .This work is an attempt to explore the impact of feature size shrinkage and cache configuration on optimizing power consumption in modern processors. The work studies two commercially known RISC microprocessors. The StrongARM and the Alpha-21064 microprocessors. The latter is the ancestor of the former and is therefore used here as the baseline in our analysis. Our analysis has illustrated quantitatively great power saving when technology is downsized and cache is well organized
9354212
High-Performance Job-Shop Scheduling With A Time-Delay TD-lambda Network
Job-shop scheduling is an important task for manufacturing industries. We are interested in the particular task of scheduling payload processing for NASA's space shuttle program. This paper summarizes our previous work on formulating this task for solution by the reinforcement learning algorithm T D(). A shortcoming of this previous work was its reliance on hand-engineered input features. This paper shows how to extend the time-delay neural network (TDNN) architecture to apply it to irregular-length schedules. Experimental tests show that this TDNN-TD() network can match the performance of our previous hand-engineered system. The tests also show that both neural network approaches signiicantly out-perform the best previous (non-learning) solution to this problem in terms of the quality of the resulting schedules and the number of search steps required to construct them.
14422830
Compiler-guided register reliability improvement against soft errors
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely used in reliability-sensitive environments, it becomes increasingly important to develop cost-effective techniques to improve the processor reliability against soft errors. This paper focuses on studying the register file immunity against soft errors since modern processors typically employ a large number of registers, which are accessed very frequently. As a result, soft errors occurred in registers can easily propagate to functional units or the memory system, leading to silent data error (SDC) or system crash.To develop cost-effective techniques to fight soft errors for embedded processors, the first step is to understand the register file susceptibility to soft errors and its impact on the system reliability accurately. Toward this goal, this paper proposes the concept of register vulnerability factor (RVF) to characterize the probability that register transient errors can escape the register file and thus potentially impact the system reliability. Built upon the RVF concept, we then propose two cost-effective compiler-guided techniques to improve the register file reliability by lowering the RVF value. Our experiments indicate that on average, the RVF can be reduced to 9.1% and 9.5% by the hyperblock-based instruction re-scheduling and the reliability-oriented register assignment respectively, which can potentially lower the reliability cost significantly while protecting register files against transient errors.
52800785
Association-Based Multiple Imputation in Multivariate Datasets: A Summary
There are two general approaches to handling missing data. The rst one ignores missing data, by discarding the records with missing values from a dataset or taking unknown attribute values as special, null values and processing them during the process of answering queries. The second approach is called imputations, which attempts to ll in missing data with plausible values. There are two major existing methods of this approach. The rst uses statistical relationships among the variables under consideration, and builds statistical models for the variables, namely linear regression models for numerical values and statistical classi cation rules for categorical values. A possible value of an unspeci ed item is then estimated using the statistical models. The second method is multiple imputations that replaces each missing value by multiple simulated values. After the multiple imputations are obtained, each plausible value is analyzed, using EM algorithm and Gibbs sampling, to produce an inferential conclusion that include uncertainty caused by missing data. Note that the multiple imputationmethod can only apply to numerical attributes.
23442411
A faster optimal algorithm for the measure problem
The measure problem involves computing the area of the union of a set of n iso-oriented rectangles in the plane. Recently, it has been shown that for a set of n such rectangles, the measure problem can be solved in O(log n log log n) time, using O(n/log log n) processors in the CREW PRAM model of computation. In this note we show that the measure problem can be solved optimally in O(log n) time using O(n) processors in the same model of computation, thus settling an open problem posed in [8].
30318957
Replication cache: a small fully associative cache to improve data cache reliability
Soft error conscious cache design has become increasingly crucial for reliable computing. The widely used ECC or parity-based integrity checking techniques have only limited capability in error detection and correction, while incurring nontrivial penalty in area or performance. The N modular redundancy (NMR) scheme is too costly for processors with stringent cost constraints. This paper proposes a cost-effective solution to enhance data reliability significantly with minimum impact on performance. The idea is to add a small fully associative cache to store the replica of every write to the L1 data cache. Due to data locality and its full associativity, the replication cache can be kept small while providing replicas for a significant fraction of read hits in L1, which can be used to enhance data integrity against soft errors. Our experiments show that a replication cache with eight blocks can provide replicas for 97.3 percent of read hits in L1 on average. Moreover, compared with the recently proposed in-cache replication schemes, the replication cache is more energy efficient, while improving the data integrity against soft errors significantly.
1196346
An Efficient Hybrid Strategy for Temporal Planning
Temporal planning (TP) is notoriously difficult because it requires to solve a propositional STRIPS planning problem with temporal constraints. In this paper, we propose an efficient strategy for solving TP, which combines, in an innovative way, several well established and studied techniques in AI, OR and constraint programming. Our approach integrates graph planning (a well studied planning paradigm), max-SAT (a constraint optimization technique), and the Program Evaluation and Review Technique (PERT), a well established technique in OR. Our method first separates the logical and temporal constraints of a TP problem and solves it in two phases. In the first phase, we apply our new STRIPS planner to generate a parallel STRIPS plan with a minimum number of parallel steps. Our new STRIPS planner is based on a new max-SAT formulation, which leads to an effective incremental learning scheme and a goal-oriented variable selection heuristic. The new STRIPS planner can generate optimal parallel plans more efficiently than the well-known SATPLAN approach. In the second phase, we apply PERT to schedule the activities in a parallel plan to create a shortest temporal plan given the STRIPS plan. When applied to the first optimal parallel STRIPS plan, this simple strategy produces optimal temporal plans on most benchmarks we have tested. This strategy can also be applied to optimal STRIPS plans of different parallel steps in an anytime fashion to find an optimal temporal plan. Our experimental results show that the new strategy is effective and the resulting algorithm outperforms many existing temporal planners.
8019143
An average-case analysis of graph search
Many problems in real-world applications require searching graphs. Understanding the performance of search algorithms has been one of the eminent tasks of heuristic search research. Despite the importance of graph search algorithms, the research of analyzing their performance is limited, and most work on search algorithm analysis has been focused on tree search algorithms. One of the major obstacles to analyzing graph search is that no single graph is an appropriate representative of graph search problems. In this paper, we propose one possible approach to analyzing graph search: Analyzing the performance of graph search algorithms on a representative graph of a cluster of problems. We specifically consider job-sequencing problems in which a set of jobs must be sequenced on a machine such that a penalty function is minimized. We analyze the performance of A* graph search algorithm on an abstract model that closely represents job sequencing problems. It is an extension to a model widely used previously for analyzing tree search. One of the main results of our analysis is the existence of a gap of computational cost between two classes of job sequencing problems, one with exponential and the other with polynomial complexity. We provide experimental results showing that real job sequencing problems indeed have a huge difference on computational costs under different conditions.