14990773
Reset-Driven Fault Tolerance
A common approach in embedded systems to achieve fault-tolerance is to reboot the computer whenever some non-permanent error is detected. All the system code and data are recreated from scratch, and a previously established checkpoint, hopefully not corrupted, is used to restart the application data. The confidence is thus restored on the activity of the computer. The idea explored in this paper is that of unconditionally resetting the computer in each control frame (the classic read sensors → calculate control action → update actuators cycle). A stable-storage based in RAM is used to preserve the system's state between consecutive cleanups and a standard watchdog timer guarantees that a reset is forced whenever an error crashes the system. We have evaluated this approach by using fault-injection in the controller of a standard temperature control system. The experimental observations show that the Reset-Driven Fault Tolerance is a very simple yet effective technique to improve reliability at an extremely low cost since it is a conceptually simple, software only solution with the advantage of being application independent.
35292815
WPVM: parallel computing for the people
This paper presents WPVM, a PVM implementation for the “MS Windows” — Microsoft Windows Operating System. WPVM stands for “Windows Parallel Virtual Machine” and intends to exploit the potential computational power of the small and medium PC LANs that proliferate in corporations and universities. As the original PVM [1–2], WPVM creates the abstraction of a parallel machine from a cluster of computers connected by a network. This virtual machine appears as a single and manageable resource to the programmer. The difference is that the target machines for WPVM are personal computers with MS Windows instead of UNIX machines. However, this system is compatible with the original PVM, meaning that we can use virtual machines composed simultaneously of UNIX and MS Windows machines.
22782109
A Fault-Tolerant Mechanism for Simple Controllers
There are many industrial controllers where no systematic fault-tolerant mechanisms are included because of cost constraints. This paper addresses that problem by making a proposal for a simple and low-cost fault-tolerant technique, yet very effective, that can be used even in the simplest controllers. The mechanism is able of tolerating both hardware and software faults. It uses behaviour-based error detection, with checkpointing and rollback, to give resiliency to the application. The programs are made of possibly non-deterministic processes that communicate solely by messages. The technique, called RP-Actions, also guarantees that the recovery is domino-effect free. Software bugs are caught by acceptance tests as in recovery blocks. Forward error recovery is used for time, since time cannot be rolled back. Several implementations of the proposed mechanisms were made — we present in this paper some important results.
11507520
Web-based Metacomputing with JET
11033391
System-level versus user-defined checkpointing
Checkpointing and rollback recovery is a very effective technique to tolerate transient faults and preventive shutdowns. In the past, most of the checkpointing schemes published in the literature were supposed to be transparent to the application programmer and implemented at the operating-system level. In recent years, there has been some work on higher-level forms of checkpointing. In this second approach, the user is responsible for the checkpoint placement and is required to specify the checkpoint contents. We compare the two approaches: system-level and user-defined checkpointing. We discuss the pros and cons of both approaches and we present an experimental study that was conducted on a commercial parallel machine.
35428904
Portable checkpointing and recovery
This paper presents a checkpointing scheme that was implemented in a parallel library that runs on top of CHIMP/MPI. The main goals of the checkpointing mechanism are portability and efficiency. It runs on every platform supported by MPI in a machine-independent way. The scheme allows the migration of checkpoints and offers a flexible recovery mechanism based on data-reconfiguration. Some performance results will be presented at the end of the paper together with some techniques that can be used to increase the efficiency of the checkpointing mechanism.
33382273
Implementation of mixed current/voltage testing using the IEEE P1149.4 infrastructure
The development of a mixed-signal test bus infrastructure-IEEE P1149.4-is now in the final stages of the standardization process. Evaluating the test capabilities enabled by this infrastructure is an important step needed to support it as a well established standard. This paper presents experiments carried out with a test chip provided by the P1149.4 working group, which explore the architecture of the proposed analog boundary module to implement alternative testing methods. These include a method for parametric testing of passive components based on the monitoring of the power supply current, and a mixed current/voltage technique allowing the implementation of correlation for testing analog and mixed-signal macros.
15739638
Identification of Document Language is Not yet a Completely Solved Problem
Existing Language Identification (LID) approaches do reach 100% precision, in most common situations, when dealing with documents written in just one language, and when those documents are large enough. However, LID approaches do not provide a reliable solution for some situations: when there is need to discriminate the correct variant of the language used in a text, for example, European or Brazilian variants of Portuguese, UK or USA English variants, or any other language variants. Another hard context occur with small touristic advertisements on the web, addressing foreigners but using local language to name most local entities. In this paper, we present a fully statistics- based LID approach which learns the most discriminant information according to each context, and identifies the correct language or language variant a text is written in. This methodology is shown to be correct for normal texts and maintains its robustness in hard LID contexts.
37612228
An approach to testability improvement of mixed-signal boards
The increasing complexity of mixed-signal boards makes an integrated analogue/digital testability approach an attractive proposition. This paper investigates one such approach based on the use of mixed-signal test support ICs together with standard board level test infrastructures. The architecture of a test support IC and preliminary experimental results are also presented.<<ETX>>
14688474
A processor for testing mixed-signal cores in system-on-chip
This paper describes the design of a processor specific for testing cores embedded in system-on-chip. This processor, which can be implemented within a system's reconfigurable area, shall be responsible for scheduling and control test operations and perform preliminary data processing, as well as to provide the interface with an external tester. Building these test operations on-chip allows for simplifying external tester interface and to reduce testing time. The testing procedure and the infrastructure required to test an A/D converter is described as an example.
753246
Static Slicing of Rewrite Systems
Program slicing is a method for decomposing programs by analyzing their data and control flow. Slicing-based techniques have many applications in the field of software engineering (like program debugging, testing, code reuse, maintenance, etc). Slicing has been widely studied within the imperative programming paradigm, where it is often based on the so called program dependence graph, a data structure that makes explicit both the data and control dependences for each operation in a program. Unfortunately, the notion of ''dependence'' cannot be easily adapted to a functional context. In this work, we define a novel approach to static slicing (i.e., independent of a particular input data) for first-order functional programs which are represented by means of rewrite systems. For this purpose, we introduce an appropriate notion of dependence that can be used for computing program slices. Also, since the notion of static slice is generally undecidable, we introduce a complete approximation for computing static slices which is based on the construction of a term dependence graph, the counterpart of program dependence graphs.