5872084
Experiences with backward simulation based approach for lot release planning
Bottleneck based scheduling approach suggests planning the release of lots based on the capacity of the bottleneck machines in the manufacturing process. Many scheduling systems determine the start of the first operation of the lot based on backward scheduling from its operation on the bottleneck machine. An approach was developed for determining the lot release times based on backward simulation. While conceptually appealing and successful with simple problems, the approach did not lead to expected improvements in a highly complex semiconductor manufacturing scenario. This paper describes the approach, its implementation and the limitations realized in the complex scenario.
7194511
A Concept Prototype for Integrated Gaming and Simulation for Incident Management
This paper describes a prototype that has been developed to demonstrate the concept of integrated gaming and simulation for incident management. An architecture for the purpose was developed and presented at the last conference. A hypothetical emergency incident scenario has been developed for demonstrating the applicability of integrated simulation and gaming. A number of simulation and gaming modules have been utilized to model the major aspects of the hypothetical scenario. The modules demonstrate the value of utilizing simulation for incident management applications. They can be used to highlight the value of simulation and gaming for training applications in particular. Two of the simulation modules have been integrated using a modified implementation of the high level architecture to give an idea of the advantages. Technical issues in integration are identified
9214465
Performance prediction tools for parallel discrete-event simulation
We have developed a set of performance prediction tools which help to estimate the achievable speedups from parallelizing a sequential simulation. The tools focus on two important factors in the actual speedup of a parallel simulation program: the simulation protocol used; and the inherent parallelism in the simulation model. The first two tools are a performance/parallelism analyzer for a conservative, asynchronous simulation protocol, and a similar analyzer for a conservative, synchronous (super-step) protocol. Each analyzer allows us to study how the speedup of a model changes with increasing number of processors, when a specific protocol is used. The third tool-a critical path analyzer-gives on ideal upper bound to the model's speedup. This paper gives an overview of the prediction tools, and reports the predictions from applying the tools to a discrete-event wafer fabrication simulation model. The predictions are close to speedups from actual parallel implementations. These tools help us to set realistic expectations of the speedup from a parallel simulation program, and to focus our work on issues which are more likely to yield performance improvement.
17397415
Analyzing the supply chain for a large logistics operation using simulation
This paper presents a case study of using simulation for analyzing the impact of proposed changes in the supply chain processes for a large logistics operation. The major changes explored include business process changes, and use of new supply chain software. The results of the analysis indicate that the changes in forecast accuracy provide much larger savings compared to process automation changes. A number of insights are drawn from the results of the analyses.
6148667
Supply chain management tradeoffs analysis
Supply chain management involves understanding complex interactions between many factors and using the understanding to achieve balance between conflicting objectives. Simulation is a very useful technique to evaluate the impact of changes in factors such as inventory control and business process parameters. This paper describes a simulation based study for analyzing the tradeoffs among service level, inventory and lead times for a large logistics supply chain. The study highlights the use of simulation in understanding seemingly non-intuitive results and guiding the effort for performance improvement.
14308872
Criticality of detailed modeling in semiconductor supply chain simulation
Supply chain management offers a large potential for organizations to reduce costs and improve customer service performance. Simulation of supply chains can help in these objectives by evaluating the impact of alternative inventory control policies. Supply chain simulation involves the modeling of multiple factories across the chain and can get quite complex. Analysts typically carry out such simulation at a coarse level of detail to keep the complexity and computing resources manageable. However, modeling at coarse levels may reduce the accuracy of outputs and affect the quality of decisions. In this paper, we report on a study to compare the quality of results at different levels of detail in a semiconductor supply chain simulation.
6467955
Low degree metabolites explain essential reactions and enhance modularity in biological networks
BackgroundRecently there has been a lot of interest in identifying modules at the level of genetic and metabolic networks of organisms, as well as in identifying single genes and reactions that are essential for the organism. A goal of computational and systems biology is to go beyond identification towards an explanation of specific modules and essential genes and reactions in terms of specific structural or evolutionary constraints.ResultsIn the metabolic networks of Escherichia coli, Saccharomyces cerevisiae and Staphylococcus aureus, we identified metabolites with a low degree of connectivity, particularly those that are produced and/or consumed in just a single reaction. Using flux balance analysis (FBA) we also determined reactions essential for growth in these metabolic networks. We find that most reactions identified as essential in these networks turn out to be those involving the production or consumption of low degree metabolites. Applying graph theoretic methods to these metabolic networks, we identified connected clusters of these low degree metabolites. The genes involved in several operons in E. coli are correctly predicted as those of enzymes catalyzing the reactions of these clusters. Furthermore, we find that larger sized clusters are over-represented in the real network and are analogous to a 'network motif. Using FBA for the above mentioned three organisms we independently identified clusters of reactions whose fluxes are perfectly correlated. We find that the composition of the latter 'functional clusters' is also largely explained in terms of clusters of low degree metabolites in each of these organisms.ConclusionOur findings mean that most metabolic reactions that are essential can be tagged by one or more low degree metabolites. Those reactions are essential because they are the only ways of producing or consuming their respective tagged metabolites. Furthermore, reactions whose fluxes are strongly correlated can be thought of as 'glued together' by these low degree metabolites. The methods developed here could be used in predicting essential reactions and metabolic modules in other organisms from the list of metabolic reactions.
28659602
An approximation to the greedy algorithm for differential compression
We present a new differential compression algorithm that combines the hash value techniques and suffix array techniques of previous work. The term "differential compression" refers to encoding a file (a version file) as a set of changes with respect to another file (a reference file). Previous differential compression algorithms can be shown empirically to run in linear time, but they have certain drawbacks; namely, they do not find the best matches for every offset of the version file. Our algorithm, hsadelta (hash suffix array delta), finds the best matches for every offset of the version file, with respect to a certain granularity and above a certain length threshold. The algorithm has two variations depending on how we choose the block size. We show that if the block size is kept fixed, the compression performance of the algorithm is similar to that of the greedy algorithm, without the associated expensive space and time requirements. If the block size is varied linearly with the reference file size, the algorithm can run in linear time and constant space. We also show empirically that the algorithm performs better than other state-of-the-art differential compression algorithms in terms of compression and is comparable in speed.
2205933
Hybrid Multi-FPGA board evaluation by limiting multi-hop routing
Multi-FPGA Boards (MFBs) have been in use for more than a decade for emulation of the digital circuits in many applications. Key feature of an MFB architecture is its inter-FPGA connections. There are two types of inter-FPGA connections namely: i) fixed connection (FC)-connecting a pair of FPGAs through a dedicated wire between them, ii) programmable connection (PC)-connecting a pair of FPGAs through a programmable switch like Field-Programmable Interconnect Device (FPID). Hence, a PC requires two wires compared to one wire in FC. Khalid et al. (1999) have shown that the MFBs consisting of both the types of connections (hybrid MFBs) are better than other architectures for emulation of the circuits, if the number of PCs are minimum required. Hence, we evaluate the hybrid MFBs for the required number of PCs as an evaluation metric. Availability of technology mapping, partitioning, embedding and routing tools is another important requirement for emulation. A routing tool (multi-hop router) prefers one or more unused FCs (multi-hops) in lieu of one PC. Available multihop routers are specific to MFB architecture and use unlimited hops in the routes. For evaluation, a generic multi-hop router for any hybrid architecture is required which obeys the given limit on maximum number of hops in every route. This paper presents the development of routing tool for the same. A heuristic, a lower bound and an optimal algorithm has been implemented for this purpose. For the test cases, it has been observed that the optimal results (within 3 hours) are achievable by the heuristic (within a minute). Also the results are more precise than the available results.
42440717
Efficient Embedding of Partitioned Circuits onto Multi-FPGA Boards
Multi-FPGA boards(MFBs) are extensively used by the designers for logic emulation, rapid prototyping, custom computing and low volume sub-system implementation. Efficient use of an MFB does not only require a good routing topology, but also a good set of CAD tools to partition the given circuits and embed them on the MFB. Khalid et al[1] have shown that among the MFB topologies, hybrid series of architectures containing fixed FPGA-FPGA connections and programmable connections through Field Programmable Interconnect Devices(FPIDs) are better than other architectures. Programmable connections can connect different pairs of FPGAs under program control, but require additional wires, extra delays etc. compared to fixed connection. 
 
An MFB, to be used in rapid prototyping, is expected to emulate a large number of digital circuits. To accommodate the routing requirement generated by partitioning them, MFB is required to have significantly large number of programmable connections. In this paper, we have shown that an efficient embedding tool can substantially reduce the requirement of programmable connections. The paper presents an optimal as well as a fast heuristic for embedding. Our methods can work with a large class of hybrid routing topologies.
44358650
Banishing Robust Turing Completeness
This paper proves that “promise classes” are so fragilely structured that they do not robustly (i.e. with respect to all oracles) possess Turinghard sets even in classes far larger than themselves. In particular, this paper shows that FewP does not robustly possess Turing hard sets for UP∩coUP and IP∩coIP does not robustly possess Turing hard sets for ZPP. It follows that ZPP, R, coR, UP∩coUP, UP, FewP∩coFewP, FewP, and IP∩coIP do not robustly possess Turing complete sets. This both resolves open questions of whether promise classes lacking robust downward closure under Turing reductions (e.g., R, UP, FewP) might robustly have Turing complete sets, and extends the range of classes known not to robustly contain many-one complete sets.