206832588
Optimization problems from feature testing of communication protocols
In feature testing of communication protocols, we want to construct a minimal number of tests with a desirable fault coverage. We model the protocols by extended finite state machines and reduce the test generation process to optimization problems on graphs. We study efficient algorithms and their complexity. We report experimental results on real systems, including Personal HandyPhone System, a 5ESS based ISDN wireless system, and 5ESS Intelligent Network Application Protocol.
52867515
Test Sequence Selection
We study the test sequence selection problem. Given a large number of tests for a protocol system, we want to select a subset of tests so that the number of tests is reduced yet the test coverage is not sacrificed. We discuss the complexity of the test selection problem and propose a class of algorithms for different protocol system information requirements, test coverage criteria, and cost. We report experimental results on ISDN connection control protocol system Q.931.
46374921
A Formal Specification of the ATM ABR Rate Control Scheme
Abstract Formal specifications are indispensable for computer-aided validation, verification, and testing of communication protocols. However, a large number of practical protocols, including those for ATM, have only informal English specifications. A formal specification helps in achieving a consistent interpretation and thus increases the likelihood of interoperable implementations. As a case study, we consider an important protocol — ATM's Available Bit Rate (ABR) service specification. The ABR source/destination policies have been specified using an English description in the main body of the ATM Forum's draft Traffic Management specification, from which it is hard to conduct a formal analysis. It must be noted however that considerable energy has been spent in providing a reasonably precise specification, while allowing for appropriate implementation latitude. However, an English description still has the potential for different interpretations, which may lead to discrepancy in different vendors' implementations and cause serious problems in interoperability of the communication entities made by different manufacturers. We model the ABR protocols by parameterized communicating extended finite state machines with timers, which is often called a transition system. The protocol is formally specified by the specification of the transitions of the system. We also provide insights gained in the derivation of the formal specification. Furthermore, we introduce a scheduler, involved in transmitting queued cells at the allowed cell rate to meet the minimal requirements from the source/destination protocols. We present the transitions for the source/destination/scheduler machines primarily for transmitting in-rate cells.
552424
A polynomial algorithm for gateway generation from formal specifications
A systematic procedure that takes exponential time to synthesize protocol converters from formal specifications is presented. The algorithm proceeds in two steps: compute the largest common subset of services provided by the two mismatched protocols, and reduce the converter, retaining common services, without traversing the entire machine that represents the composition of the two mismatched protocols. In a number of cases, the converter can be constructed by a memoryless translation of messages from one protocol to another. Conditions under which such stateless conversion is possible are given. Two examples are presented to illustrate the techniques. In the first example, a converter that interconnects a half-duplex protocol with a full-duplex protocol from their formal specifications is computed. In the second example, the polynomial procedure is applied to computation of a converter for interconnecting the SNR and TCP protocols. >
5523767
Closed Partition Lattice and Machine Decomposition
Finite-state machines are widely used to model systems in diverse areas. Often, the modeling machines can be decomposed into smaller component machines and this decomposition can facilitate the system design, implementation and analysis. J. Hartmanis and R.E. Stearns (1966) developed an elegant algebraic theory for machine decomposition that is based on the closed-partition lattice of a machine. In this paper, we study the computation of the closed-partition lattice of finite-state machines for the application to their decomposition. We present efficient algorithms for constructing the closed-partition lattice and for machine decomposition.
23137458
Testing Finite State Machines: Fault Detection
Abstract We present simple randomized algorithms for the fault detection problem : Given a specification in the form of a deterministic finite state machine A and an implementation machine B , determine whether B is equal to A . If A has n states and p inputs, then in randomized polynomial time we can construct with high probability a checking sequence of length O ( pn 4 log n ), i.e., a sequence that detects all faulty machines with at most n states. Better bounds can be obtained in certain cases. The techniques generalize to partially specified finite state machines.
8317522
A Web-Based Distributed Programming Environment
A Java-based system called the GeoJAVA System was introduced in [1]. This system allows a user to remotely compile his/her own C/C++ programs and execute them for visualization among a group of remote users. DISPE, which stands for DIStributed Programming Environment, expands on the GeoJAVA System by allowing the resulting executables to be run on systems other than the host on which they were compiled, thus making the system more versatile. DISPE uses Common Object Request Broker (CORBA) services to enable executables compiled on this system to invoke methods in libraries on remote sites in an architecturally heterogeneous environment. Not only does this allow users to compile and execute their programs remotely, but the maintenance and duplication of libraries is lowered since agents are used to search for symbols in libraries located remotely and to compile them with the user's source code. As long as there is an Internet connection between the hosts on which these libraries reside, the agents can search and compile with these libraries.
2528129
Rectilinear Paths Among Rectilinear Obstacles
We address problems of finding rectilinear paths among rectilinear obstacles subject to certain optimization criteria. They have applications in the fields of motion planning and computer-aided circuit design. The criteria that we consider include minimizing the length of the path, minimizing the number of bends on the path, bounding one of the two factors (length and number of bends) and minimizing the other, and minimizing a given non-decreasing function of both the length and the number of bends. The length measure of a rectilinear path can be the total length of all the segments of the paths or just the sum of lengths of all the vertical or horizontal segments of the path. Besides the various optimization criteria for the paths that we look for, the routing environments may have different constraints. For example, the obstacles can be rectangular or rectilinear, the orientations of the path may be restricted to be horizontal or vertical on different layers in a two-layer interconnection model, or the path can penetrate the obstacles and pay extra costs. Previous results and problem solving approaches are summarized and compared to ours in this dissertation. 
We obtain more efficient algorithms for finding a shortest rectilinear path between two points, minimum spanning tree of a set of points, and for finding assorted paths taking both length and the number of bends into consideration. We also derive a general problem transformation scheme to convert an instance in two-layer model into an equivalent problem in one-layer model, for which previously obtained algorithms under different objective functions are applicable.
13592174
Critical area computation—a new approach
In this paper we present a new approach for computing the critical area for shorts in a circuit layout. The critical area calculation is the main computational problem in VLSI yield prediction. The method is based on the concept of Voronoi diagrams and computes the critical area for shorts (for all possible defect radii, assuming square defects) accurately in <italic>O</italic>(<italic>n</italic> log <italic>n</italic>) time, where <italic>n</italic> is the size of the input. The method is presented for rectilinear layouts but it is extendible to general layouts. As a byproduct we briefly sketch how to speed up the grid method of Wagner and Koren [16].
12888903
Steiner Problems on Directed Acyclic Graphs
Two variations of the minimum-cost Steiner problem on a directed acyclic graph with non-negative weights edges are studied.
14664253
A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation
We present an automated bit-width optimization methodology for polynomial-based hardware function evaluation. Due to the analytical nature of the approach, overflow protection and precision accurate to one unit in the last place (ulp) can be guaranteed. A range analysis technique based on computing the root of the derivative of a signal is utilized to determine the minimal number of integer bits. Fractional bit requirements are established using an analytical error expression derived from the functions that occur along the data path. Global fractional bit optimization across multiple computation stages is performed using simulated annealing and circuit area estimation functions