31460995
Voltage-Clock Scaling for Low Energy Consumption in Fixed-Priority Real-Time Systems
Power and energy constraints are becoming increasingly prevalent in real-time embedded systems. Voltage-scaling is a promising technique to reduce energy and power consumption: clock speed tends to decrease linearly with supply voltage while power consumption goes down quadratically. We therefore have a tradeoff between the energy consumption of a task and the speed with which it can be completed. The timing constraints associated with real-time tasks can be used to resolve this tradeoff. In this paper, we present two algorithms for voltage-scaling. Assuming that a processor can operate in one of two modes: high voltage and low voltage, we show how to schedule the voltage settings so that deadlines are met while reducing the total energy consumed. We show that significant reductions can be made in energy consumption.
920212
Resource scheduling in dependable integrated modular avionics
In the recent development of avionics systems, integrated modular avionics (IMA) is advocated for next generation architecture that needs integration of mixed criticality real-time applications. These integrated applications meet their own timing constraints while sharing avionics computer resources. To guarantee timing constraints and dependability of each application, an IMA-based system is equipped with the schemes for spatial and temporal partitioning. We refer the model as SP-RTS (strongly partitioned real-time system), which deals with processor partitions and communication channels as its basic scheduling entities. This paper presents a partition and channel-scheduling algorithm for the SP-RTS. The basic idea of the algorithm is to use a two-level hierarchical schedule that activates partitions (or channels) following a distance-constraints guaranteed cyclic schedule and then dispatches tasks (or messages) according to a fixed priority schedule. To enhance schedulability, we devised heuristic algorithms for deadline decomposition and channel combining. The simulation results show the schedulability analysis of the two-level scheduling algorithm and the beneficial characteristics of the proposed deadline decomposition and channel combining algorithms.
10753893
Evaluation of Error Recovery Blocks Used for Cooperating Processes
Three alternatives for implementing recovery blocks (RB's) are conceivable for backward error recovery in concurrent processing. These are the asynchronous, synchronous, and the pseudorecovery point implementations. Asynchronous RB's are based on the concept of maximum autonomy in each of concurrent processes. Consequently, establishment of RB's in a process is made independently of others and unbounded rollback propagations become a serious problem. In order to completely avoid unbounded rollback propagations, it is necessary to synchronize the establishment of recovery blocks in all cooperating processes. Process autonomy is sacrificed and processes are forced to wait for commitments from others to establish a recovery line, leading to inefficiency in time utilization. As a compromise between asynchronous and synchronous RB's we propose to insert pseudorecovery points (PRP's) so that unbounded rollback propagations may be avoided while maintaining process autonomy. We developed probabilistic models for analyzing these three methods under standard assumptions in computer performance analysis, i.e., exponential distributions for related random variables. With these models we have estimated 1) the interval between two successive recovery lines for asynchronous RB's, 2) mean loss in computation power for the synchronized method, and 3) additional overhead and rollback distance in case PRP's are used.
30590203
Efficient State-Saving Architectures for Power-Mode Switching
Time and energy is expended in switching between power modes (e.g., active, hibernate, sleep, etc.). Powering off cache is one major reason for this. When there is a switch in the power-mode involving cache power-off, the system spends time and energy in filling the cache with new data (inherent cache misses). In our technique, before powering off the cache, we save its state in Embedded DRAM and bring it back when the previous power mode is restored. Our experiments have showed that in a majority of cases the cache contents are too valuable to be erased. By saving the contents we can reduce switching speed and energy. We present a heuristic to save the most relevant cache contents so that power and delay overheads are minimized. To measure the area overhead a synthesizable VHDL model was designed.
40618061
Transaction Recovery in Distributed DB/DC Systems: A Progressive Approach
31591898
Scanning the issue - special issue on real-time systems
9352277
An ATM Switch Capacity Allocation Problem
In this paper, we consider a capacity allocation problem arising in the context of deploying asynchronous transfer mode (ATM) networks. Given types of ATM switches, the problem is to find an optimal allocation of capacity such that the total cost of installed switch modules is minimized, while satisfying all traffic demands. We formulate the problem as an integer programming model, which can be conceptualized as a generalized bin packing problem with capacity constraints. We then develop a surrogate constraint technique of the formulation for enhancing the representation of the model. Guided by the tight lower bound of the surrogate relaxation, we devise an effective tabu search heuristic that provides good quality solutions with guaranteed optimality. We present promising computational results that show the viability of the proposed heuristic and lower bounding methods, and that provide insights into implementation for configuring ATM switch in practice.
8697700
Probabilistic Retrieval Incorporating the Relationships of Descriptors Incrementally
The previous probabilistic retrieval models assume that the relevance probability of a document is independent of the descriptors that are not specified in a query. This is not true in practice because there can be many descriptors that represent the same concept. The probabilistic retrieval model developed in this paper overcomes this unsuitable assumption and incorporates the relationships of descriptors. A learning method is also proposed to figure out the relationships incrementally. Each time retrieval results are available, the method identifies in the relevant documents the descriptors that designate the concepts specified by the query descriptors. Although it employs user feedbacks like relevance feedback, it attempts to capture certain stable relationships of descriptors from many past user queries rather than to distinguish relevant documents from non-relevant ones for a particular query. We show through experiments that the proposed information retrieval method improves retrieval effectiveness over time.
7659070
Statistical Properties and Adaptive Tuning of Support Vector Machines
In this paper we consider the statistical aspects of support vector machines (SVMs) in the classification context, and describe an approach to adaptively tuning the smoothing parameter(s) in the SVMs. The relation between the Bayes rule of classification and the SVMs is discussed, shedding light on why the SVMs work well. This relation also reveals that the misclassification rate of the SVMs is closely related to the generalized comparative Kullback-Leibler distance (GCKL) proposed in Wahba (1999, Scholkopf, Burges, & Smola (Eds.), Advances in Kernel Methods—Support Vector Learning. Cambridge, MA: MIT Press). The adaptive tuning is based on the generalized approximate cross validation (GACV), which is an easily computable proxy of the GCKL. The results are generalized to the unbalanced case where the fraction of members of the classes in the training set is different than that in the general population, and the costs of misclassification for the two kinds of errors are different. The main results in this paper have been obtained in several places elsewhere. Here we take the opportunity to organize them in one place and note how they fit together and reinforce one another. Mostly the work of the authors is reviewed.
14282973
Closing the Gap: Learning-Based Information Extraction Rivaling Knowledge-Engineering Methods
In this paper, we present a learning approach to the scenario template task of information extraction, where information filling one template could come from multiple sentences. When tested on the MUC-4 task, our learning approach achieves accuracy competitive to the best of the MUC-4 systems, which were all built with manually engineered rules. Our analysis reveals that our use of full parsing and state-of-the-art learning algorithms have contributed to the good performance. To our knowledge, this is the first research to have demonstrated that a learning approach to the full-scale information extraction task could achieve performance rivaling that of the knowledge engineering approach.
14475818
Data exchange for machine shop simulation
Manufacturing simulation systems normally provide interfaces for data import and export using proprietary formats. Dependent data interfaces limit simulation applications in the manufacturing industry. This paper describes a mechanism for transferring data between a traditional database and XML files, which represent a machine shop data model developed at the National Institute of Standards and Technology (NIST). The data model is described by XML (eXtensible Markup Language) and UML (Unified Modeling Language). The data transfer mechanism is based on document object model (DOM), XML path language (XPath), and open database connectivity (ODBC) database engines. A prototype implementation is also described in this paper