5218256
Instruction set extension with shadow registers for configurable processors
Configurable processors are becoming increasingly popular for modern embedded systems (especially for the field-programmable system-on-a-chip). While steady progress has been made in the tools and methodologies of automatic instruction set extension for configurable processors, the limited data bandwidth available in the core processor (e.g., the number of simultaneous accesses to the register file) becomes a potential performance bottleneck. In this paper we first present a quantitative analysis of the data bandwidth limitation in configurable processors, and then propose a novel low-cost architectural extension and associated compilation techniques to address the problem. The application of our approach results in a promising performance improvement.
5414084
Architecture and synthesis for multi-cycle on-chip communication
There are two important infection points in the development of deep submicron (DSM) process technologies. The first point is when the average interconnect delay exceeds the gate delay, which happened during mid 1990s and led to the so-called timing closure problem. The second point is when single-cycle full chip synchronization is no longer possible, which is about to happen soon. It can be shown that, even with the aggressive interconnect optimization techniques (e.g., buffer insertion and wire-sizing), 5 clock cycles are still needed to go from corner-to-corner for the die of 28.3 mm /spl times/ 28.3 mm in the 0.07 /spl mu/m technology generation, assuming a 5.63 GHz clock by 2006 predicted in ITRS'01 (2001). This clearly suggests that multi-cycle on-chip communication is a necessity in multi-gigahertz synchronous designs. However, it is not supported in the current design tools and methodologies, as most of these implicitly assume that full chip synchronization in a single clock cycle is feasible. Our contributions are as follows: (i) we propose a regular distributed register (RDR) microarchitecture which offers high regularity and direct support of multi-cycle communication; (ii) we develop a set of novel architectural synthesis algorithms to efficiently synthesize behavior-level designs onto the RDR architecture.
9330795
Application-specific instruction generation for configurable processor architectures
Designing an application-specific embedded system in nanometer technologies has become more difficult than ever due to the rapid increase in design complexity and manufacturing cost. Efficiency and flexibility must be carefully balanced to meet different application requirements. The recently emerged configurable and extensible processor architectures offer a favorable tradeoff between efficiency and flexibility, and a promising way to minimize certain important metrics (e.g., execution time, code size, etc.) of the embedded processors. This paper addresses the problem of generating the application-specific instructions to improve the execution speed for configurable processors. A set of algorithms, including pattern generation, pattern selection, and application mapping, are proposed to efficiently utilize the instruction set extensibility of the target configurable processor. Applications of our approach to several real-life benchmarks on the Altera Nios processor show encouraging performance speedup (2.75X on average and up to 3.73X in some cases).
17015903
Optimal scheduling in buffered WDM interconnects with limited range wavelength conversion capability
All optical networking is a promising candidate for supporting high-speed communications because of the huge bandwidth of optics. In this paper, we study optimal scheduling in buffered WDM interconnects with limited range wavelength conversion capability. We formalize the problem of maximizing network throughput and minimizing total delay as a problem of finding an optimal matching in a weighted bipartite graph. We then give a simple algorithm, called the Scan and Swap Algorithm, that finds the optimal matching in O(kB) time, where k is the number of wavelengths per fiber and B is the buffer length, as compared to directly adopting other existing algorithms that need at least O(k/sup 2/N/sup 2/ + k/sup 2/BN) time, where N is the number of input fibers.
14844081
Constructing battery-aware virtual backbones in sensor networks
A critical issue in wireless sensor networks is to construct energy efficient virtual backbones for routing, broadcasting and data propagating. The minimum connected dominating set (MCDS) has been proposed as a backbone to reduce power dissipation and prolong network lifetime. However, we find that an MCDS cannot guarantee maximum network lifetime as it does not consider the battery discharging behavior. Recent study in battery technology reveals that the discharging of a battery is not linear. Batteries tend to discharge more power than needed, and reimburse the over-discharged power later if they have sufficiently long recovery time. In order to optimize network performance and construct an energy efficient virtual backbone in sensor networks, battery-awareness should be considered. In this paper we first study the mathematical battery discharging model and provide a simplified battery model suitable for implementation in sensor networks. We then introduce the concept of battery-aware connected dominating set (BACDS) and show that in general the BACDS can achieve longer lifetime than the MCDS. Then we show that finding a minimum BACDS (MBACDS) is NP-hard and give a distributed approximation algorithm to construct the BACDS. The resulting BACDS constructed by our algorithm is at most (8+/spl Delta/)opt size where /spl Delta/ is the maximum node degree and opt is the size of an optimal BACDS. The time and message complexities of the algorithm are O(n) and O(n(/spl radic/n+logn+/spl Delta/)), respectively, where n is the number of nodes in the network. The simulation results show that the BACDS constructed by our algorithm can save a significant amount of energy and achieve up to 30% longer network lifetime than the MCDS. To the best of our knowledge, this is the first work considering battery-awareness in the construction of connected dominating sets.
14148380
Discovering strong skyline points in high dimensional spaces
Current interests in skyline computation arise due to their relation to preference queries. Since it is guaraneed that a skyline point will not lose out in all dimensions when compared to any other point in the data set, this means that for each skyline point, there exists a set of weight assignments to the dimensions such that the point will become the top user preference.We believe that the usefulness of skyline points is not limited to such application and can be extended to data analysis and knowledge discovery as well. However, since the skyline of high dimensional datasets (which are common in data analysis applications) can contain too many points, various means must be developed to filter off the less interesting skyline points in high dimensions. In this paper, we will propose algorithms to find a set of interesting skyline points called strong skyline points. Extensive experiments show that our proposal is both effective and efficient.
3048764
A network-conscious approach to end-to-end video delivery over wide area networks using proxy servers
In this paper we present a novel network-conscious approach to the problem of end-to-end video delivery over wide-area networks using proxy servers situated between local-area networks (LANs) and a backbone wide-area network (WAN). We develop a novel and effective video delivery technique called video staging via intelligent utilization of the disk bandwidth and storage space available at proxy servers. We also design several video staging methods and evaluate their effectiveness in reducing the backbone WAN bandwidth requirement. Our results demonstrate that the proposed proxy-server-based, network-conscious approach provides an effective and scalable solution to the problem of the end-to-end video delivery over wide-area networks.
12552052
Fixed-slope universal lossy data compression
Corresponding to any lossless codeword length function l, three universal lossy data compression schemes are presented: one is with a fixed rate, another is with a fixed distortion, and a third is with a fixed slope. The former two universal lossy data compression schemes are the generalization of Yang-Kieffer's (see ibid., vol.42, no.1, p.239-45, 1995) results to the general case of any lossless codeword length function l, whereas the third is new. In the case of fixed-slope /spl lambda/>0, our universal lossy data compression scheme works as follows: for any source sequence x/sup n/ of length n, the encoder first searches for a reproduction sequence y/sup n/ of length n which minimizes a cost function n/sup -1/l(y/sup n/)+/spl lambda//spl rho//sub n/(x/sup n/, y/sup n/) over all reproduction sequences of length n, and then encodes x/sup n/ into the binary codeword of length l(y/sup n/) associated with y/sup n/ via the lossless codeword length function l, where /spl rho//sub n/(x/sup n/, y/sup n/) is the distortion per sample between x/sup n/ and y/sup n/. Under some mild assumptions on the lossless codeword length function l, it is shown that when this fixed-slope data compression scheme is applied to encode a stationary, ergodic source, the resulting encoding rate per sample and the distortion per sample converge with probability one to R/sub /spl lambda// and D/sub /spl lambda//, respectively, where (D/sub /spl lambda//, R/sub /spl lambda//) is the point on the rate distortion curve at which the slope of the rate distortion function is -/spl lambda/. This result holds particularly for the arithmetic codeword length function and Lempel-Ziv codeword length function. The main advantage of this fixed-slope universal lossy data compression scheme over the fixed-rate (fixed-distortion) universal lossy data compression scheme lies in the fact that it converts the encoding problem to a search problem through a trellis and then permits one to use some sequential search algorithms to implement it. Simulation results show that this fixed-slope universal lossy data compression scheme, combined with a suitable search algorithm, is promising.