1248128
The Expected Value of Hierarchical Problem-Solving
In the best case using an abstraction hierarchy in problem-solving can yield an exponential speed-up in search efficiency. Such a speed-up is predicted by various analytical models developed in the literature, and efficiency gains of this order have been confirmed empirically. However, these models assume that the Downward Refinement Property (DRP) holds. When this property holds, backtracking never need occur across abstraction levels. When it fails, search may have to consider many different abstract solutions before finding one that can be refined to a concrete solution. In this paper we provide an analysis of the expected search complexity without assuming the DRP. We find that our model predicts a phase boundary where abstraction provides no benefit: if the probability that an abstract solution can be refined is very low or very high, search with abstraction yields significant speed up. However, in the phase boundary area where the probability takes on an intermediate value search efficiency is not necessarily improved. The phenomenon of a phase boundary where search is hardest agrees with recent empirical studies of Cheeseman et al. [CKT91].
13595177
Multiple-Goal Recognition from Low-Level Signals
Researchers and practitioners from both the artificial intelligence and pervasive computing communities have been paying increasing attention to the task of inferring users' high-level goals from low-level sensor readings. A common assumption made by most approaches is that a user either has a single goal in mind, or achieves several goals sequentially. However, in real-world environments, a user often has multiple goals that are concurrently carried out, and a single action can serve as a common step towards multiple goals. In this paper, we formulate the multiple-goal recognition problem and exemplify it in an indoor environment where an RF-based wireless network is available. We propose a goal-recognition algorithm based on a dynamic model set and show how goal models evolve over time based on pre-defined states. Experiments with real data demonstrate that our method can accurately and efficiently recognize multiple interleaving goals in a user's trace.
9645876
Handling feature interactions in process-planning
Abstract The development of a successful approach to the integration of computer-aided design and computer-aided process-planning will require solutions to several fundamental problems in planning and geometric reasoning. In this article, we consider two such problems, both of which arise from interactions among machinable features. The first problem is that interactions can lead to several alternative interpretations of what the machinable features are. We address this problem by developing an algebra of features. The second problem is that interactions among features can cause problems in optimizing the process plans. For this problem, we have developed a branch-and-bound optimization algorithm with good heuristics to guide the search. This article presents the theory and mathematical framework for both problems and also the details of the implementation and experimental results.
11767978
Real-Time Scheduling for Multi-agent Call Center Automation
In a call center, service agents with different capabilities are available for solving incoming customer problems at any time. To supply quick response and better problem solution to customers, it is necessary to schedule customer problems to appropriate service agents efficiently. We developed SANet, a service agent network for call center, which integrates multiple service agents including both software agents and human agents, and employs a broker to schedule customer problems to service agents for better solutions according to their changing capabilities and availability. This paper describes the real-time scheduling method in SANet as well as its architecture. There are two phases in our scheduling method. One is problem-type learning. The broker is trained to learn the problem types and hence can decide the type of incoming problems automatically. The other is the scheduling algorithm based on problem types, capabilities and availability of service agents. We highlight an application in which we apply SANet to a call center problem for a cable-TV company. Finally, we support our claims via experimental results and discuss related works.
15099164
A scalable supervised algorithm for dimensionality reduction on streaming data
Algorithms on streaming data have attracted increasing attention in the past decade. Among them, dimensionality reduction algorithms are greatly interesting due to the desirability of real tasks. Principal Component Analysis (PCA) and Linear Discriminant Analysis (LDA) are two of the most widely used dimensionality reduction approaches. However, PCA is not optimal for general classification problems because it is unsupervised and ignores valuable label information for classification. On the other hand, the performance of LDA is degraded when encountering limited available low-dimensional spaces and singularity problem. Recently, Maximum Margin Criterion (MMC) was proposed to overcome the shortcomings of PCA and LDA. Nevertheless, the original MMC algorithm could not satisfy the streaming data model to handle large-scale high-dimensional data set. Thus an effective, efficient and scalable approach is needed. In this paper, we propose a supervised incremental dimensionality reduction algorithm and its extension to infer adaptive low-dimensional spaces by optimizing the maximum margin criterion. Experimental results on a synthetic dataset and real datasets demonstrate the superior performance of our proposed algorithm on streaming data.
5296157
A Novel Scalable Algorithm for Supervised Subspace Learning
Subspace learning approaches aim to discover important statistical distribution on lower dimensions for high dimensional data. Methods such as principal component analysis (PCA) do not make use of the class information, and linear discriminant analysis (LDA) could not be performed efficiently in a scalable way. In this paper, we propose a novel highly scalable supervised subspace learning algorithm called as supervised Kampong measure (SKM). It assigns data points as close as possible to their corresponding class mean, simultaneously assigns data points to be as far as possible from the other class means in the transformed lower dimensional subspace. Theoretical derivation shows that our algorithm is not limited by the number of classes or the singularity problem faced by LDA. Furthermore, our algorithm can be executed in an incremental manner in which learning is done in an online fashion as data streams are received. Experimental results on several datasets, including a very large text data set RCV1, show the outstanding performance of our proposed algorithm on classification problems as compared to PCA, LDA and a popular feature selection approach, information gain (IG).
38252541
A Memory Interference Model for Regularly Patterned Multiple Stream Vector Accesses
Most existing analytical models for memory interference generally assume random bank selection for each memory access. In vector computers, however, memory accesses are typically regularly patterned with a number of data items being accessed concurrently from different banks. Very little is known about the queueing behavior of memory interferences in multiple stream vector accesses. This paper presents an analytical model for memory interferences due to vector accesses in multiple vector processor systems. The model captures the effects of both bank conflicts among elements within one vector access stream and conflicts among multiple vector access streams on system performance. The model is based on a closed queueing network assuming an ideal interconnection network. An approximation technique is proposed to solve the memory queueing system that serves customers in a complicated way (non-FIFO). We also carry out extensive simulation experiments to study memory interference and validate our analytical model. Simulation results and analytical results are in a very good agreement, indicating that the model is very accurate. We further validate our analysis by comparing the numerical results obtained from our analytical model with those measurement results that were published by other researchers. Based on our analytical model and simulations, we carry out performance evaluation of the multiple vector processor systems. Our numerical results show that memory access conflicts pose a severe limitation on the number of useful processors in the system, implying that memory system design is essential to high-performance computing. >
78709
STICS: SCSI-to-IP cache for storage area networks
Abstract Data storage plays an essential role in today's fast-growing data-intensive network services. New standards and products emerge very rapidly for networked data storage. Given the mature Internet infrastructure, the overwhelming preference among the IT community recently is using IP for storage networking because of economy and convenience. iSCSI is one of the most recent standards that allow SCSI protocols to be carried out over IP networks. However, there are many disparities between SCSI and IP in terms of protocols, speeds, bandwidths, data unit sizes, and design considerations that prevent fast and efficient deployment of storage area network (SAN) over IP. This paper introduces SCSI-to-IP cache storage (STICS), a novel storage architecture that couples reliable and high-speed data caching with low-overhead conversion between SCSI and IP protocols. A STICS block consists of one or several storage devices and an intelligent processing unit with CPU and RAM. The storage devices are used to cache and store data while the intelligent processing unit carries out the caching algorithm, protocol conversion, and self-management functions. Through the efficient caching algorithm and localization of certain unnecessary protocol overheads, STICS can significantly improve performance, reliability, and scalability over current iSCSI systems. Furthermore, STICS can be used as a basic plug-and-play building block for data storage over IP. Analogous to “cache memory” invented several decades ago for bridging the speed gap between CPU and memory, STICS is the first-ever “cache storage” for bridging the gap between SCSI and IP making it possible to build an efficient SAN over IP. We have implemented software STICS prototype on Linux operating system. Numerical results using popular benchmarks such as vxbench, IOzone, PostMark, and EMC's trace have shown a dramatic performance gain over the current iSCSI implementation.
27106762
Analysis and Comparison of Cache Coherence Protocols for a Packet-Switched Multiprocessor
Analytical models are developed for seven existing cache protocols, namely, Write-Once, Write-Through, Synapse, Berkeley, Illinois, Firefly, and Dragon. The protocols are implemented on a multiprocessor with a packet-switched shared bus. The models are based on queuing networks that consist of both open and closed classes of customers. The models incorporate the requests for invalidation signals, write-through, and write-back operations, and the solution is based on the mean value analysis (MVA) algorithm. The performance of these protocols under various system parameters is compared on the basis of the models. It is found that Firefly and Dragon perform better than the others. >
13076928
Coverage Algorithm and Protocol in Heterogeneous Sensor Networks
One fundamental issue in wireless sensor networks is the coverage problem. In heterogeneous sensor networks composed of different types of sensors, the difference of the sensing radius of nodes augments the computation difficulty of coverage degree. In this paper, we analyze the features of heterogeneous sensor networks and discuss the approaches to guarantee and calculate the coverage degree of the region deployed by heterogeneous sensor networks. Based on our analysis, a Distributed Coverage Optimization Algorithm by which each node in the network can determine whether it should be turn active/inactive is proposed. Simulation shows that our algorithm can make the extraneous nodes inactive and minimize the number of nodes need to remain active.
20437986
Design and analysis of multiple-bus arbiters with different priority schemes
The authors present four multiple-user and multiple-server arbiter designs of multiple-bus multiprocessors. All designs are based on decentralized control, which has the advantage of good reliability and potentially high throughput. The priority protocols considered are fixed priority, rotating priority, round-robin priority, and equal priority. For the first two priority protocols, lookahead techniques are used to speed up the arbitration process. The round-robin protocol is based on the decentralized daisy-chain idea and is operated in an asynchronous fashion. Analytical models are developed for the four different priority protocols to evaluate the performance of the different designs. The analyses are based on a probabilistic model for the synchronous case and simple queuing analysis for the asynchronous system. Numerical results obtained from the proposed model show that the equal priority protocol performs better than the others in the system with a few buses. The performance difference is not significant when the number of buses is relatively large.<<ETX>>