40642098
A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance
This paper presents a low-voltage high-speed SiGe BiCMOS current switch. Because the proposed current switch has no resistor unlike the previous BiCMOS current switches, it can be used for low voltage ICs. It enhances spectral performance significantly by alleviating nonlinear parasitic capacitance effect, while keeping high-speed and output current accuracy. Simulation result shows that spurious free dynamic range (SFDR) improvement of 10dB is achieved in 12-bit 1GS/s current-mode D/A converter.
44275614
Cell-level placement for improving substrate thermal distribution
The dramatic increase of power consumption in very large scale integration circuits has led to high operating temperature and large thermal gradient, thereby resulting in serious timing and reliability concerns. Temperature-tracking is thus becoming of paramount importance in modern electronic design automation (EDA) tools. In this paper we present two thermal placement tools for standard cell and macro cell design styles respectively. They are aimed at reducing hot spots in a design without compromising traditional design metrics such as area and wire length. We developed a compact substrate thermal model that can be used by the placer to calculate the temperature profile of a placement efficiently, or to convert the user-specified temperature constraint into the corresponding power distribution constraint as an alternative placement objective. As a result, our method is much more efficient than directly employing temperature profile simulation during the placement process. The simulation results show noticeable improvement of thermal distribution over the traditional placement algorithm, with little impact on area and wire length of the final layout.
5129503
Detailed layer assignment for MCM routing
A new routing environment model, called the k-MCM model, is developed to take into account the unique features of a multilayer MCM, such as the availability of “segmented vias” , and the presence of two “active” or terminal-bearing layers. A detailed layer assignment problem is formulated on the k-MCM model. A fast heuristic algorithm for the layer assignment problem is proposed. and experimental results on twelve test examples with net counts up to 842 are presented.
13548202
Noise constrained power optimization for dual V/sub T/ domino logic
In dual threshold voltage techniques, significant subthreshold leakage current is one of the most important design problems. When dual threshold voltage is applied to the domino logic, noise immunity has to be carefully considered because the significant subthreshold current makes dynamic nodes much more susceptible to noise. In this paper, an analytical model for proper keeper transistor sizing to meet noise constraint is presented. Based on the same noise constraint, we propose dual threshold voltage domino logic technique to save power consumption.
40491047
Domino logic synthesis based on implication graph
In this paper, we present a new approach to the problem of inverter elimination in domino logic synthesis. A small piece of static CMOS logic is introduced to the circuit to avoid significant area penalty resulting from duplication. To maximize the domino logic part and to minimize the static CMOS logic part, a generalized automatic test pattern generation (ATPG)-based logic transformation is proposed to eliminate or relocate a target inverter. Based on the new concept of dominating set of mandatory assignment (DSMA) and the corresponding implication graph, we propose algorithms to identify a minimum candidate set for a target inverter. Experimental results show that logic transformation based on the implication graph can reduce transistor counts by 25% on average, while the delay increases less than 3%.
13489029
An integrated approach to realistic worst-case design optimization of MOS analog circuits
The authors present a new integrated approach for the optimization of MOS analog circuit performance by using realistic worst-case device parameter files, each corresponding to a performance measure. Nonlinear response surfaces are constructed for the performance measures of interest, and the worst-case device parameter files are identified by solving a set of suitably cast nonlinear programming problems. The worst-case files are shown to depend on the values of the designable parameters. An efficient method of incorporating this dependence during worst-case design optimization has been developed. This method enables the design of circuits with optimal performance and high parametric yields. Some illustrative analog circuit examples are given to demonstrate the application of the worst-case design optimization procedure.<<ETX>>
9325323
A Parallel Feature Tracker for Extended Image Sequences
This paper presents a feature tracker for long image sequences based on simultaneously estimating the motions and deformations of a collection of adjacent image patches. By sharing common corner nodes, the patches achieve greater stability than independent patch trackers. Modeling full bilinear deformations enables tracking in sequences which have large nontranslational motions and/or foreshortening effects. We demonstrate the advantages of our technique with respect to previous algorithms using experimental results.
14227015
Towards an Efficient Semantic Prefetching for Location Based Services
Location-Based Services(LBSs) in a wireless location-aware network are public and personal services intended to be available for users. It is important to support Location Dependent Data(LDD) that users want to get to their moving location properly. If we get many LDD in a local device, the communication cost increased by frequent connections can remarkably reduce. General prefetching scheme make it possible to send data to mobile clients in advance. But, after analyzing queries fixed to users’ interests in current location, it is difficult to support proper data in LBSs. Therefore, we propose a Semantic Prefetching scheme to efficiently prefetch LDD and semantic description through servers with large scale data. Also, with our semantic prefetching scheme for LDD in LBSs, we propose a new cache management scheme to manage data needed by mobile users. A performance study shows efficiency of these schemes when compared to traditional semantic cache scheme.
30593608
Skyeye: An Instruction Simulator with Energy Awareness
This paper presents a novel strategy aimed at modeling the instruction energy consumption of ARM microprocessors with dynamic voltage scaling (DVS) support. A novel energy estimation algorithm is designed, which can record the function calls, and generate a detailed energy profile for each function in a specific program. Some of the optimization policies for implementation are also discussed. These optimization policies reduce the workload of the energy estimators for the individual SOC systems. The prototype system, SKYEYE, can automatically detect the voltage/frequency variation activated by DVS system, and adjust the energy estimation model accordingly. The experiment results further prove the effectiveness of the algorithm.
16869035
An approach to virtual allocation in storage systems
This article presents virtual allocation, a scheme for flexible storage allocation. Virtual allocation separates storage allocation from the file system. It employs an allocate-on-write strategy which lets applications fit into the actual usage of storage space, without regard to the configured file system size. This improves flexibility by allowing storage space to be shared across different file systems. This article presents the design of virtual allocation and its evaluation through benchmarks. To illustrate our approach, we implemented a prototype system on PCs running Linux. We present the results from the prototype implementation and its evaluation.
17171711
Characterization of errors in compositing panoramic images
In this paper we describe the effect of errors in the intrinsic camera parameters on reconstructed panoramic images. A panoramic image is created by first capturing a sequence of images while rotating the camera about a vertical axis a full 360/spl deg/. The subsequent steps are projecting the original rectilinear images onto cylindrical surfaces and compositing them to form the panoramic image. Our analysis has led to a technique that allows simultaneous recovery of the camera focal length and properly composited panoramic images. The correct focal length can be determined by iterating the processes of projecting the original rectilinear images onto cylindrical surfaces given an estimate of the focal length and compositing the resulting images to yield an increasingly better estimate of the focal length. This paper shows that the convergence towards the correct focal length is exponential.