7128221
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performance. It is necessary to consider thermal effects during all levels of the design process, from the architectural level to the physical level. However, design-time temperature prediction requires access to block placement, wire models, power profile, and a chip-package thermal model. Thermal-aware design and synthesis necessarily couple architectural-level design decisions (e.g., scheduling) with physical design (e.g., floorplanning) and modeling (e.g., wire and thermal modeling). This article proposes an efficient and accurate thermal-aware floor-planning high-level synthesis system that makes use of integrated high-level and physical-level thermal optimization techniques. Voltage islands are automatically generated via novel slack distribution and voltage partitioning algorithms in order to reduce the design's power consumption and peak temperature. A new thermal-aware floorplanning technique is proposed to balance chip thermal profile, thereby further reducing peak temperature. The proposed system was used to synthesize a number of benchmarks, yielding numerous designs that trade off peak temperature, integrated circuit area, and power consumption. The proposed techniques reduces peak temperature by 12.5degC on average. When used to minimize peak temperature with a fixed area, peak temperature reductions are common. Under a constraint on peak temperature, integrated circuit area is reduced by 9.9% on average
62569135
Clustering for processing rate optimization
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level may have timing closure problems at post-layout stages due to the emergence of multiple-clock-period interconnects. Consequently, a trade-off between clock frequency and throughput may be needed to meet the design requirements. In this paper, we find that the processing rate, defined as the product of frequency and throughput, of a sequential system is upper bounded by the reciprocal of its maximum cycle ratio, which is only dependent on the clustering. We formulate the problem of processing rate optimization as seeking an optimal clustering with the minimal maximum-cycle-ratio in a general graph, and present an iterative algorithm to solve it. Since our algorithm avoids binary search and is essentially incremental, it has the potential of being combined with other optimization techniques. Experimental results validate the efficiency of our algorithm.
2271365
Minimal period retiming under process variations
With aggressive scaling down of feature sizes in VLSI fabrication, process variations have become a critical issue in designs. With process variations, timing optimization should consider the randomness introduced in delays. This paper considers how to retime a circuit under process variations. A statistical retiming problem is defined on the concept of a disutility function. Based on a new minimal period retiming algorithm, two algorithms are presented for the statistical retiming problem. Both theoretical and experimental results are given.
6804856
Processing rate optimization by sequential system floorplanning
The performance of a sequential system is usually measured by its frequency. However, with the appearance of global interconnects that require multiple clock periods to communicate the throughput is usually traded-off for higher frequency (for example, through wire pipelining or latency insensitive design). Therefore, we propose to use the processing rate, defined as the amount of processed inputs per unit time, as the performance measure. We show that the minimal ratio of the flip-flop number over the delay on any cycle is an upper bound of the processing rate. Since the processing rate of a sequential system is mainly decided by its floorplan when interconnect delays are dominant, the problem of floorplanning for processing rate optimization is formulated and solved. We optimize the processing rate bound directly in a floorplanner by applying Howard's algorithm incrementally. Experimental results confirm the effectiveness of our approach
8350188
Constraint Propagation And Progressive Verification For Component-Based Process Model
System assembly is one of the major issues in engineering complex component-based systems. This is especially true when heterogeneous, COTS and GOTS distributed systems, typical in industrial applications, are involved. The goal of system assembly is not only to make constituent components work together, but also to ensure that the components as a whole behave consistently and guarantee certain end-to-end properties. Despite recent advances, there is a lack of understanding about software composability, as well as theory and techniques for checking and verifying component-based systems. A theory of software system constraints about components, their environment and about system as a whole is the necessary foundation toward solid understanding of the composability of component-based systems. In this paper, we present a systematic approach for constraint specification and constraint propagation in concert with design refinement with a novel technique to ensure consistency between system-wide and component constraints in a design composition process of component-based systems. The consistent constraint propagation is used in our approach to drive progressive verification of the design. It allows us to verify overall design composition without interference of internal details of component designs. Verification is done separately at architectural and component levels without having to compose results of component analyses. A component can be safely replaced with alternative design without re-verifying the overall system composition so long as the replacement conforms to the corresponding interface and component constraint(s).
12186597
A Power-Saving Multi-Radio Multi-Channel MAC Protocol for Wireless Local Area Networks
Opportunistic spectrum access and adaptive power management are effective techniques to improve throughput, delay performance, and energy efficiency for wireless networks. In this paper, we consider the joint design of opportunistic spectrum access and adaptive power management under the setting of multi-radio nodes and multi-channel wireless local area networks (WLANs) under the distributed coordination function (DCF) mode. This design problem is particularly challenging due to the conflicting nature of the multi-radio capability of a node, i.e., multiple radios improve throughput and delay performance at the cost of increased energy consumption. To address this problem, we propose a power-saving multi-channel MAC protocol (PSM-MMAC), which is capable of reducing the collision probability and the waiting time in the ‘awake’ state of a node, resulting in improved throughput, delay performance, and energy efficiency. The key ideas of PSM-MMAC are the following: we first estimate the number of active links; given this estimation as well as queue lengths and channel conditions, we appropriately select channels, radios, and power states (i.e., awake or doze state); then we optimize the medium access probability in p-persistent CSMA used in the data exchange. Another contribution of this paper is an analytical model that characterizes the throughput performance. Simulation results validate the accuracy of our analytical model and show that our proposed protocol is able to significantly improve both throughput and energy efficiency.
205093793
On p-Creative Sets and p-Completely Creative Sets
Abstract We study p-creative sets and p-completely creative sets. We first prove that for recursively enumerable sets, p-creativeness is equivalent to p-complete creativeness and Myhill's theorem still holds in the polynomial setting. We then consider p-creativity and p-complete creativity for time complexity classes. We prove that for P, p-creativeness is equivalent to p-complete creativeness. Moreover, we prove that a set A is p-m-complete for DEXT iff A is p-creative for P in DEXT. Since every p-m-complete set for DEXT is p-1-complete (Berman, 1977), we know that Myhill's theorem still holds for P in DEXT. These results can also be proved for NP in NEXT. k -creative sets and k -completely creative sets in NP are next studied. ( k,l )-creative sets and ( k,l )-completely creative sets in a more general setting are defined and shown to exist. It is known that k -completely creative sets are NP-complete (Joseph and Young, 1985), but it is not known whether the converse is true. We approach this problem based on our “double diagonalization” technique of showing that every p-m-complete set for DEXT is p-creative for P. A new class of k -completely creative sets is constructed as well.
4227250
Content-based image retrieval by clustering
In a typical content-based image retrieval (CBIR) system, query results are a set of images sorted by feature similarities with respect to the query. However, images with high feature similarities to the query may be very different from the query in terms of semantics. This is known as the semantic gap. We introduce a novel image retrieval scheme, CLUster-based rEtrieval of images by unsupervised learning (CLUE), which tackles the semantic gap problem based on a hypothesis: semantically similar images tend to be clustered in some feature space. CLUE attempts to capture semantic concepts by learning the way that images of the same semantics are similar and retrieving image clusters instead of a set of ordered images. Clustering in CLUE is dynamic. In particular, clusters formed depend on which images are retrieved in response to the query. Therefore, the clusters give the algorithm as well as the users semantic relevant clues as to where to navigate. CLUE is a general approach that can be combined with any real-valued symmetric similarity measure (metric or nonmetric). Thus it may be embedded in many current CBIR systems. Experimental results based on a database of about 60, 000 images from COREL demonstrate improved performance.
6599744
A multilayer recurrent neural network for solving continuous-time algebraic Riccati equations
A multilayer recurrent neural network is proposed for solving continuous-time algebraic matrix Riccati equations in real time. The proposed recurrent neural network consists of four bidirectionally connected layers. Each layer consists of an array of neurons. The proposed recurrent neural network is shown to be capable of solving algebraic Riccati equations and synthesizing linear-quadratic control systems in real time. Analytical results on stability of the recurrent neural network and solvability of algebraic Riccati equations by use of the recurrent neural network are discussed. The operating characteristics of the recurrent neural network are also demonstrated through three illustrative examples.