2051171
Accurate estimation of global buffer delay within a floorplan
Closed-form expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anywhere. In practice, designs frequently have large blocks that make the ideal buffer-insertion solution unrealizable. The theory of Otten (ACM/IEEE Intl. Symp. Physical Design, p. 104, 1998) is extended to show how one can model the blocks into a simple delay-estimation technique that applies to both two-pin and multipin nets. Even though the formula uses one buffer type, it shows remarkable accuracy in predicting delay when compared to an optimal realizable buffer-insertion solution. Potential applications include wire planning, timing analysis during floorplanning, or global routing. The authors' experiments show that their approach accurately predicts delay when compared to constructing a realizable buffer insertion with multiple buffer types
11408697
Path-Based Buffer Insertion
Along with the progress of very-large-scale-integration technology, buffer insertion plays an increasingly critical role on affecting circuit design and performance. Traditional buffer insertion algorithms are mostly net based and therefore often result in suboptimal delay or unnecessary buffer expense due to the lack of global view. In this paper, we propose a novel path-based-buffer-insertion (PBBI) scheme which can overcome the weakness of the net-based approaches. We also discuss some potential difficulties of the PBBI approach and propose solutions to them. A fast estimation on buffered delay is employed to improve the solution quality. Gate sizing is also considered at the same time. Experimental results show that our method can efficiently reduce buffer/gate cost significantly (by 71% on average) when compared to traditional net-based approaches. To the best of our knowledge, this is the first work on path based buffer insertion and simultaneous gate sizing.
10406726
Associative Skew Clock Routing for Difficult Instances
In clock network synthesis, sometimes skew constraints are required only within certain groups of clock sinks and do not exist between different groups. This is the so-called associative skew clock routing problem. Although the number of constraints is reduced, the problem becomes more difficult to solve due to the enlarged solution space. The perhaps only previous work used a very primitive delay model and cannot handle difficult instances in which sink groups are intermingled. We reuse existing techniques to solve this problem, including the difficult instances, based on a more accurate and popular delay model. Experimental results show that our algorithm can reduce the total clock routing wirelength by 12% on average compared to greedy-DME which is one of the best zero skew routing algorithms
28075982
Clock buffer polarity assignment for power noise reduction
7189153
Antenna avoidance in layer assignment
The sustained progress of very-large-scale-integration (VLSI) technology has dramatically increased the likelihood of the antenna problem in the manufacturing process and calls for corresponding considerations in the routing stage. In this paper, the authors propose a technique that can handle the antenna problem during the layer-assignment (LA) stage, which is an important step between global routing and detailed routing. The antenna-avoidance problem is modeled as a tree-partitioning problem with a linear-time-optimal-algorithm solution. This algorithm is customized to guide antenna avoidance in the LA stage. A linear-time optimal jumper-insertion algorithm is also derived. Experimental results on benchmark circuits show that the proposed techniques can lead to an average of 76% antenna-violation reduction and 99% via-violation reduction.
1271597
An improved AMG-based method for fast power grid analysis
The continuing VLSI technology scaling leads to increasingly significant power supply fluctuations, which needs to be modeled accurately in circuit design and verification. Meanwhile, the huge size of power grid requires its analysis to be fast and highly scalable. Algebraic multigrid (AMG) has been recognized as a promising approach for fast power grid analysis. We propose several techniques to improve AMG-based power grid analysis: (1) dynamic reduction threshold; (2) weighted interpolation; and (3) a new error smoothing scheme. Experimental results on power grid with up to 1.6 million nodes show that these techniques can improve accuracy by over 10 times compared to a reported industrial method while retaining the same fast speed
4517069
A Fingerprint Orientation Model Based on 2D Fourier Expansion (FOMFE) and Its Application to Singular-Point Detection and Fingerprint Indexing
In this paper, we have proposed a fingerprint orientation model based on 2D Fourier expansions (FOMFE) in the phase plane. The FOMFE does not require prior knowledge of singular points (SPs). It is able to describe the overall ridge topology seamlessly, including the SP regions, even for noisy fingerprints. Our statistical experiments on a public database show that the proposed FOMFE can significantly improve the accuracy of fingerprint feature extraction and thus that of fingerprint matching. Moreover, the FOMFE has a low-computational cost and can work very efficiently on large fingerprint databases. The FOMFE provides a comprehensive description for orientation features, which has enabled its beneficial use in feature-related applications such as fingerprint indexing. Unlike most indexing schemes using raw orientation data, we exploit FOMFE model coefficients to generate the feature vector. Our indexing experiments show remarkable results using different fingerprint databases
5955353
Conjectural Equilibrium in Multiagent Learning
Learning in a multiagent environment is complicated by the fact that as other agents learn, the environment effectively changes. Moreover, other agents' actions are often not directly observable, and the actions taken by the learning agent can strongly bias which range of behaviors are encountered. We define the concept of a conjectural equilibrium, where all agents' expectations are realized, and each agent responds optimally to its expectations. We present a generic multiagent exchange situation, in which competitive behavior constitutes a conjectural equilibrium. We then introduce an agent that executes a more sophisticated strategic learning strategy, building a model of the response of other agents. We find that the system reliably converges to a conjectural equilibrium, but that the final result achieved is highly sensitive to initial belief. In essence, the strategic learner's actions tend to fulfill its expectations. Depending on the starting point, the agent may be better or worse off than had it not attempted to learn a model of the other agents at all.
4103897
Component-wise mapping of media-needs to a distributed presentation environment
Whereas formal specification and verification have shown value by improving reliability and trustworthiness of traditional industrial systems, we made a contribution by applying them to the field of distributed multimedia presentations in an ambient intelligence context. We investigate a mapping problem in which media needs are to be satisfied using given presentation resources. The goal of the investigation is to see whether Broy's stream-based component framework can be used to model media-related interfaces and constraints in an elegant way. The formalization will serve as a framework for the development of an automated mapper that can handle real media needs and real presentation resources. It combines the well-known notations of Z with an underlying concurrency theory. We show that not only verification issues can be handled such as bandwidth and delay constraints, but also architecture-level issues such as network structural media-type compatibilities
13136257
An agent-based architecture for distributed interfaces and timed media in a storytelling application
This paper presents an agent-based architecture that enables the presentation of interactive timed media to distributed and networked devices. The architecture provides an automatic mapping of the same document to different environments. It uses a hierarchy of PAC (Presentation-Abstraction-Control) agents, which allows separating the presentation aspects from the control aspects and dynamically registering the new PAC agents to the system.
18760651
Modelling of SACK TCP and application to the HTTP file transfer environment
It is known that analytic modelling for TCP latency is a non trivial task. Recently, some significant progress has been made, such as the comprehensive result by Sikdar et al. However, models similar to these often rely on trial and error methods such as "data fitting". This can lead to a very limited scope for the resulting model and also large estimation error. In this paper, we propose improvements to Sikdar's SACK TCP model. A new delayed acknowledgement slow start model is developed that is analytically derived from the slow start algorithm which provides a novel mechanism to model the relationship between RTT and the delayed acknowledgement timer. We introduce a simple mechanism to include time taken to send an HTTP get request to broaden the scope of our SACK TCP model to Website file transfer. Simulation and live Internet experimentation has validated our scheme