16925677
Multi-level customization in application engineering
Developing mechanisms for mapping features to analysis models.
8872211
Synchronizing Cardinality-Based Feature Models and Their Specializations
A software product line comprises a set of products implementing different configurations of features. The set of valid feature configurations within a product line can be described by a feature model. In some practical situations, a feature configuration needs to be derived in stages by creating a series of successive specializations of the initial feature model. In this paper, we consider the scenario where changes to the feature model due to, for example, the evolution of the product line, need to be propagated to its existing specializations and configurations. After discussing general dimensions of model synchronization, a solution to synchronizing cardinality-based feature models and their specializations and configurations is presented.
7848399
Model-driven software product lines
Model-driven software product lines combine the abstraction capability of Model Driven Software Development (MDSD) and the variability management capability of Software Product Line Engineering (SPLE). This short contribution motivates the idea of model-driven software product lines and briefly explains the concepts underlying feature-based model templates, which is a particular technique for modeling software product lines.
4382018
TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP
This paper describes the polymorphous TRIPS architecture that can be configured for different granularities and types of parallelism. The TRIPS architecture is the first in a class of post-RISC, dataflow-like instruction sets called explicit data-graph execution (EDGE). This EDGE ISA is coupled with hardware mechanisms that enable the processing cores and the on-chip memory system to be configured and combined in different modes for instruction, data, or thread-level parallelism. To adapt to small and large-grain concurrency, the TRIPS architecture prototype contains two out-of-order, 16-wide-issue grid processor cores, which can be partitioned when easily extractable fine-grained parallelism exists. This approach to polymorphism provides better performance across a wide range of application types than an approach in which many small processors are aggregated to run workloads with irregular parallelism. Our results show that high performance can be obtained in each of the three modes---ILP, TLP, and DLP---demonstrating the viability of the polymorphous coarse-grained approach for future microprocessors.
44446781
One-dimensional simplex search
Abstract We present a one-dimensional simplex search algorithm. We show that it converges to an optimum of any unimodal function and can be made to perform like the well known Golden Section search. We point out why our search would be preferable over other search algorithms when used as a subroutine in multidimensional search.
33288907
Practical Pay-TV Scheme Using Traitor Tracing Scheme for Multiple Channels
A Pay-TV scheme broadcasts a set of services or streams instead of one. That is, a pay-TV scheme is a specific application of a broadcast encryption scheme in which the secret to be broadcast is associated with a number of services. For example, a pay-TV broadcaster offers various channels such as a sports channel, a movie channel, and so on. A traitor tracing scheme is a variant of a broadcast encryption scheme, so can be applied to construct a pay-TV scheme. However, because most known traitor tracing schemes deal with the broadcast of a single stream, a direct extension to multiple streams is too inefficient, i.e., direct extension to an m-stream case would involve an m-fold increase in the user's secret keys. In other words, if the number of streams to be sent increases, the number of secret keys each user must store in a secure memory also linearly increases. Therefore, we require a specific traitor tracing scheme which can be efficiently applied to a pay-TV scheme. We propose a new traitor tracing scheme for multiple channels and its application to a pay-TV scheme. The number of secret keys each user must store in a secure memory is just one regardless of the number of channels and it cannot be changed. Our scheme has a revocation property, i.e., we can revoke some users without redistributing a new secret key to other un-revoked users. Our scheme also provides a so called holding property – we can revoke some users and un-revoke them without redistribution of new keys after some period. This is very useful in a pay-TV scheme since a user may wish to un-subscribe from a channel for some periods and re-subscribe again later. Moreover, our pay-TV scheme is based on a public key traitor tracing scheme. Therefore, any content provider can send encrypted data to users with the public key the system manager provides. Our scheme can also be extended to provide asymmetric property and be secure against the adaptive chosen ciphertext attack.
42768359
Hardware-Accelerated Real-Time Rendering for 3D Sumi-e Painting
This paper presents a method for real-time 3D Sumi-e rendering using normal graphics hardware. Sumi-e is one of the traditional oriental painting styles. Most research on Sumi-e paintings has focused on 2D or 2.5D Sumi-e brushwork simulation. On these systems, complicated user's hand drawing is required to generate the image of Sumi-e effects, and it can render the 2D or 2.5D Sumi-e images only. We present an automated rendering system for 3D image of Sumi-e painting. It uses 3D common object as an input data and does not need any additional input of user brushwork. Especially for the real-time rendering, hardware-accelerated algorithm for Sumi-e rendering is newly suggested in our system. It is designed with efficiency for customer level graphics hardware. The results of this paper show that the features of traditional Sumi-e painting are successfully modeled and that 3D Sumi-e painting is rendered in real-time effectively.
36481442
An Efficient Revocation Scheme for Stateless Receivers
A revocation scheme for stateless receivers enables the center to deliver information securely to the legitimate users over a public channel, where the receivers do not update their state from session to session. In this paper, we propose an efficient revocation scheme for stateless receivers. Our scheme uses a logical hierarchical key tree. Among previously proposed revocation schemes for stateless receivers, the SD scheme [10] is very efficient with respect to message length and Asano’s schemes [1] are very efficient with respect to key storage. Using a binary key tree, our scheme has the same message length as the SD scheme and requires the storage of log n keys, whereas the SD scheme requires the storage of \(\frac{1}{2}\log ^{2} n + \frac{1}{2}\log n + 1\) keys. Using an a-ary key tree, our scheme has the same key storage as Asano’s method 2 and requires a message length of at most 2r–1, whereas Asano’s schemes require a message length of at most \(r(\frac{\log\frac{n}{r}}{\log a} +1)\). Therefore, our scheme is more efficient than the SD scheme and Asano’s schemes.