15685762
Why gulling software colleagues is popular
A few months ago, a 550-person software company in Oregon cut a significant part of its developer workforce to reduce expenses and align its salaries with industry averages. It had already streamlined its software development practices, which increased productivity and improved product reliability. During the year-long streamlining program, the company had mapped existing processes to make explicit exactly how software was being developed and then carefully refined the processes to reduce the cost and time required. Implementing these changes required people to relocate into multidisciplinary teams and eliminate tasks that added no value. The majority of staff, facilitated by consultants, participated in this process. At the end of these initiatives, our research team did a follow-up survey and investigation to gauge how well the company was now organized to let staff attain their corporate goals. We found room for more improvement, but also some interesting results regarding employees' attitudes toward staff reductions.
19085830
An analysis of multiple-class vacation queues with individual thresholds
This study examines a multiple-class M/G/1 queue with multiple thresholds. Each class of customer arrives according to an independent Poisson process, and each class has its own threshold. The idle server is reactivated as soon as any one of the thresholds is reached. Both FCFS and non-preemptive priority cases are considered. The Laplace-Stieltjes transform of the waiting time distribution function and the mean waiting time for each class of customers are derived.
11585078
An Arrival Time Approach to M/G/1-type Queues with Generalized Vacations
We propose a simple way, called the arrival time approach, of finding the queue length distributions for M/G/1-type queues with generalized server vacations. The proposed approach serves as a useful alternative to understanding complicated queueing processes such as priority queues with server vacations and MAP/G/1 queues with server vacations.
5325970
Nearly Dynamic Task Model Scheduling with Aperiodic Tasks
5865107
Design and implementation of a reusable software tool with application
This paper describes the design and implementation of a software tool that can be reused for an empirical validation experiment of several commonly used software metrics in object-oriented environments. A detailed description of the steps of the potential validation experiment is provided. An overview of the software metrics considered and the required implementation of the test data to be used in the proposed experiment are also presented.
214800963
High Efficiency Counter Mode Security Architecture via Prediction and Precomputation
Encrypting data in unprotected memory has gained much interest lately for digital rights protection and security reasons. Counter Mode is a well-known encryption scheme. It is a symmetric-key encryption scheme based on any block cipher, e.g. AES. The schemeýs encryption algorithm uses a block cipher, a secret key and a counter (or a sequence number) to generate an encryption pad which is XORed with the data stored in memory. Like other memory encryption schemes, this method suffers from the inherent latency of decrypting encrypted data when loading them into the on-chip cache. One solution that parallelizes data fetching and encryption pad generation requires the sequence numbers of evicted cache lines to be cached on-chip. On-chip sequence number caching can be successful in reducing the latency at the cost of a large area overhead. In this paper, we present a novel technique to hide the latency overhead of decrypting counter mode encrypted memory by predicting the sequence number and pre-computing the encryption pad that we call one-time-pad or OTP. In contrast to the prior techniques of sequence number caching, our mechanism solves the latency issue by using idle decryption engine cycles to speculatively predict and pre-compute OTPs before the corresponding sequence number is loaded. This technique incurs very little area overhead. In addition, a novel adaptive OTP prediction technique is also presented to further improve our regular OTP prediction and precomputation mechanism. This adaptive scheme is not only able to predict encryption pads associated with static and infrequently updated cache lines but also those frequently updated ones as well. Experimental results using SPEC2000 benchmark show an 82% prediction rate. Moreover, we also explore several optimization techniques for improving the prediction accuracy. Two specific techniques, Two-level prediction and Context-based prediction are presented and evaluated. For the two-level prediction, the prediction rate was improved from 82% to 96%. With the context-based prediction, the prediction rate approaches 99%. Context-based OTP prediction outperforms a very large 512KB sequence number cache for many memory-bound SPEC programs. IPC results show an overall 15% to 40% performance improvement using our prediction and precomputation, and another 7% improvement when context-based prediction techniques is used.
5285655
BIT: A Tool for Instrumenting Java Bytecodes
BIT (Bytecode Instrumenting Tool) is a collection of Java classes that allow one to build customized tools to instrument Java Virtual Machine (JVM) bytecodes. Because understanding program behavior is an essential part of developing effective optimization algorithms, researchers and software developers have built numerous tools that carry out program analysis. Although there are existing tools that analyze and modify executables on a variety of operating systems and machine architectures, there currently is no framework for carrying out the same task for JVM bytecodes. In this paper, we describe BIT, which allows the user to insert calls to analysis methods anywhere in the bytecode, so that information can be extracted from the user program while it is being executed. In this paper, we describe several simple tools built using BIT and also report on BIT's performance. We found that the overhead for the execution speed and size were between 23% to 150%.
9316570
Understanding the behavior of compiler optimizations
Compiler writers usually follow some known rules of thumb on the effectiveness of optimizations when implementing compilers. While many of these rules may be correct, it is a far better methodology to base implementation decisions on a scientific evaluation of optimizations. To this end, we present an exploration of the costs and benefits of optimizations implemented in Jikes RVM, a research virtual machine that includes an aggressive optimizing compiler. We measure and report the performance impact due to optimizations, both when the optimizations are used by themselves and when they are used with other optimizations. To understand why optimizations do or do not improve performance, we wrote kernel programs to test and explore the behavior of each optimization. To increase the generality of our results, we report measurements on two architectures (IA32 and PowerPC). Based on our findings, we present a set of recommendations for compiler writers.