10424667
Miss Rate Prediction Across Program Inputs and Cache Configurations
Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight into how cache behavior varies across all data input sets and all cache configurations. This paper uses locality analysis to generate a parameterized model of program cache behavior. Given a cache size and associativity, this model predicts the miss rate for arbitrary data input set sizes. This model also identifies critical data input sizes where cache behavior exhibits marked changes. Experiments show this technique is within 2 percent of the hit rate for set associative caches on a set of floating-point and integer programs using array and pointer-based data structures. Building on the new model, this paper presents an interactive visualization tool that uses a three-dimensional plot to show miss rate changes across program data sizes and cache sizes and its use in evaluating compiler transformations. Other uses of this visualization tool include assisting machine and benchmark-set design. The tool can be accessed on the Web at http://www.cs.rochester.edu/research/locality
302118
A Hierarchical Model of Reference Affinity
To improve performance, data reorganization needs locality models to identify groups of data that have reference affinity. Much past work is based on access frequency and does not consider accessing time directly. In this paper, we propose a new model of reference affinity. This model considers the distance between data accesses in addition to the frequency. Affinity groups defined by this model are consistent and have a hierarchical structure. The former property ensures the profitability of data packing, while the latter supports data packing for storage units of different sizes. We then present a statistical clustering method that identifies affinity groups among structure fields and data arrays by analyzing training runs of a program. When used by structure splitting and array regrouping, the new method improves the performance of two test programs by up to 31%. The new data layout is significantly better than that produced by the programmer or by static compiler analysis.
1789234
Phase-Based Miss Rate Prediction Across Program Inputs
Previous work shows the possibility of predicting the cache miss rate (CMR) for all inputs of a program. However, most optimization techniques need to know more than the miss rate of the whole program. Many of them benefit from knowing miss rate of each execution phase of a program for all inputs. 
 
In this paper, we describe a method that divides a program into phases that have a regular locality pattern. Using a regression model, it predicts the reuse signature and then the cache miss rate of each phase for all inputs. We compare the prediction with the actual measurement. The average prediction is over 98% accurate for a set of floating-point programs. The predicted CMR-traces matches the simulated ones in spite of dramatic fluctuations of the miss rate over time. This technique can be used for improving dynamic optimization, benchmarking, and compiler design.
7858282
Gated memory control for memory monitoring, leak detection and garbage collection
In the past, program monitoring often operates at the code level, performing checks at function and loop boundaries. Recent research shows that profiling analysis can identify high-level phases in complex binary code. Examples are time steps in scientific simulations and service cycles in utility programs. Because of their larger size and more predictable behavior, program phases make it possible for more accurate and longer term predictions of program behavior, especially its memory usage. This paper describes a new approach that uses phase boundaries as the gates to monitor and control the memory usage. In particular, it presents three techniques: memory usage monitoring, object lifetime classification, and preventive memory management. They use phase-level patterns to predict the trend of the program's memory demand, identify and control memory leaks, improve the efficiency of garbage collection. The potential of the new techniques is demonstrated on two non-trivial applications---a C compiler and a Lisp interpreter.
735556
Lightweight reference affinity analysis
Previous studies have shown that array regrouping and structure splitting significantly improve data locality. The most effective technique relies on profiling every access to every data element. The high overhead impedes its adoption in a general compiler, In this paper, we show that for array regrouping in scientific programs, the overhead is not needed since the same benefit can be obtained by pure program analysis.We present an interprocedural analysis technique for array regrouping. For each global array, the analysis summarizes the access pattern by access-frequency vectors and then groups arrays with similar vectors. The analysis is context sensitive, so it tracks the exact array access. For each loop or function call, it uses two methods to estimate the frequency of the execution. The first is symbolic analysis in the compiler. The second is lightweight profiling of the code. The same interprocedural analysis is used to cumulate the overall execution frequency by considering the calling context. We implemented a prototype of both the compiler and the profiling analysis in the IBM® compiler, evaluated array regrouping on the entire set of SPEC CPU2000 FORTRAN benchmarks, and compared different analysis methods. The pure compiler-based array regrouping improves the performance for the majority of programs, leaving little room for improvement by code or data profiling.
17618182
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of measuring has restricted its practical uses in performance debugging, locality analysis and optimizations of long-running applications.In this work, we improve the efficiency by exploring the connection between time and locality. We propose a statistical model that converts cheaply obtained time distance to the more costly reuse distance. Compared to the state-of-the-art technique, this approach reduces measuring time by a factor of 17, and approximates cache line reuses with over 99% accuracy and the cache miss rate with less than 0.4% average error for 12 SPEC 2000 integer and floating-point benchmarks. By exploiting the strong correlations between time and locality, this work makes precise locality as easy to obtain as data access frequency, and opens new opportunities for program optimizations.
5990724
Cost-Conscious Cleaning of Massive RFID Data Sets
Efficient and accurate data cleaning is an essential task for the successful deployment of RFID systems. Although important advances have been made in tag detection rates, it is still common to see a large number of lost readings due to radio frequency (RF) interference and tag-reader configurations. Existing cleaning techniques have focused on the development of accurate methods that work well under a wide set of conditions, but have disregarded the very high cost of cleaning in a real application that may have thousands of readers and millions of tags. In this paper, we propose a cleaning framework that takes an RFID data set and a collection of cleaning methods, with associated costs, and induces a cleaning plan that optimizes the overall accuracy-adjusted cleaning costs by determining the conditions under which inexpensive methods are appropriate, and those under which more expensive methods are absolutely necessary.
205000553
Scheduling on a Hypercube
Abstract We present a Θ(n2) worst-case-time algorithm to determine the minimum finishing time for a preemptive schedule of n independent jobs on a hypercube of fixed dimension.
7666408
Equivalent permutation capabilities between time-division optical omega networks and non-optical extra-stage omega networks
Because signals carried by two waveguides entering a common switch element would generate crosstalk, a regular <i>N</i> × <i>N</i> multistage interconnection network (MIN) cannot be directly used as an optical switch between <i>N</i> inputs and <i>N</i> outputs in an optical network. A simple solution is to use a 2<i>N</i> × 2<i>N</i> cube-type MIN to provide the <i>N</i> × <i>N</i> connections, which needs a much larger hardware cost. A recent research proposed another solution, called the time-domain approach, that divides the <i>N</i> optical inputs into several groups such that crosstalk-free connections can be provided by an <i>N</i> × <i>N</i> regular MIN in several time slots, one for each group. Researchers studied this approach on Omega networks and defined the class set θ to be the set of <i>N</i>-permutations realizable in two time slots on an Omega network. They proved that the size of θ is larger than the size of class Ω, where Ω consists of all <i>N</i>-permutations admissible to a regular <i>N</i> × <i>N</i> (nonoptical) Omega network. This paper first presents an optimal <i>O</i>(<i>N</i> log <i>N</i>) time algorithm for identifying whether a given permutation belongs to class θ or not. Using this algorithm, this paper then proves an interesting result that the class θ is identical to the class Ω + 1 which represents the set of <i>N</i>-permutations admissible to a nonoptical <i>N</i> × <i>N</i> one-extra stage Omega network.
25793995
Update-based cache replacement policies in wireless data access
Most of cache replacement schemes are access-based replacement policies since they are based on object access frequency/time information. However, update information is extremely important since an updated object makes itself invalid, and the object hit information becomes useless. In this paper, we propose two update-based replacement policies, the least access-to-update ratio (LA2U) and least access-to-update difference (LAUD) in wireless data access, based on both update frequency and access frequency. Extensive simulations have been carried out to evaluate the proposed policies. Simulation results show that the proposed update-based policies outperform access-based policies at most cases. It is concluded that considering update information in designing replacement policies can increase cache performance, especially, when updates are heavy
12254119
Wireless network security