15601419
A Peer-to-Peer Reference Architecture
Peer-to-peer (P2P) applications are extremely popular on the Internet because they allow users to share information in a decentralized manner. Internet users use file-sharing applications (e.g., BitTorrent, KaZaA) to share and exchange files and collaboration applications (e.g., Jabber, Groove) to exchange chat messages and work on shared documents. A reference architecture for a domain provides an architecture template which can be used as a starting point for designing the software architecture of a system in that domain. Despite the popularity of P2P applications there is no reference architecture for the P2P domain. This paper presents a reference architecture for the P2P domain. The reference architecture has been designed to satisfy the concerns that a P2P application needs to address. The reference architecture takes a service-centric view of the P2P domain. The reference architecture can be used to describe the structure of existing P2P applications and middlewares. The paper validates the reference architecture by describing the structure of some of the existing P2P applications and middlewares using the reference architecture
13609251
Creating an adaptive network of hubs using Schelling's model
Adjusting the overlay network topology in a peer-to-peer network to satisfy performance criteria.
42861498
Decentralized compression and predistribution via randomized gossiping
12161806
From Design Patterns to Parallel Architectural Skeletons
The concept of design patterns has been extensively studied and applied in the context of object-oriented software design. Similar ideas are being explored in other areas of computing as well. Over the past several years, researchers have been experimenting with the feasibility of employing design-patterns related concepts in the parallel computing domain. In the past, several pattern-based systems have been developed with the intention to facilitate faster parallel application development through the use of preimplemented and reusable components that are based on frequently used parallel computing design patterns. However, most of these systems face several serious limitations such as limited flexibility, zero extensibility, and the ad hoc nature of their components. Lack of flexibility in a parallel programming system limits a programmer to using only the high-level components provided by the system. Lack of extensibility here refers to the fact that most of the existing pattern-based parallel programming systems come with a set of prebuilt patterns integrated into the system. However, the system provides no obvious way of increasing the repertoire of patterns when need arises. Also, most of these systems do not offer any generic view of a parallel computing pattern, a fact which may be at the root of several of their shortcomings. This research proposes a generic (i.e., pattern- and application-independent) model for realizing and using parallel design patterns. The term “parallel architectural skeleton” is used to represent the set of generic attributes associated with a pattern. The Parallel Architectural Skeleton Model (PASM) is based on the message-passing paradigm, which makes it suitable for a LAN of workstations and PCs. The model is flexible as it allows the intermixing of high-level patterns with low-level message-passing primitives. An object-oriented and library-based implementation of the model has been completed using C++and MPI, without necessitating any language extension. The generic model and the library-based implementation allow new patterns to be defined and included into the system. The skeleton-library serves as a framework for the systematic, hierarchical development of network-oriented parallel applications.
2485299
Sizing CMOS circuits for increased transient error tolerance
The continuous shrinking of microelectronic device sizes with every technology generation, along with the reduction in supply voltages, is causing a significant decrease in circuit noise margins. This leads to increased susceptibility of circuits to transient errors. In this paper, we propose a methodology to increase the robustness of combinational circuits to transient errors by sizing the gates of the circuit in such a way that the number of errors propagated to the primary output is minimized while the timing requirement is met. Using SPICE simulation, we validate that combinational circuits propagate fewer numbers of transient errors to the circuit output after application of our sizing algorithm.
17509738
A Performance Debugger for a Language Supporting Data Distribution Primitives
Data parallel languages based on user-supplied data distribution directives significantly simplify the development of the initial version of a parallel application. However, selection of good data distributions leading to efficient computations is often quite difficult. Therefore, performance debuggers are usually employed to yield insights into effects of data distribution. This paper presents design and implementation of a performance debugger that is specifically targeted to meet the performance debugging requirements of a data-parallel programming model based on user-specified data distributions. The visual interface of the performance debugger provides feedback regarding data distributions amongst processor nodes, data access patterns during program execution, as well as statistical performance data. The feedback provided by the performance debugger is explicitly related back to objects in the programmer's source code.
36077313
Developing High-Performance Parallel Applications Using EPAS
In spite of the advent of high performance parallel computers and commodity clusters, complexity of parallel application development remains one of the major obstacles towards the mainstream adoption of parallel computing. Researchers are constantly investigating different approaches to reduce parallel application development time and increase productivity. As re-usable components, patterns have gained popularity in the sequential programming domain. Subsequently, several pattern-based parallel programming environments (PPEs) have been proposed to facilitate parallel application development procedure. Unfortunately, most of these PPEs lack the required flexibility in order to develop real-life parallel applications. In this paper, we describe the features of the EPAS (Extended Parallel Architectural Skeleton) PPE that enables development of complex parallel applications. We investigate and design the required patterns, and then use them to develop a parallel data cube computing application. Finally, we present the performance of the developed applications and discuss the results.