4778324
Pushing vertices in digraphs without long induced cycles
Given a digraph D and a subset X of vertices of D, pushing X in D means reversing the orientation of all arcs with exactly one end in X. We continue the study of deciding whether a digraph can be made acyclic using the push operation, focussing on special classes of well-structured digraphs. It is proved that the problem remains NP-complete even when restricted to the class of bipartite digraphs (i.e., oriented bipartite graphs). We characterize, in terms of two forbidden subdigraphs, the chordal digraphs which can be made acyclic using the push operation, and show that there is no similar characterization for the family of chordal bipartite digraphs. A polynomial algorithm, based on 2-SAT, for solving the problem for a subclass of the chordal bipartite digraphs is given. Finally, a characterization in terms of a finite number of forbidden subdigraphs, of the acyclically pushable bipartite permutation digraphs is given.
10979198
Weakly Hamiltonian-connected ordinary multipartite tournaments
Abstract We characterize weakly Hamiltonian-connected ordinary multipartite tournaments. Our result generalizes such a characterization for tournaments by Thomassen and implies a polynomial algorithm to decide the existence of a Hamiltonian path connecting two given vertices in an ordinary multipartite tournament and finds one, if it exists.
4333882
Linear-Time Representation Algorithms for Proper Circular-Arc Graphs and Proper Interval Graphs
Our main result is a linear-time (that is, time $O(m+n)$) algorithm to recognize and represent proper circular-arc graphs. The best previous algorithm, due to A. Tucker, has time complexity $O(n^2)$. We take advantage of the fact that (among connected graphs) proper circular-arc graphs are precisely the graphs orientable as local tournaments, and we use a new characterization of local tournaments. The algorithm depends on repeated representation of portions of the input graph as proper interval graphs. Thus we also find it useful to give a new linear-time algorithm to represent proper interval graphs. This latter algorithm also depends on an orientation characterization of proper interval graphs. It is conceptually simple and does not use complex data structures. As a byproduct of the correctness proof of the algorithm, we also obtain a new proof of a characterization of proper interval graphs by forbidden subgraphs.
4803217
Pushing the cycles out of multipartite tournaments
Abstract Let D be a digraph and X ⊆ V ( D ). By pushing X we mean reversing each arc of D with exactly one end in X. Klostermeyer proved that it is NP-complete to decide if a given digraph can be made acyclic using the push operation. Here we characterize, in terms of forbidden subdigraphs, the multipartite tournaments which can be made acyclic (resp. ordinary, unidirectional) using the push operation. This implies that the problem of deciding if a given multipartite tournament can be made acyclic (resp. ordinary, unidirectional) using the push operation and, if so, finding a suitable subset of vertices to push, is solvable in polynomial time.
4388882
Interval bigraphs and circular arc graphs
31025959
A Note on Spanning Local Tournaments in Locally Semicomplete Digraphs
We prove a result which implies that every k-connected locally semicomplete digraph which is not a semicomplete digraph must contain a k-connected spanning local tournament. This improves an earlier result of Guo and partially answers a question of Jackson and Thomassen.
2713872
A BIST scheme for on-chip ADC and DAC testing
In this paper we present a BIST scheme for testing on-chip A/D and D/A converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measuring the DNL and INL of the converters. We validate the scheme with software simulation-5% LSB (least significant bit) test accuracy can be achieved in the presence of reasonable analog imperfection.
1720329
Toward Inductive Logic Programming for Collaborative Problem Solving
In this paper, we tackle learning in distributed systems and the fact that learning does not necessarily involve the participation of agents directly in the inductive process itself. Instead, many systems frequently employ multiple instances of induction separately. The paper's main contribution is a new approach that tightly integrates processes of induction between distributed agents, based on inductive logic programming techniques, for a wider class of problem solving tasks. The approach combines inverse entailment with an epistemic approach to reasoning about knowledge, facilitating a systematic approach to the sharing of knowledge and invention of predicates only when required. We illustrate the approach for learning declarative program fragments and for a well-known path planning problem and compare results empirically to (multiple instances of) single agent-based induction over varying distributions of data. Given a chosen path planning algorithm, our algorithm enables agents to combine their local knowledge in an effective way to avoid central control while significantly reducing communication costs.
28276441
A Programmable BIST Core for Embedded DRAM
The programmable BIST design presented here supports various test modes using a simple controller. With the March C algorithm, the BIST circuit's overhead is under 1.3% for a 1-Mbit DRAM and under 0.3% for a 16-Mbit DRAM. The BIST design presented for embedded DRAM supports built-in self-diagnosis by feeding error information to the external tester. Moreover, using a specific test sequence, it can test for critical timing faults, reducing tester time for ac parametric test. The design supports wafer test, pre-burn-in test, burn-in, and final test. It is field-programmable; the user can program test algorithms using predetermined test elements (such as march elements, surround test elements, and refresh modes). The user can optimize the hardware for a specific embedded DRAM with a set of predetermined test elements. Our design is different from the microprogram-controlled BIST described by J. Dreibelbis et al. (1998) which has greater flexibility but higher overhead. Because our design begins at the register-transfer language level, test element insertion (for higher test coverage) and deletion (for lower hardware overhead are relatively easy.
400858
Toward good elimination orders for symbolic SAT solving
Fundamentally different from DPLL, a new approach to SAT has recently emerged that abandons search and enlists BDDs to symbolically represent clauses of the CNF. These BDDs are conjoined according to a schedule where some variables may be eliminated by quantification at each step to reduce the size of the intermediate BDDs. SAT solving then reduces to checking whether the final BDD is the zero constant. For this approach to be practical, finding a good quantification schedule is critical. We study the use of a variable elimination algorithm for this purpose, as well as two specific methods for the generation of good elimination orders based on CNF structure. While neither method appears to dominate, we show how one can heuristically select the better using the notion of width. We implement a symbolic SAT solver based on these techniques and evaluate its efficiency and robustness on a set of benchmarks against five other solvers, each having unique characteristics, including winners of the most recent SAT competition.
9984897
Structure Alignment Using Bilingual Chunking
A new statistical method called "bilingual chunking" for structure alignment is proposed. Different with the existing approaches which align hierarchical structures like sub-trees, our method conducts alignment on chunks. The alignment is finished through a simultaneous bilingual chunking algorithm. Using the constrains of chunk correspondence between source language (SL) and target language (TL), our algorithm can dramatically reduce search space, support time synchronous DP algorithm, and lead to highly consistent chunking. Furthermore, by unifying the POS tagging and chunking in the search process, our algorithm alleviates effectively the influence of POS tagging deficiency to the chunking result.The experimental results with English-Chinese structure alignment show that our model can produce 90% in precision for chunking, and 87% in precision for chunk alignment.