5420102
Dynamic RDT Model for Data Mining
19697806
Should Decision Trees be Learned using Rough Sets?
38848848
Rough Set Based Decision Tree Model for Classification
Decision tree, a commonly used classification model, is constructed recursively following a top down approach (from the general concepts to particular examples) by repeatedly splitting the training data set. ID3 is a greedy algorithm that considers one attribute at a time for splitting at a node. In C4.5, all attributes, barring the nominal attributes used at the parent nodes, are retained for further computation. This leads to extra overheads of memory and computational efforts. Rough Set theory (RS) simplifies the search for dominant attributes in the information systems. In this paper, Rough set based Decision Tree (RDT) model combining the RS tools with classical DT capabilities, is proposed to address the issue of computational overheads. The experiments compare the performance of RDT with RS approach and ID3 algorithm. The performance of RDT over RS approach is observed better in accuracy and rule complexity while RDT and ID3 are comparable.
39032710
Refining decision tree classifiers using rough set tools
The proposed hybridized rough set framework is composed of traditional Rough Set (RS) approach and classical Decision Tree (DT) induction algorithm. RS helps to identify dominant attributes and DT algorithm results in simpler and generalized classifier. The implementation of the Hybridized Rough Set Framework is presented as the RDT algorithm. GA heuristics are used to generalize the RDT algorithm further. Experimental results obtained on applying the hybridized rough set framework and the related base algorithms on datasets belonging to the three categories are presented in this paper. Accuracy, complexity, number of rules and number of attributes in the induced classifier assess the performance of the candidate algorithms. The results indicate that the proposed framework is an effective model for classification.
5623657
Satellite ATM Network Architectural Considerations and TCP/IP Performance
In this paper, we have provided a summary of the design options in Satellite-ATM technology. A satellite ATM network consists of a space segment of satellites connected by inter-satellite crosslinks, and a ground segment of the various ATM networks. A satellite-ATM interface module connects the satellite network to the ATM networks and performs various call and control functions. A network control center performs various network management and resource allocation functions. Several issues such as the ATM service model, media access protocols, and traffic management issues must be considered when designing a satellite ATM network to effectively transport Internet traffic. We have presented the buffer requirements for TCP/IP traffic over ATM-UBR for satellite latencies. Our results are based on TCP with selective acknowledgments and a per-VC buffer management policy at the switches. A buffer size of about 0.5 * RTT to 1 * RTT is sufficient to provide over 98% throughput to infinite TCP traffic for long latency networks and a large number of sources. This buffer requirement is independent of the number of sources. The fairness is high for a large numbers of sources because of the per-VC buffer management performed at the switches and the nature of TCP traffic.
3265047
Analysis and Modeling of Traffic in Modern Data Communication Networks
In performance analysis and design of communication netword modeling data traffic is important. With introduction of new applications, the characteristics of the data traffic changes. We present a brief review the different models of data traffic and how they have evolved. We present results of data traffic analysis and simulated traffic, which demonstrates that the packet train model fits the traffic at source destination level and long-memory (self-similar) model fits the traffic at the aggregate level.
1255552
Design issues for providing minimum rate guarantees to the ATM unspecified bit rate service
We describe proposed enhancements to the ATM unspecified bit rate (UBR) service that guarantee a minimum rate at the frame level to the UBR VCs. These enhancements have been called guaranteed frame rate (GFR). In this paper, we discuss the motivation, design and implementation issues for GFR. We present the design of buffer management and tagging mechanisms to implement GFR. We study the effects of policing, per-VC buffer allocation, and per-VC queueing on providing GFR to TCP/IP traffic. We conclude that when the entire link capacity is allocate to GFR traffic, per-VC scheduling is necessary to provide minimum throughput guarantees to TCP traffic. We examine the role of frame tagging in the presence of scheduling and buffer management for providing minimum rate guarantees.
17211338
Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform
The discrete wavelet transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall power dissipation is dominated by read and write operations in the memory subsystem. The proposed architecture and computation sequence, called low-power block-scan, takes into account the EBCOT (embedded block coding with optimized truncation) code block size, which reduces the intermediate buffer requirement between the DWT and EBCOT modules. The impact of different memory subsystem optimization techniques on the overall memory power for 2D-DWT computation was modeled. The proposed model explores the different data access patterns, memory bank partitioning, and custom memory architectures to arrive at a power-efficient DWT architecture
15132229
OSU-MAC: a new, real-time medium access control protocol for wireless WANs with asymmetric wireless links
In this paper, we document our design of a MAC protocol, called OSU-MAC, subject to the physical layer characteristics and constraints of a narrow-band wireless modem testbed currently being built at the Ohio State University. The narrow-band wireless modem testbed is expected to support both real-time (bus location tracking) and non-real-time (regular) data applications. A number of techniques are proposed to support QoS imposed by the real-time applications, to deal with the asymmetry on the forward and reverse channels and the half-duplex transmission constraint imposed by the physical layer, and to enhance the error control capability of OSU-MAC. We also present simulation results to demonstrate the key functional characteristics of OSU-MAC.