8818712
A silicon retina with controllable winner-take-all properties
The winner-take-all (WTA) circuit is a useful computational circuit for signal processing and learning tasks. By adding spatial coupling between pixels, local regions of competition can be delineated. Recently, we described a normalising circuit which enhances Lazzaro's WTA circuit (1989) only with the addition of a transistor and a global bias to each pixel. This new circuit allows the network to transition between a soft-max and a WTA function through the global bias. The WTA network of Lazzaro together with spatial coupling forms the current-mode silicon retina of Boahen and Andreou (1992). This retina models the center surround processing performed in biological retinas to enhance responses to spatial contrasts. Here, we show how our normalising network together with spatial coupling performs as a silicon retina. Results are presented from a fabricated circuit in a 2 /spl mu/m CMOS process.
1845062
Adaptive Retina with Center-Surround Receptive Field
Both vertebrate and invertebrate retinas are highly efficient in extracting contrast independent of the background intensity over five or more decades. This efficiency has been rendered possible by the adaptation of the DC operating point to the background intensity while maintaining high gain transient responses. The center-surround properties of the retina allows the system to extract information at the edges in the image. This silicon retina models the adaptation properties of the receptors and the antagonistic center-surround properties of the laminar cells of the invertebrate retina and the outer-plexiform layer of the vertebrate retina. We also illustrate the spatio-temporal responses of the silicon retina on moving bars. The chip has 59×64 pixels on a 6.9×6.8mm2 die and it is fabricated in 2 µm n-well technology.
6161480
Homeostasis in a Silicon Integrate and Fire Neuron
In this work, we explore homeostasis in a silicon integrate-and-fire neuron. The neuron adapts its firing rate over long time periods on the order of seconds or minutes so that it returns to its spontaneous firing rate after a lasting perturbation. Homeostasis is implemented via two schemes. One scheme looks at the presynaptic activity and adapts the synaptic weight depending on the presynaptic spiking rate. The second scheme adapts the synaptic "threshold" depending on the neuron's activity. The threshold is lowered if the neuron's activity decreases over a long time and is increased for prolonged increase in postsynaptic activity. Both these mechanisms for adaptation use floating-gate technology. The results shown here are measured from a chip fabricated in a 2-µm CMOS process.
34951314
Spike synchronization in a network of silicon integrate-and-fire neurons
Spike-event based computational processing by neuronal networks depends on a variety of spatio-temporal mechanisms that are distributed across neuronal synapses, dendrites, and somata. The overall processing of spatio-temporal patterns of spike requires global temporal coherence between all these processes both within a neuron, and across all neurons of the network. We are evaluating the use of networks of hybrid analog-digital integrate-and-fire neurons, fabricated using VLSI, for studying real-time event-based processing. These hardware networks have the advantages of real-time operation, and inherent global synchronization by their analog implementation. However, one of the technical challenges in the operation of such networks is the unavoidable fabrication related variance between the different neurons of the network. Here we show that despite this variance, an important behavior of neuronal networks, spike synchronization, can be obtained from a simple network of VLSI neurons interconnected by lateral excitation and global inhibition.
1715678
Circuit Model of Short-Term Synaptic Dynamics
We describe a model of short-term synaptic depression that is derived from a silicon circuit implementation. The dynamics of this circuit model are similar to the dynamics of some present theoretical models of short-term depression except that the recovery dynamics of the variable describing the depression is nonlinear and it also depends on the presynaptic frequency. The equations describing the steady-state and transient responses of this synaptic model fit the experimental results obtained from a fabricated silicon network consisting of leaky integrate-and-fire neurons and different types of synapses. We also show experimental data demonstrating the possible computational roles of depression. One possible role of a depressing synapse is that the input can quickly bring the neuron up to threshold when the membrane potential is close to the resting potential.
12793172
Continuous-time adaptive delay system
We have developed an adaptive delay system that adjusts the delay of a delay element so that it matches the temporal disparity between the onset of two input signals. The delay is controlled either by an external bias voltage, or by an intrinsic signal derived from an adaptive block. The operation of the adaptive delay system is similar to that of a charge-pump phase-lock loop, with an extended lock-in range of more than 5 decades. Standard CMOS transistors are used in their subthreshold region. Experimental results from circuits fabricated in 2 /spl mu/m CMOS technology are in agreement with the analysis.<<ETX>>
14314870
Formalization, Testing and Execution of a Use Case Diagram
Errors in a requirements model have prolonged detrimental effects on reliability, cost, and safety of a software system. It is very costly to fix these errors in later phases of software development if they cannot be corrected during requirements analysis and design. A use case diagram, as a requirements model, plays an important role in giving requirements for a software system. It provides a communication tool between software requirements developers and prospective users to understand what requirements of a software system are. However most descriptions of a use case diagram are written in some informal language, leading to possible misunderstanding between developers and users. In this paper, we propose a new rigorous review technique which can be applied to software requirements models. Using this new technique before a software system is fully designed will help us find some potential errors in a requirements model, resulting in reduced time, labor and expenditure in software development.
14652555
Adding multi-class routing into the DiffServ architecture
To alleviate the problem of high priority traffic hogging of all the available network capacity and to optimize the network traffic in the DiffServ network, we introduce the multi-class routing (MCR) scheme into the DiffServ architecture. The MCR scheme that builds multiple routing tables in the DiffServ routers forms the MCR DiffServ architecture. In this paper, the MCR DiffServ architecture focuses on the intra-DS domain. Different MCR approaches that include a static approach and dynamic approaches can be used for the MCR DiffServ system. We extend the OSPF protocol in order to build up more than one routing table in each MCR DiffServ system. According to the extensions to OSPF, we have implemented the static MCR approach for the MCR DiffServ system on the basis of the open source Zebra software.
6631927
Ctree: a compact tree for indexing XML data
In this paper, we propose a novel compact tree (Ctree) for XML indexing, which provides not only concise path summaries at the group level but also detailed child-parent links at the element level. Group level mapping allows efficient pruning of a large search space while element level mapping provides fast access to the parent of an element. Due to the tree nature of XML data and queries, such fast child-to-parent access is essential for efficient XML query processing. Using group-based element reference, Ctree enables the clustering of inverted lists according to groups, which provides efficient join between inverted lists and structural index group extents. Our experiments reveal that Ctree is efficient for processing both single-path and branching queries with various value predicates.
14515232
An investigation of the approach to specification-based program review through case studies
Software review is an effective means to enhance the quality of software systems. However, traditional review methods emphasize the importance of the way to organize reviews and rely on the quality of the reviewers' experience and personal skills. In this paper we propose a new approach to rigorously reviewing programs based on their formal specifications. The fundamental idea of the approach is to use a formal specification as a standard to check whether all the required functions and properties in the specification are correctly implemented by its program. To help investigate the effectiveness and the weakness of the approach, we conduct two case studies of reviewing two program systems that implement the same formal specification of "A Research Management Policy" using different strategies, and present the evaluation of the case studies. The results show that the review approach is effective in detecting faults when the reviewer is different from the programmer, but less effective when the reviewer is the same as the programmer.
1315911
An Object Semantic Model of SOFL
SOFL (Structured-Object-based-Formal Language) is recently proposed to combine the advantages of formal methods, structured methods and object-oriented methodology into one method for software development. SOFL integrates modeling techniques from VDM (for specifying system component state) and data flow diagrams with Petri nets (for specifying system behaviours and interaction). To support the standardisation and the tool support for SOFL, a formal semantics of the language is desirable. As SOFL is under further development, the semantic representation of current SOFL needs to be easily reused and extended. In this paper, an object-oriented approach is taken to specify the semantics of SOFL and this approach is proved to be effective in providing a modular and reusable semantic representation. Object modeling techniques, such as inheritance is used to illustrate the common and the differences between various SOFL graphical constructs; object containment is used to capture the acyclic structure of SOFL hierarchical module decomposition.