5309390
Uniform Object Management
Most real-world applications require a capability for both general-purpose programming and database transactions on persistent data. Unfortunately, the implementation techniques for these capabilities are notoriously incompatible. Programming languages stress memory-resident transient data with a rich collection of data types, while database systems stress disk-resident persistent data with a limited collection of data types. Even in object-oriented database systems, combining these capabilities is traditionally done using a two-level storage model in which storage formats are quite different. This approach suffers from the performance overhead required to translate data between these two levels.
2567437
Dynamic Query Operator Scheduling for Wide-Area Remote Access
Distributed databases operating over wide-area networks such as the Internet, must deal with the unpredictable nature of the performance of communication. The response times of accessing remote sources can vary widely due to network congestion, link failure, and other problems. In such an unpredictable environment, the traditional iterator-based query execution model performs poorly. We have developed a class of methods, called query scrambling, for dealing explicitly with the problem of unpredictable response times. Query scrambling dynamically modifies query execution plans on-the-fly in reaction to unexpected delays in data access. In this paper we focus on the dynamic scheduling of query operators in the context of query scrambling. We explore various choices for dynamic scheduling and examine, through a detailed simulation, the effects of these choices. Our experimental environment considers pipelined and non-pipelined join processing in a client with multiple remote data sources and delayed or possibly bursty arrivals of data. Our performance results show that scrambling rescheduling is effective in hiding the impact of delays on query response time for a number of different delay scenarios.
1006062
The design of an acquisitional query processor for sensor networks
We discuss the design of an acquisitional query processor for data collection in sensor networks. Acquisitional issues are those that pertain to where, when, and how often data is physically acquired (sampled) and delivered to query processing operators. By focusing on the locations and costs of acquiring data, we are able to significantly reduce power consumption over traditional passive systems that assume the a priori existence of data. We discuss simple extensions to SQL for controlling data acquisition, and show how acquisitional issues influence query optimization, dissemination, and execution. We evaluate these issues in the context of TinyDB, a distributed query processor for smart sensor devices, and show how acquisitional techniques can provide significant reductions in power consumption on our sensor devices.
2815522
Efficient Filtering of XML Documents for Selective Dissemination of Information
Information Dissemination applications are gaining increasing popularity due to dramatic improvements in communications bandwidth and ubiquity. The sheer volume of data available necessitates the use of selective approaches to dissemination in order to avoid overwhelming users with unnecessaryinformation. Existing mechanisms for selective dissemination typically rely on simple keyword matching or “bag of words” information retrieval techniques. The advent of XML as a standard for information exchangeand the development of query languages for XML data enables the development of more sophisticated filtering mechanisms that take structure information into account. We have developed several index organizations and search algorithms for performing efficient filtering of XML documents for large-scale information dissemination systems. In this paper we describe these techniques and examine their performance across a range of document, workload, and scale scenarios.
7889988
Crash recovery in client-server EXODUS
In this paper, we address the correctness and performance issues that arise when implementing logging and crash recovery in a page-server environment. The issues result from two characteristics of page-server systems: 1) the fact that data is modified and cached in client database buffers that are not accessible by the server, and 2) the performance and cost trade-offs that are inherent in a client-server environment. We describe a recovery system that we have implemented for the client-server version of the EXODUS storage manager. The implementation supports efficient buffer management policies, allows flexibility in the interaction between clients and the server, and reduces the server load by generating log records at clients. We also present a preliminary performance analysis of the implementation.
2033914
Data Staging for On-Demand Broadcast
:A>@<b_DCGAdPBEG>R<:c\A8:Q@L]J.A8<0H(L[MOz:CTL0PBc:zbP[<bc4EGADCG ? >@_DA8EHGbP[HP[CTA>@<::ADCTAD<.HTQRJz:CTL0PBcb_DPBEwHw_DPBbP[zbQRA bP0EqPBc\A>Uc\ADPBCGAdP$c:P]HFP z:CGL.PBc:_8PBEwHP[<P]HGHGCFPB_ HG>@?BA4c:P]HFP c\A8QR>@?BA8CGJ P[QRHGA8CG<kP]HG>@?BA2MSLBCQ@PBCG0A&_Q@>RA8<.H  LB:a:QUP]HT>RL0<bE8`v:ADCTAbP0Evz ADAD<Ew>@B<:>Rk_8P[<.HvyL0CGZ HGL]P[CFc:EOc\A8?BA8QRL0:>R<b$LB<\QR>@<:Az:CTL0P0c:_DP0EKHET_F:Adc\a:QR >@<:P[Q@BLBCT>RHG:E MSLBCEGJ\EKHTADE :ADCTA!P[Q@Q c:P]HFP >RHGADEOPBCGAyCGAdPBc\>@QRJPY?]PB>RQUP[z:Q@A>@<¡HG:AEGADCT?BADCd¢ E6P[>@< ADLBCTJB` :A8EGA£EwHGabc:>RAdE(>@B<bLBCTA HG:Ac:P]HFP2P[<: P[0ADAD<.H>UETEwa:AdEOHTbP]HP[CT>@EGA:A8<HG:A c:P[HTP HTL£z A z:CTL0P0c:_DP0EKH£akEKH&z A L0z\HTPB>R<bA8c MSCGL0¤EGA8_DLB<bcbP[CTJ EwHGLBCFP[0A LBC,CTADL[HTA Q@L\_DP]HT>RL0<bE8`¥<¦HT:>@E4bPBkA8C8V  A§:CTLB L0EGA HG:CTADA_LB:Q@ADA8<0HFP[CTJ ̈EGLBQ@a\HG>@LB<kE HGL EGab_F ̈©Ba[«a ¬­«aD®B ̄±°.®_L0<b_A8CG<kED2§L0: LBCGHGa:<:>UEw HG>U_ ET_F:A8c:a:QR>@<:kVEGADCT?BA8C2_DP0_F:>R<bbVP[<bc bCGADMSAHT_F: >@<:b`&bA8EGAHGA8_Fb<:>@3.a:AdE$A ́\:Q@LB>RH:>@<.HTE$:CTL]? >@c:A8c z J,HG:AET_F:A8c\abQR>@<:,P[Q@BLBCT>RHG:,`$μ¶c:AHTPB>RQ@A8c kA8Cw MSLBCTP[<b_DA AD?]P[Q@abP]HT>RL0< akEw>@<:P[<·¥K ̧o1 a:QRHG>U_DPBEwHw zbP0EwAdc HGAdEKHTzkAdc EG:L]vE$HTbP]HHG:AdEwA4c:P]HFP EwHTPBB>@<: HGAd_F:<:>U3.a:A8Ev_8P[< c\CFP[P]HT>@_8P[Q@QRJA8<:bPB<b_A HT:A$kA8Cw MSLBCTP[<b_DA L[M£P Q@PBCG0AEG_8P[Q@A,LB<\c\ADPB<bcz:CTL0P0c  _DP0EKHvEGJ\EKHTAD,`
37466607
Analysis of parallel mixed-mode simulation algorithms
This paper presents a performance analysis of several parallel algorithms for the mixed-mode simulation of digital systems. The performance model is an architectural simulation of the parallel algorithms running on a hypercube multiprocessor. Workload data is collected from a uniprocessor-based mixed-mode simulator on several benchmark circuits, and two distinct circuit partitioning algorithms are considered. The results indicate that the performance of the parallel simulations is highly circuit dependent, in some cases performing worse than a uniprocessor and in others approaching optimal performance.<<ETX>>
14211318
An architecture for fast processing of large unstructured data sets
This paper presents a general system architecture tailored to perform searching, filtering, compression, encryption, and other operations on unstructured data streaming from a disk system. The system achieves high performance on such applications by providing for parallelism, hardware-application specialization and reconfiguration, and hardware placement near the disk systems. A limited prototype of a single compute node has been implemented and is described. The prototype is tailored to applications involving complex searching and its performance is compared to a pure software implementation having the same search capabilities. Performance is considered in terms of data set size, query string hit rate and query complexity. Performance results as a function of these parameters are presented and the results indicate that, for data set sizes above 1.4 MB, the prototype compute node is between one and two orders of magnitude faster than a pure software implementation. At high data set sizes, on an individual node, speedups of about 200 and a sustained throughput of 300 MB/sec have been achieved.
12835791
ARAS: asynchronous RISC architecture simulator
In this paper, an asynchronous pipeline instruction simulator, ARAS is presented. With this simulator, one can design selected instruction pipelines and check their performance. Performance measurements of the pipeline configuration are obtained by simulating the execution of benchmark programs on the machine architectures developed. Depending on the simulation results obtained by using ARAS, the pipeline configuration can be altered to improve its performance. Thus, one can explore the design space of asynchronous pipeline architectures.
17384542
A general compiler framework for speculative multithreaded processors
Speculative multithreading (SpMT) promises to be an effective mechanism for parallelizing nonnumeric programs, which tend to have irregular and pointer-intensive data structures and complex flows of control. Proper thread formation is crucial for obtaining good speedup in an SpMT system. This paper presents a compiler framework for partitioning a sequential program into multiple threads for parallel execution in an SpMT system. This framework is very general and supports speculative threads, nonspeculative threads, loop-centric threads, and out-of-order thread spawning. It is therefore useful for compiling for a wide variety of SpMT architectures. For effective partitioning of programs, the compiler uses profiling, interprocedural pointer analysis, data dependence information, and control dependence information. The compiler is implemented on the SUIF-MachSUIF platform. A simulation-based evaluation of the generated threads shows that the use of nonspeculative threads and nonloop speculative threads provides a significant increase in speedup for nonnumeric programs.
18137632
Collecting Data About Logic Simulation
Design of high-performance hardware and software-based gate-switch-level logic simulators requires knowledge about the logic simulation process itself. Unfortunately, little data is publicly available concerning key aspects of this process. An example of this is the lack of published empirical measurements relating to the time distribution of events generated by such simulators. This paper presents a gate-switch-level logic simulator lsim which is oriented towards the collection of data about the simulation process. The basic components of lsim are reviewed, and its relevant data gathering facilities are discussed. An example is presented which illustrates the use of lsim in gathering data on event distributions and on communications requirements under alternative logic circuit partitionings.