1271597
An improved AMG-based method for fast power grid analysis
The continuing VLSI technology scaling leads to increasingly significant power supply fluctuations, which needs to be modeled accurately in circuit design and verification. Meanwhile, the huge size of power grid requires its analysis to be fast and highly scalable. Algebraic multigrid (AMG) has been recognized as a promising approach for fast power grid analysis. We propose several techniques to improve AMG-based power grid analysis: (1) dynamic reduction threshold; (2) weighted interpolation; and (3) a new error smoothing scheme. Experimental results on power grid with up to 1.6 million nodes show that these techniques can improve accuracy by over 10 times compared to a reported industrial method while retaining the same fast speed
17009072
Steiner network construction for timing critical nets
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open faults and variations. These advantages are particularly appealing for timing critical net routings in nano-scale VLSI designs where interconnect delay is a performance bottleneck and variation effects are increasingly remarkable. We propose Steiner network construction heuristics which can generate either tree or non-tree with different slack-wirelength tradeoff, and handle both long path and short path constraints. Incremental non-tree delay update techniques are developed to facilitate fast Steiner network evaluations. Extensive experiments in different scenarios show that our heuristics usually improve timing slack by hundreds of pico seconds compared to traditional tree approaches
28075982
Clock buffer polarity assignment for power noise reduction
10406726
Associative Skew Clock Routing for Difficult Instances
In clock network synthesis, sometimes skew constraints are required only within certain groups of clock sinks and do not exist between different groups. This is the so-called associative skew clock routing problem. Although the number of constraints is reduced, the problem becomes more difficult to solve due to the enlarged solution space. The perhaps only previous work used a very primitive delay model and cannot handle difficult instances in which sink groups are intermingled. We reuse existing techniques to solve this problem, including the difficult instances, based on a more accurate and popular delay model. Experimental results show that our algorithm can reduce the total clock routing wirelength by 12% on average compared to greedy-DME which is one of the best zero skew routing algorithms
11408697
Path-Based Buffer Insertion
Along with the progress of very-large-scale-integration technology, buffer insertion plays an increasingly critical role on affecting circuit design and performance. Traditional buffer insertion algorithms are mostly net based and therefore often result in suboptimal delay or unnecessary buffer expense due to the lack of global view. In this paper, we propose a novel path-based-buffer-insertion (PBBI) scheme which can overcome the weakness of the net-based approaches. We also discuss some potential difficulties of the PBBI approach and propose solutions to them. A fast estimation on buffered delay is employed to improve the solution quality. Gate sizing is also considered at the same time. Experimental results show that our method can efficiently reduce buffer/gate cost significantly (by 71% on average) when compared to traditional net-based approaches. To the best of our knowledge, this is the first work on path based buffer insertion and simultaneous gate sizing.
7189153
Antenna avoidance in layer assignment
The sustained progress of very-large-scale-integration (VLSI) technology has dramatically increased the likelihood of the antenna problem in the manufacturing process and calls for corresponding considerations in the routing stage. In this paper, the authors propose a technique that can handle the antenna problem during the layer-assignment (LA) stage, which is an important step between global routing and detailed routing. The antenna-avoidance problem is modeled as a tree-partitioning problem with a linear-time-optimal-algorithm solution. This algorithm is customized to guide antenna avoidance in the LA stage. A linear-time optimal jumper-insertion algorithm is also derived. Experimental results on benchmark circuits show that the proposed techniques can lead to an average of 76% antenna-violation reduction and 99% via-violation reduction.
612951
Exploring Multiple Design Topologies Using Genetic Programming And Bond Graphs
To realize design automation of dynamic systems, there are two major issues to be dealt with: open-topology generation of dynamic systems and simulation or analysis of those models. For the first issue, we exploit the strong topology exploration capability of genetic programming to create and evolve structures representing dynamic systems. With the help of ERCs (ephemeral random constants) in genetic programming, we can also evolve the sizing of dynamic system components along with the structures. The second issue, simulation and analysis of those system models, is made more complex when they represent mixed-energy-domain systems. We take advantage of bond graphs as a tool for multi- or mixed-domain modeling and simulation of dynamic systems. Because there are many considerations in dynamic system design that are not completely captured by a bond graph, we would like to generate multiple solutions, allowing the designer more latitude in choosing a model to implement. The approach in this paper is capable of providing a variety of design choices to the designer for further analysis, comparison and trade-off. The approach is shown to be efficient and effective in an example of open-ended real-world dynamic system design application, a printer re-design problem.
17979707
Designing Social Navigation for a Virtual Community of Practice
Social navigation in a community of practice (CoP) is an approach of locating information through increased social awareness. Designing support for social navigation requires precise knowledge about the users' needs and wishes so as to meet user participatory design methodology. User requirement definition on social navigation is, however, difficult to elicit. On the one hand, without the context of the CoP, it is hard to collect the user requirements on navigation, especially when the concept of virtual community is new to the target user group. On the other hand, to set up such a virtual community, preliminary studies on social navigation is however necessary. This paper presents the experiences how we dealt with such a chicken and egg problem. Different approaches were used: performing a theoretical study, administering an online questionnaire, observing on an existing virtual society, analyzing similar systems, prototyping, and conducting an expert walk-through.
15595451
HEMO: A Sustainable Multi-objective Evolutionary Optimization Framework
The capability of multi-objective evolutionary algorithms (MOEAs) to handle premature convergence is critically important when applied to real-world problems. Their highly multi-modal and discrete search space often makes the required performance out of reach to current MOEAs. Examining the fundamental cause of premature convergence in evolutionary search has led to proposing of a generic framework, named Hierarchical Fair Competition (HFC)[9], for robust and sustainable evolutionary search. Here an HFC-based Hierarchical Evolutionary Multi-objective Optimization framework (HEMO) is proposed, which is characterized by its simultaneous maintenance of individuals of all degrees of evolution in hierarchically organized repositories, by its continuous inflow of random individuals at the base repository, by its intrinsic hierarchical elitism and hyper-grid-based density estimation. Two experiments demonstrate its search robustness and its capability to provide sustainable evolutionary search for difficult multi-modal problems. HEMO makes it possible to do reliable multi-objective search without risk of premature convergence. The paradigmatic transition of HEMO to handle premature convergence is that instead of trying to escape local optima from converged high fitness populations, it tries to maintain the opportunity for new optima to emerge from the bottom up as enabled by its hierarchical organization of individuals of different fitnesses.
6134766
Compiler-directed instruction duplication for soft error detection
We experiment with compiler-directed instruction duplication to detect soft errors in VLIW datapaths. In the proposed approach, the compiler determines the instruction schedule by balancing the permissible performance degradation with the required degree of duplication. Our experimental results show that our algorithms allow the designer to perform tradeoff analysis between performance and reliability.
13437077
Scheduling reusable instructions for power reduction
In this paper, we propose a new issue queue design that is capable of scheduling reusable instructions. Once the issue queue is reusing instructions, no instruction cache access is needed since the instructions are supplied by the issue queue itself. Furthermore, dynamic branch prediction and instruction decoding can also be avoided permitting the gating of the front-end stages of the pipeline (the stages before register renaming). Results using array-intensive codes show that up to 82% of the total execution cycles, the pipeline front-end can be gated, providing a power reduction of 72% in the instruction cache, 33% in the branch predictor, and 21% in the issue queue, respectively, at a small performance cost. Our analysis of compiler optimizations indicates that the power savings can be further improved by using optimized code.