10919270
Source Behavior for ATM ABR Traffic Management: An Explanation
The available bit rate (ABR) service has been developed to support data applications over asynchronous transfer mode (ATM) networks. The network continuously monitors its traffic and provides feedback to the source end systems. This article explains the rules that the sources have to follow to achieve a fair and efficient allocation of network resources.
609563
A definition of general weighted fairness and its support in explicit rate switch algorithms
We give a general definition of weighted fairness and discuss how a pricing policy can be mapped to general weighted (GW) fairness. The GW fairness can be achieved by calculating the excess fairshare (weighted fairshare of the left over bandwidth) for each VC. We show how a switch algorithm can be modified to support the GW fairness by using the excess fairshare term. We use ERICA+ as an example switch algorithm and show how it can be modified to achieve the general fairness. Simulations results are presented to demonstrate that, the modified switch algorithm achieves GW fairness. An analytical proof for convergence of the modified ERICA+ algorithm is given in the appendix.
3204907
Performance of Bursty World Wide Web (WWW) Sources over ABR
Bobby Vandalore, Shivkumar Kalyanaraman, Raj Jain, Rohit Goyal, Sonia Fahmy The Ohio State University, Department of CIS Columbus, OH 43210-1277 Phone: 614-688-4482, Fax: 614-292-2911 Email: fvandalor, shivkuma, jain, goyal, fahmyg@cis.ohio-state.edu Seong-Cheol Kim Principal Engineer, Network Research Group, Communication Systems R&D Center Samsung Electronics Co. Ltd., Chung-Ang Newspaper Bldg. 8-2, Karak-Dong, Songpa-Ku, Seoul, Korea 138-160 Email: kimsc@metro.telecom.samsung.co.kr Abstract
16677800
AQuaFWiN: adaptive QoS framework for multimedia in wireless networks and its comparison with other QoS frameworks
In a wireless environment, due to topology changes and characteristics of media (interference in radio signals) the bandwidth of a link is unpredictable and possibly very low, the error rates are variable and extremely high. Provisioning and guaranteeing quality of service (QoS) in such an environment is a very challenging problem. In this paper we propose an adaptive and QoS framework to support multimedia applications in a wireless networking environment. The proposed framework is hierarchical in nature with cluster of mobile end hosts connected to a base station, base stations are connected to a supervisory node, which in turn is connected to the wired infrastructure. The changing conditions in wireless due to interference and possibly mobility, entitle that the real-time applications needing stringent QoS should be adaptable. The framework uses a generic feedback mechanism to support adaptability at all layers of the wireless network. An overview of existing wireless architectures which support QoS is given. The architectures discussed are WAMIS (wireless adaptive multimedia information system), SWAN (seamless wireless ATM network), MMWN (multimedia support for mobile wireless networks), and QGMC (QoS guarantees in mobile computing). The proposed approach is compared with these existing methods.
789958
Myths about Congestion Management in High Speed Networks
Weaknesses in several recently proposed ideas about congestion control and avoidance in high-speed netwroks are identified. Both sides of the debate concerning prior reservation of resources versus walk-in service, open-loop control versus feedback control, rate control versus window control, and router-based control versus source-based control are presented. The circumstances under which backpressure is useful or not are discussed, and it is argued that a single congestion scheme is not sufficient, but that a combination of several schemes is required for complete congestion management in a network.
5623657
Satellite ATM Network Architectural Considerations and TCP/IP Performance
In this paper, we have provided a summary of the design options in Satellite-ATM technology. A satellite ATM network consists of a space segment of satellites connected by inter-satellite crosslinks, and a ground segment of the various ATM networks. A satellite-ATM interface module connects the satellite network to the ATM networks and performs various call and control functions. A network control center performs various network management and resource allocation functions. Several issues such as the ATM service model, media access protocols, and traffic management issues must be considered when designing a satellite ATM network to effectively transport Internet traffic. We have presented the buffer requirements for TCP/IP traffic over ATM-UBR for satellite latencies. Our results are based on TCP with selective acknowledgments and a per-VC buffer management policy at the switches. A buffer size of about 0.5 * RTT to 1 * RTT is sufficient to provide over 98% throughput to infinite TCP traffic for long latency networks and a large number of sources. This buffer requirement is independent of the number of sources. The fairness is high for a large numbers of sources because of the per-VC buffer management performed at the switches and the nature of TCP traffic.
13629855
An integrated CAD system for algorithm-specific IC design
LAGER is an integrated computer-aided design system for algorithm-specific integrated circuit design, targeted at applications such as speech processing, image processing, telecommunications, and robot control. LAGER provides user interfaces at behavioral, structural, and physical levels and allows easy integration of novel CAD tools. LAGER consists of a behavioral mapper and a silicon assembler. The behavioral mapper maps the behavior onto a parameterized structure to produce microcode and parameter values. The silicon assembler then translates the filled-out structural description into a physical layout, and, with the aid of simulation tools, the user can fine tune the data path by iterating this process. The silicon assembler can also be used without the behavioral mapper for high-sample-rate applications. A number of algorithm-specific ICs designed with LAGER have been fabricated and tested, and as examples, a robot arm controller chip and a real-time image segmentation chip are described. >
1663822
An Efficient Pipelined VLSI Architecture for Lifting-Based 2D-Discrete Wavelet Transform
The discrete wavelet transform (DWT) forms the core of the JPEG2000 image compression algorithm. JPEG2000 standard defines an irreversible DWT by a lifting scheme of factorized coefficients using (9, 7) Daubechies coefficients. The paper proposed optimizations on lifting based 1D-DWT data flow graph resulting in a new pipelining scheme, which is more power-efficient than existing approaches. The authors have shown that the constant multipliers defined by JPEG2000 standard, have latency of about 1.6 times the general adder latency. Hence, while finding the critical path, the basic assumption of multiplier latency being much greater than the adder latency does not hold for DWT in JPEG2000. How 75% multiplications can be reduced at the scaling step by this 2D-DWT implementation was also shown. This multiplication reduction not only saves power but also results in area saving by eliminating three multipliers in the hardware
5420102
Dynamic RDT Model for Data Mining
40775308
Vector Field Analysis for Oriented Patterns
Presents a method, based on the properties of vector fields, for the estimation of a set of symbolic descriptors (node, saddle, star-node, improper-node, center, and spiral) from linear orientation fields. Planar first-order phase portraits are used to model the linear orientation fields. A weighted linear estimator is developed to estimate linear phase portraits, using only the flow orientation. A classification scheme for planar first-order phase portraits, based on their local properties: curl, divergence, and deformation is developed. The authors present results of experiments on noise-added synthetic flow patterns and real oriented textures. >
7565598
Towards coarse-grained mobile QoS
Supporting Quality of Service is an important objective for future mobile and wireless systems, and requires resource reservation and admission control to achieve. In this paper, we introduce a novel coarse grained approach to admission control termed Virtual Bottleneck Cell. Our approach is designed to scale to many users and handoffs, while simultaneously controlling “hot spots” and system bottlenecks. The key technique is to hierarchically control the virtual system, ensuring QoS objectives are satisfied without requiring models or accurate predictions of the users’ future locations. We develop a simple analytical model to study the system and illustrate several key components of the approach. Finally, we perform simulations in a two-dimensional network to compare the performance obtained with Virtual Bottleneck Cell with alternate schemes, including the optimal off line algorithm.