2458786
High Performance Embedded Route Lookup Coprocessor for Network Processors
Embedded Route Lookup Coprocessors (RLCs) are attractive for their potential in building high-performance Network Processors. But compared with conventional lookup schemes, it always imposes more severe restrictions on table size and power consumption, which poses challenge in the state of art. In this paper, we propose a novel lookup mechanism, Compounded CAM with Optimized Bitmap Compression (CCAM-OBC), which employs different lookup methods for prefixes of different length ranges, so as to combine the benefits of CAMs and bitmap compressed tries. With this scheme, table size, power consumption and update complexity are all well optimized while very high lookup throughput is achieved, which makes it a perfect solution to embedded RLC. For a real-life 130K-prefix route table, the implemented prototype performs more than 100 Million Packets Per Second (MPPS) with only 24KB TCAM, 48KB BCAM and 251KB SRAM. Furthermore, each update needs only 2 memory accesses averagely.
7704531
A TCAM-based distributed parallel IP lookup scheme and performance analysis
Using ternary content addressable memory (TCAM) for high-speed IP address lookup has been gaining popularity due to its deterministic high performance. However, restricted by the slow improvement of memory accessing speed, the route lookup engines for next-generation terabit routers demand exploiting parallelism among multiple TCAM chips. Traditional parallel methods always incur excessive redundancy and high power consumption. We propose in this paper an original TCAM-based IP lookup scheme that achieves both ultra-high lookup throughput and optimal utilization of the memory while being power-efficient. In our multi-chip scheme, we devise a load-balanced TCAM table construction algorithm together with an adaptive load balancing mechanism. The power efficiency is well controlled by decreasing the number of TCAM entries triggered in each lookup operation. Using four 133 MHz TCAM chips and given 25% more TCAM entries than the original route table, the proposed scheme achieves a lookup throughput of up to 533 MPPS while remains simple for ASIC implementation
5800626
Hybrid Cache Architecture for High Speed Packet Processing
The exposed memory hierarchies employed in many network processors (NPs) are expensive and hard to be effectively utilized. On the other hand, conventional cache cannot be directly incorporated into NP either because of its low efficiency in locality exploitation for network applications. In this paper, a novel memory hierarchy component, called split control cache, is presented. The proposed scheme employs two independent low latency memory stores to temporarily hold the flow-based and application-relevant information, exploiting the different locality behaviors exhibited by these two types of data. Data movement is manipulated by specially designed hardware to relieve the programmers from details of memory management. Performance evaluation shows that this component can achieve a hit rate of over 90% with only 16 KB of memories in route lookup under link rate of OC-3c and provide enough flexibility for the implementation of most network applications.
1001399
DS-PPS: A Practical Framework to Guarantee Differentiated QoS in Terabit Routers with Parallel Packet Switch
Parallel Packet Switch (PPS) is used intensively in today's terabit router to construct the switching fabric. Basic PPS equally deals with all of the traffic in order to achieve uniform load-balancing and high throughput, but it fails to support differentiated QoS. With the recent blooming of delay- sensitive Internet traffic, such as the peer-to-peer live streaming and IPTV, differentiated QoS is becoming an urgent demand. In this paper, we propose a novel and practical framework, the Differentiated Service Parallel Packet Switch (DS-PPS), which supports three fundamental QoS features: guaranteed-delay (GD), guaranteed-bandwidth (GB) and best-effort (BE). By adaptively adjusting the number of switching planes offered to each QoS class, DS-PPS precisely controls the delay bounds of GD traffic and the drop precedence of GB traffic. We evaluate DS-PPS by extensive theoretical analyses and comprehensive simulations. Experimental results on a prototype implementation of the framework show that DS-PPS outperforms the basic PPS in three main aspects. First, the average delay of TCP short packet under full load is reduced by more than 94%. Second, the average delay of real-time traffic under full load is reduced by more than 82%. And third, the GB traffic of low drop precedence is guaranteed of nearly three times the throughput of high drop precedence at the hotspots. Significantly, our proposed DS-PPS framework is universal and scalable to support various kinds of emerging QoS-sensitive applications in multi-service terabit routers without any extra overhead.
17725194
SPF: to improve the performance of packet-mode scheduling
Recent researches present that packet-mode scheduling may provide overall performance advantages over cell-mode scheduling in input queueing switches. But one significant drawback of existing packet-mode schedulers is that they tend to result in longer waiting time of short packets, whose delay is critical to the performance of IP networks. To mitigate the problem, this paper proposes a simple but effective packet-mode scheduling algorithm called Short Packets First (SPF), studies the corresponding buffering architecture, and evaluates the performance on throughput and packet delay. SPF achieves 100% throughput under an accurate Internet traffic model. Theoretical analysis proves that SPF can reduce the average packet waiting time of short packets as well as overall packets, under the condition of uniform Poisson arrival process and low to medium offered load. Furthermore, extended simulation studies show that SPF is superior to general packet-mode and cell-mode scheduling, especially under heavy offered load.
46229467
Packet-Mode Priority Scheduling for Terabit Core Routers
Existing packet-mode schedulers will result in long waiting time for short control packets in IP networks. To overcome this problem, this paper proposes a packet-mode practical scheduling algorithm called short-packets-first (SPF). With uniform Poisson arrival process and low to medium offered load, we prove that SPF can reduce the average packet waiting time for overall packets by greatly lowering the average packet waiting time for short packets. Moreover, simulations under a real traffic model demonstrate that SPF performs very well compared with other packet-mode and cell-mode scheduling algorithms, especially for short packets under heavy offered load..
62878
Single-hop probing asymptotics in available bandwidth estimation: sample-path analysis
In this paper, we take the sample-path approach in analyzing the asymptotic behavior of single-hop bandwidth estimation under bursty cross-traffic and show that these results are provably different from those observed under fluid models of prior work. This difference, which we call the probing bias, is one of the previously unknown factors that can cause measurement inaccuracies in available bandwidth estimation. We present an analytical formulation of "packet probing," based on which we derive several major properties of the probing bias. We then experimentally observe the <i>probing bias</i> and investigate its quantitative relationship to several deciding factors such as probing packet size, probing train length, and cross-traffic burstiness. Both our analytical and experimental results show that the probing bias vanishes as the packet-train length or packet size increases. The vanishing rate is decided by the burstiness of cross-traffic.
14837083
A Transactional Approach to Parallel Data Warehouse Maintenance
Data Warehousing is becoming an increasingly important technology for information integration and data analysis. Given the dynamic nature of modern distributed environments, both source data and schema changes are likely to occur autonomously and even concurrently in different sources. We have thus developed a comprehensive solution approach, called TxnWrap, that successfully maintains the warehouse views under any type of concurrent source updates. In this work, we now overcome TxnWrap's restriction that the maintenance is processed one by one for each source update, since that limits the performance. To overcome this limitation, we exploit the transactional approach of TxnWrap to achieve parallel data warehouse maintenance. For this, we first identify the read/write conflicts among the different warehouse maintenance processes. We then propose a parallel maintenance scheduler (PMS) that generates legal schedules that resolve these conflicts. PMS has been implemented and incorporated into our TxnWrap system. The experimental results confirm that our parallel maintenance scheduler significantly improves the performance of data warehouse maintenance.
53249400
Non-tree routing for reliability and yield improvement
We propose to introduce redundant interconnects for manufacturing yield and reliability improvement. By introducing redundant interconnects, the potential for open faults is reduced at the cost of increased potential for short faults; overall, manufacturing yield and fault tolerance can be improved. We focus on a post-processing, tree augmentation approach which can be easily integrated in current physical design flows. Experiments on randomly generated and industry testcases show that our greedy augmentation method achieves significant increase in reliability (as measured by the percentage of biconnected tree edges) with very small increase in wirelength. SPICE simulations imply that non-tree routing has smaller delay variation due to process variability.
44632770
Modeling frame-level errors in GSM wireless channels
Abstract We compare four different approaches to modeling frame-level errors in GSM channels. One of these, the Markov-based Trace Analysis (MTA) model, was developed explicitly for this purpose. The next two, kth-order Markov models and hidden Markov models (HMMs), have been widely used to model loss in wired networks. All three of these have difficulty in modeling empirical GSM frame-level error traces. The MTA model and HMM predict frame-error rates substantially different from that measured from the trace, and all three models have difficulty in capturing the long term temporal correlation structure. We propose a fourth model, the extended On/Off model, which alternates between an On (error-free) and an Off (error-filled) state. The state holding times are taken from mixtures of geometric distributions. We show that this model, with mixtures of 4–7 geometric distributions captures first- and second-order statistics significantly better than the preceding three approaches.
8364982
Supporting Complex Multi-Dimensional Queries in P2P Systems
More and more applications require peer-to-peer (P2P) systems to support complex queries over multi-dimensional data. For example, a P2P auction network for real estate frequently needs to answer queries such as "select five available buildings closest to the airport". Such queries are not efficiently supported in current P2P systems. Towards an efficient and scalable P2P system capable of processing complex multi-dimensional queries, the authors first proposed a comprehensive framework for sharing, indexing, and querying multi-dimensional data, where (i) peers with more computational power coordinate indexing and query processing, and (ii) other peers participate in part of the computation in order to achieve scalability and load-balance. Based on this framework, Network-R-tree (NR-tree), a P2P adaptation of the dominant spatial index - R*-tree was proposed. NR-tree, indexing spatial data at clustered peers, is capable of processing complex queries such as range queries and k-nearest neighbor queries. The authors proposed query processing algorithms for range and k-nearest neighbor queries and experimentally prove the effectiveness of proposed techniques with real data