3172548
Key trees and the security of interval multicast
A key tree is a distributed data structure of security keys that can be used by a group of users. In this paper we describe how any user in the group can use the different keys in the key tree to securely multicast data to different subgroups within the group. The cost of securely multicasting data to a subgroup whose users are "consecutive" is O(log n) encryptions, where n is the total number of users in the group. The cost of securely multicasting data to an arbitrary subgroup is O(n/2) encryptions. However this cost can be reduced to one encryption by introducing an additional key tree to the group.
6313307
On the Security and Vulnerability of PING
We present a formal specification of the PING protocol, and use three concepts of convergence theory, namely closure, convergence, and protection, to show that this protocol is secure against weak adversaries (and insecure against strong ones). We then argue that despite the security of PING against weak adversaries, the natural vulnerability of this protocol (or of any other protocol for that matter) can be exploited by a weak adversary to launch a denial of service attack against any computer that hosts the protocol. Finally, we discuss three mechanisms, namely ingress filtering, hop integrity, and soft firewalls that can be used to prevent denial of service attacks in the Internet.
2648412
Performance evaluation of adaptive MPI
Processor virtualization via migratable objects is a powerful technique that enables the runtime system to carry out intelligent adaptive optimizations like dynamic resource management. Charm++ is an early language/system that supports migratable objects. This paper describes Adaptive MPI (or AMPI), an MPI implementation and extension, that supports processor virtualization. AMPI implements virtual MPI processes (VPs), several of which may be mapped to a single physical processor. AMPI includes a powerful runtime support system that takes advantage of the degree of freedom afforded by allowing it to assign VPs onto processors. With this runtime system, AMPI supports such features as automatic adaptive overlapping of communication and computation, automatic load balancing, flexibility of running on arbitrary number of processors, and checkpoint/restart support. It also inherits communication optimization from Charm++ framework. This paper describes AMPI, illustrates its performance benefits through a series of benchmarks, and shows that AMPI is a portable and mature MPI implementation that offers various performance benefits to dynamic applications.
9249972
Measures of wireless data performance
There is considerable interest within the industry in specifying the performance of wireless data. In this letter, we review and contrast various performance metrics such as peak rates, average throughput, and user experience. We discuss the relevance of these measures to varying applications such as marketing, planning, and technology comparisons.
1650647
Load balancing in bounded-latency content distribution
In this paper we present a balanced data replication scheme that provides real-time latency bounds on content retrieval in content distribution networks. Many network applications have ever-increasing requirements on latency sensitive data services. Data replication services have been widely used as an important performance enhancement mechanism to reduce data access latency and throughput. We investigate the problem of provisioning an underlying balanced data replication service to provide a global latency bound on data retrieval in content distribution networks. The solution involves constructing an overlay network based on the given latency bound, and a mechanism to assign content objects to the network nodes so that the workload of all the network nodes is balanced. Our evaluation results drawn from detailed simulations show the efficacy of our load-balancing scheme in meeting the latency bound requirements with high confidence under heavy load
39753705
A programmable built-in self-test core for embedded memories
904578
Simulation-based test algorithm generation for random access memories
Although there are well known test algorithms that have been used by the industry for years for testing semiconductor random-access memories (RAMs), systematic evaluation of their effectiveness and efficiency has been a difficult job. In the past, it was mainly done manually by proving a certain algorithm can detect a certain type of fault. As memory technology keeps innovating, the growing complexity of the memories and number of fault types that need to be covered will require more effective and efficient test algorithms to be discovered in much shorter time. A systematic approach for developing and evaluating memory test algorithms is thus desired. We propose such an approach here: test algorithm generation by simulation (TAGS), which generates and optimizes test algorithms, given a test time budget. Experimental results show that the algorithms generated by TAGS are more efficient than the traditional test algorithms. Using TAGS, a series of test algorithms with a detailed list of faults covered by each algorithm can be generated, providing easy trade-off between test time and fault coverage.