5623657
Satellite ATM Network Architectural Considerations and TCP/IP Performance
In this paper, we have provided a summary of the design options in Satellite-ATM technology. A satellite ATM network consists of a space segment of satellites connected by inter-satellite crosslinks, and a ground segment of the various ATM networks. A satellite-ATM interface module connects the satellite network to the ATM networks and performs various call and control functions. A network control center performs various network management and resource allocation functions. Several issues such as the ATM service model, media access protocols, and traffic management issues must be considered when designing a satellite ATM network to effectively transport Internet traffic. We have presented the buffer requirements for TCP/IP traffic over ATM-UBR for satellite latencies. Our results are based on TCP with selective acknowledgments and a per-VC buffer management policy at the switches. A buffer size of about 0.5 * RTT to 1 * RTT is sufficient to provide over 98% throughput to infinite TCP traffic for long latency networks and a large number of sources. This buffer requirement is independent of the number of sources. The fairness is high for a large numbers of sources because of the per-VC buffer management performed at the switches and the nature of TCP traffic.
3264607
Congestion Control in Computer Networks: Trends and Issues
Myths about congestion control are examined, and an explanation of why the trend toward cheaper memory, higher-speed links, and higher-speed processors has intensified the need to solve the congestion problem is provided. A number of proposed solutions are described, and a classification of congestion problems as well as their solutions is presented. The reasons why the problem is so difficult are identified, and the protocol design decisions that affect the design of a congestion control scheme are discussed. The author's recent proposals, namely, timeout-based congestion control, a DECbit scheme and a delay-based scheme for congestion avoidance are described, and areas for future research are suggested. >
52864471
A binary feedback scheme for congestion avoidance in computer networks
We propose a scheme for congestion avoidance in networks using a connectionless protocol at the network layer. The scheme uses a minimal amount of feedback from the network to the users, who adjust the amount of traffic allowed into the network. The routers in the network detect congestion and set a congestion-indication bit on packets flowing in the forward direction. The congestion indication is communicated back to the users through the transport-level acknowledgment. The scheme is distributed, adapts to the dynamic state of the network, converges to the optimal operating point, is quite simple to implement, and has low overhead. The scheme maintains fairness in service provided to multiple sources. This paper presents the scheme and the analysis that went into the choice of the various decision mechanisms. We also address the performance of the scheme under transient changes in the network and pathological overload conditions.
16881430
Multimedia Satellite Networks and TCP/IP Traffic Transport
Abstract To meet an increasing demand for multimedia services and electronic connectivity across the world, satellite networks will play an indispensable role in the deployment of global networks. A number of satellite communication systems have been proposed using geosynchronous (GEO) satellites, medium earth orbit (MEO) and low earth orbit (LEO) constellations operating in the Ka-band and above. At these frequencies, satellite networks are able to provide broadband services requiring wider bandwidth than the current services at C or Ku-band. Most of the next-generation broadband satellite systems will use ATM or "ATM-like" switching with onboard processing to provide full two-way services to and from earth stations. The new services gaining momentum include mobile services, private intranets, and high-data-rate internet access carried over integrated satellite-fiber networks. Several performance issues need to be addressed before a transport layer protocol like TCP can satisfactorily work over satellite ATM for large delay-bandwidth networks. The authors review the proposed satellite systems and discuss challenges such as traffic management and QoS requirements for broadband satellite ATM networks. The performance results of TCP enhancements for Unspecified Bit Rate over ATM (ATM-UBR+) for large bandwidth-delay environments with various end system policies and drop policies for several buffer sizes are presented.
956
Performance of TCP/IP Using ATM ABR and UBR Services over Satellite Networks
We study the buffering requirements for zero cell loss for TCP/IP over satellite links using the available bit rate (ABR) and unspecified bit rate (UBR) services of asynchronous transfer mode (ATM) networks. For the ABR service, we explore the effect of feedback delay (a factor which depends upon the position of the bottleneck), the switch scheme used, and background variable bit rate (VBR) traffic. It is shown that the buffer requirement for TCP over ABR is independent of the number of TCP sources, but depends on the aforementioned factors. For the UBR service, we show that the buffer requirement is the sum of the TCP receiver window sizes. We substantiate our arguments with simulation results.
789958
Myths about Congestion Management in High Speed Networks
Weaknesses in several recently proposed ideas about congestion control and avoidance in high-speed netwroks are identified. Both sides of the debate concerning prior reservation of resources versus walk-in service, open-loop control versus feedback control, rate control versus window control, and router-based control versus source-based control are presented. The circumstances under which backpressure is useful or not are discussed, and it is argued that a single congestion scheme is not sufficient, but that a combination of several schemes is required for complete congestion management in a network.
40775308
Vector Field Analysis for Oriented Patterns
Presents a method, based on the properties of vector fields, for the estimation of a set of symbolic descriptors (node, saddle, star-node, improper-node, center, and spiral) from linear orientation fields. Planar first-order phase portraits are used to model the linear orientation fields. A weighted linear estimator is developed to estimate linear phase portraits, using only the flow orientation. A classification scheme for planar first-order phase portraits, based on their local properties: curl, divergence, and deformation is developed. The authors present results of experiments on noise-added synthetic flow patterns and real oriented textures. >
13296348
Variability in the execution of multimedia applications and implications for architecture
Multimedia applications are an increasingly important workload for general-purpose processors. This paper analyzes frame-level execution time variability for several multimedia applications on general-purpose architectures. There are two reasons for such an analysis. First, it has been conjectured that complex features of such architectures (e.g., out-of-order issue) result in unpredictable execution times, making them unsuitable for meeting real-time requirements of multimedia applications. Our analysis tests this conjecture. Second, such an analysis can be used to effectively employ recently proposed adaptive architectures.
We find that while execution time varies from frame to frame for many multimedia applications, the variability is mostly caused by the application algorithm and the media input. Aggressive architectural features induce little additional variability (and unpredictability) in execution time, in contrast to conventional wisdom.
The presence of frame-level execution time variability motivates frame-level architectural adaptation (e.g., to save energy). Additionally, our results show that execution time generally varies slowly, implying it is possible to dynamically predict the behavior of future frames on a variety of hardware configurations for effective adaptation.
47572575
The Art of Computer Systems Performance Analysis
the art of computer systems performance analysis by is one of the most effective vendor publications worldwide? Have you had it? Not at all? Ridiculous of you. Currently, you can get this impressive book simply here. Locate them is layout of ppt, kindle, pdf, word, txt, rar, as well as zip. Just how? Merely download and even read online in this site. Now, never ever late to read this the art of computer systems performance analysis. Whatever our proffesion, the art of computer systems performance analysis can be good source for reading. Find the existing reports of word, txt, kindle, ppt, zip, pdf, and also rar in this website. You can absolutely read online or download this book by right here. Currently, never miss it. Our goal is always to offer you an assortment of cost-free ebooks too as aid resolve your troubles. We have got a considerable collection of totally free of expense Book for people from every single stroll of life. We have got tried our finest to gather a sizable library of preferred cost-free as well as paid files. GO TO THE TECHNICAL WRITING FOR AN EXPANDED TYPE OF THIS THE ART OF COMPUTER SYSTEMS PERFORMANCE ANALYSIS, ALONG WITH A CORRECTLY FORMATTED VERSION OF THE INSTANCE MANUAL PAGE ABOVE.
17211338
Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform
The discrete wavelet transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall power dissipation is dominated by read and write operations in the memory subsystem. The proposed architecture and computation sequence, called low-power block-scan, takes into account the EBCOT (embedded block coding with optimized truncation) code block size, which reduces the intermediate buffer requirement between the DWT and EBCOT modules. The impact of different memory subsystem optimization techniques on the overall memory power for 2D-DWT computation was modeled. The proposed model explores the different data access patterns, memory bank partitioning, and custom memory architectures to arrive at a power-efficient DWT architecture
7565598
Towards coarse-grained mobile QoS
Supporting Quality of Service is an important objective for future mobile and wireless systems, and requires resource reservation and admission control to achieve. In this paper, we introduce a novel coarse grained approach to admission control termed Virtual Bottleneck Cell. Our approach is designed to scale to many users and handoffs, while simultaneously controlling “hot spots” and system bottlenecks. The key technique is to hierarchically control the virtual system, ensuring QoS objectives are satisfied without requiring models or accurate predictions of the users’ future locations. We develop a simple analytical model to study the system and illustrate several key components of the approach. Finally, we perform simulations in a two-dimensional network to compare the performance obtained with Virtual Bottleneck Cell with alternate schemes, including the optimal off line algorithm.