31342656
The Counting Series for Unlabeled Linear Acyclic Hypergraphs
31833569
The kth Lower Multiexponent of Tournament Matrices
10079260
The sum number and integral sum number of complete bipartite graphs
Let N denote the set of positive integers. The sum graph G + (S) of a 1nite subset S of N is the graph (S; E) with vertex set S and edge set E such that for u; v ∈ S; uv ∈ E if and only if u + v ∈ S. A graph G is called a sum graph if it is isomorphic to the sum graph G + (S) of some 1nite subset S of N . The sum number � (G) of a graph G is de1ned as the smallest nonnegative integer m for which G ∪ mK1 is a sum graph. Let Z be the set of all integers. By extending the set N to Z in the above de1nitions of sum graphs and sum numbers, Harary [3] introduced the corresponding notions of integral sum graphs and integral sum number of a graph. In this paper, we evaluate the value of the sum number and integral sum number of the complete bipartite graph Kr; s. While the former one corrects the result given in [4], the latter settles completely a problem proposed in [3]. c � 2001 Elsevier Science B.V. All rights reserved.
36855127
Some inequalities about connected domination number
Abstract Let G = ( V , E ) be a graph. In this note, γ c , ir, γ, i, β 0 , Γ, IR denote the connected domination number, the irredundance number, the domination number, the independent domination number, the independence number, the upper domination number and the upper irredundance number, respectively. We prove that γ c ⩽ 3 ir − 2 for a connected graph G . Thus, an open problem in Hedetniemi and Laskar (1984) discuss further some relations between γ c and γ, β 0 , Γ, IR, respectively.
20672183
An Algorithm to Construct k-Regular k-Connected Graphs with the Maximum k-Diameter
Abstract. Let f(2m,k) be the Maximum k-diameter of k-regular k-connected graphs on 2m vertices. In this paper we give an algorithm and prove that we can construct k-regular k-connected graphs on 2m vertices with the maximum k-diameter using it. We also prove some known results about f(2m,k) and verify that we can get some unknown values of f(2m,k) by our algorithm.
10886416
Prediction and indexing of moving objects with unknown motion patterns
Existing methods for peediction spatio-temporal databases assume that objects move according to linear functions. This severely limits their applicability, since in practice movement is more complex, and individual objects may follow drastically diffferent motion patterns. In order to overcome these problems, we first introduce a general framework for monitoring and indexing moving objects, where (i) each boject computes individually the function that accurately captures its movement and (ii) a server indexes the object locations at a coarse level and processes queries using a filter-refinement mechanism. Our second contribution is a novel recursive motion function that supports a broad class of non-linear motion patterns. The function does not presume any a-priori movement but can postulate the particular motion of each object by examining its locations at recent timestamps. Finally. we propse an efficient indexing scheme that faciliates the processing of predicitive queries without false misses.
1727263
A study of networks simulation efficiency: fluid simulation vs. packet-level simulation
Network performance evaluation through traditional packet-level simulation is becoming increasingly difficult as today's networks grow in scale along many dimensions. As a consequence, fluid simulation has been proposed to cope with the size and complexity of such systems. This study focuses on analyzing and comparing the relative efficiencies of fluid simulation and packet-level simulation for several network scenarios. We use the "simulation event" rate to measure the computational effort of the simulators and show that this measure is both adequate and accurate. For some scenarios, we derive analytical results for the simulation event rate and identify the major factors that contribute to the simulation event rate. Among these factors, the "ripple effect" is very important since it can significantly increase the fluid simulation event rate. For a tandem queueing system, we identify the boundary condition to establish regions where one simulation paradigm is more efficient than the other. Flow aggregation is considered as a technique to reduce the impact of the "ripple effect" in fluid simulation. We also show that WFQ scheduling discipline can limit the "ripple effect", making fluid simulation particularly well suited for WFQ models. Our results show that tradeoffs between parameters of a network model determines the most efficient simulation approach.
18992172
A practical packet reordering mechanism with flow granularity for parallelism exploiting in network processors
Network processors (NP) are usually designed to exploit packet level parallelism where system throughput is aggregated by multiple CPU cores. A serious problem in such a system is packet disordering (PD), which may deteriorate network performance greatly. To address the PD problem, a practical reordering mechanism is put forward in this paper. Different from the traditional reordering methods such as in ATM networks, it uses a central-controlled chain-based mechanism to implement packet reordering with flow granularity. We verify it in FPGA and carry out a series of experiments, where the results show that system throughput can be influenced greatly by traffic patterns. We also demonstrate that the reordering with flow granularity is quite requisite in NP, which can increase the system throughput to a great extent compared to the conventional method with global granularity.
13323849
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end network processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an extraordinary scalable architecture. In this paper, it is argued that such an objective can only be sufficed by introducing highly paralleled structure, namely the paralleled processing-engine cluster (PPC). We demonstrate this point from the trade-off among aspects such as performance, programmability and flexibility. However, PPC natively suffers from several critical issues on load-balancing, intra-flow packet ordering and memory contention. After investigating several existing approaches, we present novel solutions for each issue according to the balance between performance and coast. Through intensive analysis and comprehensive simulations, it is shown that the shortest queue first scheduling with class-based prediction (SQF-C) performs nearly optimally, while the hardware based per-flow ordering mechanism resolves packet out-of-order independently with the load-balancing issue, inducting little throughput degradation. Implementing the unified solution, it is capable to design a PPC supporting up to OC-768c line rate. Real implementation is also carried out in our THNPU-1 prototype to verify the conclusions.
3063801
Iteration-Shared Scheduling Algorithms Abolishing the Departure-Time-Compatible Graph in Switch-Memory-Switch Switches
Switch-Memory-Switch (SMS) architecture exhibits an excellent performance due to its emulating the Output Queueing structure. However, in order to achieve the maximal matching, the first stage scheduling operates at a huge computational complexity, which blocks the SMS from practical implementation. In order to put SMS into more effective industrial applications, especially in super-large size switches/routers with multi-services environment, two parallel iterative scheduling algorithms, named IS-RRM and AIS-RRM respectively, are proposed in this paper. The algorithms abolish totally the traditional departure-time-compatible (DTC) graph, and by using iteration-sharing technology, greatly reduce the required iteration number in each time slot. Using a discrete-time Markov chain to model the AIS-RRM algorithm, we obtain its upper bound of cell loss rate. Meanwhile, experimental and theoretical results show that so long as the number of shared memories is twice the switch size, AIS-RRM algorithm can achieve a cell loss rate of 10 when the input buffer size is 15 and the iteration number of each time slot is 6, despite the arrival traffic pattern and the switch size. Furthermore, the iteration number required in each time slot can be further decreased by increasing the input buffer size.