12365152
A multi-access window protocol for transmission of time constrained messages
A novel window protocol for transmitting time-constrained messages in a multiaccess network is proposed that explicitly takes time constraints into account. The window is formed on the basis of latest time to send a message (LS). A newly arriving message is immediately considered for transmission if its LS is less than those of the all pending messages in the system. As a result, the protocol closely approximates the optimal minimum-laxity-first policy. A performance evaluation by simulation shows that the protocol performs well in a wide range of environments, even under overloaded conditions.<<ETX>>
16570884
FPGA-Based High-Order Finite Difference Algorithm for 2D Acoustic Wave Propagation Problems
Finite Difference Time Domain (FDTD) method is the most commonly used numerical algorithm for simulating linear wave propagation phenomena in geophysics, electromagnetics, and aeroor marineacoustics applications. Unfortunately, evaluating timeevolution for millions to trillions of discrete spatial points is computational intensive, especially when the geometrical size under study is much larger than the wavelength of excitations or long time integration is needed. In this paper, we proposed an FPGA-based hardware implementation to accelerate these simulation tasks. By adopting high-order temporal and spatial finite difference numerical algorithms along with efficient on-chip memory architecture, we alleviate the bandwidth bottleneck between the FPGA chip and onboard memories at the cost of increased computational burdens, which are absorbed effectively into the pipelined computing engine without speed penalty. The speed of our design implemented on Xilinx ML401 Virtex-4 evaluation platform is about 7~20 times faster than a pure software implementation of the same algorithm running on a 3.0GHz DELL workstation. Moreover, the desirable properties of simplicity and scalability make our design compatible with most commercial reconfigurable coprocessor platforms and correspondingly, the performance would be proportional to their available onboard memory bandwidth. 1. Motivation and related work Time domain numerical simulation can improve people’s understanding on dynamic behaviors of complex time-evolution problems, so plays an important role in scientific research and engineering design. In the past decades, efforts of simulating linear wave phenomena, including acoustic, electromagnetic, and elastic waves, have grown rapidly with the performance improvement of digital computers. The standard 2-order accurate FD method (including the famous Yee’s FDTD method on staggered grid in computational electromagnetic applications) is the most commonly used numerical algorithm because of its simplicity and flexibility. It is also well known that the propagation of waves over long distances requires long-time integration with minimal numerical dissipation and dispersion, and the performance of high-order FD schemes is superior to the standard one. However, their extraordinarily computational costs lead to relatively low algorithm efficiency, which limit their utilization in practice. Although pure software acceleration methods, from low-level instruction reordering to high-level process parallelism are all exhausted to speedup these applications, a typical 2D or 3D simulation task still costs hours to weeks using even the simplest 2-order FDTD method on High Performance Computing (HPC) environments. Recently, as the programmable hardware resources inside FPGA chips have increased greatly, people start showing their interests in accelerating time domain numerical simulations for wave-like equations on FPGA-based reconfigurable hardware platforms. Comparing with pure software procedures running on general-purpose computers or fully-customized VLSI hardware platforms, FPGA technology provide people a compromise between software’s best flexibility and the highest performance of hardware implementations. The idea of accelerating acoustic wave simulations using hardware platforms for geophysical applications can be traced back to 1990s [1]. The first effort of designing and implementing such a stand-alone system was described in [2]. In [3], a reconfigurable coprocessor platform using high density FPGA was proposed to speedup seismic migration problems. For computational electromagnetic applications, several authors proposed their FPGA-based solutions to accelerating Yee’s Finite-Difference TimeDomain (FDTD) algorithm from the early 1990s [4-5]. Recent work in this field can be found in [6-9]. While most previous implementations concentrated on integrating more hardware arithmetic units into FPGA so that the aggressive computational speed of their designs could exceed generic computers, we have to point out that the massive data volume is the fundamental hindrance of simulating wave propagation problems numerically in 2D or 3D space. Specifically, memory bandwidth available between the computing engine (FPGA) and onboard memory modules has been proven a bottleneck preventing people taking full advantage of FPGA’s computational potentials [3, 8, 9]. In this paper, we try to alleviate this bottleneck from two approaches: First, we adopt high-order spatial FD operators together with high-order time integration schemes to greatly reduce the number of discrete gird points inside the simulation area and the number of time-marching steps. Second, we propose a new on-chip memory architecture design for our high-order FD numerical algorithms. This new design can be mapped into most conventional FPGAbased reconfigurable coprocessor platforms efficiently and sustained high computational throughput can be achieved. The rest of this paper is organized as follow: In section 2, we introduce the high-order FD numerical algorithms we adopted in this work and show their advantages over the standard 2-order method using a simple one-dimensional acoustic wave propagation experiment. In section 3, we first propose our memory architecture design for the (2-4) FD scheme in 2D space, and then extend it to 4-order time-marching scheme to show its good scalability. Section 4 provides the performance comparisons between our hardware accelerator design implemented on Xilinx ML401 evaluation platform and its pure software counterpart on a P4 workstation for a simple 2D seismic modeling problem. Finally, conclusions and a discussion of future research direction are presented in section 5. 2. Acoustic wave equation and its High-order FD approximations 2.1 2-order accurate FD scheme Seismic modeling (forwarding) problems governed by acoustic or elastic wave equations in geophysics field are a class of numerical methods that simulate the scattering field arising when an impulsive source excites an underground region with known physical properties like density, velocity, anisotropy, elasticity, etc. We consider here the simplest 2D scalar acoustic case in the form of second-order hyperbolic Partial Differential Equation (PDE) as, ) , , ( ) , , ( ) , ( ) , , ( 2
14103668
Static priority scheduling for ATM networks
Static priority scheduling is popular for traffic scheduling in ATM switches because it is less costly than dynamic priority scheduling while being sensitive to the delay constraints of connections. We study delay computation and priority assignment problems in an ATM network with static priority scheduling. Given an ATM network with arbitrary topology, it is possible that the traffic on it may become unstable (i.e., packet delays become unbounded) due to the potential cyclic dependency of the traffic. An unstable network is definitely unacceptable for many delay sensitive applications. We start by formally deriving a simple condition under which the network is guaranteed to be stable. We then develop a numerical method to compute worst case end to end delays in an ATM network with arbitrary topology. Convergence of the method is formally proved and a closed form for the computing error is obtained. Despite its advantages, static priority scheduling remains sensitive to proper priority assignment. We describe two simple priority assignment methods, which we show to outperform other commonly used methods.
3254470
Providing absolute differentiated services with statistical guarantees in static-priority scheduling networks
The authors propose and analyze a methodology for providing absolute differentiated services with statistical performance guarantees for real time applications in networks that use static priority schedulers. We extend previous work on delay analysis and develop a method that can be used to derive statistical delay guarantees in a flow-unaware fashion. While traditional delay analysis methods depend on flow population information, we have developed a method that relies on network (re-)configuration time analysis, and that allows us to analyze the delays without depending on the dynamic status of flow population. With this new method, we are able to reduce the runtime admission control to a simple utilization test. No explicit delay computation is necessary at admission time, making this approach scalable to large systems.
16198597
Effective delay control for high rate heterogeneous real-time flows
This paper presents a new method to control the delay performance for high rate heterogeneous real-time traffic flows based on a novel traffic control algorithm which is a generalization of traditional (/spl sigma/, /spl rho/) regulator. Our new control algorithm operates like the traditional regulator under the normal loading situation, but provides more regulation for the high rate (heavy load condition) of the traffic. For a set of heterogenous real-time traffic flows R we can show that D/sub r/(R) /spl les/ D(R) where D/sub r/(R) and D(R) are the worst-case delay bounds with our new control algorithm and that with (/spl sigma/, /spl rho/) regulator respectively. More specifically, we develop a set of formula that can be used to set the parameters in our new traffic controller so that the worst case delay bound is minimized by streaming the traffic flow. We can prove that there exists a minimum (average) input rate p* such that D/sub r/(R) = D(R) for /spl rho/ /spl les/ /spl rho/* and D/sub r/(R) < D(R) for /spl rho/ > /spl rho/*. Using the extended regulator can effectively control the delay when the average heterogeneous traffic rate is high. The issues are particularly useful for Integrated Services where a flow may over claim its share of resource and for Differentiated Services where a class of traffic flows may possess very high rates.
11547845
Local synchronous capacity allocation schemes for guaranteeing message deadlines with the timed token protocol
The problem of guaranteeing synchronous message deadlines in communication networks using the timed token medium access control protocol is studied. To ensure the transmission of synchronous messages before their deadlines, synchronous capacities must be properly allocated to individual nodes. A class of local synchronous capacity allocation schemes, which allocate the synchronous capacity to a node without using information about messages on the other nodes, is developed, analyzed, and evaluated in terms of the ability of the schemes to guarantee message deadlines. It is shown that one of the local allocation schemes proposed can achieve the same performance as that of the best global allocation scheme known to date.<<ETX>>
16513442
DotSlash: Handling Web Hotspots at Dynamic Content Web Sites
We propose DotSlash, a self-configuring and scalable rescue system, for handling web hotspots at dynamic content Web sites. To support load migration for dynamic content, an origin Web server sets up needed rescue servers drafted from other Web sites on the fly, and those rescue servers retrieve the scripts dynamically from the origin Web server, cache the scripts locally, and access the corresponding database server directly. We have implemented a prototype of DotSlash for the LAMP configuration, and tested our implementation using the RUBBoS bulletin board benchmark. Experiments show that by using DotSlash a dynamic content web site can completely remove its web server bottleneck, and can support a request rate constrained only by the capacity of its database server.
318699
Design and implementation of a consistent time service for fault-tolerant distributed systems
Clock-related operations are one of the many sources of replica non-determinism and of replica inconsistency in fault-tolerant distributed systems. In passive replication, if the primary server crashes, the next clock value returned by the new primary server might have actually rolled back in time, which can lead to undesirable consequences for the replicated application. The same problem can happen for active replication when the result of the first replica to respond is taken as the next clock value. In this paper we describe the design and implementation of a Consistent Time Service for faulttolerant distributed systems. The Consistent Time Service introduces a group clock that is consistent across the replicas and that ensures the determinism of the replicas with respect to clock-related operations. The groupclock is monotonicallyincreasing, is transparent to the application, and is fault-tolerant. The Consistent Time Service guaranteesthe consistency of the groupclock evenwhen faults occur, when new replicas are added into the group, and when failed replicas recover.
9870709
End-to-end latency of a fault-tolerant CORBA infrastructure
This paper presents an evaluation of the end-to-end latency of a fault-tolerant CORBA infrastructure that we have implemented. The fault-tolerant infrastructure replicates the server applications using active, passive and semi-active replication, and maintains strong replica consistency of the server replicas. By analyses and by measurements of the running fault-tolerant infrastructure, we characterize the end-to-end latency under fault-free conditions. The main determining factor of the run-time performance of the fault-tolerant infrastructure is the Totem group communication protocol, which contributes to the end-to-end latency primarily in two ways: the delay in sending messages and the processing cost of the rotating token.To reduce the delay in sending messages for passive and semi-active replication, the position of the primary server replica on the Totem ring, the token rotation time, the processing time at the client, and the processing time at the server must be considered. For active replication, the presence of duplicate messages adversely affects the performance. However, if an effective sending-side duplicate suppression mechanism is implemented, active replication is more advantageous than both passive and semi-active replication because of the automatic selection of the most favorable position of the server replica that sends the first non-duplicate reply.
17989665
Message ferrying: proactive routing in highly-partitioned wireless ad hoc networks
An ad hoc network allows devices with wireless interfaces to communicate with each other without any pre-installed infrastructure. Due to node mobility, limited radio power, node failure and wide deployment area, ad hoc networks are often vulnerable to network partitioning. A number of examples are in battlefield, disaster recovery and wide area surveillance. Unfortunately, most existing ad hoc routing protocols will fail to deliver messages under these circumstances since no route to the destination exists. In this work we propose the Message Ferrying or MF scheme that provides efficient data delivery in disconnected ad hoc networks. In the MF scheme, nodes move proactively to send or receive messages. By introducing non-randomness in a node's proactive movement and exploiting such nonrandomness to deliver messages, the MF scheme improves data delivery performance in a disconnected network. In this paper, we propose the basic design of the MF scheme and develop a general framework to classify variations of MF systems. We also study ferry route design problem in stationary node case which is shown to be NP-hard and provide an efficient algorithm to compute ferry route.
5158621
Unification of replication and transaction processing in three-tier architectures
In this paper we describe a software infrastructure that unifies replication and transaction processing in three-tier architectures and, thus, provides high availability and fault tolerance for enterprise applications. The infrastructure is based on the Fault Tolerant CORBA and CORBA Object Transaction Service standards, and works with commercial-off-the-shelf application servers and database systems. The infrastructure replicates the application servers to protect the business logic processing. In addition, it replicates the transaction coordinator which renders the two-phase commit protocol non-blocking and, thus, avoids potentially long service disruptions caused by coordinator failure. The infrastructure handles the interactions between the application servers and the database servers through replicated gateways that prevent duplicate requests from reaching the database servers. The infrastructure implements client-side automatic failover mechanisms, which guarantees that clients know the outcome of the requests that they have made. The infrastructure starts the transactions at the application servers, and retries aborted transactions, caused by process or communication failures, automatically on the behalf of the clients.