18753637
Fast factorization architecture in soft-decision Reed-Solomon decoding
Reed-Solomon (RS) codes are among the most widely utilized block error-correcting codes in modern communication and computer systems. Compared to its hard-decision counterpart, soft-decision decoding offers considerably higher error-correcting capability. The recent development of soft-decision RS decoding algorithms makes their hardware implementations feasible. Among these algorithms, the Koetter-Vardy (KV) algorithm can achieve substantial coding gain for high-rate RS codes, while maintaining a polynomial complexity with respect to the code length. In the KV algorithm, the factorization step can consume a major part of the decoding latency. A novel architecture based on root-order prediction is proposed in this paper to speed up the factorization step. As a result, the time-consuming exhaustive-search-based root computation in each iteration level, except the first one, of the factorization step is circumvented with more than 99% probability. Using the proposed architecture, a speedup of 141% can be achieved over prior efforts for a (255, 239) RS code, while the area consumption is reduced to 31.4%.
12946822
Partial parallel factorization in soft-decision Reed-Solomon decoding
Reed-Solomon (RS) codes have very broad applications in communications and data storage systems. The recently developed Koetter-Vardy (KV) soft-decision decoding algorithm of RS codes can achieve substantial coding gain, while has a complexity polynomial with respect to the codeword length. One of the major steps of the KV algorithm is the factorization step. A prediction-based architecture is developed in prior efforts to reduce the latency and silicon area of this step. However, the speedup can be achieved by this approach is limited by the serial nature of the factorization algorithm. The computations involved in multiple iteration levels can not be carried out simultaneously. In this work, a novel partial parallel architecture is proposed for the factorization step. The partial 2-parallel architecture can achieve a speedup of 19% over prior works.
20916764
Low-complexity Interpolation Architecture for Soft-decision Reed-Solomon Decoding
Reed-Solomon (RS) codes have very broad applications in digital communication and storage systems. Among the decoding algorithms of RS codes, the Koetter-Vardy (KV) soft-decision decoding algorithm can achieve substantial coding gain with a polynomial complexity. One of the major steps of the KV algorithm is the interpolation. Recently, a new algorithm was proposed to solve the interpolation problem. Compared to previous efforts, this algorithm is computationally simpler, and thus can potentially lead to practical high-speed hardware implementations of the KV algorithm. This paper proposes novel transformation techniques to further reduce the hardware complexity of the new interpolation algorithm. In addition, efficient VLSI architectures are provided for the new algorithm
1561680
Design of full band IIR digital differentiators
This paper presents an efficient method for designing full band IIR digital differentiators in the complex Chebyshev sense. The proposed method is based on the formulation of a generalized eigenvalue problem by using the Remez multiple exchange algorithm. Therefore, a set of filter coefficients can be easily obtained by solving the eigenvalue problem to find the absolute minimum eigenvalue, and then the complex Chebyshev approximation is attained through a few iterations starting from a given initial guess. The proposed algorithm is computationally efficient because it not only retains the speed inherent in the Remez exchange algorithm, but also simplifies the interpolation step. One design example is presented and compared with the conventional methods. It can be seen that the design results obtained by using the proposed method are better than that in the conventional methods.
13935393
Lossy to lossless image compression using allpass filters
In this paper, an effective implementation of the allpass-based orthonormal symmetric wavelets is proposed for image compression. Since the orthonormal symmetric wavelets are used, it can be expected to get better compression performance than biorthogonal wavelets. Firstly, the implementation of irreversible real-to-real wavelets is presented and its decomposition process is shown by using allpass filters. Then, the realization of the reversible integer-to-integer wavelets is given by utilizing the invertible implementation of allpass filters. Finally, the coding performance of the orthonormal symmetric wavelets is evaluated and compared with the D-9/7 and D-5/3 wavelets. It is shown from the experimental results that the allpass-based orthonormal symmetric wavelets can achieve better compression performance than the D-9/7 and D-5/3 wavelets.
10102756
Semi-Empirical Multiprocessor Performance Predictions
This paper presents a multiprocessor performance prediction methodology supported by experimental measurements, which predicts the execution time of large application programs on large parallel architectures based on a small set of sample data. We propose a graph model to describe application program behavior. In order to precisely abstract an architecture model for the prediction, important and implicit architecture parameters are obtained by experiments. We focus on performance predictions of application programs in shared-memory and data-parallel architectures. Real world applications are implemented using the shared-memory model on the KSR-1 and using the data-parallel model on the CM-5 for performance measurements and prediction validation. We show that experimental measurements provide strong support for performance predictions on multiprocessors with implicit communications and complex memory systems, such as shared-memory and data-parallel systems, while analytical techniques partially applied in the prediction significantly reduce computer simulation and measurement time.
3576620
Cost effective dynamic program slicing
Although dynamic program slicing was first introduced to aid in user level debugging, applications aimed at improving software quality, reliability, security, and performance have since been identified as candidates for using dynamic slicing. However, the dynamic dependence graph constructed to compute dynamic slices can easily cause slicing algorithms to run out of memory for realistic program runs. In this paper we present the design and evaluation of a cost effective dynamic program slicing algorithm. This algorithm is based upon a dynamic dependence graph representation that is highly compact and rapidly traversable. Thus, the graph can be held in memory and dynamic slices can be quickly computed. A compact representation is derived by recognizing that all dynamic dependences (data and control) need not be individually represented. We identify sets of dynamic dependence edges between a pair of statements that can share a single representative edge. We further show that the dependence graph can be transformed in a manner that increases sharing and sharing can be performed even in the presence of aliasing. Experiments show that transformed dynamic dependence graphs explicitly represent only 6% of the dependence edges present in the full dynamic dependence graph. When the full graph sizes range from 0.84 to 1.95 Gigabytes in size, our compacted graphs range from 20 to 210 Megabytes in size. Average slicing times for our algorithm range from 1.74 to 36.25 seconds across several benchmarks from SPECInt2000/95.
2953976
A performance study of monitoring and information services for distributed systems
Monitoring and information services form a key component of a distributed system, or Grid. A quantitative study of such services can aid in understanding the performance limitations, advise in the deployment of the monitoring system, and help evaluate future development work. To this end, we study the performance of three monitoring and information services for distributed systems: the Globus Toolkit/spl reg/ Monitoring and Discovery Service (MDS2), the European Data Grid Relational Grid Monitoring Architecture (R-GMA) and Hawkeye, part of the Condor project. We perform experiments to test their scalability with respect to number of users, number of resources and amount of data collected. Our study shows that each approach has different behaviors, often due to their different design goals. In the four sets of experiments we conducted to evaluate the performance of the service components under different circumstances, we found a strong advantage to caching or pre-fetching the data, as well as the need to have primary components at well-connected sites because of the high load seen by all systems.