9110982
Modelling of Features and Feature Interactions in Nokia Mobile Phones Using Coloured Petri Nets
This paper reports on the main results from an industrial cooperation project. The project is a joint project between Nokia Research Centre and the CPN group at the University of Aarhus. The purpose of the project was to investigate features and feature interactions in development of Nokia mobile phones through construction of a Coloured Petri Nets (CPN) model. The model is extended with domain-specific graphics and Message Sequence Charts to enable mobile phone user interface designers and software developers who are not familiar with Petri Nets to work with the model. The paper presents the CPN model constructed in the project, describes how domain-specific graphics and Message Sequence Charts are used in simulations of the CPN model, and discusses how the project and in particular the construction of the CPN model has influenced the development process of features in Nokia mobile phones.
16116716
Evaluating and Balancing Reliability and Performance Properties of Software Architecture Using Formal Modeling Techniques
The run-time quality properties of software architecture, such as reliability and performance, are fundamental to telecom systems, but they are very hard to be precisely specified and evaluated with conventional methods. In our contribution we focus on modeling and analysis of architectural level run-time quality properties using formal methods. Colored Petri nets (CPN) is used to create specific system behavior models of reliability and performance properties of software architecture, these properties are then evaluated with analysis and simulation techniques supported by CPN and its tools. In this paper we report our approach and experience on using CPN to model and evaluate the reliability and performance properties of different architecture designs of a critical software subsystem in a telephone switch system. The reliability and performance properties of two alternative solutions were modeled and compared through model analysis and extensive model simulation. The results helped us to find an ideal solution with high performance, low cost and acceptable reliability that met the industry standards
8865153
Validating UML models against architectural profiles
The Unified Modeling Language (UML) has become a widely adopted standard in the software industry. While UML has established itself in detailed software design, its usage as an architecture description language is still taking its shape. In particular, there is a growing need for techniques to define domain specific architectural constraints and conventions in UML. We address this issue by adopting the concept of UML profiles for architectural design. Architectural profiles are specialized for describing and constraining software architecture descriptions for a given domain. We argue that these profiles represent an appropriate abstraction level to elaborate architectural constraints and conventions. We present a general schema for arranging architectural profiles and a set of conformance rules that define how these profiles are interpreted, constituting a profile definition language for validating architectural design. We introduce a tool for performing architectural validation and discuss the results of our initial case studies.
18818911
Architectural modeling in industry-an experience report
Nokia Research Center (NRC) has been leading Esprit project ARES (Architectural Reasoning for Embedded Systems) for two years. One of the main purposes of ARES is to demonstrate the use of architectural modeling in controlling properties of industrial scale products and product families. Two examples are documented. Forward architecting was applied in modeling the new architecture for our mobile phone family showing how to control the dynamic properties of the software. Reverse architecting was used to tune the performance of our telephone switch software. Both cases show that special purpose models can be constructed even for very large systems and they do give valuable insight to the properties of the software.
45243230
Experiences in Modelling Feature Interactions with Coloured Petri Nets
A modern mobile phone supports many features: voice and data calls, text messaging, personal information management like phonebooks and calendars, WAP browsing, games, alarm clock, etc. All these features are packaged into a handset with a small display and a special purpose keypad. The limited user interface and the seamless intertwining of logically separate features cause many interactions between the software components in the UI of mobile phones. In this paper, we present an overview of our approach to modelling feature interactions in Nokia's mobile phones with explicit behavioral models of features. We use Coloured Petri Nets as the modeling language and the tool Design/CPN that provides a graphical, interactive user interface for constructing and simulating Coloured Petri Nets. We describe at a general level how we have created a graphical user interface for controlling and observing the simulations of models through an on-screen mock-up of a mobile phone. Then, we discuss the conrete results we have achieved by using our approach.
6701763
UML-based reverse engineering and model analysis approaches for software architecture maintenance
This paper proposes a UML-based software maintenance process. The process is guided by architectural descriptions and existing architectural models. The descriptions are given as variants of UML profiles describing the styles and rules relevant for a particular application domain. A reverse engineering subprocess, combining top-down and bottom-up reverse engineering activities, aims at constructing the architectural models. Resulting models are investigated in a model analysis subprocess. The models are checked against the profiles to find violations against the given architectural rules when maintaining and developing the subject system, and they are further analyzed using a set of UML model processing operations. The proposed approach is applied for maintaining a large-scale product platform architecture and real-life product-line products built on top of this platform. The model analysis results of the case study are discussed.
2775894
Rigorous development of a safety-critical system based on coordinated atomic actions
This paper describes our experience using coordinated atomic (CA) actions as a system structuring tool to design and validate a sophisticated control system for a complex industrial application that has high reliability and safety requirements. Our study is based on the "Fault-Tolerant Production Cell", which represents a manufacturing process involving redundant mechanical devices (provided in order to enable continued production in the presence of machine faults). The challenge posed by the model specification is to design a control system that maintains specified safety and liveness properties even in the presence of a large number and variety of device and sensor failures. We discuss in this paper: i) a design for a control program that uses CA actions to deal with both safety-related and fault tolerance concerns, and ii) the formal verification of this design based on the use of model-checking. We found that CA action structuring facilitated both the design and verification tasks by enabling the various safety problems (e.g. clashes of moving machinery) to be treated independently. The formal verification activity was performed in parallel with the design activity the interaction between them resulted in a combined exercise in "design for validation".
38590214
Motion Composition of 3D Video
3D video, which is composed of a sequence of mesh models and can provide the user with interactivity, is attracting increasing attention in many research groups. However, it is time-consuming and expensive to generate 3D video sequences. In this paper, a motion composition method is proposed to edit 3D video based on the user’s requirements so that 3D video can be re-used. By analyzing the feature vectors, the hierarchical motion structure is parsed and then a motion database is set up by selecting the representative motions. A motion graph is constructed to organize the motion database by finding the possible motion transitions. Then, the best path is searched based on a proposed cost function by a modified Dijkstra algorithm after the user selects the desired motions in the motion database, which are called key motions in this paper. Our experimental results show the edited 3D video sequence looks natural and realistic.
15892344
Design of a novel statistics counter architecture with optimal space and time efficiency
The problem of how to efficiently maintain a large number (say millions) of statistics counters that need to be incremented at very high speed has received considerable research attention recently. This problem arises in a variety of router management algorithms and data streaming algorithms, where a large array of counters is used to track various network statistics and to implement various counting sketches respectively. While fitting these counters entirely in SRAM meets the access speed requirement, a large amount of SRAM may be needed with a typical counter size of 32 or 64 bits, and hence the high cost. Solutions proposed in recent works have used hybrid architectures where small counters in SRAM are incremented at high speed, and occasionally written back ("flushed") to larger counters in DRAM. Previous solutions have used complex schedulers with tree-like or heap data structures to pick which counters in SRAM are about to overflow, and flush them to the corresponding DRAM counters.In this work, we present a novel hybrid SRAM/DRAM counter architecture that consumes much less SRAM and has a much simpler design of the scheduler than previous approaches. We show, in fact, that our design is optimal in the sense that for a given speed difference between SRAM and DRAM, our design uses the theoretically minimum number of bits per counter in SRAM. Our design uses a small write-back buffer (in SRAM) that stores indices of the overflowed counters (to be flushed to DRAM) and an extremely simple randomized algorithm to statistically guarantee that SRAM counters do not overflow in bursts large enough to fill up the write-back buffer even in the worst case. The statistical guarantee of the algorithm is proven using a combination of worst case analysis for characterizing the worst case counter increment sequence and a new tail bound theorem for bounding the probability of filling up the write-back buffer. Experiments with real Internet traffic traces show that the buffer size required in practice is significantly smaller than needed in the worst case.
18700962
An experimental study of security vulnerabilities caused by errors
The paper presents an experimental study which shows that, for the Intel x86 architecture, single-bit control flow errors in the authentication sections of targeted applications can result in significant security vulnerabilities. The experiment targets two well-known Internet server applications: FTP and SSH (secure shell), injecting single-bit control flow errors into user authentication sections of the applications. The injected sections constitute approximately 2-8% of the text segment of the target applications. The results show that out of all activated errors: (a) 1-2% comprised system security (create a permanent window of vulnerability); (b) 43-62% resulted in crash failures (about 8.5% of these errors create a transient window of vulnerability); and (c) 7-12% resulted in fail silence violations. A key reason for the measured security vulnerabilities is that, in the x86 architecture, conditional branch instructions are a minimum of one Hamming distance apart. The design and evaluation of a new encoding scheme that reduces or eliminates this problem is presented.
6317190
WORM vs. WORM: preliminary study of an active counter-attack mechanism
Self-propagating computer worms have been terrorizing the Internet for the last several years. With the increasing density, inter-connectivity and bandwidth of the Internet combined with security measures that inadequately scale, worms will continue to plague the Internet community. Existing anti-virus and intrusion detection systems are clearly inadequate to defend against many recent fast-spreading worms. In this paper we explore an active counter-attack method - anti-worms. We propose a method that transforms a malicious worm into an anti-worm which disinfects its original. The method is evaluated using the CodeRed, Blaster and Slammer worms. We show through simulation the effectiveness of an anti-worm with several propagation schemes and its impact on the overall network. We also discuss important limitations of the proposed method.