1331147
Software controlled power management
Reducing power consumption is critical in many system designs. Dynamic power management is an effective approach to decrease power without significantly degrading performance. Power management decisions can be implemented in either hardware or software. A recent trend on personal computers is to use software to change hardware power states. This paper presents a software architecture that allows system designers to investigate power management algorithms in a systematic fashion through a template. The architecture exploits the Advanced Configuration and Power Interface (ACPI), a standard for hardware and software. We implement two algorithms for controlling the power states of a hard disk on a personal computer running Microsoft Windows. By measuring the current feeding the hard disk, we show that the algorithms can save up to 25% more energy than the Windows power manager. Our work has two major contributions: a template for software-controlled power management and experimental comparisons of management algorithms for a hard disk.
14287933
Statistically optimal dynamic power management for streaming data
This paper presents a method that uses data buffers to create long periods of idleness to exploit power management. This method considers the power consumed by the buffers and assigns an energy penalty for buffer underflow. Our approach provides analytic formulas for calculating the optimal buffer sizes without subjective or heuristic decisions. We simulate four different hardware configurations with MPEG-1, MPEG-2, and MPEG-4 formats as a case study. Our results indicate that the optimal buffer size varies significantly for different data formats on different hardware. Simulation results indicate that 16 MB buffers are sufficient for MPEG-1, MPEG-2, and MPEG-4 video streams from a microdrive or a network card, but transfers from an IDE disk require buffer sizes ranging from 16 MB to 176 MB, depending on each video's statistical properties.
15594355
Replacing Failed Sensor Nodes by Mobile Robots
Sensor replacement is important for sensor networks to provide continuous sensing services. Existing approaches relocate redundant nodes to fill the holes created by failed sensors and require all or most sensor nodes to have mobility. However, mobility equipment is expensive while technology trends are scaling sensors to be smaller and cheaper. In this paper, we propose to use a small number of mobile robots to replace failed sensors in a large-scale static sensor network. We study algorithms for detecting and reporting sensor failures and coordinating the movement of robots that minimize the motion energy of mobile robots and the messaging overhead incurred to the sensor network. A manager receives failure reports and determines which robot to handle a failure. We study three algorithms: a centralized manager algorithm, a fixed distributed manager algorithm, and a dynamic distributed manager algorithm. Our simulations show that: (a) The centralized and the dynamic distributed algorithms have lower motion overhead than the fixed distributed algorithm. (b) The centralized algorithm is less scalable than the two distributed manager algorithms. (c) The two distributed algorithms have higher messaging cost than the centralized algorithm. Hence, the optimal choice of the coordination algorithm depends on the specific scenarios and objectives being optimized.
2733921
Joint power management of memory and disk
The paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the timeout value to shut down a hard disk for reducing the average power consumption. We use Pareto distributions to model the distributions of idle time. The parameters of the distributions are adjusted at run-time for calculating the corresponding timeout value of the disk power management. The memory size is changed based on the inclusion property to predict the number of disk accesses at different memory sizes. Experimental results show more than 50% energy savings compared to a 2-competitive fixed-timeout method.
161273
Dynamic power management for streaming data
This paper presents a method that uses data buffers to smoothen request variations and to create long idleness for power management. This method considers the power consumed by the buffers and assigns an energy penalty for buffer underflow. Our approach provides analytic formulas for calculating the optimal buffer sizes and the amount of data to store in the buffers. We use video prefetching as a case study and obtain power savings of more than 74% for MPEG-1 and 34% for MPEG-2 videos.
9215156
Energy management using buffer memory for streaming data
This work presents a new approach for energy management by inserting data buffers. The buffers are managed using the concept of inventory control by treating energy as cost and computation as production. The data stored in the buffers are considered as merchandise. Our method provides a mathematical framework to develop general strategies managing the energy consumption in computers. The approach can solve a wide range of problems. For example, it can calculate the needed buffer sizes to achieve optimal energy savings. It can derive the conditions when a standby state saves energy. The method also shows the effect of load balancing on energy conservation and can handle the variations of data rates. We use sensor networks as case studies and demonstrate more than 20% energy savings.
14054770
A new approach for ground moving target indication in foliage environment
Ground moving target indication (GMTI) in foliage environment is a challenging problem, because the strong echoes from dense foliage environment and big attenuation of the radar microwave often make it difficult for traditional time frequency distributions to clearly and locally represent the Doppler frequency. This paper introduced a new approach to improve the performance of GMTI. This so-called Hilbert Huang Transform (HHT) method composes of empirical mode decomposition (EMD) and Hilbert transform technique. EMD is applied to extract target signal from interference and the associated Hilbert transform calculates the instantaneous Doppler frequency, representing a novel Hilbert spectrum in time frequency domain. Both simulative and experimental signals are used to validate the efficiency of HHT. This adaptive approach offers higher signal to disturbance ratio and higher resolution in the time frequency distribution.
5344006
Min/max on-chip inductance models and delay metrics
This paper proposes an analytical inductance extraction model for characterizing min/max values of typical on-chip global intercon-nect structures, and a corresponding delay metric that can be used to provide RLC delay prediction from physical geometries. The model extraction and analysis is efficient enough to be used within optimization and physical design exploration loops. The analytical min/max inductance approximations also provide insight into the effects caused by inductances.
158009
Threshold optimization algorithm for weak signal in distributed-sensor fusion system
Distributed order statistics constant false alarm rate (OS-CFAR) detection techniques are important for nonstationary observation with varying weak narrowband random signals. However, it is very difficult to choose system parameters to obtain optimal threshold values at the fusion center because of the nonlinear property of distributed OS-CFAR detection system. This paper provides a novel solution based on an effective and flexible genetic algorithm. Using this approach, all system parameters are directly coded in decimal chromosomes and they can be optimized simultaneously. Furthermore, we also derive the more general model by implementing the K fusion rules. The simulation results show that applying the proposed approach one can achieve comparable performances with the reported methods and results.
7682350
Incremental genetic K-means algorithm and its application in gene expression data analysis
BackgroundIn recent years, clustering algorithms have been effectively applied in molecular biology for gene expression data analysis. With the help of clustering algorithms such as K-means, hierarchical clustering, SOM, etc, genes are partitioned into groups based on the similarity between their expression profiles. In this way, functionally related genes are identified. As the amount of laboratory data in molecular biology grows exponentially each year due to advanced technologies such as Microarray, new efficient and effective methods for clustering must be developed to process this growing amount of biological data.ResultsIn this paper, we propose a new clustering algorithm, Incremental Genetic K-means Algorithm (IGKA). IGKA is an extension to our previously proposed clustering algorithm, the Fast Genetic K-means Algorithm (FGKA). IGKA outperforms FGKA when the mutation probability is small. The main idea of IGKA is to calculate the objective value Total Within-Cluster Variation (TWCV) and to cluster centroids incrementally whenever the mutation probability is small. IGKA inherits the salient feature of FGKA of always converging to the global optimum. C program is freely available at http://database.cs.wayne.edu/proj/FGKA/index.htm.ConclusionsOur experiments indicate that, while the IGKA algorithm has a convergence pattern similar to FGKA, it has a better time performance when the mutation probability decreases to some point. Finally, we used IGKA to cluster a yeast dataset and found that it increased the enrichment of genes of similar function within the cluster.
7818893
Performance Benefits of Monolithically Stacked 3-D FPGA
The performance benefits of a monolithically stacked three-dimensional (3-D) field-programmable gate array (FPGA), whereby the programming overhead of an FPGA is stacked on top of a standard CMOS layer containing logic blocks (LBs) and interconnects, are investigated. A Virtex-II-style two-dimensional (2-D) FPGA fabric is used as a baseline architecture to quantify the relative improvements in logic density, delay, and power consumption achieved by such a 3-D FPGA. It is assumed that only the switch transistor and configuration memory cells can be moved to the top layers and that the 3-D FPGA employs the same LB and programmable interconnect architecture as the baseline 2-D FPGA. Assuming they are les 0.7, the area of a static random-access memory cell and switch transistors having the same characteristics as n-channel metal-oxide-semiconductor devices in the CMOS layer are used. It is shown that a monolithically stacked 3-D FPGA can achieve 3.2 times higher logic density, 1.7 times lower critical path delay, and 1.7 times lower total dynamic power consumption than the baseline 2-D FPGA fabricated in the same 65-nm technology node