1274772
Supporting persistent social groups in ubiquitous computing environments using context-aware ephemeral group service
We analyze the role of the social group in a ubiquitous computing (Ubicomp) environment as a source of contextual information. A model is presented to address the social group member's perceptions of how devices in a ubicomp environment should aid them in collaboration. Based on the model a distributed context-aware group membership management scheme is developed. We then present a prototype implementation for a context-aware ephemeral group membership management scheme, along with a sample application, and experimental results that demonstrate the feasibility of our system.
14536242
On maximizing lifetime of multicast trees in wireless ad hoc networks
We present a distributed algorithm called L-REMiTfor extending the lifetime of a source-based multicast tree in wireless ad hoc networks (WANET). The lifetime of a multicast tree is the duration from the formation of the tree to the time when the first node fails due to battery energy exhaustion. L-REMiT assumes that the energy consumed to forward a packet is proportional to the forwarding distance and that WANET nodes can dynamically adjust their transmission power. The task of extending the lifetime of a multicast tree is formulated as the task of extending the lifetime of bottleneck nodes in the tree. The number of multicast packets which a bottleneck node can forward, as determined by its residual battery energy and the distance of its farthest child node, is minimum over all the nodes in the multicast tree. Lifetime of a bottleneck node is improved by reassigning its farthest children to other nodes in the tree with the goal of improving the lifetime of the multicast tree. Nodes only require information from their neighbors for refining the tree in a distributed manner. Simulation results show that L-REMiT has low overhead and performs better than BIP/MIP and EWMA algorithms
18593367
Biosec: a biometric based approach for securing communication in wireless networks of biosensors implanted in the human body
Advances in microelectronics, material science and wireless technology have led to the development of sensors that can be used for accurate monitoring of inaccessible environments. Health monitoring, telemedicine, military and environmental monitoring are some of the applications where sensors can be used. The sensors implanted inside the human body to monitor parts of the body are called biosensors. These biosensors form a network and collectively monitor the health condition of their carrier or host. Health monitoring involves collection of data about vital body parameters from different parts of the body and making decisions based on it. This information is of personal nature and is required to be secured. Insecurity may also lead to dangerous consequences. Due to the extreme constraints of energy, memory and computation securing the communication among the biosensors is not a trivial problem. Key distribution is central to any security mechanism. In this paper we propose an approach wherein, biometrics derived from the body are used for securing the keying material. This method obviates the need for expensive computation and avoids unnecessary communication making our approach novel compared to existing approaches.
1499493
Bandwidth-Optimal Complete Exchange on Wormhole-Routed 2D/3D Torus Networks: A Diagonal-Propagation Approach
All-to-all personalized communication, or complete exchange, is at the heart of numerous applications in parallel computing. Several complete exchange algorithms have been proposed in the literature for wormhole meshes. However, these algorithms, when applied to tori, cannot take advantage of wrap-around interconnections to implement complete exchange with reduced latency. In this paper, a new diagonal-propagation approach is proposed to develop a set of complete exchange algorithms for 2D and 3D tori. This approach exploits the symmetric interconnections of tori and allows to develop a communication schedule consisting of several contention-free phases. These algorithms are indirect in nature and they use message combining to reduce the number of phases (message start-ups). It is shown that these algorithms effectively use the bisection bandwidth of a torus which is twice that for an equal sized mesh, to achieve complete exchange in time which is almost half of the best known complete exchange time on an equal sized mesh. The effectiveness of these algorithms is verified through simulation studies for varying system and technological parameters. It is also demonstrated that synchronous implementations of these algorithms (by introducing barriers between phases) lead to reduced latency for complete exchange with large messages, while the asynchronous ones are better for smaller messages.
2580676
Adaptive Distributed Dynamic Channel Allocation for Wireless Networks
Channel allocation schemes in a mobile computing (wireless) environment can be either static or dynamic. Static allocation offers negligible channel acquisition time and zero message complexity and works well at a low system load; the performance steadily decreases as system load increases since many calls are dropped. In the case of even temporary hot spots many calls may be dropped by a heavily loaded switching station even when there are enough idle channels in the interference region of that station. On the other hand, dynamic schemes provide better utilization of the channels at higher loads albeit at the cost of higher channel acquisition time and some additional control messages. Our purpose in the present paper is to propose a combined channel allocation scheme so that each switching station can tune to its own load independent of other stations in its interference region; the objective is to minimize the call drop rate and at the same time maintain a minimum average channel acquisition time and minimum control message complexity.
794427
UpdateSearch: A New Dynamic Channel Allocation Scheme for Mobile Networks That Can Adjust to System Loads
Distributed dynamic channel allocation techniques are an integral part of distributed mobile computing systems where nodes communicate among themselves via wireless radio channels. The channel allocation schemes can be broadly categorized as search based or update based. Search based techniques have low messaging complexity and are suited for high system load and low request rates. On the other hand update based schemes have higher messaging complexity but are more suitable for low system load and high request rates. This paper presents a combined scheme, called UpdateSearch, which provides the advantages of both types of schemes. UpdateSearch is parameterized by the number of channel classes k, 1≤k≤n, where n is the total number of channels in the system. The parameter k can be adjusted to control the number of concurrent searches and degree of contention between cells competing for channels in the system. For k=1 and k=n the scheme respectively behaves as basic search and basic update scheme [2]. A simple analytical model is used to compare the performance of UpdateSearch for various values of k with the basic update and search techniques in terms of channel allocation time and number of simultaneous channel selections allowed in the system under different system loading conditions.
5689615
Generating sacrificial multi-piece molds using accessibility driven spatial partitioning
This paper describes an algorithm based on accessibility-driven partitioning approach to automate the design of sacrificial multi-piece molds. Sacrificial multi-piece molds are used for producing geometrically complex gelcast ceramic parts. The algorithm presented in this paper analyzes the accessibility of the gross mold shape and partitions using accessibility information. Each partitioning step improves accessibility of decomposed mold pieces. By performing successive decomposition, this algorithm finally produces a set of mold components that are accessible and therefore can be manufactured using milling and drilling operations. Using the algorithm presented in this paper, mold design steps can be significantly automated for making geometrically complex parts and facilitating the creation of physical part from the CAD model in a matter of hours.
1958013
Analysis of high-level address code transformations for programmable processors
Memory intensive applications require considerable arithmetic for the computation and selection of the different memory access pointers. These memory address calculations often involve complex (non) linear arithmetic expressions which have to be calculated during program execution under tight timing constraints, this becoming a critical bottleneck in the overall system performance. This paper explores applicability and effectiveness of source-level optimisations (as opposed to instruction-level) for address computations in the context of multimedia. We propose and evaluate two processor-target independent source-level optimisation techniques, namely, global scope operation cost minimisation complemented with loop-invariant code hoisting, and nonlinear operator strength reduction. The transformations attempt to achieve minimal code execution within loops and reduced operator strengths. The effectiveness of the transformations is demonstrated with two real-life multimedia application kernels by comparing the improvements in the number of execution cycles, before and after applying the systematic source-level optimisations. Using state-of-the-art C compilers on several popular RISC platforms.
206679597
Crosstalk test generation on pseudo industrial circuits: a case study
In this paper, we present data that validates the viability of a university prototype crosstalk ATPG system, XGEN, on real designs. We remodeled Intel circuits and performed test generation using actual parasitic data. A crosstalk ATPG implementation flow was developed based on Intel tools. Validation results are shown for the modified circuits. Critical issues for preserving accurate timing information and capturing crosstalk effects are discussed.
206766191
Accurate and efficient static timing analysis with crosstalk
We have developed an accurate and efficient methodology to perform static timing analysis (STA) in combinational logic blocks in the presence of multiple crosstalk-induced noise effects. The crosstalk model used is more accurate because it considers skew, input transition times, and driver strengths. This crosstalk model is enhanced to handle timing ranges for performing STA. The methodology also uses more accurate delay models for gates. The presence of one or more coupling capacitances can create cyclic timing dependencies, even in an otherwise acyclic circuit. We have developed an approach to partition the circuit into minimal timing-iterative subcircuits (TISs) that encapsulate the cyclic timing dependencies. When used in conjunction with our levelization procedure, iterative timing analysis is confined within individual TISs. We have demonstrated that the maximum arrival time values computed by the proposed STA using integrated delay models are much closer to detailed circuit simulation results than an STA that uses the 3C/sub c/ delay model.
62707609
BIST TPG for faults in system backplanes
A built-in self-test (BIST) methodology to test system backplanes by using BIST functionality in each of its constituent boards is presented. Since the configurations of systems change frequently, at the system level, the proposed methodology employs a simple test schedule which can be easily changed whenever the system configuration is changed. Since the boards used in such systems are designed for use in a wide variety of systems, the proposed methodology defines the test objectives to be achieved by a board's BIST circuit in terms of the board's edge pin connections, independent of the configurations of the systems in which the board may be used. It is shown that the combination of the proposed test schedule and the availability, on each board in the system, of any BIST circuit that satisfies the proposed test objectives, guarantees safe testing of faults in backplanes. A programmable test architecture and an algorithm to program the architecture to obtain BIST that satisfies the test objectives is also presented. Finally, the applicability and effectiveness of the methodology is demonstrated via its application to multiple configurations of an example system that uses a VME backplane.