13948106
Design of clocked circuits using UML
Clocking is an essential component of any embedded system design. However, traditional design techniques are either short of clocking support or too complex for users. The Unified Modeling Language (UML) has been proposed as design tool in real time system design, but the clocking semantics has not been properly dealt with. In this paper, we will present our experience of using UML to design a clocked system. In particular, UML is used to model the digital down converter, an essential component of software radios. Our tool chain automatically generates the simulation as well as synthesizes the final implementation.
15634785
The performance model of SilkRoad - a multithreaded DSM system for clusters
Distributed Shared Memory (DSM) is a highly desirable programming model for cluster based computing. Even though a number of software DSMs have been developed with their performance evaluated, few of them have a theoretical performance model. In this paper, we propose and analyze the performance model of the software DSM of SilkRoad,, a multithreaded runtime system for cluster computing. SilkRoad is built on the Cilk system with an extended memory consistency model which we call RC/sub dag/ consistency: Extending Cilk's theoretical performance model, we show that with the RC/sub dag/ consistent DSM, the expected execution.time T/sub P/ of a partially strict multithreaded computation on P processors is O((T/sub 1/(Z, L) + N)/P + /spl mu/HT/sub /spl infin//), where T/sub 1/(Z, L) is the total work of computation, T/sub /spl infin// is the critical path, N is the number of lock acquisitions, /spl mu/ is the service time of a cache miss, and H is the height of memory: Finally, we present experimental evidence that verify the performance model.
3457072
Using UML 2.0 for system level design of real time SoC platforms for stream processing
While enabling fast implementation and reconfiguration of stream applications, programmable stream processors expose issues of incompatibility and lack of adoption in existing stream modeling languages. To address them we describe a design approach in which specifications are captured in UML 2.0, and automatically translated into SystemC models consisting of simulators and synthesizable code under proper style constraints. As an application case, we explain real time stream processor specifications using new UML 2.0 notations. Then we expound how our translator generates SystemC models and includes additional hardware details. Verifications are made during UML execution as well as assertions in SystemC. The case study demonstrates the feasibility of fast specifications, modifications and generation of real time stream processor designs.
18143878
Compiling Parallel Lisp for a Shared Memory Multiprocessor
There is a commonly held idea that although Lisp is a good language for prototyping and software development, it is often too inefcient to be useful in actual implementation. Advances in compiling Lisp have begun to change this notion. However, the situation is less clear in the case of parallel Lisp dialects. In this paper, we report on our experience in implementing a compiler for a parallel Lisp dialect we called BaLinda Lisp for a shared memory multiprocessor. For a class of problems, our compiler was able to achieve performances on Lisp programs that are near, if not equal to, their imperative (C) equivalents. However, on other problems, the situation is less than ideal. We investigate this phenomenum and outline the future challenges in realizing a production strength parallel Lisp compiler.
9691799
Targeted Data Prefetching
Given the increasing gap between processors and memory, prefetching data into cache becomes an important strategy for preventing the processor from being starved of data. The success of any data prefetching scheme depends on three factors: timeliness, accuracy and overhead. In most hardware prefetching mechanism, the focus has been on accuracy – ensuring that the predicted address do turn out to be demanded in a later part of the code. In this paper, we introduce a simple hardware prefetching mechanism that targets delinquent loads, i.e. loads that account for a large proportion of the load misses in an application. Our results show that our prefetch strategy can reduce up to 45% of stall cycles of benchmarks running on a simulated out-of-order superscalar processor with an overhead of 0.0005 prefetch per CPU cycle.
1841047
Design and Implementation of Abstract Machine for Parallel Lisp Compilation
1188802
Smart debugging software architectural design in SDL
Statistical data show that it is much cheaper to fix software bugs at the early design stage than the late stage of the development process where the final system has already been implemented and integrated together. The use of slicing and execution histories as an aid in software debugging is well established for programming languages like C and C++; however, it is rarely applied in the field of software specification for designs. We propose a solution by applying the technology at source code level to debugging software designs represented in a high-level specification and description language such as SDL. More specifically, we extend execution slice-based heuristics from source code-based debugging to the software design specification level. Suspicious locations in an SDL specification are prioritized based on their likelihood of containing faults. Locations with a higher priority should be examined first rather than those with a lower priority as the former are more suspicious than the latter, i.e., more likely to contain the faults. A debugging tool, SmartDSDL, with user-friendly interfaces was developed to support our method. An experiment is reported to demonstrate the feasibility of using our method to effectively debug an architectural design.
13223545
Quantifying the closeness between program components and features
Abstract One of the most important steps towards effective software maintenance of a large complicated system is to understand how program features are spread over the entire system and their interactions with the program components. However, we must first be able to represent an abstract feature in terms of some concrete program components. In this paper, we use an execution slice-based technique to identify the basic blocks which are used to implement a program feature. Three metrics are then defined, based on this identification, to determine quantitatively , the disparity between a program component and a feature, the concentration of a feature in a program component, and the dedication of a program component to a feature. The computations of these metrics are automated by incorporating them in a tool ( χ Suds), which makes the use of our metrics immediately applicable in real-life contexts. We demonstrate the effectiveness of our technique by experimenting with a reliability and performance evaluator. Results of our study suggest that these metrics can provide an indication of the closeness between a feature and a program component which is very useful for software programmers and maintainers to better understand the system at hand.
16853040
Local Orientation Smoothness Prior for Vascular Segmentation of Angiography
We present a new generic method for vascular segmentation of angiography. Angiography is used for the medical diagnosis of arterial diseases. To facilitate an effective and efficient review of the vascular information in the angiograms, segmentation is a first stage for other post-processing routines. The method we propose uses a novel a priori — local orientation smoothness prior — to enforce an adaptive regularization constraint for the vascular segmentation within the Bayes’ framework. It aspires to segment a variety of angiographies and is aimed at improving the quality of segmentation in low blood flow regions. Our algorithm is tested on numerical phantoms and clinical datasets. The experimental results show that our method produces better segmentations than the maximum likelihood estimation and the estimation with a multi-level logistic Markov random field model. Furthermore, the novel algorithm produces aneurysm segmentations comparable to the manual segmentations obtained from an experienced consultant radiologist.
1077353
Case study of a multimedia wireless system
We present an experimental report of a multimedia wireless system with secure delivery of multimodal services to end-users over voice and data converged networks. Our design leads to an easily adaptable and extensible system architecture, in which system components interact with each other through loosely coupled interfaces based on asynchronous exchange of messages. It effectively separates service logic from service delivery, through the introduction of a secure broker between the end user devices and the enterprise level application that contains the service logic. This separation also provides additional levels of security and reliability at the application level. This work describes our system implementation and its performance results.
16024151
An adaptable architecture for secure delivery of converged services
We present an approach for secure delivery of multimodal services to end users over heterogeneous converged networks. Our approach leads to an easily adaptable and extensible system architecture, in which system components interact with each other through loosely coupled interfaces based on asynchronous exchange of messages. It also effectively separates service logic from service delivery, through the introduction of a secure broker between the end user devices and the enterprise level application that contains the service logic. This separation also provides additional levels of security at the application level. This paper describes how our approach provides the features mentioned above. We have also validated our approach through the implementation of a prototype system, a description of which is also provided.