5608135
Low-power weighted pseudo-random BIST using special scan cells
In this paper, a technique for weighted pseudo-random built-in self-test (BIST) of VLSI circuits is proposed, which uses special scan cells and a new weight selection algorithm to achieve low power dissipation. It is based on weighted pseudo-random scan testing in which only 3 weight values are used - 2 fixed values (0 or 1) and 1 random value (0.5). A new weight selection algorithm is used to select a set of weights that achieves high fault coverage while reducing power. The idea is to minimize power by careful selection of the set of scan cells having fixed values (0 or 1) in order to reduce switching activity. To implement this in hardware, a new scan cell design is proposed that can do scan and capture in the normal mode as well as fixed-bit mode. The new scan cell hardware increases the area of a typical circuit by less than 4%, but reduces power by as much as 96%, as indicated in experiments performed on benchmark circuits.
11538916
Reducing power consumption in memory ECC checkers
A method is proposed for reducing power consumption in memory ECC checker circuitry that provides SEC-DED. The degrees of freedom in selecting the parity check matrix are used to minimize power with little or no impact on area and delay. The power minimization method is applied to two popular SEC-DED codes: standard Hamming codes and odd-column-weight Hsiao codes. Experiments on actual memory traces of Spec and MediaBench benchmarks indicate that considering power in addition to area and delay when selecting the parity check matrix can result in power reductions of up to 27% for Hsiao codes and up to 41% for Hamming codes.
748684
Detection probabilities of interconnect breaks: an analysis
An interconnect break is a break that occurs in the interconnect wiring, resulting in logic gate inputs being disconnected from the drivers and causing the wire to float. Interconnect breaks are the most common types of breaks in modern CMOS integrated circuits, so testing and detecting these breaks has become very important. This paper proposes a model by which standard tests for stuck-at-faults can be used to detect interconnect breaks in a circuit. This paper presents a worst-case analysis of the detection of these breaks and calculate the minimum number of test vectors required to detect breaks with a specified confidence level, using n-detection principles. To enhance the understanding of the breaks in the circuit, we present a statistical model based on the length distribution of the wires surrounding the floating wire where the break occurs. From the model we compute the detection probabilities of such breaks and show that the worst case of detection is when the bias voltage is the same as the logic threshold voltage.
9120365
A self-stabilizing algorithm for the maximum flow problem
Summary. The maximum flow problem is a fundamental problem in graph theory and combinatorial optimization with a variety of important applications. Known distributed algorithms for this problem do not tolerate faults or adjust to dynamic changes in network topology. This paper presents a distributed self-stabilizing algorithm for the maximum flow problem. Starting from an arbitrary state, the algorithm computes the maximum flow in an acyclic network in finitely many steps. Since the algorithm is self-stabilizing, it is inherently tolerant to transient faults. It can automatically adjust to topology changes and to changes in other parameters of the problem. The paper presents results obtained by extensively experimenting with the algorithm. Two main observations based on these results are (1) the algorithm requires fewer than n2 moves for almost all test cases and (2) the algorithm consistently performs at least as well as a distributed implementation of the well-known Goldberg-Tarjan algorithm for almost all test cases. The paper ends with the conjecture that the algorithm correctly computes a maximum flow even in networks that contain cycles.
41043329
Fault-containing self-stabilization using priority scheduling
Schedulers play a vital role in the design of distributed algorithms. This paper introduces priority scheduling that can be used to design as well as reason about correctness proofs at a higher level of abstraction. The application of priority scheduling in solving problems related to stabilization and fault containment in spanning tree generation is presented. This paper also presents an implementation of the priority scheduling scheme.
1421735
Scalable Self-Stabilization
This paper presents a methodology for a synchronous non-reactive distributed system on a tree topology to stabilize from a k-faulty configuration in a time independent of the size n of the system. In the proposed methodology, processes first measure and compare the sizes of the faulty regions, and then use this information to schedule actions in such a way that the size of the faulty regions progressively shrink, until they completely disappear. We demonstrate that when k processes fail, the stabilization time is O(k2). Apart from its applicability to a wide class of problems, the proposed method achieves scalability with a low space complexity of O(�.(�.k+log2n)) per process, where � is the maximum degree of a node.
14429447
iSimBioSys: a discrete event simulation platform for 'in silico' study of biological systems
With the availability of huge databases cataloguing the various molecular "parts" of complex biological systems, researchers from multiple disciplines have focused on developing modeling and simulation tools for studying the variability of cellular behavior at a system level - encompassing the dynamics arising from many species of interacting molecules. In this work, we present a system engineering approach to model biological processes. In this approach, a biological process is modeled as a collection of interacting functions driven in time by a set of discrete events. We focus on the discrete event simulation platform, called "iSimBioSys", which we have developed for studying the dynamics of cellular processes in silico. As a test-bed for studying our approach we model the two component PhoPQ system, responsible for the expression of several virulence genes in Salmonella Typhimurium. We analyzed the effect of extra cellular magnesium on the behavioral dynamics of this pathway using our framework and compared the results with an experimental system. We also analyze the performance of iSimBioSys, based on the model biological system, in terms of system usage and response.
1136530
A graph-theoretic approach for studying the convergence of fractal encoding algorithm
In this paper, we present a graph-theoretic interpretation of convergence of fractal encoding based on partial iterated function system (PIFS). First we have considered a special circumstance, where no spatial contraction has been allowed in the encoding process. The concept leads to the development of a linear time fast decoding algorithm from the compressed image. This concept is extended for the general scheme of fractal compression allowing spatial contraction (on averaging) from larger domains to smaller ranges. A linear time fast decoding algorithm is also proposed in this situation, which produces a decoded image very close to the result obtained by an ordinary iterative decompression algorithm.