18317069
Verifiable annotations for embedded java environments
Many implementations of Java Virtual Machine (JVM) use optimizing dynamic compilation for improving performance of Java applications. However, optimizing compilation is expensive in terms of both time and memory space complexity. Annotations are frequently used to reduce the dynamic compilation overhead in embedded Java environments where the memory budget and CPU speed are limited. However, some annotations can cause the dynamic compiler to generate code that violates the security policy of the JVM. These annotations present a safety problem if they are not verified before being used by the compiler. In this work, we present annotation schemes for three frequently used optimizations: null pointer check removal, value liveness analysis, and array bound check removal. All our annotations can be verified at low cost during dynamic compilation time to guarantee that they do not cause the compiler to generate code that violates the security policy of the JVM.
7347899
Data compression for improving SPM behavior
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all hot data (i.e., data with high reuse) in the SPM remains the biggest problem. This paper proposes data compression to increase the number of data blocks that can be kept in the SPM. Our experiments with several embedded applications show that our compression-based SPM management heuristic is very effective and outperforms prior static and dynamic SPM management approaches. We also present an ILP formulation of the problem, and show that the proposed heuristic generates competitive results with those obtained through ILP, while spending much less time in compilation.
2552667
An evaluation of code and data optimizations in the context of disk power reduction
Disk power management is becoming increasingly important in high-end server and cluster type of environments that execute data-intensive applications. While hardware-only approaches (e.g., low-power modes supported by current disks) are successful to a certain extent, one also needs to consider the software side to achieve further energy savings. This paper first demonstrates that conventional data locality oriented code transformations are not sufficient for minimizing disk power consumption. The reason is that these optimizations do not take into account how disk-resident array data are laid out on the disk system, and consequently, fail to increase idle periods of disks, which is the primary metric using which disk power can be reduced. Instead, we propose a disk layout aware application optimization strategy that uses both code restructuring and data layout optimization. Our experimental evaluation with several benchmark codes reveal that the proposed strategy is very successful in reducing disk energy consumption without performing much worse than a pure data locality oriented scheme, as far as execution cycles are concerned. The experiments also show that the benefits coming from our approach increase with the increased number of disks; i.e., it scales very well.
13530819
Exploiting last idle periods of links for network power management
Network power optimization is becoming increasingly important as the sizes of the data manipulated by parallel applications and the complexity of inter-processor data communications are continuously increasing. Several hardware-based schemes have been proposed in the past for reducing network power consumption, either by turning off unused communication links or by lowering voltage/frequency in links with low usage. While the prior research shows that these schemes can be effective in certain cases, they share the common drawback of not being able to predict the link active and idle times very accurately. This paper, instead, proposes a compiler-based scheme that determines the last use of communication links at each loop nest and inserts explicit link turn-off calls in the application source. Specifically, for each loop nest, the compiler inserts a turn-off call per communication link. Each turned-off link is reactivated upon the next access to it. We automated this approach within a parallelizing compiler and applied it to eight array-intensive embedded applications.
17088807
Reducing NoC energy consumption through compiler-directed channel voltage scaling
While scalable NoC (Network-on-Chip) based communication architectures have clear advantages over long point-to-point communication channels, their power consumption can be very high. In contrast to most of the existing hardware-based efforts on NoC power optimization, this paper proposes a compiler-directed approach where the compiler decides the appropriate voltage/frequency levels to be used for each communication channel in the NoC. Our approach builds and operates on a novel graph based representation of a parallel program and has been implemented within an optimizing compiler and tested using 12 embedded benchmarks. Our experiments indicate that the proposed approach behaves better - from both performance and power perspectives - than a hardwarebased scheme and the energy savings it achieves are very close to the savings that could be obtained from an optimal, but hypothetical voltage/frequency scaling scheme.
17981801
Studying storage-recomputation tradeoffs in memory-constrained embedded processing
Fueled by an unprecedented desire for convenience and self-service, consumers are embracing embedded technology solutions that enhance their mobile lifestyles. Consequently, we witness an unprecedented proliferation of embedded/mobile applications. Most of the environments that execute these applications have severe power, performance, and memory space constraints that need to be accounted for. In particular, memory limitations can present serious challenges to embedded software designers. The current solutions to this problem include sophisticated packaging techniques and code optimizations for effective memory utilization. While the first solution is not scalable, the second one is restricted by intrinsic data dependences in the code that prevent code restructuring. In this paper, we explore an alternate approach for reducing memory space requirements of embedded applications. The idea is to re-compute the result of a code block (potentially multiple times) instead of storing it in memory and performing a memory operation whenever needed. The main benefit of this approach is that it reduces memory space requirements, that is, no memory space is reserved for storing the result of the code block in question.
40616325
A Color Bar Based Affective Annotation Method for Media Player
Multimedia technology has been developing quickly since the computer was invented. Nowadays, more and more people use media players to watch movies and TV shows on their computer. But it seems that we are too busy sometimes to spare nearly two hours watching a movie from beginning to end. We’d like to find and watch the most exciting episodes that we are interested in as soon as possible. The media players we use often only provide a slider bar for locating, which is rather low in efficiency. Respecting this, an affective annotation method for video clips is proposed in this paper and the method is implemented in an affectively annotated media player. In addition, two experiments were set up to evaluate the proposed method. Experiment results indicate that affective annotation facilitates the subjects in quick locating target events and helps them understand the scenarios better.
42359427
Subtyping Calculus of Construction (Extended Abstract)
We present in this paper a subtyping extension of Calculus of Construction. We prove that this system has good meta-theoretical properties: transitivity elimination, subject reduction, strong normalization and decidability of subtyping. This work provides a theoretical foundation for adding subtyping to proof checkers like Coq, LEGO etc.
8895078
An Adaptive-Filtering Policy for Distributed Virtual Environments
In this paper, an adaptive-filtering policy for distributed virtual environments (DVEs) was brought forward. It took advantages of two traditional filtering policies (static-filtering policy and equidistance-transmission policy) and could adaptively select the fittest filtering policy corresponding to current motion characteristic of the virtual object in DVEs. An experiment was designed to compare this filtering policy with the two traditional filtering policies on task performance. Objective (task completion time, state updates transmitted and state updates per second) and subjective (filtering quality) evaluations were recorded in the experiment. The experiment results show that if mean state updates per second is equal or greater than 20 in the task, SUT and SUPS can be decreased by adaptive-filtering policy without task performance affected obviously. However, if mean state updates per second is around 10 in the task, accompanied with SUT and SUPS decreased by adaptive-filtering policy, task performance also deteriorated badly
44397360
Reducing Time Complexities of Semigroup Computations on Mesh-Connected Computers with Multiple Broadcasting
24161285
Effects of Local-Lag Mechanism on Task Performance in a Desktop CVE System
Consistency maintenance is a kernel problem in Collaborative Virtual Environment (CVE) research. The approaches used in Networked Virtual Environments (e.g., DR algorithm) could not be used in CVEs, for they could not prevent short-term inconsistency. Therefore, local-lag mechanism has been proposed to eliminate short-term inconsistency in CVEs. Choosing a proper lag value is a key problem in local-lag mechanism. This paper studied the effects of lag value (0ms–900ms) on task performance in a desktop CVE system. Experimental results indicate that the effect of lag value on task performance is not linear. The effect could be separated into four segments by three dividing points: 150ms, 300ms and 600ms. Lag has no effect on task performance while ranging from 0ms to 150ms. From 150ms to 300ms, lag slightly affects task performance. Lag deteriorates task performance seriously while ranging from 300ms to 600ms. When lag is longer than 600ms, the task cannot be accomplished sometimes.