9186181
New simulation methods for MOS VLSI timing and reliability
A novel approach to incorporating the channel length modulation in a direct-equation solving fast timing simulator is presented along with a mixed event-driven and waveform relaxation algorithm to handle MOS VLSI circuits with feedback. Simulation speedup of 3N over SPICE-like simulators has been observed, where N is the number of transistors. The simulator is able to simulate circuits as large as 235000 transistors in 10 min real time. Also presented is a novel approach to fast hot-carrier reliability simulation. These methods make it possible to achieve accurate and fast hot-carrier reliability simulation of MOS circuits each with as many as hundreds of thousands of MOS transistors in a workstation environment.<<ETX>>
13548202
Noise constrained power optimization for dual V/sub T/ domino logic
In dual threshold voltage techniques, significant subthreshold leakage current is one of the most important design problems. When dual threshold voltage is applied to the domino logic, noise immunity has to be carefully considered because the significant subthreshold current makes dynamic nodes much more susceptible to noise. In this paper, an analytical model for proper keeper transistor sizing to meet noise constraint is presented. Based on the same noise constraint, we propose dual threshold voltage domino logic technique to save power consumption.
44275614
Cell-level placement for improving substrate thermal distribution
The dramatic increase of power consumption in very large scale integration circuits has led to high operating temperature and large thermal gradient, thereby resulting in serious timing and reliability concerns. Temperature-tracking is thus becoming of paramount importance in modern electronic design automation (EDA) tools. In this paper we present two thermal placement tools for standard cell and macro cell design styles respectively. They are aimed at reducing hot spots in a design without compromising traditional design metrics such as area and wire length. We developed a compact substrate thermal model that can be used by the placer to calculate the temperature profile of a placement efficiently, or to convert the user-specified temperature constraint into the corresponding power distribution constraint as an alternative placement objective. As a result, our method is much more efficient than directly employing temperature profile simulation during the placement process. The simulation results show noticeable improvement of thermal distribution over the traditional placement algorithm, with little impact on area and wire length of the final layout.
40491047
Domino logic synthesis based on implication graph
In this paper, we present a new approach to the problem of inverter elimination in domino logic synthesis. A small piece of static CMOS logic is introduced to the circuit to avoid significant area penalty resulting from duplication. To maximize the domino logic part and to minimize the static CMOS logic part, a generalized automatic test pattern generation (ATPG)-based logic transformation is proposed to eliminate or relocate a target inverter. Based on the new concept of dominating set of mandatory assignment (DSMA) and the corresponding implication graph, we propose algorithms to identify a minimum candidate set for a target inverter. Experimental results show that logic transformation based on the implication graph can reduce transistor counts by 25% on average, while the delay increases less than 3%.
13489029
An integrated approach to realistic worst-case design optimization of MOS analog circuits
The authors present a new integrated approach for the optimization of MOS analog circuit performance by using realistic worst-case device parameter files, each corresponding to a performance measure. Nonlinear response surfaces are constructed for the performance measures of interest, and the worst-case device parameter files are identified by solving a set of suitably cast nonlinear programming problems. The worst-case files are shown to depend on the values of the designable parameters. An efficient method of incorporating this dependence during worst-case design optimization has been developed. This method enables the design of circuits with optimal performance and high parametric yields. Some illustrative analog circuit examples are given to demonstrate the application of the worst-case design optimization procedure.<<ETX>>
14376041
Feasible region approximation using convex polytopes
A new technique for polytope approximation of the feasible region for a design is presented. This method is computationally less expensive than the simplicial approximation method. Results on several circuits are presented. It is shown that the quality of the polytope approximation is substantially better than an ellipsoidal approximation.<<ETX>>
30593608
Skyeye: An Instruction Simulator with Energy Awareness
This paper presents a novel strategy aimed at modeling the instruction energy consumption of ARM microprocessors with dynamic voltage scaling (DVS) support. A novel energy estimation algorithm is designed, which can record the function calls, and generate a detailed energy profile for each function in a specific program. Some of the optimization policies for implementation are also discussed. These optimization policies reduce the workload of the energy estimators for the individual SOC systems. The prototype system, SKYEYE, can automatically detect the voltage/frequency variation activated by DVS system, and adjust the energy estimation model accordingly. The experiment results further prove the effectiveness of the algorithm.
16508634
SmartClick: An enabler for human-centered wireless Web service
Recently wireless Web services have been rapidly growing as a new way of information service. As the wireless Internet access grows, so do e-commerce opportunities through the wireless Web services. Wireless Internet access has inherent limitations since most handheld devices have much less display and means of operations. This imposes a particular problem to the design of mobile information services in terms of information and service navigation. In this paper, a novel approach called SmartClick is presented to achieve user-centered wireless Web services. SmartClick enables users to explicitly express their intentions or preferences with minimal clicks (user interaction). SmartClick with a middleware support provides users a way to get the desired Web contents more efficiently and easily.
44673585
Characterization of Errors in Compositing Panoramic Images
A panoramic image has a 360° horizontal field of view, and it can provide the viewer the impression of being immersed in the scene. A panorama is created by first taking a sequence of images while rotating the camera about a vertical axis. These images are then projected onto a cylindrical surface before being seamlessly composited. The cross-sectional circumference of the cylindrical panorama is called thecompositing length. This work characterizes the error in compositing panoramic images due to errors in some of the intrinsic parameters. The intrinsic camera parameters that are considered are the camera focal length and the radial distortion coefficient. We show that the error in the compositing length is more sensitive to the error in the camera focal length. Especially important is the discovery that the relative error in compositing length is always smaller than the relative error in the focal length. This means that the error in focal length can be corrected by iteratively using the composited length to compute a new and more correct focal length. Thiscompositing approach to camera calibrationhas the advantages of not requiring both feature detection and separate prior calibration.
1332259
On the Motion and Appearance of Specularities in Image Sequences
Real scenes are full of specularities (highlights and reflections), and yet most vision algorithms ignore them. In order to capture the appearance of realistic scenes, we need to model specularities as separate layers. In this paper, we study the behavior of specularities in static scenes as the camera moves, and describe their dependence on varying surface geometry, orientation, and scene point and camera locations. For a rectilinear camera motion with constant velocity, we study how the specular motion deviates from a straight trajectory (disparity deviation) and how much it violates the epipolar constraint (epipolar deviation). Surprisingly, for surfaces that are convex or not highly undulating, these deviations are usually quite small. We also study the appearance of specularities, i.e., how they interact with the body reflection, and with the usual occlusion ordering constraints applicable to diffuse opaque layers. We present a taxonomy of specularities based on their photometric properties as a guide for designing separation techniques. Finally, we propose a technique to extract specularities as a separate layer, and demonstrate it using an image sequence of a complex scene.
2215768
Separating reflections in human iris images for illumination estimation
A method is presented for separating corneal reflections in an image of human irises to estimate illumination from the surrounding scene. Previous techniques for reflection separation have demonstrated success in only limited cases, such as for uniform colored lighting and simple object textures, so they are not applicable to irises which exhibit intricate textures and complicated reflections of the environment. To make this problem feasible, we present a method that capitalizes on physical characteristics of human irises to obtain an illumination estimate that encompasses the prominent light contributors in the scene. Results of this algorithm are presented for eyes of different colors, including light colored eyes for which reflection separation is necessary to determine a valid illumination estimate