A Dynamic Reconfigurable IP System Design
Consider general logic development and successivable design, the paper advances a kind of dynamic reconfigurable IP system design which implements reconfigure mainly with to download the bits flow document that change configuring of FPGA' memories. Its reconfigure time has relation with size of the pre-established IP mold only, having nothing to do with IP structure and canning make use of the related assistance design tool. This paper introduces the system design process and the key techniques, and conducts experiments to verify the design.