Comparison Between the Behaviour of Punch-Through and Non-Punch-Through Insulated Gate Bipolar Transistors Under High Temperature Reverse Bias Stress
The aim of this work is a comparative study of the High Temperature Reverse Bias (HTRB) stress effects on the Punch-Through (PT) and Non-Punch-Through (NPT) Insulated Gate Bipolar Transistors. The technological difference between these transistors is the N∓ buffer layer, which is only built in the PT structure. These two different structures of IGB transistors have practically the same electric parameters: V CEmax =600V; I CEmax = 16A for the PT-IGBT and V CEmax =600V; I CEmax = 16A for the NPT one at 25°C. The electric stress has been achieved during 1200 hours at 140°C with 0.8V CEmax Collector - Emitter bias. The obtained results show the variation of the threshold voltage, the on-state voltage drop and switching parameters under HTRB stress effect. So, some interesting information concerning the ageing of these two types of IGBT under this stress effect have been highlighted.