On increasing of integration rate of multi-channel heterotransistors
In this paper we consider an approach to increase integration rate of foeld-effect heterotransistors. The approach based on manufacturing a heterostructure with required configuration, doping of required areas of the heterostructure by diffusion or ion implantation and optimized annealing of dopant and/or radiation defects. Framework this paper we consider a possibility to manufacture with several channels. Manufacturing multichannel transistors gives us a possibility the to increase integration rate of transistors and to increase electrical current through the transistor.