Statistics of soft and hard breakdown in thin SiO2 gate oxides
Abstract Assuming that there are circuit applications which can tolerate one or several soft breakdown events before failure, we study the implications of soft/hard breakdown prevalence ratios on the device failure statistics. Our results demonstrate that these two breakdown modes are triggered by the same type of defect-related path, showing identical statistics if considered as independent breakdown mechanisms. An energy dissipation model for the breakdown current runaway transient is presented as a possible way to model soft and hard breakdown prevalence ratios as a function of stress conditions and sample characteristics.