High-T/sub c/ superconducting step-edge junction on sapphire fabricated by non-etching technique
We have produced step-edge Josephson junctions on steps in an epitaxially grown CeO/sub 2/ layer on r-cut sapphire. The epitaxial CeO/sub 2/ layer is deposited at high temperature through a MgO/CeO/sub 2/ micromask. The optimum orientation of the step flank (FS) for grain boundary junction was determined on the basis of known experimental data of YBa/sub 2/Cu/sub 3/O/sub x/ (YBCO) film growth on tilted substrates and from analyses of bicrystal grain boundaries formed in YBCO films along the boundary between the FS and planar substrate. Atomic force microscopy (AFM) observations of the steps in which the FS was parallel to the [110]CeO/sub 2/ plane show that the slope angles is in a range from 50/spl deg/ to 70/spl deg/ that correspond to [111] and (221)CeO/sub 2/ crystallographic planes. The results of dc and microwave measurements of obtained high-T/sub c/ step-edge junction are presented.