High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices
Abstract This paper describes a simplified high frequency characterization approach to extract the parasitic RC figures of merit of two terminal CMOS electrostatic discharge (ESD) protection devices. Basic RC small signal equivalent models and corresponding parameter extraction procedures, applicable for the most typical structures––grounded gate NMOS, diodes and SCR’s are presented. The model application to study the impact of the ESD failures on the HF device and circuit characteristics is demonstrated.