An efficient adaptive software-implemented technique to detect control-flow errors in multi-core architectures
Abstract In this paper, a software behavior-based technique is presented to detect control-flow errors in multi-core architectures. The analysis of two key points leads to introduce the proposed technique: (i) employing under-utilized CPU resources in multi-core processors to check the execution flow of the programs in parallel with their executions to moderate the performance overhead of previous software-based techniques, and to enhance the applicability of them in current architectures. (ii) Adjusting the locations of additional statements in a given program in order to increase the ability of detecting possible control-flow errors along with significant reduction in overheads. To evaluate the proposed technique, a quad-core processor system is used as the simulation environment, and the behavior of several well-known single- and multi-threaded benchmarks have been studied. The experimental results, regarding to both detection coverage and performance overhead, demonstrate that on average about 93% of the control-flow errors can be detected by the proposed technique with just about 10% performance overhead, compared to at least 30% imposed by the previous techniques.