Design considerations and algorithms for partitioning optoelectronic multichip modules.
There is considerable interest in the development of optical interconnects for multichip modules (MCM's) to improve their performance. For effective utilization of the optical and electronic technologies, a methodology for partitioning the system is required. The key question to be answered is which technology should be used for each interconnect in a given netlist: optical or electronic. We introduce the computer-aided design approach for partitioning optoelectronic systems into optoelectronic MCM's. We first discuss the design trade-off issues in an optoelectronic system design, including speed, power dissipation, area, and diffraction limits for free-space optics. We then define a formulation for optoelectronic MCM partitioning and describe new algorithms for optimizing this partitioning based on the minimization of the power dissipation. The models for the algorithms are discussed in detail, and an example of a multistage interconnect network is given. Different results, with the number and size of chips being variable, are presented in which improvement for the system packaging has been observed when the partitioning algorithms are applied.