17487000
Advances in stochastic distribution control
Stochastic distribution control systems aims at the controller design so as to realize a shape control of the distributions of certain random variables in the process. Once the probability density functions (PDFs) of these variables are used to describe their distributions, the control task is to obtain control signals so that the output PFDs of the system are made to follow their target PDFs. In this paper, a survey of the recent developments on the research of stochastic distribution control systems will be made.
424163
Reliable Observer-Based Control Against Sensor Failures for Systems With Time Delays in Both State and Input
For systems with both state and input time delays, a novel state and sensor fault observer is proposed in this paper to estimate system states and sensor faults simultaneously. In this design, a descriptor system approach and a linear matrix inequality technique are adopted, where the considered sensor fault may be in any form, even unbounded. Unbounded sensor faults will make the system fail unavoidably; it is indispensable to derive a reliable control scheme against sensor failures. Using the estimated state and sensor fault, a reliable observer-based controller is proposed, which makes the system work well no matter whether sensor faults occur or not. The present approaches are next extended to the case for systems with multiple time delays. Finally, a simulation example of the network of three cascaded reactors is used to illustrate the design procedure and demonstrate the efficiency of the present techniques.
22681240
Distribution function tracking filter design using hybrid characteristic functions
A new tracking filtering algorithm for a class of multivariate dynamic stochastic systems is presented. The system is expressed by a set of time-varying discrete systems with non-Gaussian stochastic input and nonlinear output. A new concept, such as hybrid characteristic function, is introduced to describe the stochastic nature of the dynamic conditional estimation errors, where the key idea is to ensure the distribution of the conditional estimation error to follow a target distribution. For this purpose, the relationships between the hybrid characteristic functions of the multivariate stochastic input and the outputs, and the properties of the hybrid characteristic function, are established. A new performance index of the tracking filter is then constructed based on the form of the hybrid characteristic function of the conditional estimation error. An analytical solution, which guarantees the filter gain matrix to be an optimal one, is then obtained. A simulation case study is included to show the effectiveness of the proposed algorithm, and encouraging results have been obtained.
20772220
Descriptor observer approaches for multivariable systems with measurement noises and application in fault detection and diagnosis
In this paper, new descriptor observer design approaches are presented for multivariable systems with measurement noises. If the system matrix is stable, the proposed modified proportional and derivative observer technique allows us not only to decouple the measurement noise in any forms completely, but also obtain accurate estimations of both system states and measurement noises. If the system is detectable and the noise is bounded, it has been shown that two design parameters can provide more degrees of freedom. In this context, the derivative gain parameter is chosen to reduce the amplification of the noise, and the proportional gain is then selected to guarantee the stability of the error dynamics. For systems with both measurement output noises and input disturbances, a modified proportional, derivative and integral observer is constructed to asymptotically estimate states, input disturbances, and output noises at the same time. The applications of the proposed observers for systems with actuator and sensor faults are also discussed. Numerical examples are given to illustrate the design procedures, and the simulation results show the satisfactory tracking performance.
7971167
Robust minimum entropy tracking control with guaranteed stability for nonlinear stochastic systems under modeling errors
In this paper, robust minimum entropy tracking control problem is considered for nonlinear stochastic systems. The controlled systems are described by nonlinear non-Gaussian difference equations with the un-modeled uncertainty and modeling error, as well as time delays. Entropy is adopted to characterize the uncertainty of the tracking error. The nonlinear multi-step-ahead predictive cost function is used and the relationship between the probability density functions of the input and the tracking error via the uncertain mapping is established. With these formulations, the cost function can be bounded as a nonlinear functional of the control input and the known bounds of the errors. Explicit design algorithms are presented for the robust suboptimal controller and further for the stabilization controllers. The Renyi's entropy has also been used to simplify the cost function. Simulations are given to demonstrate the effectiveness of the proposed control algorithm.
7049488
Optimal Actuator Fault Detection via MLP Neural Network for PDFs
In this paper a new type of fault detection (FD) problem is considered where the measured information is the stochastic distribution of the system output rather than its value. A multi-layer perceptron (MLP) neural network is adopted to approximate the probability density function (PDF) of the system outputs and nonlinear principal component analysis (NLPCA) is applied to reduce the model order for a lower-order model. For such a dynamic model in discrete-time context, where nonlinearities, uncertainties and time delays are included, the concerned FD problem is investigated. The measure of estimation errors, which is represented by the distances between two output PDFs, will be optimized to find the detection filter gain. Guaranteed cost detection filter are designed based on LMI formulations.
8477294
Criticality-based optimizations for efficient load processing
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Previous work has shown that the criticality of instructions can be dynamically predicted with high accuracy, and that this information can be leveraged to optimize the performance of load value prediction and instruction steering for clustered architectures. In this work, we revisit the idea of criticality, but we propose several processor enhancements that can exploit criticality information and can be directly applied to modern x86 microarchitectures. For the investment of a small (less than 1KB) criticality predictor, we can make a conventional single-read-port data cache achieve the performance of an ideal dual-read-port cache, yielding an average 10% performance improvement. Our remaining techniques can reuse the predictor (i.e., no additional overhead) to further optimize other aspects of load processing (e.g., caching decisions, store-to-load forwarding, etc.), yielding an overall performance improvement of 16% over a conventional processor. Some of these techniques also allow us to decrease power and area costs for several related hardware structures.
2699916
Deception Detection Via Blob Motion Pattern Analysis
Deception dectection is one of the most difficult problems in affect recognition and expression research area. Recently, non-verbal methods of detecting deception have appeared to be promising. Thomas[1] presented a proof-of-concept study based on the blob analysis of some suspects' interviews and mock experiments video clips. In this paper, we present our recent research work in the direction of developing an automated deception detection system. We propose a blob motion pattern analysis approach to solve this problem.
6672981
Control Flow Optimization Via Dynamic Reconvergence Prediction
This paper presents a novel microarchitecture technique for accurately predicting control flow reconvergence dynamically. A reconvergence point is the earliest dynamic instruction in the program where we can expect program paths to reconverge regardless of the outcome or target of the current branch. Thus, even if the immediate control flow after a branch is uncertain, execution following the reconvergence point is certain. This paper proposes a novel hardware re-convergence predictor which is both implementable and accurate, with a 4KB predictor achieving more than 95% accuracy for SPEC INT, and larger implementations achieving greater than 99% accuracy. The information provided from reconvergence prediction can increase the effectiveness of a range of previously proposed performance optimizations, including speculative multithreading, control independence, and squash reuse. This paper also demonstrates a new technique that takes advantage of the dynamic reconvergence prediction information in order to predict a wrong path excursion ahead of branch resolution. On average, 34% of wrong path fetches are eliminated.
2923490
Hardware Support for Prescient Instruction Prefetch
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch — an approach to improving single-threaded application performance by using helper threads to perform instruction prefetch. We demonstrate the need for enabling store-to-load communication and selective instruction execution when directly pre-executing future regions of an application that suffer I-cache misses. Two novel hardware mechanisms, safe-store and YAT-bits, are introduced that help satisfy these requirements. This paper also proposes and evaluates .nite state machine recall, a technique for limiting pre-execution to branches that are hard to predict by leveraging a counted I-prefetch mechanism. On a research Itanium®SMT processor with next line and streaming I-prefetch mechanisms that incurs latencies representative of next generation processors, prescient instruction prefetch can improve performance by an average of 10.0% to 22% on a set of SPEC 2000 benchmarks that suffer significant I-cache misses. Prescient instruction prefetch is found to be competitive against even the most aggressive research hardware instruction prefetch technique: fetch directed instruction prefetch.
661328
Physical experimentation with prefetching helper threads on Intel's hyper-threaded processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the ever-increasing memory latency. A number of pre-execution techniques based on hardware, compiler, or both have been proposed and studied extensively by researchers. They report promising results on simulators that model a simultaneous multithreading (SMT) processor. We apply the helper threading idea on a real multithreaded machine, i.e., Intel Pentium 4 processor with hyper-threading technology, and show that indeed it can provide wall-clock speedup on real silicon. To achieve further performance improvements via helper threads, we investigate three helper threading scenarios that are driven by automated compiler infrastructure, and identify several key challenges and opportunities for novel hardware and software optimizations. Our study shows a program behavior changes dynamically during execution. In addition, the organizations of certain critical hardware structures in the hyper-threaded processors are either shared or partitioned in the multithreading mode and thus, the tradeoffs regarding resource contention can be intricate. Therefore, it is essential to judiciously invoke helper threads by adapting to the dynamic program behavior so that we can alleviate potential performance degradation due to resource contention. Moreover, since adapting to the dynamic behavior requires frequent thread synchronization, having light-weight thread synchronization mechanisms is important.