Von Neumann hybrid cellular automata for generating deterministic test sequences
We propose an on-chip test pattern generator that uses an one-dimensional cellular automaton (CA) to generate either a precomputed sequence of test patterns or pairs of test patterns for path delay faults. To our knowledge, this is the first approach that guarantees successful on-chip generation of a given test pattern sequence (or a given test set for path delay faults) using a finite number of CA cells. Given a pair of columns (C<subscrpt><italic>u</italic></subscrpt>, C<subscrpt><italic>v</italic></subscrpt>) of the test matrix, the proposed method uses alternative “link procedures” P<subscrpt><italic>j</italic></subscrpt> that compute the number of extra CA cells to enable the generation of (C<subscrpt>u</subscrpt>, C<subscrpt><italic>v</italic></subscrpt>) by the  CA. A systematic approach uses the link procedures to minimize the total number of needed CA cells. The performance of the scheme depends on an appropriate choice of link procedures P<subscrpt><italic>j</italic></subscrpt>.