Fast Computation of Substrate Resistances in Large Circuits
In this paper, we describe a method to quickly and accurately estimate substrate coupling effects in analog and mixed digital/analog integrated circuits. Unlike numerical methods, that can be used for circuits containing only a few hundreds of substrate terminals, the new method can quickly extract circuits containing many thousands of substrate terminals. Examples are given that show that the method is sufficiently accurate for practical circuit verification. The method has been implemented in the layout-to-circuit extractor Space.