8837830
Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification
A differential single-port switched-RC N-path filter with band-pass characteristic is proposed. The switching frequency defines the center frequency, while the RC-time and duty cycle of the clock define the bandwidth. This allows for high-Q highly tunable filters which can for instance be useful for cognitive radio. Using a linear periodically time-variant (LPTV) model, exact expressions for the filter transfer function are derived. The behavior of the circuit including non-idealities such as maximum rejection, spectral aliasing, noise and effects due to mismatch in the paths is modeled and verified via measurements. A simple RLC equivalent circuit is provided, modeling bandwidth, quality factor and insertion loss of the filter. A 4-path architecture is realized in 65 nm CMOS. An off-chip transformer acts as a balun, improves filter-Q and realizes impedance matching. The differential architecture reduces clock-leakage and suppresses selectivity around even harmonics of the clock. The filter has a constant -3 dB bandwidth of 35 MHz and can be tuned from 100 MHz up to 1 GHz. Over the whole band, IIP3 is better than 14 dBm, P1dB=2 dBm and the noise figure is 3-5 dB, while the power dissipation increases from 2 mW to 16 mW (only clocking power).
29643067
Cognitive Radio Access to TV White Spaces: Spectrum Opportunities, Commercial Applications and Remaining Technology Challenges
Cognitive radio is being intensively researched as the enabling technology for secondary access to the so-called TV White Spaces (TVWS), large portions of spectrum in theUHF/VHF bands which become available on a geographical basis after digital switchover. Both in the US, and more recently, in the UK the regulators have given conditional endorsement to this new mode of access. This paper reviews the state-of-the-art in technology, regulation and standardization of cognitive access to TVWS. It examines the spectrum opportunity and commercial use cases associated with this form of secondary access.
869559
Dynamic range performance of on-chip RF bandpass filters
Despite decades of research in developing "single-chip" radio transceivers, most commercial designs continue to rely on off-chip components for RF bandpass filtering. Implementing these filters on-chip remains nearly as challenging today as it was ten years ago due to problems in meeting system requirements. Recent advances in silicon-on-insulator IC processes targeted at RF designs, however, offer the possibility of producing commercially-viable on-chip filters in the coming years using Q-enhancement techniques. This paper reviews filter implementation alternatives and dynamic range (DR) requirements, illustrating the fundamental advantages of Q-enhanced LC filters over active, inductorless, Gm-C designs. A 900-MHz Q-enhanced filter with a 20-MHz bandwidth is reported that achieves 78-dB DR in a 1-MHz bandwidth while consuming 39 mW. While still 15- to 20-dB below performance of comparable-power amplifiers and mixers, investigations of noise figure and inductor Q illustrate how future designs can correct this deficiency, bringing DR performance into the commercially acceptable range.
11737313
2 GHz$rm Q$-Enhanced Active Filter With Low Passband Distortion and High Dynamic Range
A tunable Q-enhanced filter with low passband distortion is presented. The Q of the on-chip spiral inductors that form the filter resonators is enhanced by using a cross-coupled differential pair which is degenerated by a second LC tank. This technique allows for frequency dependent compensation of inductor losses and ensures that the Q-enhanced LC resonators have a frequency behaviour close to the ideal in the passband of the filter. The circuit allows DC voltage control of Q-enhancement. The filter centered at 2.0 GHz with a 130 MHz bandwidth is tunable in frequency by 3%, exhibits a -6.6 dBm 1-dB compression point and a 15 dB noise figure while consuming 17 mW of DC power. The circuit was fabricated in 0.18-mum CMOS and the performance was verified experimentally
17578229
A differential 4-path highly linear widely tunable on-chip band-pass filter
A passive switched capacitor RF band-pass filter with clock controlled center frequency is realized in 65nm CMOS. An off-chip transformer which acts as a balun, improves filter-Q and realizes impedance matching. The differential architecture reduces clock-leakage and suppresses selectivity around even harmonics of the clock. The filter has a constant −3dB bandwidth of 35MHz and can be tuned from 100MHz up to 1GHz. IIP3 is better than 19dBm, P1dB=2dBm and NF≪5.5dB at Pdiss=2mW to 16mW.
110196296
Narrow-band switched-capacitor bandpass filters
Novel circuits, based on the N -path (or pseudo- N -path) configuration, are described for the design of narrow-band switched-capacitor (SC) bandpass filters. For noncritical applications very simple and economical circuits, based on the simulation of passive or active RC circuits, can be used; for high-accuracy filtering tasks, more elaborate circuits (obtained from doubly terminated reactance ladders) are proposed. The resulting filters provide stable passband responses and low sensitivities to element-value variations even for extremely narrow relative bandwidths, where other design approaches fail.
16996251
Fully Integrated High-Q Switched Capacitor Bandpass Filter with Center Frequency and Bandwidth Tuning
This paper proposes to study the design of a novel high-Q fully integrated switched capacitor bandpass filter. This circuit, implemented in CMOS technology, allows a tunable high selectivity over a broad frequency band. The proposed architecture is intended to replace passive surface acoustic wave (SAW) filters in low-cost wireless radio-communication applications. To show the feasibility of the proposed filter a prototype has been fabricated and tested. Measurements show quality factors up to 300, and a tunable center frequency range of 290 MHz [240 - 530 MHz] with a bandwidth tuning.
11890662
Low-Power 2.4-GHz Transceiver With Passive RX Front-End and 400-mV Supply
An ultra low power 2.4-GHz transceiver targeting wireless sensor network applications is presented. The receiver front-end is fully passive, utilizing an integrated resonant matching network to achieve voltage gain and interface directly to a passive mixer. The receiver achieves a 7-dB noise figure and -7.5-dBm IIP3 while consuming 330 muW from a 400-mV supply. The binary FSK transmitter delivers 300 muW to a balanced 50-Omega load with 30% overall efficiency and 45% power amplifier (PA) efficiency. Performance of the receiver topology is analyzed and simple expressions for the gain and noise figure of both the passive mixer and matching network are derived. An analysis of passive mixer input impedance reveals the potential to reject interferers at the mixer input with characteristics similar to an extremely high-Q parallel LC filter centered at the switching frequency
14908799
A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF
Spurious-free dynamic range (SFDR) is a key specification of radio receivers and spectrum analyzers, characterizing the maximum distance between signal and noise+distortion. SFDR is limited by the linearity (intercept point IIP3 mostly, sometimes IIP2) and the noise floor. As receivers already have low noise figure (NF) there is more room for improving the SFDR by increasing the linearity. As there is a strong relation between distortion and voltage swing, it is challenging to maintain or even improve linearity intercept points in future CMOS processes with lower supply voltages. Circuits can be linearized with feedback but loop gain at RF is limited [1]. Moreover, after LNA gain, mixer linearity becomes even tougher. If the amplification is postponed to IF, much more loop gain is available to linearize the amplifier. This paper proposes such an LNA-less mixer-first receiver. By careful analysis and optimization of a passive mixer core [2,3] for low conversion loss and low noise folding it is shown that it is possible to realize IIP3≫11dBm and NF≪6.5dB, i.e. a remarkably high SFDR≫79dB in 1MHz bandwidth over a decade of RF frequencies.
111021196
Analysis of periodically switched linear circuits
A new approach, to the exact analysis of linear circuits containing periodically operated switches is presented. After reformulation of the state equations conventional Fourier analysis is used to determine the response to arbitrary deterministic or stochastic inputs. The analysis is applicable also to improper circuits and circuits causing discontinuities in the state variables at the switching instants. The switches may operate in an arbitrary fashion with a common switching period. Explicit closed form solutions for both the (Fourier coefficients of the) periodically time-varying transfer function \hat{H}(f, t) and the impulse response h(t,\tau) are derived. These results are most suitable for computer aided design. Applications to switched filters and modulators are given.
5909429
Unified Frequency-Domain Analysis of Switched-Series-$RC$ Passive Mixers and Samplers
A wide variety of voltage mixers and samplers are implemented with similar circuits employing switches, resistors, and capacitors. Restrictions on duty cycle, bandwidth, or output frequency are commonly used to obtain an analytical expression for the response of these circuits. This paper derives unified expressions without these restrictions. To this end, the circuits are decomposed into a polyphase multipath combination of single-ended or differential switched-series-RC kernels. Linear periodically time-variant network theory is used to find the harmonic transfer functions of the kernels and the effect of polyphase multipath combining. From the resulting transfer functions, the conversion gain, output noise, and noise figure can be calculated for arbitrary duty cycle, bandwidth, and output frequency. Applied to a circuit, the equations provide a mathematical basis for a clear distinction between a “mixing” and a “sampling” operating region while also covering the design space “in between.” Circuit simulations and a comparison with mixers published in literature are performed to support the analysis.
109381620
VLSI for wireless communication
Communication Concepts: Circuit Designer Perspective.- Receiver Architectures.- Low Noise Amplifier.- Active Mixer.- Passive Mixer.- Analog-to-Digital Converters.- Frequency Synthesizer: Phase/Frequency Processing Components.- Frequency Synthesizer: Loop Filter and System Design.- Transmitter Architectures and Power Amplifier
8040182
Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference
A software-defined radio (SDR) receiver with improved robustness to out-of-band interference (OBI) is presented. Two main challenges are identified for an OBI-robust SDR receiver: out-of-band nonlinearity and harmonic mixing. Voltage gain at RF is avoided, and instead realized at baseband in combination with low-pass filtering to mitigate blockers and improve out-of-band IIP3. Two alternative ¿iterative¿ harmonic-rejection (HR) techniques are presented to achieve high HR robust to mismatch: a) an analog two-stage polyphase HR concept, which enhances the HR to more than 60 dB; b) a digital adaptive interference cancelling (AIC) technique, which can suppress one dominating harmonic by at least 80 dB. An accurate multiphase clock generator is presented for a mismatch-robust HR. A proof-of-concept receiver is implemented in 65 nm CMOS. Measurements show 34 dB gain, 4 dB NF, and + 3.5 dBm in-band IIP3 while the out-of-band IIP3 is +16 dBm without fine tuning. The measured RF bandwidth is up to 6 GHz and the 8-phase LO works up to 0.9 GHz (master clock up to 7.2 GHz). At 0.8 GHz LO, the analog two-stage polyphase HR achieves a second to sixth order HR > 60 dB over 40 chips, while the digital AIC technique achieves HR > 80 dB for the dominating harmonic. The total power consumption is 50 mA from a 1.2 V supply.