url: =dblp: Baoyong Chi\nA 190 GHz VCO with Transformer-Based Push-Push Frequency Doubler in 40 nm CMOS. CSSP 38(1): 425-441 (2019)\nA G-Band Wideband Bidirectional Transceiver Front-End in 40-nm CMOS. IEEE Trans. on Circuits and Systems 66-II(5): 798-802 (2019)\nWei Wang, Baoyong Chi:\nA Wideband High PSRR Capacitor-Less LDO with Adaptive DC Level Shift and Bulk-Driven Feed-Forward Techniques in 28nm CMOS. ISCAS 2019: 1-5\nJianfu Lin, Zheng Song, Meng Wei, Baoyong Chi:\nA 6.6 mW 1.25-2.25 GHz low phase noise PLL frequency synthesizer based on wide tuning range Class-C VCO. Microelectronics Journal 66: 119-127 (2017)\nZheng Song, Xiliang Liu, Xiaokun Zhao, Qiongbing Liu, Zongming Jin, Baoyong Chi :\nA Low-Power NB-IoT Transceiver With Digital-Polar Transmitter in 180-nm CMOS. IEEE Trans. on Circuits and Systems 64-I(9): 2569-2581 (2017)\nYang Xu , Xinwang Zhang, Zhihua Wang, Baoyong Chi :\nXinwang Zhang, Zipeng Chen, Yanqiang Gao, Feng Ma, Jiachen Hao, Guodong Zhu, Baoyong Chi :\nAn Interference-Robust Reconfigurable Receiver With Automatic Frequency-Calibrated LNA in 65-nm CMOS. IEEE Trans. VLSI Syst. 25(11): 3113-3124 (2017)\nYixing Chu, Jingxin Dong, Baoyong Chi, Yunfeng Liu:\nA Novel Digital Closed Loop MEMS Accelerometer Utilizing a Charge Pump. Sensors 16(3): 389 (2016)\nZipeng Chen, Zheng Song, Meng Wei, Zhihua Wang, Baoyong Chi:\nA reconfigurable IF receiver supporting intra-band non-contiguous carrier aggregation in 65 nm CMOS. ISCAS 2016: 1554-1557\nXinwang Zhang, Bingqiao Liu, Zhihua Wang, Baoyong Chi:\nAn LP/CBP reconfigurable analog baseband circuit for software-defined radio receivers in 65 nm CMOS. Microelectronics Journal 46(1): 81-95 (2015)\nXinwang Zhang, Baoyong Chi, Zhihua Wang:\nA 0.1-1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA. IEEE Trans. on Circuits and Systems 62-I(4): 1005-1014 (2015)\nYun Yin, Baoyong Chi, Zhigang Sun, Xinwang Zhang, Zhihua Wang:\nA 0.1-6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS. IEEE Trans. VLSI Syst. 23(5): 944-957 (2015)\nJiachen Hao, Zheng Song, Baoyong Chi:\nA reconfigurable analog baseband for low-power Wi-Fi receiver. ASICON 2015: 1-4\nBing Lyu, Yun Yin, Xiaobao Yu, Baoyong Chi:\nA 0.1-1.5G SDR transmitter with two-stage harmonic rejection power mixer in 65-nm CMOS. ASICON 2015: 1-4\nFeng Ma, Xin-Wang Zhang, Baoyong Chi:\nA 100M-1.5 GHz harmonic-rejection SDR receiver front-end. ASICON 2015: 1-4\nA 180nm CMOS wireless transceiver by utilizing guard band for narrowband IoT applications. A-SSCC 2015: 1-4\nRelay-Based Cooperative Spectrum Sensing with Improved Energy Detection In Cognitive Radio. BWCCA 2015: 227-231\nA 0.1-5.0GHz self-calibrated SDR transmitter with -62.6dBc CIM3 in 65nm CMOS. CICC 2015: 1-4\nXinwang Zhang, Yichuang Sun, Zhihua Wang, Baoyong Chi:\nA 0.5-30GHz wideband differential CMOS T/R switch with independent bias and leakage cancellation techniques. ISCAS 2015: 449-452\nXiaokun Zhao, Zheng Song, Baoyong Chi:\nA 60-dB DR PGA with DC-offset calibration for short-distance wireless receiver. VLSI-DAT 2015: 1-4\nYun Yin, Baoyong Chi, Zhaokang Xia, Zhihua Wang:\nA Reconfigurable Dual-Mode CMOS Power Amplifier With Integrated T/R Switch for 0.1-1.5-GHz Multistandard Applications. IEEE Trans. on Circuits and Systems 61-II(7): 471-475 (2014)\nA 0.1-5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications. IEEE Trans. on Circuits and Systems 61-I(11): 3266-3277 (2014)\nA 0.1-5GHz flexible SDR receiver in 65nm CMOS. A-SSCC 2014: 249-252\nA 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration. A-SSCC 2014: 353-356\nUltra-Wideband Circuits, Systems, and Applications. J. Electrical and Computer Engineering 2012: 567230:1-567230:2 (2012)\nYang Xu, Baoyong Chi, Zhihua Wang:\nPower-scalable multi-mode reconfigurable continuous-time lowpass/quadrature bandpass sigma-delta modulator for zero/low-IF receivers. ISCAS 2012: 293-296\nBaoyong Chi, Kasra Omid-Zohoor, Zhihua Wang, S. Simon Wong:\nA 65 nm CMOS fully-integrated dynamic reconfigurable differential power amplifier with high gain in both bands. Microelectronics Journal 42(6): 855-862 (2011)\nZhigang Sun, Baoyong Chi, Chun Zhang, Zhihua Wang:\nA 0.13µm CMOS 1.5-to-2.15GHz low power transmitter front-end for SDR applications. ISCAS 2011: 2453-2456\nA Low-Power High-Data-Rate ASK IF Receiver With a Digital-Control AGC Loop. IEEE Trans. on Circuits and Systems 57-II(8): 617-621 (2010)\nBaoyong Chi, Chun Zhang, Zhihua Wang:\nBandwidth extension for ultra-wideband CMOS low-noise amplifiers. ISCAS 2008: 968-971\nTongqiang Gao, Chun Zhang, Baoyong Chi, Zhihua Wang:\nAn improved method of power control with CMOS class-E power amplifiers. ISCAS 2008: 2306-2309\nTongqiang Gao, Dongmei Li, Baoyong Chi, Zhihua Wang:\nA CMOS class-E Power Amplifiers with Power Control. ISCAS 2007: 3900-3903\nNew implementation of injection locked technique and its application to low phase noise quadrature oscillators. Microelectronics Journal 37(11): 1412-1418 (2006)\nBaoyong Chi, Bingxue Shi, Zhihua Wang:\nA CMOS down-conversion micromixer for IEEE 802.11b WLAN transceivers. ISCAS 2006\nJinke Yao, Baoyong Chi, Zhihua Wang:\nA 4MHz Gm-C filter with on-chip frequency automatic tuning. ISCAS 2006\nBaoyong Chi, Bingxue Shi:\nA 1.8V 2.4GHz CMOS on-chip impedance matching low noise amplifier for WLAN applications. ISCAS (2) 2003: 188-191\n[c52] [j39] [c50] [c49] [j32] [c44]\n[j12] [j11] [j6] [j5] [c8]\n[j39] [j35] [j32] [c33] [j18] [c27]\n[j7] [j4] [j3] [j2] [c4] [c2]\n[j45] [j38] [j37] [j31] [j30] [c45] [j23] [c42] [c36] [c32] [c30] [j20] [j17] [j13]\n[c43] [j23] [c24] [c18]\n[c48] [c46] [j15] [c18]\n[j34] [j25] [c35] [c26]\n[j37] [j31] [j30] [j23] [c42] [c36] [j20] [j17] [j13]\n[c52] [j4] [j3] [c4]\n[j40] [j36] [c47] [c46] [c43]\n[j39] [j24] [c27]\n[j34] [j25] [c35] [c27] [c26]\n[j44] [j42] [j41] [c50]\n[j32] [j30] [c38] [c36]\n[j42] [j41] [c49]\n[j40] [c50] [c49] [c47] [j26] [c28] [c22] [c19] [j12] [j11] [c15] [c14]\n[c23] [j16] [c21] [c20] [c19]\n[j40] [c47] [j11] [c7]\n[j40] [j36] [j34] [c47] [c44] [c43] [c40] [c35] [c29] [c28] [c22] [c19]\n[j39] [j28] [j25] [c34] [c31]\n[j42] [j40] [j39] [j38] [j35] [j33] [j31] [j30] [j27] [j26] [c45] [c44] [c43] [j25] [j24] [j23] [j22] [j21] [c42] [c36] [c33] [c32] [c31] [c30] [j20] [j19] [j18] [j17] [c28] [c27] [c26] [c25] [c24] [j15] [c22] [c21] [c19] [c18] [j13] [j12] [j11] [c17] [c16] [c15] [j10] [j9] [c14] [c13] [j8] [j7] [j6] [j5] [c12] [c11] [c10] [j4] [j3] [j2] [c9] [c8] [c7] [c6] [j1] [c5] [c4] [c3] [c2]\n[j37] [j30] [c42] [c36]\n[j10] [c12] [j1] [c2]\n[j36] [j27] [c44] [c43] [j25] [c26] [c21]\n[c22] [j11] [c14]\n[j39] [j33] [j26] [c37] [c27] [c22] [j12] [j11] [c16] [c15] [c14]\n[j6] [j5] [j4] [j3] [c9] [c4] [c3] [c2]\n[j35] [j25] [j21] [c39] [c35] [c33] [j19] [j18] [c26] [c24] [c17]\n[j27] [j25] [c39] [c26] [c24] [c21] [j12] [j11] [c14]\n[j15] [c18] [j10] [c13] [c12] [c11] [c10]\n[j39] [j33] [j32] [j24] [j22] [j21] [c31] [c27] [c25] [c17]\n[j26] [c37] [c27]\n[j34] [c35] [c29]


timestamp: tn

url: =Creation Date: 3 selected / Creators/Contributors: 王鴻緖, 1645-1723 / Language: Chinese / Place Of Origin: [China and [China : / Subjects: China--History--Ming dynasty, 1368-1644 - Chinese Rare Books - CURIOSity Digital Collections Search Results\nYou searched for: Creation Date 雍正元年 i.e. 1723] Remove constraint Creation Date: 雍正元年 i.e. 1723] Creation Date 1723 Remove constraint Creation Date: 1723 Creation Date Yongzheng yuan nian i.e. 1723] Remove constraint Creation Date: Yongzheng yuan nian i.e. 1723] Creators/Contributors 王鴻緖, 1645-1723 Remove constraint Creators/Contributors: 王鴻緖, 1645-1723 Language Chinese Remove constraint Language: Chinese Place Of Origin [China Remove constraint Place Of Origin: [China Place Of Origin [China : Remove constraint Place Of Origin: [China : Subjects China--History--Ming dynasty, 1368-1644 Remove constraint Subjects: China--History--Ming dynasty, 1368-1644