Based on current-domain large-signal equivalent circuits, a new physical timing model for bipolar nonthreshold logic (NTL) circuits is developed. Through extensive comparisons with SPICE simulation results, it is found that the maximum error is 25% for the NTL inverters with different operating currents, capacitive loads, device parameters, and input excitation waveforms not deviating much from characteristic waveforms. Moreover, the consumed CPU time and memory in calculations are much less than those in full transient simulations.
|Number of pages||4|
|State||Published - 1 Dec 1988|