Operator Hardware Realization using FPGA: CMAC Implementation as an Example


 We propose a hardware implementation on a field-programmable gate array (FPGA) of the cerebellar model articulation controller (CMAC) with an integer numeric system. Existing hardware implementations of floating-point processes on FPGAs have utilized the IEEE 754 standard, which introduces complex operations leading to long processing times. For the most complex part of the CMAC, that is, the exponential operator, traditional look-up table methods carry high memory costs. We, therefore, use a Taylor series to realize the exponential operator. Finally, we connect all the modules into the CMAC.
 
