Design and Analysis of a Cascode Distributed LNA With Gain and Noise Improvement in 0.15-μm GaAs pHEMT Technology

This brief presents a 2.0~42.0 GHz ultra-wide bandwidth Cascode distributed low-noise amplifier (CDLNA) MMIC design. With the proposed coupled-line (CL) sections between each drain-artificial transmission line (D-ATML) node and related gate-artificial transmission line (G-ATML) node, the traveling signal is reused to enhance the gain and broaden the operation bandwidth simultaneously. To improve the gain further, the inductive gain peaking has also been employed at each drain of common-source (CS) and common-gate (CG) transistors. Meanwhile, an active termination technique incorporating active and passive elements has been adopted to achieve better noise figure (NF) performance. Employing the proposed techniques, an LNA prototype has been designed and fabricated in a 0.15- $\mu \text{m}$ GaAs E-Mode pHEMT technology with the chip size of 1.53 mm2 including all the pads. From test results, the proposed CDLNA demonstrates a peak gain of 14.1 dB, the best NF of 2.1 dB, a group delay of 102 ± 58.4 ps, and 23.25/14.7 dBm best OIP3/OP1dB, respectively. The total power consumption is 129 mW under 3 V VDD.