An Ultra-High Throughput and Efficient Implementation of Advanced Encryption Standard

Encryption techniques have become most important in the digital world. Advanced Encryption Standard implementation enhances security. In this proposed work, advanced encryption standard implementation is done on field programmable gate array through minimum resource utilization. Experimental results obtained gives area-efficient, high-throughput hardware structure. To achieve a high throughput rate and minimize resource allocation, parallel-pipeline design and data forwarding mechanism with optimized S-box is proposed. Comparison between proposed work and existing work shows that this optimized implementation gives reduction in resources and increase in throughput. Proposed method achieves throughput of 97.11Gbps and efficiency of 85.18 Mbps/slice.