A Partition Decoupling Algorithm for Compact Thermal Model in Multichip IGBT Modules

This letter proposes a partition decoupling algorithm for the compact thermal model to reduce the computation burden in the multichip insulated gate bipolar transistor modules. As a typical coupled system, the compact thermal model is split into separate thermal models with several shared interfaces. The interface data, coupling power loss, coming from the previous time step is used to calculate the real temperature in the current time step. The proposed algorithm transforms the spatial coupling of the compact thermal model into the temporal coupling. Furthermore, based on the proposed partition decoupling algorithm, some more loosely coupled algorithms are also designed. Finally, both simulation and experiment are conducted to verify three loosely coupled algorithms.