Electrical Noise Analysis of Z Shape Horizontal Pocket and Hetero Stack TFETs under Trap Distribution


 A comprehensive investigation on noise analysis for two different low-power devices, namely Z-shaped Horizontal Pocket and hetero stack tunnel field-effect transistors (TFETs), is presented within low- to high-frequency range. The simulation is performed for these structures in the presence of uniform and Gaussian trap distributions at the interface of Silicon and oxide materials for three different noise namely flicker noise, generation recombination (GR) noise, and diffusion noise with the help of the Sentaurus TCAD simulator. The result reveals that flicker and GR noise are dominates at low frequency, while, the diffusion noise reports significant influence at the high-frequency range. Finally, a comparative analysis has been done in terms of noise current spectral density (Sid) of the considered structures with the existing literature.