Floating Memcapacitor Based on Knowm Memristor and Its Dynamic Behaviors

Previous studies about mem-element model focus on basic concept and equivalent circuit model of mem-elements while has little research based on commercial memristor. The object of this brief is to design and implement a voltage controlled floating memcapacitor based on Knowm memristor. On the one hand, a small number of off the shelf components of the memcapacitor model makes it easier for researchers to complete the experiment. On the other hand, nonlinear dynamical behaviors are investigated, such as power-off plot, dynamic route map (DRM) and DC V-Q plot. It is found that DRM of memcapacitor demonstrate different characteristics after considering current limiting resistor. Finally, PSPICE circuit model is designed and hardware experimental results are presented.