A Compact High-Efficiency Boost Converter With Time-Based Control, RHP Zero-Elimination, and Tracking Error Compensation

Time-based signal processing has been recently demonstrated to be more area- and power-efficient compared with traditional analog based, making it an interesting approach for the design of compact high-efficiency dc–dc converters for portable applications. This work presents a novel boost converter, with a time-based control, a scheme for right-half plane (RHP) zero mitigation requiring no extra power switch nor external capacitor, and a pulse frequency modulation (PFM) operating mode with steady-state error correction and seamless PFM-to-continuous conduction mode (CCM) transition. The prototype implemented in a 0.18-<inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m bipolar-CMOS-DMOS (BCD) process generates an output voltage of 5 V from an input voltage ranging between 2.5 and 4.5 V, and has an 800-mA load current capability. The controller area occupation is 0.27 mm <inline-formula><tex-math notation="LaTeX">$^{2}$</tex-math></inline-formula> and the quiescent current in CCM is 300 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula> A for the controller and 40 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>A for the tracking error compensation. The peak efficiency is 96<inline-formula><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> at 4.5-V input and above 90<inline-formula><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> at light loads down to 50 mA current. Compared with a peak-current mode control, both the controller area and the current consumption of the proposed time-based architecture are lower by about 40%. The achieved closed-loop bandwidth of 130 kHz is six times larger than in a conventional boost converter with RHP zero.