Performance Investigation of a Dielectric Stacked Triple Material Cylindrical Gate All Around MOSFET (DSTMCGAA) for Low Power Applications


 This paper presents an analysis of gate stacked triple material dual-halo cylindrical MOSFET. The surface potential and electric field have been plotted for the proposed device using TCAD Silvaco at various channel lengths. The analytical model of surface potential, field and subthreshold current is also present. A comparative analysis has been accomplished for the proposed device with Asymmetric gate stack triple metal gate all around (AGSTMGAA), dual dielectric triple metal surrounding gate (DDTMSG) and Triple metal surrounding gate MOSFET. The performance metric of the device has been investigated in terms of Drain Induced Barrier Lowering (DIBL), Subthreshold swing and threshold-voltage roll-off. Furthermore, the analog behaviour of the device has been evaluated by determining transconductance, early voltage and intrinsic gain. The proposed device shows much better performance when compared to its counterpart. The mitigation in DIBL and leakage current indicates the cut back in the SCEs. The proposed device shows 8% improvement in SS, 36.2% improvement in DIBL and 13.5% improvement in threshold voltage roll-off as compared to AGSTMGAA. Hence, it can be used for low power applications.