Noise margin
# Noise margin

In electrical engineering, noise margin is the maximum voltage amplitude of extraneous signal that can be algebraically added to the noise-free worst-case input level without causing the output voltage to deviate from the allowable logic voltage level. It is commonly used in at least two contexts as follows:

* In communications system engineering, noise margin is the ratio by which the signal exceeds the minimum acceptable amount. It is normally measured in decibels.
* In a digital circuit, the noise margin is the amount by which the signal exceeds the threshold for a proper '0' (logic low) or '1' (logic high). For example, a digital circuit might be designed to swing between 0.0 and 1.2 volts, with anything below 0.2 volts considered a '0', and anything above 1.0 volts considered a '1'. Then the noise margin for a '0' would be the amount that a signal is below 0.2 volts, and the noise margin for a '1' would be the amount by which a signal exceeds 1.0 volt. In this case noise margins are measured as an absolute voltage, not a ratio. Noise margins for CMOS chips are usually much greater than those for TTL because the $V_{OHmin}$ is closer to the power supply voltage and $V_{OLmax}$ is closer to zero.
   * Real digital inverters do not instantaneously switch from a logic high (1) to a logic low (0), there is some capacitance. While an inverter is transitioning from a logic high to low, there is an undefined region where the voltage cannot be considered high or low. This is considered a noise margin. There are two noise margins to consider: Noise margin high $(N_{MH})$ and noise margin low $(N_{ML}).$ $N_{MH}$ is the amount of voltage between an inverter transitioning from a logic high (1) to a logic low (0) and vice versa for $N_{ML}.$ The equations are as follows: $N_{MH}$ ≡ $V_{OH}$ - $V_{IH}$ and $N_{ML}$ ≡ $V_{IL}$ - $V_{OL}.$ Typically, in a CMOS inverter $V_{OH}$ will equal $V_{DD}$ and $V_{OL}$ will equal the ground potential, as mentioned above.
      * $V_{IH}$ is defined as the highest input voltage at which the slope of the voltage transfer characteristic (VTC) is equal to -1, where the VTC is the plot of all valid output voltages vs. input voltages. Similarly, $V_{IL}$ is defined as the lowest input voltage where slope of the VTC is equal to -1.

In practice, noise margins are the amount of noise, that a logic circuit can withstand. Noise margins are generally defined so that positive values ensure proper operation, and negative margins result in compromised operation, or outright failure.

