Substrate mapping
# Substrate mapping

Substrate mapping (or wafer mapping) is a process in which the performance of semiconductor devices on a substrate is represented by a map showing the performance as a colour-coded grid. The map is a convenient representation of the variation in performance across the substrate, since the distribution of those variations may be a clue as to their cause.

The concept also includes the package of data generated by modern wafer testing equipment which can be transmitted to equipment used for subsequent 'back-end' manufacturing operations.

## History

The initial process supported by substrate maps was inkless binning.

Each tested die is assigned a bin value, depending on the result of the test. For example, a pass die is assigned a bin value of 1 for a good bin, bin 10 for an open circuit, and bin 11 for a short circuit. In the very early days of wafer test, the dies were put in different bins or buckets, depending on the test results.

Physical binning may no longer be used, but the analogy is still good. The next step in the process was to mark the failing dies with ink, so that during assembly only uninked dies were used for die attachment and final assembly. The inking step may be skipped if the assembly equipment is able to access the information in the maps generated by the test equipment.

A wafer map is where the substrate map applies to an entire wafer, while a substrate map is mapping in other areas of the semiconductors process including frames, trays and strips.

## E142

As with many items in the Semiconductor process area, also for this process step there are standards available. The latest and most potential standard is the E142 standard, provided by the SEMI organization. This standard has been approved via ballots for release in 2005.

It supports many possible substrate maps, including the ones named above. While the old standards could only support standard bin maps, representing bin information, this standard also support transfermaps, which can help in tracing back dies on strips to the locations they come from off the wafer for example.

