Update spice_simulation.rst
typo
@@ -25,7 +25,7 @@ The following is an example of simulation results of a pb_mux testbench.::
Therefore, the total energy per cycle of all the multiplexers in this testbench should be the sum of total_energy_per_cycle_srams and total_energy_per_cycle_pb_mux.
- Similiarly, the total leakage power of all the multiplexers in this testbench should the sum of total_leakage_srams and total_leakage_power_pb_mux.
+ Similarly, the total leakage power of all the multiplexers in this testbench should the sum of total_leakage_srams and total_leakage_power_pb_mux.
The leakage power is measured for the first clock cycle, where FPGA-SPICE set all the voltage stimuli in constant voltage levels.
