deploy load_arch_bitstream test case to CI
@@ -13,4 +13,7 @@ echo -e "FPGA-Bitstream regression tests";
echo -e "Testing bitstream generation only";
python3 openfpga_flow/scripts/run_fpga_task.py fpga_bitstream/generate_bitstream --debug --show_thread_logs
+echo -e "Testing loading architecture bitstream from an external file";
+python3 openfpga_flow/scripts/run_fpga_task.py fpga_bitstream/load_external_architecture_bitstream --debug --show_thread_logs
+
end_section "OpenFPGA.TaskTun"
