add warning to force formal_verification_top_netlist enabled
* Memember functions for data structure VerilogTestbenchOption
******************************************************************************/
#include "vtr_assert.h"
+#include "vtr_log.h"
#include "verilog_testbench_options.h"
@@ -81,9 +82,12 @@ void VerilogTestbenchOption::set_print_preconfig_top_testbench(const bool& enabl
&& (!reference_benchmark_file_path_.empty());
/* Enable print formal verification top_netlist if this is enabled */
if (true == print_preconfig_top_testbench_) {
+ if (false == print_formal_verification_top_netlist_) {
+ VTR_LOG_WARN("Forcely enable to print top-level Verilog netlist in formal verification purpose as print pre-configured top-level Verilog testbench is enabled\n");
print_formal_verification_top_netlist_ = true;
}
}
+}
void VerilogTestbenchOption::set_print_top_testbench(const bool& enabled) {
print_top_testbench_ = enabled && (!reference_benchmark_file_path_.empty());
