[Arch] Bug fix in tileable I/O arch example
<output name="inpad" num_pins="1"/>
<fc in_type="frac" in_val="0.15" out_type="frac" out_val="0.10"/>
<pinlocations pattern="custom">
- <loc side="top">io.outpad io.inpad</loc>
- <loc side="right">io.outpad io.inpad</loc>
+ <loc side="top">io.outpad</loc>
+ <loc side="right">io.inpad</loc>
</pinlocations>
</tile>
<tile name="clb" area="53894">
