[Regression Test] Deploy the debuf mux test case to CI
@@ -55,6 +55,9 @@ python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/mux_design/stdcell_m
echo -e "Testing Verilog generation with routing multiplexers implemented by local encoders";
python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/mux_design/local_encoder --debug --show_thread_logs
+echo -e "Testing Verilog generation with routing multiplexers without buffers";
+python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/mux_design/debuf_mux --debug --show_thread_logs
+
echo -e "Testing Verilog generation with behavioral description";
python3 openfpga_flow/scripts/run_fpga_task.py fpga_verilog/behavioral_verilog --debug --show_thread_logs
