Path correction 2
</input>
</stimulate>
</parameters>
- <tech_lib lib_type="academia" transistor_type="TOP_TT" lib_path="/research/ece/lnis/USERS/alacchi/Current_release/branch_multimode/OpenFPGA/fpga_flow/tech/PTM_45nm/45nm.pm" nominal_vdd="1.0" io_vdd="2.5"/>
+ <tech_lib lib_type="academia" transistor_type="TOP_TT" lib_path="/home/travis/build/LNIS-Projects/OpenFPGA/fpga_flow/tech/PTM_45nm/45nm.pm" nominal_vdd="1.0" io_vdd="2.5"/>
<transistors pn_ratio="2" model_ref="M">
<nmos model_name="nch" chan_length="40e-9" min_width="140e-9"/>
<pmos model_name="pch" chan_length="40e-9" min_width="140e-9"/>
