Correct error in demo, set a new generated ff_${benchmark}.v file rather than overwrite
@@ -12,7 +12,8 @@ architecture_generated="${pwd_path}/arch/generated/k6_N10_sram_chain_HC.xml"
architecture_template="${pwd_path}/arch/template/k6_N10_sram_chain_HC_template.xml"
ff_keyword="FFPATHKEYWORD"
-ff_path="${pwd_path}/../vpr7_x2p/vpr/VerilogNetlists/ff.v"
+ff_template_path="${pwd_path}/../vpr7_x2p/vpr/VerilogNetlists/ff.v"
+ff_path="${pwd_path}/../vpr7_x2p/vpr/VerilogNetlists/ff_${task_name}.v"
dir_keyword="GENERATED_DIR_KEYWORD"
rm -rf ${pwd_path}/results_OpenPithon
@@ -26,7 +27,7 @@ perl rewrite_path_in_file.pl -i $config_file # Replace OPENFPGAPATHKEYWORD in th
perl rewrite_path_in_file.pl -i $architecture_template -o $architecture_generated # Replace OPENFPGAPATHKEYWORD in the architecture file
perl rewrite_path_in_file.pl -i $architecture_generated -k $ff_keyword $ff_path # Set the ff path in the architecture file
echo "perl rewrite_path_in_file.pl -i $ff_path -k $dir_keyword $verilog_path"
-perl rewrite_path_in_file.pl -i $ff_path -k $dir_keyword $verilog_path # Set the define path in the ff.v file
+perl rewrite_path_in_file.pl -i $ff_template_path -o $ff_path -k $dir_keyword $verilog_path # Set the define path in the ff.v file
# SRAM FPGA
