[Factor] Using MLC NAND in SLC mode [Description] This writes data at a rate of one bit per cell instead of the designed number of bits per cell (normally two bits per cell) to speed up reads and writes. If capacity limits of the NAND in SLC mode are approached, the SSD must rewrite the oldest data written in SLC mode into MLC or TLC mode to allow space in the SLC mode NAND to be erased in order to accept more data. However, this approach can reduce wear by keeping frequently-changed pages in SLC mode to avoid programming these changes in MLC or TLC mode, because writing in MLC or TLC mode does more damage to the flash than writing in SLC mode. Therefore, this approach drives up write amplification but could reduce wear when writing patterns target frequently-written pages. However, sequential- and random-write patterns will aggravate the damage because there are no or few frequently-written pages that could be contained in the SLC area, forcing old data to need to be constantly be rewritten to MLC or TLC from the SLC area. [Relationship*] Negative (bad) [Type] 
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