text: Leonard C. Pipes Inventions, Patents and Patent Applications - Justia Patents Search
  Justia Patents Leonard C. Pipes Inventions, Patents and Patent Applications
  Patents by Inventor Leonard C. Pipes
  Leonard C. Pipes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
  Publication number: 20200411697
  Abstract: Embodiments herein describe techniques for a transistor above a substrate. The transistor includes a channel layer above the substrate. The channel layer includes a first channel material of a first conductivity. In addition, the channel layer further includes elements of one or more additional materials distributed within the channel layer. The channel layer including the elements of the one or more additional materials has a second conductivity different from the first conductivity. Other embodiments may be described and/or claimed.
  Inventors: Chieh-Jen KU, Pei-Hua WANG, Bernhard SELL, Martin M. MITAN, Leonard C. PIPES
  ISOLATION GAP FILLING PROCESS FOR EMBEDDED DRAM USING SPACER MATERIAL
  Publication number: 20200243376
  Abstract: Embodiments disclosed herein include transistors and methods of forming such transistors. In an embodiment, the transistor may comprise a semiconductor channel with a first surface and a second surface opposite the first surface. In an embodiment, a source electrode may contact the first surface of the semiconductor channel and a drain electrode may contact the first surface of the semiconductor channel. In an embodiment, a gate dielectric may be over the second surface of the semiconductor channel and a gate electrode may be separated from the semiconductor channel by the gate dielectric. In an embodiment, an isolation trench may be adjacent to the semiconductor channel. In an embodiment, the isolation trench comprises a spacer lining the surface of the isolation trench, and an isolation fill material.
  Inventors: Chieh-Jen KU, Bernhard SELL, Pei-Hua WANG, Harish GANAPATHY, Leonard C. PIPES
  Patent number: 7061068
  Abstract: Ions are implanted into the dielectric layer and/or barrier layer over a semiconductor substrate to change the polish rates of either or both layers during formation of a shallow trench isolation (STI) structure. The ion implantation can change or affect the polish rates of the material and the polish selectivity, and reduce or minimize unwanted topography resulting from chemical mechanical polishing (CMP). After CMP, the resulting STI structure has a more uniform and smooth topography.
  Inventors: Leonard C. Pipes, Rita Slilaty
  Implantating ions in shallow trench isolation structures
  Publication number: 20040155341
  Patent number: 6713385
  Patent number: 6590271
  Abstract: A shallow trench isolation (STI) structure is formed by etching trenches into the surface of a substrate in alignment with a patterned masking layer. An ion implantation of, for example, carbon, nitrogen, or oxygen, is performed so as to create an electrically insulating layer extending downwardly from a bottom surface of the trench. By implanting such extensions, STI structures with greater effective aspect ratios may be obtained which, in turn, allow greater packing density in integrated circuits. Implanted isolation structures may be formed without etching a trench by implanting into regions of the substrate. In this way, trench etch, dielectric back-fill, and planarization operations can be eliminated. Furthermore the implanted regions may be formed by multiple implants at different energies so as to obtain multiple, typically contiguous, target ranges.