code: def cli(ctx, board, serial_port, ftdi_id, sram, project_dir,
          verbose, verbose_yosys, verbose_arachne):
      
  
      drivers = Drivers()
      drivers.pre_upload()
      # Run scons
      exit_code = SCons(project_dir).upload({
          'board': board,
          'verbose': {
              'all': verbose,
              'yosys': verbose_yosys,
              'arachne': verbose_arachne
          }
      }, serial_port, ftdi_id, sram)
      drivers.post_upload()
      ctx.exit(exit_code)
docs: Upload the bitstream to the FPGA.