code: def _twos_comp_conditional(orig_wire, sign_bit, bw=None):
      
      if bw is None:
          bw = len(orig_wire)
      new_wire = pyrtl.WireVector(bw)
      with pyrtl.conditional_assignment:
          with sign_bit:
              new_wire |= ~orig_wire + 1
          with pyrtl.otherwise:
              new_wire |= orig_wire
      return new_wire
docs: Returns two's complement of wire (using bitwidth bw) if sign_bit == 1