code: def instruction_PSH(self, opcode, m, register):
          
          assert register in (self.system_stack_pointer, self.user_stack_pointer)
  
          def push(register_str, stack_pointer):
              register_obj = self.register_str2object[register_str]
              data = register_obj.value
  
  #             log.debug("\tpush %s with data $%x", register_obj.name, data)
  
              if register_obj.WIDTH == 8:
                  self.push_byte(register, data)
              else:
                  assert register_obj.WIDTH == 16
                  self.push_word(register, data)
  
  #        log.debug("$%x PSH%s post byte: $%x", self.program_counter, register.name, m)
  
          # m = postbyte
          if m & 0x80: push(REG_PC, register) # 16 bit program counter register
          if m & 0x40: push(REG_U, register) #  16 bit user-stack pointer
          if m & 0x20: push(REG_Y, register) #  16 bit index register
          if m & 0x10: push(REG_X, register) #  16 bit index register
          if m & 0x08: push(REG_DP, register) #  8 bit direct page register
          if m & 0x04: push(REG_B, register) #   8 bit accumulator
          if m & 0x02: push(REG_A, register) #   8 bit accumulator
          if m & 0x01: push(REG_CC, register)
docs: All, some, or none of the processor registers are pushed onto stack
          (with the exception of stack pointer itself).
  
          A single register may be placed on the stack with the condition codes
          set by doing an autodecrement store onto the stack (example: STX ,--S).
  
          source code forms: b7 b6 b5 b4 b3 b2 b1 b0 PC U Y X DP B A CC push order
          ->
  
          CC bits "HNZVC": -----