code: def LSR(self, a):
          
          r = a >> 1
          self.clear_NZC()
          self.C = get_bit(a, bit=0) # same as: self.C |= (a & 1)
          self.set_Z8(r)
          return r
docs: Performs a logical shift right on the register. Shifts a zero into bit
          seven and bit zero into the C (carry) bit.
  
          source code forms: LSR Q; LSRA; LSRB
  
          CC bits "HNZVC": -0a-s