docs: def state_blank(self, addr=None, initial_prefix=None, brk=None, stack_end=None, stack_size=1024*1024*8, stdin=None, **kwargs):
          """
          Initialize a blank state.
  
          All parameters are optional.
  
          :param addr:            The execution start address.
          :param initial_prefix:
          :param stack_end:       The end of the stack (i.e., the byte after the last valid stack address).
          :param stack_size:      The number of bytes to allocate for stack space
          :param brk:             The address of the process' break.
          :return:                The initialized SimState.
  
          Any additional arguments will be passed to the SimState constructor
          """
          # TODO: move ALL of this into the SimState constructor
          if kwargs.get('mode', None) is None:
              kwargs['mode'] = self.project._default_analysis_mode
          if kwargs.get('permissions_backer', None) is None:
              # just a dict of address ranges to permission bits
              permission_map = { }
              for obj in self.project.loader.all_objects:
                  for seg in obj.segments:
                      perms = 0
                      # bit values based off of protection bit values from sys/mman.h
                      if seg.is_readable:
                          perms |= 1  # PROT_READ
                      if seg.is_writable:
                          perms |= 2  # PROT_WRITE
                      if seg.is_executable:
                          perms |= 4  # PROT_EXEC
                      permission_map[(seg.min_addr, seg.max_addr)] = perms
              permissions_backer = (self.project.loader.main_object.execstack, permission_map)
              kwargs['permissions_backer'] = permissions_backer
          if kwargs.get('memory_backer', None) is None:
              kwargs['memory_backer'] = self.project.loader.memory
          if kwargs.get('os_name', None) is None:
              kwargs['os_name'] = self.name
  
          state = SimState(self.project, **kwargs)
  
          if stdin is not None and not isinstance(stdin, SimFileBase):
              if type(stdin) is type:
                  stdin = stdin(name='stdin', has_end=False)
              else:
                  stdin = SimFileStream(name='stdin', content=stdin, has_end=True)
  
          last_addr = self.project.loader.main_object.max_addr
          actual_brk = (last_addr - last_addr % 0x1000 + 0x1000) if brk is None else brk
          state.register_plugin('posix', SimSystemPosix(stdin=stdin, brk=actual_brk))
  
  
          actual_stack_end = state.arch.initial_sp if stack_end is None else stack_end
          if o.ABSTRACT_MEMORY not in state.options:
              state.memory.mem._preapproved_stack = IRange(actual_stack_end - stack_size, actual_stack_end)
  
          if state.arch.sp_offset is not None:
              state.regs.sp = actual_stack_end
  
          if initial_prefix is not None:
              for reg in state.arch.default_symbolic_registers:
                  state.registers.store(reg, state.solver.BVS(
                      initial_prefix + "_" + reg,
                      state.arch.bits,
                      explicit_name=True,
                      key=('reg', reg),
                      eternal=True))
  
          for reg, val, is_addr, mem_region in state.arch.default_register_values:
  
              region_base = None  # so pycharm does not complain
  
              if is_addr:
                  if isinstance(mem_region, tuple):
                      # unpack it
                      mem_region, region_base = mem_region
                  elif mem_region == 'global':
                      # Backward compatibility
                      region_base = 0
                  else:
                      raise AngrSimOSError('You must specify the base address for memory region "%s". ' % mem_region)
  
              # special case for stack pointer override
              if actual_stack_end is not None and state.arch.registers[reg][0] == state.arch.sp_offset:
                  continue
  
              if o.ABSTRACT_MEMORY in state.options and is_addr:
                  address = claripy.ValueSet(state.arch.bits, mem_region, region_base, val)
                  state.registers.store(reg, address)
              else:
                  state.registers.store(reg, val)
  
          if addr is None: addr = self.project.entry
          state.regs.ip = addr
  
          # set up the "root history" node
          state.scratch.ins_addr = addr
          state.scratch.bbl_addr = addr
          state.scratch.stmt_idx = 0
          state.history.jumpkind = 'Ijk_Boring'
  
          return state