Circuits built on chips, generally have on-chip power supplies. On-chip power supplies generate noise, to which circuits coupled thereto are somewhat sensitive. Some components can be greatly affected by the power supply noise, such components as phase-locked loops (PLLs), for which it is pertinent to know whether the supply noise has any spectrum. For example, if a power supply has noise that causes oscillation at 10 kHz, and that power supply feeds a PLL that is trying to put out a 1 MHz signal from some source, the 10 kHz power supply noise will end up modulated on-top of the 1 MHz output. As a result the output of the PLL-Will contain jitter. This jitter may cause circuits relying on the accuracy of a clean signal from the PLL to malfunction.
There is an interest in knowing how a circuit is really performing, but with the power supply noise affecting the performance of the circuit, the real performance of the circuit is often difficult to determine. It is especially difficult to probe the power supply inside the chip, so determining the level and spectrum of the power supply has proven difficult.
In measuring the noise of the power supply, measuring the DC component of the noise is simple, and can be done by measuring the voltage associated with the noise of the power supply. More difficult, however, is determining the high frequency content of the noise signal of the power supply, and hence its spectrum independent of the effects of other components of the circuit.
Existing solutions simply output the power supply pins for external measurements. The problem with such an approach is that the power supply is often disrupted by external equipment, board layout, and package concerns. Therefore, it is difficult to determine the on-chip noise level, and measure the noise without affecting the noise itself. Even more difficult is measuring high frequency noise caused by the power supply that can occur on the chip.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.
USPTO Backgrounds
USPTO Backgrounds