JP-A-7-20963 discloses an example of a signal processing device that performs a predetermined process to an input signal based on a clock signal outputted from an oscillator circuit when a level of the input signal changes. In the signal processing device, when a signal is not inputted, a system clock is stopped so as to reduce power consumption.
However, in the signal processing device, even after an external signal is determined as not noise but a normal signal, an operation of the oscillator circuit continues for a predetermined time. Thus, the power consumption cannot be reduced sufficiently.
USPTO Backgrounds
USPTO Backgrounds