1. Field of the Invention
The present invention relates to a cyclic redundancy check code generating circuit, a semiconductor memory device, and a method of driving a semiconductor memory device.
2. Description of the Related Art
Memories transmit data to memory controllers. As the amount of data transmitted increases, a bit error rate (BER) increases. Therefore, reliability of data that is transmitted between the memory and the memory controller has become an important issue. In order to detect an error in the data being transmitted, various methods of detecting errors have been applied to semiconductor memory devices.
However, since it takes time to generate an error detection code so as to detect an error and transmit the generated error detection code, it is difficult to improve an increase in an operating speed of the semiconductor memory device.
USPTO Backgrounds
USPTO Backgrounds