The present invention relates to a display-integrated type tablet device for use in a personal computer, a word processor, or the like.
As a means for inputting a handwritten letter or a figure into a computer or a word processor, there has been put into practical use a display-integrated type tablet device which is formed by laminating an electrostatic induction type tablet on a liquid crystal display and is capable of receiving an input of a letter or a figure into its electrostatic induction type tablet as if the letter or figure were written on paper by writing implements. However, in such a display-integrated type tablet device, electrodes are viewed as a grating on the display screen due to a difference in reflectance or transmittance between a portion having an electrode and a portion having no electrode, which has been a cause of degrading the quality of an image displayed on the liquid crystal display screen.
As a tablet free of the above-mentioned drawback, lately a display-integrated type tablet device as shown in FIG. 15 is proposed by the applicant of the present invention (Japanese Patent Application No. 3-46751 and a co-pending U.S. patent application Ser. No. 07/849,733) though it is not yet well known. It should be noted that the above-mentioned device is not a prior art, and herein described for better understanding of the present invention.
In the above-mentioned display-integrated type tablet device, electrodes concurrently serve as image display electrodes of a liquid crystal display (LCD) and as coordinate detection electrodes of an electrostatic type tablet device. There are provided in one frame period a coordinate detection period when designated coordinates on the tablet are detected and an image display period when an image is displayed as shown in FIG. 16 to time-sharingly effect the coordinate detection and image display.
Referring to FIG. 15, an LCD panel 101 is constructed by interposing liquid crystals between common electrodes Y.sub.1 through Y.sub.n (an arbitrary common electrode represented by Y hereinafter) and segment electrodes X.sub.1 through X.sub.m (an arbitrary segment electrode represented by X hereinafter) which are arranged at right angles to each other, in which each portion where a common electrode Y and a segment electrode X cross each other constitutes each pixel. In other words, n.times.m dot pixels are arranged in matrix in the LCD panel 101.
The above-mentioned display-integrated type tablet device has an advantage of permitting cost reduction as well as compact and light weight design by virtue of the concurrent use of the electrodes and drive circuits as those of the liquid crystal display and those of the electrostatic induction type tablet in addition to an advantage of making the grating-shaped electrodes invisible for a better image presentation in contrast to the conventional type formed by laminating the electrostatic induction type tablet on the liquid crystal display.
The above-mentioned display-integrated type tablet device operates as follows. A common electrode drive circuit 102 for driving the common electrode Y and a segment electrode drive circuit 103 for driving the segment electrode X are connected to a display control circuit 105 and a detection control circuit 106 via a switching circuit 104. The switching circuit 104 is controlled by a control circuit 107 so that it outputs an output signal from the display control circuit 105 to the common electrode drive circuit 102 and the segment electrode drive circuit 103 in an image display period or outputs an output from the detection control circuit 106 to the common electrode drive circuit 102 and the segment electrode drive circuit 103 in a coordinate detection period.
Although the switching circuit 104, the display control circuit 105, the detection control circuit 106, and the control circuit 107 are expressed dividedly in blocks in FIG. 15, the circuits are integrated in an LSI (Large Scale Integrated) circuit in practice. Therefore, the LSI cannot be strictly sectioned into such blocks in a practical circuit arrangement.
In the aforementioned image display period, a mode signal (mode) output from the control circuit 107 to the segment electrode drive circuit 103 and to the switching circuit 104 is switched to an image display mode. Consequently, the segment electrode drive circuit 103 selects the image display mode, while the switching circuit 104 switches so as to select and output an output signal from the display control circuit 105.
Then there are output, from the display control circuit 105, shift data s from a shift data output terminal S, an inversion signal fr from an inversion signal output terminal FR, a clock signal cp1 from a clock output terminal CP1, a clock signal cp2 from a clock output terminal CP2, and display data D.sub.0 through D.sub.3 from data output terminals D0 through D3.
The above-mentioned clock signal cp1 is a clock signal which has a period when pixels in one line display an image, and the signal is input as a clock signal cp1o to a clock input terminal YCK of the common electrode drive circuit 102 and a latch pulse input terminal XLP of the segment electrode drive circuit 103 via an output terminal CP1O of the switching circuit 104. The shift data s which is a pulse signal for selecting a specified common electrode Y is input as shift data (so) to a shift data input terminal DIO1 of the common electrode drive circuit 102 in synchronization with the clock signal cp1o via an output terminal SO of the switching circuit 104.
When the shift data so is input to the common electrode drive circuit 102, the pulse position of the shift data so is shifted in a shift register in synchronization with the clock signal cp1o, and drive pulses of a common electrode drive signal are applied to the common electrodes Y.sub.1 through Y.sub.n from output terminals O1 through On of the common electrode drive circuit 102 in correspondence with the shift position. The common electrode drive signal is generated based on bias power sources V.sub.0 through V.sub.5 supplied from a DC power supply circuit 112.
The above-mentioned clock signal cp2 is a clock signal which has a period being a division of a period when pixels in one line displays an image, and the signal is input as a clock signal cp2o to a clock input terminal XCK of the segment electrode drive circuit 103 via an output terminal CP2O of the switching circuit 104.
The image display data D.sub.0 through D.sub.3 are input as display data D.sub.0 o through D.sub.3 o to input terminals XD0 through XD3 of the segment electrode drive circuit 103 via output terminals D0O through D3O of the switching circuit 104, and then successively taken into a register in the segment electrode drive circuit 103 in synchronization with the clock signal cp2o. When all the image display data corresponding to the pixels in one line are taken in, the display data taken in are latched at a timing of the clock signal cp1o input to the latch pulse input terminal XLP. Then drive pulses of the segment electrode drive signal corresponding to the display data are applied from output terminals O1 through Om of the segment electrode drive circuit 103 to the segment electrodes X.sub.1 through X.sub.2. The segment drive signal is also generated based on the bias power sources V.sub.0 through V.sub.5 supplied from the DC power supply circuit 112.
It is noted that the inversion signal fr is a signal for preventing the possible deterioration of the liquid crystals due to electrolysis by periodically inverting the direction of voltage application to the liquid crystals in the image display period. The inversion signal fr is input as an inversion signal fro to an inversion signal input terminal YFR of the common electrode drive circuit 102 and an inversion signal input terminal XFR of the segment electrode drive circuit 103 via an inversion signal output terminal FRO of the switching circuit 104.
Thus the pixel matrix of the LCD panel 101 is line-sequentially driven by the operations of the above-mentioned common electrode drive circuit 102 and the segment electrode drive circuit 103 to display an image corresponding to the display data D.sub.0 through D.sub.3 on the LCD panel 101.
In the aforementioned coordinate detection period, the mode signal (mode) output from a control circuit 107 to the segment electrode drive circuit 103 and to the switching circuit 104 is switched to a coordinate detection mode. Consequently, the segment electrode drive circuit 103 selects the coordinate detection mode, while the switching circuit 104 switches so as to select and output an output signal from the detection control circuit 106.
Then there are output, from the detection control circuit 106, shift data sd from a shift data output terminal Sd, an inversion signal frd from an inversion signal output terminal FRd, a clock signal cp1d from a clock output terminal CP1d, a clock signal cp2d from a clock output terminal CP2d, and drive data D.sub.0 d through D.sub.3 d from data output terminals D0d through D3d.
The clock signal cp1d is a clock signal which has a period when one common electrode Y or one segment electrode X is scanned, and the signal is input as the clock signal cp1o to the clock input terminal YCK of the common electrode drive circuit 102 and the latch pulse input terminal XLP of the segment electrode drive circuit 103 via the output terminal CP1O of the switching circuit 104. Meanwhile, the shift data sd which is a pulse signal for selecting a specified common electrode Y or segment electrode X is input as the shift data (so) to the shift data input terminal DIO1 of the common electrode drive circuit 102 or to a data input terminal EIO1 of the segment electrode drive circuit 103 via the output terminal SO of the switching circuit 104 in synchronization with the aforementioned clock signal cp1d.
Then, in the same manner as described above, the pulse position of the shift data so input to the common electrode drive circuit 102 is shifted in a shift register in synchronization with the clock signal cp1o, and scanning pulses of common electrode drive signals y.sub.1 through y.sub.n (arbitrary common electrode scanning signal represented by y hereinafter) are successively applied from the output terminals O1 through On corresponding to the shift position to the common electrodes Y.sub.1 through Y.sub.n. The common electrode scanning signal y is generated based on the bias power sources V.sub.0 through V.sub.5 supplied from the DC power supply circuit 112.
Meanwhile, the pulse position of the shift data so input to the segment electrode drive circuit 103 which has been selected to be in the coordinate detection mode is shifted in a shift register in synchronization with the clock signal cp1o, and scanning pulses of segment electrode drive signals x.sub.1 through x.sub.n (arbitrary segment electrode scanning signal represented by x hereinafter) are successively applied from the output terminals O1 through Om corresponding to the shift position to the segment electrodes X.sub.1 through X.sub.m.
Although the above described the case where the segment electrode X is scanned based on the shift data so and the clock signal cp1o, the segment electrode X may be scanned in the following manner. That is, the segment electrode scanning signal x is output to the segment electrodes X.sub.1 through X.sub.m from the output terminals O1 through Om of the segment electrode drive circuit 103 while making any bit of the drive data D.sub.0 d through D.sub.3 d output from the detection control circuit 106 serve as the shift data sd and making the clock signal cp2d serve as a sync signal.
In the above case, the clock signal cp2d is a clock signal which has a period when the segment electrode X is scanned, and the signal is input as the clock signal cp2o to the clock input terminal XCK of the segment electrode drive circuit 103 via the output terminal CP2O of the switching circuit 104.
The drive data D.sub.0 d through D.sub.3 d are input as drive data D.sub.0 o through D.sub.3 o to the input terminals XD0 through XD3 of the segment electrode drive circuit 103 via the output terminals D0O through D3O of the switching circuit 104, and then successively taken into the register of the segment electrode drive circuit 103 in synchronization with the clock signal cp2o. Then scanning pulses of the segment electrode scanning signals x.sub.1 through x.sub.m corresponding to the above-mentioned drive data are output from the output terminals O1 through O.sub.m of the segment electrode drive circuit 103 to segment electrodes X.sub.1 through X.sub.m. The segment electrode scanning signal x is also generated based on the bias power sources V.sub.0 through V.sub.5 supplied from the DC power supply circuit 112.
It is noted that the output terminal EIO2 of the segment electrode drive circuit 103 is the output terminal of the final stage of the shift register, and the output terminal EIO2 outputs a pulse signal seio2 having the same pulse width as that of the shift data sd as shown in FIG. 18.
The segment electrode scanning signal x is also generated based on the bias power sources V.sub.0 through V.sub.5 supplied from the DC power supply circuit 112.
FIG. 20 is a timing chart of the scanning signals in the coordinate detection period of the above-mentioned display-integrated type tablet device. The coordinate detection period is separated into an x-coordinate detection period and a subsequent y-coordinate detection period. In the x-coordinate detection period, scanning pulses of the segment electrode scanning signal x are successively applied to the segment electrode X. In the y-coordinate detection period, scanning pulses of the common electrode scanning signal y are successively applied to the common electrode Y.
In the above case, the scanning pulse voltage of the segment electrode scanning signal x or the common electrode scanning signal y for one of the segment electrode X or the common electrode Y to be scanned (the voltage referred to as the "scanning voltage" hereinafter) is set at the bias power source V.sub.5 supplied from the DC power supply circuit 112. On the other hand, the scanning pulse voltage of the segment electrode scanning signal x or the common electrode scanning signal y for the other of the segment electrode X or the common electrode Y to be not scanned (the voltage referred to as the "non-scanning voltage" hereinafter) is set at the bias power source V.sub.1 supplied from the DC power supply circuit 112.
With application of the above-mentioned scanning signal V.sub.5, a voltage is induced at a designation coordinate detection pen (referred to merely as the "detection pen" hereinafter) 108 as shown in FIG. 17(b) due to a floating capacitance between the segment electrode X or the common electrode Y and a tip electrode of the detection pen 108 as shown in FIG. 17(a). The voltage induced at the detection pen 108 is amplified in an amplifier 109 and then converted into a binary signal as shown in FIG. 17(c) to be input to an x-coordinate detection circuit 110 and a y-coordinate detection circuit 111.
The x-coordinate detection circuit 110 and the y-coordinate detection circuit 111 detect the x-coordinate value or the y-coordinate value of a position designated by the detection pen 108 by detecting a period "T" from the time when the scanning voltage signal V.sub.5 is applied to the time when an induction voltage takes its maximum value based on an output from the amplifier 109 and a timing signal from the control circuit 107.
FIG. 21 shows a relation in position between the LCD panel 101 and the detection pen 108. When directly touching the LCD panel 101 with the detection pen 108, a stress is applied to a polarizer 114 and an LCD enclosure glass plate 115 to modulate the transmittance of the LCD panel 101, and consequently so-called a Newton-ring-shaped pattern appears. Therefore, a transparent protection plate 116 such as glass or acrylic resin is interposed between the LCD panel 101 and the detection pen 108 to provide an air gap 117 so as not to apply any stress onto the LCD panel 101.
However, in the display-integrated tablet construction as shown in FIG. 21, the stress onto the LCD panel 101 can be avoided but the transparent protection plate 116 is significantly deformed by the stress, which results in greatly varying the distance between the segment electrode X as well as the common electrode Y (referred to merely as the "scanning electrode" hereinafter) and a detection electrode 113 of the detection pen 108. In such a display-integrated type tablet device, coordinate detection is effected taking advantage of an electrostatic induction phenomenon. Therefore, the output of the detection pen 108 varies in reverse proportion to the distance between the scanning electrodes X and Y and the detection electrode 113.
Therefore, in a normal system where the analog output of the detection pen 108 is converted into a binary signal with a fixed threshold to obtain a detection pulse, there is a problem that a secured detection pulse cannot be obtained for a detection signal having a low signal-to-noise ratio.
In the above case, there can be presented an electrical equivalent circuit of the LCD panel 101 in the x-coordinate detection period when the common electrodes is fixed at the voltage V.sub.0 and the segment electrodes receive a voltage which changes from the voltage V.sub.0 to the voltage V.sub.5 and again to the voltage V.sub.0 as shown in FIG. 22. It is noted that rcd.sub.1 through rcd.sub.n are internal resistance values of the common electrode drive circuit 102, rsd.sub.1 through rsd=are internal resistance values of the segment electrode drive circuit 103, rc.sub.1'1 through rc.sub.n'm are resistance values of the common electrodes, rs.sub.1'1 through rs.sub.n'm are resistance values of the segment electrodes, and each of C.sub.1'1 through C.sub.n'm is a capacitance of one pixel of the LCD.
In the above case, by ignoring the resistance values rs.sub.1'1 through rs.sub.n'm and assuming rc.sub.1'1 =rc.sub.1'2 = . . . =rc.sub.n'm =rc, rcd.sub.1 =rcd.sub.2 = . . . rcd.sub.n =rcd, C.sub.1'1 =C.sub.1'2 = . . . =C.sub.n'm =C, and rsd.sub.1 =rsd.sub.2 = . . . =rsd.sub.m =rsd, the equivalent circuit as shown in FIG. 22 can be further simplified as shown in FIG. 23.
Referring to FIG. 23, each of the capacitors of segment electrodes to which is applied the voltage V.sub.0 has no electric charge, while each of the capacitors of the segment electrodes to which is applied the voltage V.sub.5 has an electric charge of (V.sub.5 -V.sub.0)/n/C. It is noted that the voltage V.sub.5 is simultaneously applied to four segment electrodes in FIG. 23.
When the scanning of the segment electrodes progresses by one clock pulse in the condition as shown in FIG. 23, a condition as shown in FIG. 24 is achieved. Consequently, there is formed a discharge current through the capacitor of the segment electrode X at which the electric potential has changed from the voltage V.sub.5 to the voltage V.sub.0. Meanwhile, there is formed a charge current through the capacitor of the segment electrode X at which the electric potential has changed from the voltage V.sub.0 to the voltage V.sub.5. Since rc/n can be ignored in comparison to rsd, the above-mentioned charge and discharge currents do not flow into the common driver.
However, as shown in FIG. 25, the charge and discharge currents of the capacitors flow into the common electrode drive circuit 102 at the time of starting the scanning of the segment electrode X (the voltage V.sub.5 is applied only to the segment electrode X.sub.1 closest to the common electrode drive circuit 102), and therefore a voltage drop takes place because of the output impedance of the common electrode drive circuit 102. Such a voltage drop is superimposed on the entire common electrodes.
A voltage drop due to the resistance of the common electrodes is additionally superimposed at the time of ending the scanning of the segment electrode X (the voltage V.sub.5 is applied only to the segment electrode X.sub.m farthest from the common electrode drive circuit 102) as shown in FIG. 26, and therefore an increased amount of noise takes place at the scanning end time as compared with the scanning start time.
In an arrangement of the LCD panel 101, the transparent protection plate 116, and the detection pen 108 as shown in FIG. 21, the electrostatic coupling between the detection electrode 113 of the detection pen 108 and the common electrodes is strong, and the electrostatic coupling between the detection electrode 113 and the segment electrodes is very weak. Therefore, the noise superimposed on the common electrodes exerts great influence. In the normal system where the analog output of the detection pen 108 is converted into a binary signal with a fixed threshold to obtain a coordinate pulse, the detection signal induced at the detection pen 108 in scanning the segment electrodes has a degraded signal-to-noise ratio as shown in FIG. 27.
The above fact also results in a problem that no secured coordinate pulse for detecting the x-coordinate value can be obtained.
In the above-mentioned electrostatic induction type tablet, the detection signal of the detection pen 108 is obtained as a signal of which DC component is lost. In the output of the detection pen in the display-integrated type tablet device employing an electrostatic induction type tablet, an LCD image display polarity inversion pulse, a y-coordinate detection pulse, and an x-coordinate detection pulse can be obtained as analog signals respectively in the image display period, the y-coordinate detection period, and the x-coordinate detection period. Therefore, a delay of a low-frequency component takes place due to a capacitive coupling in the x-coordinate detection circuit 110 and the y-coordinate detection circuit 111, and each of the pulses exerts a low-frequency interference with the other pulses, which results in the appearance of an error in coordinate detection.
FIG. 18 shows a timing chart of a segment electrode scanning signal x applied to the segment electrode X of the LCD panel 101 and waveforms of the output signal from the detection pen 108 or the amplifier 109 in the x-coordinate detection period. FIG. 19 shows an equivalent circuit of the common electrode drive circuit 102 and the segment electrode drive circuit 103 in the x-coordinate detection period.
Referring to FIG. 19, switch units S.sub.1, S.sub.2, . . . S.sub.m in the segment electrode drive circuit 103 successively apply the scanning voltage V.sub.5 to each segment electrode X, while switch units S.sub.1 ', S.sub.2 ', . . . S.sub.m ' in the common electrode drive circuit 102 successively apply the scanning voltage V.sub.5 to each common electrode Y. The switch units are each composed of a CMOS (Complementary Metal Oxide Semiconductor) silicon gate circuit.
It is noted that resistors r.sub.c1, r.sub.c5, r.sub.s1, and r.sub.s5 are on-resistors.
The above-mentioned switch units S.sub.1, S.sub.2, . . . , S.sub.m-1, S.sub.m in the segment electrode drive circuit 103 are switched to the voltage V.sub.5 sequentially from S.sub.1 to S.sub.m. Thus the scanning voltage V.sub.5 of the segment electrode scanning signal x is applied to the segment electrode X sequentially from a segment electrode X.sub.1 located at an end of the LCD panel 101 to a segment electrode X.sub.m located at the other end as shown in FIG. 18. Referring to FIG. 19, the switch units S.sub.2, S.sub.3, and S.sub.4 are switched to the voltage V.sub.5 to apply the scanning voltage to the segment electrodes X.sub.2, X.sub.3, and X.sub.4, while the other switch units S.sub.1, S.sub.5, . . . S.sub.m are switched to the voltage V.sub.1 to apply the non-scanning voltage to the segment electrodes X.sub.1, X.sub.5, . . . X.sub.m.
When the segment electrode X is scanned in the above-mentioned manner, a voltage as shown by a waveform in FIG. 17(b) is induced at the detection electrode of the detection pen 108. The induction voltage is amplified in the amplifier 109 and then converted into a binary signal as shown by a waveform in FIG. 17(c). Then a peak time "T" of the induction voltage is obtained from the rise-time "T" and the fall-time "T.sub.2 " of the obtained binary signal to calculate the x-coordinate value designated by the tip end of the detection pen 108.
The induction voltage actually obtained through the segment electrode scanning has a waveform as shown by a waveform (d) in FIG. 18, where noise components F and R are detected at the scanning start time and at the scanning end time.
FIG. 18 shows a waveform (e) obtained by differentiating twice the induction voltage signal (referred to as the "detection signal" hereinafter) as shown by a waveform (d) in FIG. 18 in the amplification stage of the amplifier 109 to obtain a binary pulse as narrow as possible.
The voltage induced at the detection pen 108 when the detection pen 108 is placed on the LCD panel 101 ideally has a waveform as shown by a waveform (c) in FIG. 18. A detection signal having such an ideal waveform can be obtained when scanning the electrodes placed in the upper position closer to the detection pen 108 as in the case of the common electrode Y as shown in FIGS. 15, 17(a), and 19.
However, when scanning the electrodes placed in the lower position farther from the detection pen 108 as in the case of the segment electrode X, there is obtained a detection signal having the undesirable induction noise peaks (referred to as the "induction noise peak" hereinafter) F and R induced due to a voltage induced at the electrode (common electrode Y) placed closer to the detection pen 108 in addition to the peak S (referred to as the "detection peak" hereinafter) formed based on the electrode scanning signal as shown by a waveform (d) in FIG. 18.
Therefore, when scanning a portion near the segment electrode X.sub.1 or a portion near the segment electrode X.sub.m located at end portions of the LCD panel 101, the detection signal peak S appears at the time of starting or ending the scanning in the x-coordinate detection period. Therefore, the induction noise peak F or the induction noise peak R is superimposed on the detection signal peak S to result in a problem that the accuracy in detecting the x-coordinate by means of the tip end of the detection pen is degraded.
The induction noise peaks F and R as described above appear as follows.
Since the resistance of the on-resistors r.sub.c1 and r.sub.c5 (=about 1 k.OMEGA.) and the electrode resistance r of the common electrode Y as shown in FIG. 19 are great, when the segment electrode X in the lower position is scanned while switching the switch units S.sub.1, S.sub.2, . . . S.sub.m of the segment electrode drive circuit 103 successively to the voltage V.sub.5, e.g., when the segment electrodes X.sub.2, X.sub.3, and X.sub.4 are scanned, a current i caused by the scanning voltage applied to the segment electrodes X.sub.2, X.sub.3, and X.sub.4 flows through the segment electrodes X.sub.2, X.sub.3, and X.sub.4 by way of a floating capacitance C (about 10 pF/mm.sup.2) between the segment electrode X and the common electrode Y as shown by the arrow in FIG. 19 and then to the DC power supply circuit 112 by way of the on-resistor r.sub.s5 inside the segment electrode drive circuit 103.
Therefore, the voltage at the common electrode Y which should be the non-scanning voltage V.sub.1 shifts slightly to the scanning voltage V.sub.5 (to the lower voltage side) of the segment electrode X as shown by a waveform (a) in FIG. 18.
Therefore, when the detection pen 108 is put close to the LCD panel 101 in the condition as shown in FIG. 19, there is induced a voltage as shown by the waveform (d) in FIG. 18 containing the wavy induction noise peaks F and R as shown by the waveform (b) in FIG. 18 attributed to the voltage induced at the common electrode Y as shown by the waveform (a) in FIG. 18 in addition to the detection signal peak S at the detection electrode of the detection pen 108. As a result, the output signal from the amplifier 109 is to have a waveform (e) as shown in FIG. 18.
In contrast to the fact that the common electrode Y placed in the upper position directly faces the detection electrode of the detection pen 108, the segment electrode X placed in the lower position faces the detection electrode of the detection pen 108 by way of a gap attributed to the common electrodes Y. Therefore, the electrostatic coupling force between the common electrode Y and the detection electrode of the detection pen 108 is much greater than the electrostatic coupling force between the segment electrode X and the detection electrode. Therefore, despite that the voltage at the common electrode Y shifted toward the side of the lower voltage is extremely low as shown by the waveform (a) in FIG. 18, the voltage induced at the detection electrode based on the slight voltage variance has the same level as that of the detection signal peak S.
When the detection pen 108 is located in the center position of the LCD panel 101, the induction noise peaks F and R can be separable from the detection signal peak S as shown by the waveform (d) in FIG. 18, and therefore the induction noise peaks F and R exert less influence.
However, when the detection pen 108 is located near the segment electrode X.sub.1 or the segment electrode X.sub.m, the detection signal peak S and the induction noise peaks F and R are superimposed on each other, the detection signal peak S is to have a complicatedly distorted waveform. Therefore, even when the detection signal is converted into a binary signal, the correct x-coordinate of the tip of the detection pen 108 cannot be detected.
Particularly, the induction noise peak R has a polarity reverse to that of the detection signal peak S. Therefore, when the detection pen 108 is located near the segment electrode X.sub.m, the detection signal peak S and the induction noise peak R having opposite polarities are superimposed on each other to lower the level of the detection signal peak S to significantly reduce the coordinate detection accuracy. In an extreme case, the x-coordinate value cannot be detected.
USPTO Backgrounds
USPTO Backgrounds