The present invention relates to a lead frame for a resin sealed semiconductor device in which a sealing resin remaining in a gate runner portion can be removed with ease.
A lead frame used in a resin sealed semiconductor device is conventionally required to have good adhesion to a sealing resin in order to prevent invasion of moisture through a gap between the sealing resin and the lead frame. Also, the lead frame is required to have corrosion resistance in order to prevent corrosion due to moisture. For the purpose of meeting such requirements, many of the conventional lead frames are provided with gold plate as the outermost layer on their bodies.
Now, the structure of the conventional lead frame for a resin sealed semiconductor device will be described with reference to the accompanying drawing.
FIG. 7 is a plan view of the conventional lead frame for a resin sealed semiconductor device. As is shown in FIG. 7, the conventional lead frame for a resin sealed semiconductor device comprises a die pad 1, die-pad supports 2 for supporting the die pad 1, inner leads 3, dam-bars 4 for connecting the inner leads 3, outer leads 5 connected with the inner leads 3, and an outer frame 6 for externally supporting these elements. An area extending outward from substantially the base of the die-pad support 2 of this lead frame and extending further along the outer side of the outer frame 6 (i.e., an area surrounded with broken lines in FIG. 7) works as a gate runner portion 7 for allowing the sealing resin to flow to a cavity in a resin sealing procedure. Also, the gate runner portion 7 is provided with pilot holes 8 for positioning and removal of the sealing resin. This conventional lead frame for a resin sealed semiconductor device is made from a body including copper (Cu) (or a copper alloy) as a substrate metal, and bearing a nickel (Ni) layer and a palladium (Pd) layer as underlying plate layers and a gold (Au) layer as the outermost layer.
A semiconductor device is manufactured by using such a lead frame for a resin sealed semiconductor device as follows:
First, a semiconductor chip is mounted on the die pad 1 of the lead frame for a resin sealed semiconductor device, and the semiconductor chip is electrically connected with the inner leads 3 of the lead frame through wires. Then, an area including the semiconductor chip, the die pad 1, the inner leads 3 and the die-pad supports 2 is sealed with a sealing resin. The sealing resin is injected through the gate runner portion 7 of the lead frame, and the sealing resin remains in the gate runner portion 7 after completing the resin sealing procedure. The sealing resin thus remaining in the gate runner portion 7 of the lead frame is peeled by, for example, punching the pilot holes 8 from the rear face, and subsequent procedures for marking, lead-cutting and lead-forming are carried out.
The conventional lead frame for a resin sealed semiconductor device has, however, the following problem:
The lead frame made from a Cu material bears the Ni layer, the Pd layer and the Au layer successively formed on the surface thereof, and the outermost layer is the Au layer. This Au layer can advantageously improve the adhesion to the sealing resin and prevent the invasion of moisture, but the Au layer also causes a trouble in removing the sealing resin remaining in the gate runner portion 7 in the subsequent procedure. This is because Au has good adhesion to an epoxy sealing resin. When the sealing resin remaining in the gate runner portion 7 and rigidly adhered to the lead frame is to be removed, it is necessary to punch the pilot holes 8 from the rear side with a larger force. This large punching force can disadvantageously deform the lead frame itself.
As a conventional countermeasure against this problem, the gate runner portion is provided with a resin tape or a metal layer having poor adhesion to the sealing resin. However, such addition of another element to the lead frame can lead to restriction in the manufacture of the lead frame and can increase time and cost for the manufacture.
USPTO Backgrounds
USPTO Backgrounds