1. Field of the Invention
The present invention relates to a memory module including a printed circuit board (PCB), and more particularly, to a volatile memory module and PCB such as a Dynamic Random Access Memory (DRAM) or a Static Random Access Memory (SRAM) module.
2. Description of Related Art
A conventional memory module configured for installation in a personal computer (PC), a system server, or a communication switching system typically includes an off-chip printed circuit board (PCB) equipped with a memory integrated circuit (IC). The memory module further typically includes a connector for connecting the memory module to an external device. The connector exchanges an electrical data query (DQ) signal with the external device to read data from and record data to the memory chip.
Without a damping resistor between a Synchronized DRAM (SDRAM) and an edge tab, a signal reflection (such as overshooting or undershooting of the DQ signal) may occur. A damping chip that can prevent over/undershooting is therefore generally included in the memory module.
FIG. 5 is a schematic diagram of a conventional memory module. As shown in FIG. 5, a conventional memory module includes a rectangular, panel-type PCB 1100 having a length greater than a height thereof. Memory chips 1110 are arranged in a single line along the length of the PCB 1100 and connectors 1130 are formed along a lower edge of the PCB 1100. Damping chips 1120 are arranged between the connectors 1130 and the memory chips 1110, to prevent over/undershooting of the DQ (data input/output) signal. This memory module configuration increases the memory capacity of the system but limits the ability to reduce the size of the memory module to accommodate smaller system implementations. In particular, since the damping chips 1120 are positioned between the memory chips 1110 and the connectors 1130, there is a limit to the amount by which the memory module height can be reduced and, in turn, to the reduction in a size of the device where the memory module is configured to be inserted.
USPTO Backgrounds
USPTO Backgrounds