The present invention relates to the manufacture of a substrate, such as a glass substrate, that may be used in forming a semiconductor-on-insulator (SOI) structure.
To date, the semiconductor material most commonly used in semiconductor-on-insulator structures has been silicon. Such structures have been referred to in the literature as silicon-on-insulator structures and the abbreviation “SOI” has been applied to such structures. SOI technology is becoming increasingly important for high performance thin film transistors, solar cells, and displays, such as, active matrix displays. SOI structures may include a thin layer of substantially single crystal silicon (generally 0.1-0.3 microns in thickness but, in some cases, as thick as 5 microns) on an insulating material.
For ease of presentation, the following discussion will at times be in terms of SOI structures. The references to this particular type of SOI structure are made to facilitate the explanation of the invention and are not intended to, and should not be interpreted as, limiting the invention's scope in any way. The SOI abbreviation is used herein to refer to semiconductor-on-insulator structures in general, including, but not limited to, silicon-on-insulator structures. Similarly, the SiOG abbreviation is used to refer to semiconductor-on-glass structures in general, including, but not limited to, silicon-on-glass structures. The SiOG nomenclature is also intended to include semiconductor-on-glass-ceramic structures, including, but not limited to, silicon-on-glass-ceramic structures. The abbreviation SOI encompasses SiOG structures.
Various ways of obtaining SOI structures wafer include epitaxial growth of silicon (Si) on lattice matched substrates. An alternative process includes the bonding of a single crystal silicon wafer to another silicon wafer on which an oxide layer of SiO2 has been grown, followed by polishing or etching of the top wafer down to, for example, a 0.05 to 0.3 micron layer of single crystal silicon. Further methods include ion-implantation methods in which either hydrogen or oxygen ions are implanted either to form a buried oxide layer in the silicon wafer topped by Si in the case of oxygen ion implantation or to separate (exfoliate) a thin Si layer to bond to another Si wafer with an oxide layer as in the case of hydrogen ion implantation.
The former two methods have not resulted in satisfactory structures in terms of cost and/or bond strength and durability. The latter method involving hydrogen ion implantation has received some attention and has been considered advantageous over the former methods because the implantation energies required are less than 50% of that of oxygen ion implants and the dosage required is two orders of magnitude lower.
U.S. Pat. No. 5,374,564 discloses a process to obtain a single crystal silicon film on a substrate using a thermal process. A silicon wafer having a planar face is subject to the following steps: (i) implantation by bombardment of a face of the silicon wafer by means of ions creating a layer of gaseous micro-bubbles defining a lower region of the silicon wafer and an upper region constituting a thin silicon film; (ii) contacting the planar face of the silicon wafer with a rigid material layer (such as an insulating oxide material); and (iii) a third stage of heat treating the assembly of the silicon wafer and the insulating material at a temperature above that at which the ion bombardment was carried out. The third stage employs temperatures sufficient to bond the thin silicon film and the insulating material together, to create a pressure effect in the micro-bubbles and to result in a crystalline rearrangement, and to cause a separation between the thin silicon film and the remaining mass of the silicon wafer. (Due to the high temperature steps, this process does not work effectively with lower cost glass or glass-ceramic substrates.)
U.S. Pat. No. 7,176,528 discloses a process that produces an SiOG structure. The steps include: (i) exposing a semiconductor wafer (e.g., a silicon wafer) surface to hydrogen and/or helium ion implantation to create a bonding surface; (ii) bringing the bonding surface of the wafer into contact with a glass substrate; (iii) applying pressure, temperature and voltage to the wafer and the glass substrate to facilitate bonding therebetween; and (iv) cooling the structure to a common temperature to facilitate separation of the glass substrate and a thin layer of silicon from the silicon wafer.
The resulting SOG structure includes a glass or glass ceramic substrate having a bulk layer, an enhanced positive ion concentration layer, and a reduced positive ion concentration layer. The enhanced positive ion concentration layer contains positive ions from the reduced positive ion concentration layer as a result of migration. An oxide layer is located between the reduced positive ion concentration layer of the substrate and the thin layer of silicon from the silicon wafer. The reduced positive ion concentration layer is stable over time even if the SOG structure is heated to an elevated temperature comparable to, or even to some extent higher than, that used in the bonding process. Having been formed at an elevated temperature, reduced positive ion concentration layer is especially stable at the normal operating and formation temperatures of SOG structures. These considerations ensure that alkali and alkaline-earth ions will not diffuse back from the oxide glass or oxide glass-ceramic into the silicon layer during use or further device processing.
While the barrier functionality (preventing positive ion migration back from the oxide glass or oxide glass-ceramic, through the reduced positive ion concentration layer, and into the silicon layer) is desirable in some applications, the cost to achieve the bulk layer, the enhanced positive ion concentration layer, and the reduced positive ion concentration layer in the glass substrate is substantial. Indeed, the process described in U.S. Pat. No. 7,176,528 requires the bonding of some type of semiconductor material onto the glass substrate, and at least a portion of the semiconductor material remaining as part of the final structure.
It has been discovered, however, that a more economical approach to producing the bulk layer, the enhanced positive ion concentration layer, and the reduced positive ion concentration layer in the substrate may be achieved using various embodiments of the present invention.
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