This invention relates to high frequency amplifiers, and more particularly to high frequency, bi-polar, push-pull broad band amplifier output circuit arrangement.
High frequency push-pull amplifiers are well known and are frequently utilized as power amplifiers. However, such push-pull amplifiers have problems concerning their output frequencies. In many push-pull circuits there is a tendency to develop destructive parametric oscillations. Also, excessive harmonics are also developed which limit the efficiency of the amplifier. The spurious emission problems are especially of concern when the push-pull amplifier is operated in conjunction with a low pass filter. Such low pass filters are often provided on the output port of the amplifier to suppress the harmonic frequency output. These spurious emissions are generally of the low frequency parametric type and appear as side bands about the desired signal frequency. They generally occur when a harmonic of the desired signal is terminated by a series resistance in the low pass filter.
Various circuits have attempted to improve the efficiency of high frequncy push-pull amplifiers by modifying the circuit and adding additional components. One such arrangement is described in U.S. Pat. No. 3,821,655. This patent recognizes that the push-pull amplifier has excessive second harmonic voltages and also that it tends to develop destructive parametric oscillations. The second harmonic voltages are reduced by placing a capacitor across each transistor. The value of the capacitor is set so that in combination with the output inductance of the semiconductor transistor, it forms a resonant circuit which resonates at approximately the frequency of the second harmonic of the output signal. The parametric osciallations are minimized by providing an input circuit which has an impedance which matches the input impedance of the amplifier.
Another approach to reducing the spurious higher harmonics of signal oscillations is provided in U.S. Pat. No. 2,931,986. In that arrangement, an impedance which is low with respect to the signal frequencies but high with respect to the higher harmonics to be repressed, is connected in a common circuit between the input transformer and the corresponding electrodes of the two transistors.
While each of these, as well as other arrangements, have tried to address the problem of harmonic and parametric oscillations, thus far, no complete solution to this problem has yet been suggested.
USPTO Backgrounds
USPTO Backgrounds