A semiconductor package includes a semiconductor die attached to a lead frame and electrically connected to leads of the lead frame. A package encapsulate, for example, mold compound protects the semiconductor die from outside operating environment. Some high precision analog devices (e.g., data converters, amplifiers, voltage or current references, sensors, etc.) may suffer a reduction in the precision of various parametric as a result of packaging the semiconductor die. Such reduction in precision may manifest itself as an increase in parametric distributions (e.g., distributions of offset voltages, reference voltages, etc.) which, in turn limits how narrowly certain parameters can be specified for the semiconductor package. One main reason for stresses in the semiconductor package is the filler particles in the mold compound. Typically, 80-90% of the mold compound is composed of filler particles. The mold compound also has epoxy resin and hardeners. A coefficient of thermal expansion (CTE) is substantially different for the filler particles and the resin. Because the resin and the filler particles have substantially different values for CTE, the semiconductor package can experience local stress variations across the semiconductor die due to temperature changes.
USPTO Backgrounds
USPTO Backgrounds