1. Field of the Invention
The present invention relates generally to electronics and semiconductor circuits.
2. Description of the Background Art
A logic analyzer is an important tool for engineers to debug digital systems. A typical logical analyzer tool is an expensive piece of equipment which requires set up time to configure probe pins, and so forth.
Applicants have observed that these logic analyzer tools are in a difficult race to keep up with rising on-chip frequencies. Rising on-chip frequencies are problematic because the logic analyzer tools are subject to constraints because of their limited bandwidth for capturing data signals.
Prior solutions for monitoring internal chip nodes may involve on-chip routing of trace/monitor data signals to an output chip port or temporary storage of the data signals in on-chip random access memory (RAM) buffers with limited storage capacity. In either case, valuable integrated circuit pins are needed to bring the data signals out so that the logic analyzer tool may capture them. Moreover, dedicated monitor pins are typically not available in production systems, making debugging even more difficult for field failures.
It is highly desirable to overcome the above-discussed limitations and difficulties with using logic analyzers to debug digital systems.
USPTO Backgrounds
USPTO Backgrounds