The disclosed invention relates generally to three-state bus drivers, and is directed more particularly to a testable, fault tolerant circuit macro three-state bus driver that is capable of being disabled and is suitable for reconfigurable very large scale integrated (VLSI) and wafer scale integrated circuit applications.
Three-state bus drivers are commonly utilized to couple a circuit, such as a computer peripheral device, to a bus that is shared by other circuits but not at the same time. For example, each input port to the bus from each circuit would be coupled to the bus via a three-state bus driver which would be appropriately controlled so that only one input port would be enabled relative to each line of the bus at any given time. All other three-state drivers connected to that bus line would be in the open circuit or high impedance state.
A consideration with the use of three-state drivers is that failure typically requires physical replacement in applications where discrete drivers are used, and can result in a non-usable bus or system in VLSI and wafer scale applications.
USPTO Backgrounds
USPTO Backgrounds