(a) Field of the Invention
The present invention relates to a display device using a demultiplexer. More specifically, the present invention relates to a display device for performing demultiplexing via a sample/hold circuit.
(b) Description of the Related Art
A display device generally requires a scan driver for driving scan lines and a data driver for driving data lines. The data driver has as many output terminals as it has data lines to convert digital data signals into analog signals and apply them to all of the data lines. In general, the data driver is configured with a plurality of integrated circuits (ICs). The plurality of ICs are used to drive all of the data lines given that a single IC is limited in the number of output terminals it contains. Demultiplexers may be adopted, however, to reduce the number of data driver ICs.
For example, a 1:2 demultiplexer receives data signals that are time-divided and applied by the data driver through a signal line. The demultiplexer divides the data signals into two data groups and outputs them to two data lines. Therefore, usage of a 1:2 demultiplexer reduces the number of data driver ICs by half. The recent trend with liquid crystal displays (LCDs) and organic electroluminescent displays is to mount the ICs for the data driver on the panel. In this instance, there is a greater need to reduce the number of data driver ICs.
Under current technology, when the IC for the demultiplexer, the data driver, and the scan driver is manufactured to be directly mounted on the panel, power supply points, power supply lines, and power wiring are formed as shown in FIG. 1 to supply power to the pixels.
Referring to FIG. 1, a left scan driver 20 is provided on a display area 10 for applying select signals to select scan lines SE1 to SEm, and a right scan driver 30 is provided on the display area for applying signals for controlling light emission to emit scan lines EM1 to EMm. A demultiplexer unit 40 and a data driver 50 are also provided on the display area for applying data signals to data lines D1 to Dm. In this instance, vertical lines 60 are formed for supplying power supply voltages to the respective pixels, and a power line 70 coupled to each vertical line 60 on the top of the substrate is formed in the horizontal direction. Power line 70 and an external power supply line 80 surrounding scan drivers 20, 30 are coupled through a power supply point 90.
In this instance, since the current flows through power line 70 and vertical line 60 when a power supply voltage is used in the pixels, a voltage drop (i.e., an IR drop) is generated in power line 70 and vertical line 60 because of parasitic resistance in power line 70 and vertical line 60. The further along power line 70 and vertical line 60 from power supply point 90, the greater the voltage drop that is generated, the generated voltage drop being the greatest near the center of power line 70 and near the bottom of vertical line 60.
In general, since the pixels have characteristic deviations of driving transistors, it is generally required to obtain a margin of the saturation area in the characteristic curve of the driving transistors. However, when a great voltage drop is generated, power consumption is increased due to a general need to enlarge the power supply voltage to obtain a sufficient margin of the saturation area. Also, when sample/hold circuits are used for 1:N demultiplexing in the demultiplexer, it is generally required to sample the data current which corresponds to a data line during a 1/N time of a particular horizontal period, shortening the sampling time, and hindering an appropriate sampling of the data current.
USPTO Backgrounds
USPTO Backgrounds