1. Field of the Invention
The present invention relates generally to semiconductor circuitry and, more particularly, to circuitry which includes memory devices.
2. Description of the Related Art
Advances in semiconductor manufacturing technology have provided computer chips with integrated circuits that include many millions of active and passive electronic devices, along with the interconnects to provide the desired circuit connections. As is well-known, most integrated circuits include laterally oriented active and passive electronic devices that are carried on a single major surface of a substrate. Active devices typically include transistors and passive devices typically include resistors, capacitors, and inductors. However, these laterally oriented devices consume significant amounts of chip area.
For example, a typical computer system includes a main computer chip with a processor circuit, a control circuit, and a memory cache that are carried on a single major surface of a substrate. The typical computer system also includes main memory which is positioned on a separate memory chip outside the main computer chip. Since the memory cache is positioned on the same substrate as the processor and control circuits in the main computer chip, it is often referred to as embedded memory.
The memory cache typically includes fast and expensive memory cells, such as Static Random Access Memory (SRAM) cells, and the main memory typically includes slower and less expensive Dynamic Random Access Memory (DRAM) cells. Both SRAM and DRAM cells are larger than the devices included in the processor and control circuits, with SRAM cells being much larger than DRAM cells. As is well-known in the art, cache memory (L1 cache or L2 cache, for example) is used to store information from a slower storage medium or subsystem, such as the main memory or peripherals like hard disks and CD-ROMS, that is accessed frequently to increase the operation of the main computer chip.
One reason the operation of the main computer chip is increased because its idle time is reduced. For example, when the processor circuit accesses the main memory, it does so in about 60 nanoseconds (ns). However, a typical processor circuit can have cycle times of about 2 nanoseconds. Hence, there are about 30 wasted cycles while the processor circuit accesses the main memory. As a result, the processor circuit is idle for many cycle times while it accesses the main memory.
The processor circuit, however, can access the cache memory in about 10 ns to 30 ns, so the idle time is significantly reduced if the information needed is stored in the cache memory. The access time of the processor circuit to a hard disk is even slower at about 10 milliseconds (ms) to 12 ms, and the access time to a CD-ROM drive is about 10 times greater than this. Hence, cache memory uses a small amount of fast and expensive memory to allow the processor circuit faster access to information normally stored by a large amount of slower, less-expensive memory.
With this in mind, it seems like the operation of the computer system can be speeded up even more by increasing the size of the cache memory so that it operates as the main memory or by embedding the main memory on the same substrate as the processor and control circuit and eliminating the cache memory altogether. However, there are several problems with doing this.
One problem with doing this is cost. As mentioned above, the SRAM cells included in cache memory are larger and expensive, so increasing the size of the cache memory would significantly increase the cost of the computer chip. DRAM cells are less expensive and smaller, but to embed them with the main computer chip will still significantly increase the cost. One reason the cost increases for both embedded SRAM and DRAM cells is because the number of masks needed to fabricate the main computer chip increases. For example, to embed SRAM and DRAM memory cells with the main computer chip would require about 3-4 and 6-8 extra masks, respectively. This is because the masks used to fabricate the processor and control circuitry are not compatible with the masks used to fabricate SRAM and DRAM memory cells. Another reason the cost increases is because, as discussed below, the yield in manufacturing computer chips decreases as the size of the computer chip increases.
Another problem is that in today's computer systems, the size of the main memory is much larger than the size of the cache memory. For example, in current state of the art systems, the main memory can store 256 MB to 1 GB in a single memory chip, but the cache memory can only store about 1 MB to 2 MB. This is because the size of the memory circuitry needed to store information in SRAM is much larger than that needed for DRAM. A conventional SRAM circuit includes six transistors to store one bit of information and a conventional DRAM circuit includes one transistor and one capacitor, which tend to be large, to store one bit of information.
For example, the size of a conventional embedded SRAM cell is about 70-120 F2 and the size of a conventional DRAM memory cell is about 15 F2. As is known in the art, 1 F is the minimum photolithographic feature size. Hence, if the computer chip is being fabricated using 90 nm lithography, then 1 F corresponds to 90 nm and 1 F2 corresponds to an area that it 90 nm by 90 nm in size. If the computer chip is being fabricated using 60 nm lithography, then 1 F corresponds to 60 nm and 1 F2 corresponds to an area that it 60 nm by 60 nm in size. Thus, to increase the size of the cache memory by increasing the number of SRAM cells included therein would significantly increase the size of the computer chip and decrease its yield. Further, most of the area on the computer chip will be occupied by memory circuitry instead of processor and control circuitry.
This presents several problems. As mentioned above, one problem is that the yield of computer chips in a manufacturing run decreases as their size increases. As is well-known in the art, several computer chips are fabricated from a single large wafer in a run. The individual computer chips carried by the wafer are typically referred to as die. Once the computer chips are fabricated, the die in the wafer are diced to provide separate chips. A wafer, however, has defects distributed throughout it surface which can negatively impact the operation of the computer chips. If the computer chip is larger in size, then it is more likely to include a defect from the wafer and if the computer chip is smaller in size, then it is less likely to include a defect from the wafer. Hence, smaller computer chips are less likely to be defective. Further, if the computer chip is smaller in size, then more of them can be fabricated from a single wafer, which also decreases costs. Hence, smaller computer chips increase the yield and decrease the costs.
Another problem is that it is typically desirable to increase the number of devices included in the processor and control circuitry so that the processor can operate faster and perform more complicated operations. It is desirable for computer chips to be fast so they can process more data in a given amount of time. The speed of operation of a computer chip is typically measured in the number of instructions per second it can perform.
Computer chips can be made to process more data in a given amount of time in several ways. In one way, the computer chip can include devices which are smaller, but this requires advances in lithography and increasingly expensive manufacturing equipment. As discussed above, they can also be made faster by decreasing the time it takes to perform certain tasks, such as storing or retrieving information to and from memory or other peripherals and subsystems.
Computer chips can also be made faster by increasing the number of devices included therein so that more information can be processed in a given period of time. For example, if one processor operates on 32-bit data, then another processor that operates on 64-bit data can process information twice as fast because it can perform more instructions per second. However, the 64-bit processor will need more devices since there are more bits to process at a given time. Hence, if most of the area on the computer chip is occupied by memory cells, then there is less area for the processor and control circuitry to process data with a higher number of bits. The total area of the computer chip can be increased, but as discussed above, this decreases the yield and increases the cost.
Accordingly, it is highly desirable to provide new structures and methods for fabricating computer chips which operate faster and cost effective to fabricate.
USPTO Backgrounds
USPTO Backgrounds