In recent years, there has been an increasing demand for thin, lightweight, and fast response display devices. Correspondingly, research and development for organic EL (Electro Luminescence) displays and FEDs (Field Emission Displays) have been actively conducted.
Organic EL elements included in an organic EL display emit light at higher luminance with a higher voltage applied thereto and a larger amount of current flowing therethrough. However, the relationship between the luminance and voltage of the organic EL elements easily fluctuates by the influence of drive time, ambient temperature, etc. Due to this, when a voltage-control type drive scheme is applied to the organic EL display, it is very difficult to suppress variations in the luminance of the organic EL elements. In contrast to this, the luminance of the organic EL elements is substantially proportional to current, and this proportional relationship is less susceptible to external factors such as ambient temperature. Therefore, it is desirable to apply a current-control type drive scheme to the organic EL display.
Meanwhile, pixel circuits and drive circuits of a display device are formed using TFTs (Thin Film Transistors) composed of amorphous silicon, low-temperature polycrystal silicon, CG (Continuous Grain) silicon, etc. However, variations are likely to occur in TFT characteristics (e.g., threshold voltage and mobility). Hence, a circuit that compensates for variations in TFT characteristics is provided in a pixel circuit of an organic EL display. By the action of this circuit, variations in the luminance of an organic EL element are suppressed.
Schemes to compensate for variations in TFT characteristics in the current-control type drive scheme are broadly classified into a current program scheme that controls the amount of current flowing through a driving TFT by a current signal; and a voltage program scheme that controls such an amount of current by a voltage signal. By using the current program scheme, variations in threshold voltage and mobility can be compensated for, and by using the voltage program scheme, only variations in threshold voltage can be compensated for.
The current program scheme, however, has the following problems. First, since a very small amount of current is handled, it is difficult to design pixel circuits and drive circuits. Second, since the influence of parasitic capacitance is likely to be received while a current signal is set, it is difficult to achieve an increase in area. On the other hand, in the voltage program scheme, the influence of parasitic capacitance, etc., is very small and a circuit design is relatively easy. In addition, the influence of variations in mobility exerted on the amount of current is smaller than the influence of variations in threshold voltage exerted on the amount of current, and the variations in mobility can be suppressed to a certain extent in a TFT fabrication process. Therefore, even with a display device to which the voltage program scheme is applied, sufficient display quality can be obtained.
For an organic EL display to which the current-control type drive scheme is applied, pixel circuits shown below are conventionally known. FIG. 14 is a circuit diagram of a pixel circuit and an output switch described in Patent Document 1. In FIG. 14, a pixel circuit 120 includes transistors T1 to T4, an organic EL element OLED, and a capacitor Cs, and an output switch 121 includes transistors T5 to T8 and a capacitor C1. The pixel circuit 120 is connected to a power supply wiring line Vp, a common cathode Vcom, scanning lines G1i and G2i, and a data line Sj. A voltage V0, a data voltage Vdata, a threshold correction voltage Vpre, and a voltage Va are applied to one ends of the transistors T5 to T8, respectively. The voltage Va is a voltage close to a threshold voltage of the transistor T3.
The pixel circuit 120 operates according to a timing chart shown in FIG. 15. As shown in FIG. 15, during the first half of a threshold voltage write period, the transistors T1, T2, T5, and T7 are placed in a conducting state and the transistors T4, T6, and T8 are placed in a non-conducting state. At this time, a threshold correction voltage Vpre is applied to the data line Sj, and the same voltage is also applied to the gate and drain terminals of the transistor T3. During the second half of the threshold voltage write period, the transistor T7 is placed in a non-conducting state. At this time, charges accumulated in the capacitor Cs are discharged through the transistors T1 to T3 and thus the gate terminal potential of the transistor T3 rises to a level Vt according to the threshold voltage of the transistor T3. In addition, during the second half of the threshold voltage write period, the transistor T8 is placed in a conducting state for a predetermined period of time. By this, a voltage Va for charging a stray capacitance Cf is applied to the data line Sj and thus the gate terminal potential of the transistor T3 reaches Vt in a short time.
During a display data voltage write period, the transistors T2 and T6 are placed in a conducting state and the transistors T1, T4, T5, T7, and T8 are placed in a non-conducting state. The inter-electrode voltage of the capacitor C1 does not change upon transitioning from the threshold voltage write period to the display data voltage write period. Therefore, when the potential of one electrode of the capacitor C1 (electrode connected to the transistors T5 and T6) is changed from V0 to Vdata, the potential of the other electrode of the capacitor C1 also changes by the same amount. A potential (Vt+Vdata−V0) obtained thereby is applied to the gate terminal of the transistor T3 through the transistor T2.
During a light-emission period, the transistor T4 is placed in a conducting state and the transistors T1, T2, and T5 to T7 are placed in a non-conducting state. The capacitor Cs holds a gate-source voltage of the transistor T3 upon transitioning from the display data voltage write period to the light-emission period. Hence, during the light-emission period, the gate terminal potential of the transistor T3 remains at (Vt+Vdata−V0). The amount of current flowing through the transistor T3 is determined by the gate-source voltage thereof, and the organic EL element OLED emits light at a luminance according to the amount of current flowing through the transistor T3. Since the amount of current flowing through the transistor T3 does not depend on the threshold voltage of the transistor T3, the organic EL element OLED emits light at a luminance that does not depend on the threshold voltage of the transistor T3.
As such, by driving the pixel circuit 120 by the method shown in FIG. 15, without providing a threshold correction capacitor in the pixel circuit 120, a potential according to the threshold voltage of the transistor T3 is applied to the gate terminal of the transistor T3, and thus, the organic EL element OLED is allowed to emit light at a desired luminance, regardless of the threshold voltage of the transistor T3.
FIG. 16 is a circuit diagram of a pixel circuit described in Patent Document 2. A pixel circuit 130 shown in FIG. 16 includes transistors M1 to M6, an organic EL element OLED, and a capacitor Cst. The pixel circuit 130 is connected to a power supply wiring line Vp, a common cathode Vcom, a precharge line to which an initial voltage Vint is applied, scanning lines GAi and GBi, and a control line Ei and a data line Sj. The pixel circuit 130 operates according to a timing chart shown in FIG. 13 (described later). The operation of the pixel circuit 130 is the same as that of a pixel circuit according to a second embodiment of the present invention and thus description thereof is omitted here. By driving the pixel circuit 130 by the method shown in FIG. 13, a potential according to a threshold voltage of the transistor M1 is applied to a gate terminal of the transistor M1, and thus, the organic EL element OLED is allowed to emit light at a desired luminance, regardless of the threshold voltage of the transistor M1.
Note that, in addition to the examples shown above, an example of the organic EL display is also described in another application (International Patent Application No. PCT/2007/69184, Filing Date: Oct. 1, 2007, Priority Date: Mar. 8, 2007) having a common applicant and a common inventor with the present application.
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