The present invention relates generally to an electronic package. A particular application for this package is in the implementation of programmable logic devices (PLD) such as field programmable gate arrays (FPGA) and the invention will be described in that context.
A FPGA is a PLD containing a large number of small programmable logic elements, a number of input/output (I/O) terminals, and a method of specifying electrical connections between the logic elements through a distributed array of programmable switches. The programming of the logic elements and the switches is typically specified by configuration bits stored in a configuration random access memory (CRAM). A FPGA allows a design engineer to realize a design of a product by programming its connections in a specific manner without incurring the high cost of manufacturing a unique integrated circuit. A variety of FPGAs are described in S. D. Brown, R. J. Francis, J. Rose, and Z. G. Vranesic, Field-Programmable Gate Arrays, (Kluwer Academic Publishers 1992); J. H. Jenkins, Designing with FPGAs and CPLDs, (PTR Prentice-Hall 1994); J. V. Oldfield and R. C. Dorf, Field Programmable Gate Arrays, (Wiley-Interscience 1995).
USPTO Backgrounds
USPTO Backgrounds