1. Field of the Invention
This invention relates to a delay line device which may be used for effecting timing-control, phase-correction and so forth with respect to circuits incorporated in electronic equipment, which handle digital signals, such as electronic computers, office-automation equipment or the like, and more particularly it pertains to a lumped constant type delay line device and method of making same.
2. Description of the Prior Art
In order to have a better understanding of the present invention, description will first be made of a conventional lumped constant type delay line device with reference to FIGS. 1 to 3 of the accompanying drawings. The conventional lumped constant type delay line device is constructed by using coils 10 and capacitors 20 as shown in FIG. 1.
FIG. 2 illustrates, by way of example, the construction of such conventional lumped constant type delay line device, prior to encapsulation with a plastic material. More specifically, in the illustrated construction, a plurality of capacitors 20 are soldered to wiring patterns printed on the bottom surface of a printed circuit board 30; a plastic sheet 40 formed with a plurality of apertures 42 is adhered to the top surface of the printed circuit board 30; and a plurality of coils 10 wound on cores 50 of a magnetic material such as, for example, ferrite, are positioned by the apertures 42 of the plastic sheet 40 and mounted on the top surface of the printed circuit board 30. Lead wire 12 of the coil 10a at the input end, lead wire 14 of the coil 10b at the output end, and taps 16 of the respective coils 10 are connected, by soldering, to the printed wiring patterns of the printed circuit board 30 and then to terminals 82 respectively.
In assembling such delay line device, it has heretofore been the practice to take the following procedures:
First, the coils 10 are successively wound onto the cores 50 while the taps 16 are being taken out, as shown in FIG. 3, and then each of the taps 16 is twisted and pre-soldered at the free end thereof. Meanwhile, the capacitors 20 are attached, by soldering, onto the bottom surface of the printed circuit board 30; the plastic sheet 40 is adhered to the top surface of the printed circuit board 3, with the apertures 42 thereof being located at the positions corresponding to the cores 50; and then the cores 50, which are coupled to each other through wires of the coils, are fitted in the respective apertures 42 and adhered to the top surface of the printed circuit board 30. Subsequently, the lead wires 12, 14 and taps 16 of the coils are led out and soldered to predetermined connection points in the printed wiring patterns.
Thereafter, the printed circuit board 30, which has the coils 10 and capacitors 20 mounted thereon, is placed in such a manner that the terminals 82 can be held between two rows of lead frames, and the printed wiring patterns are soldered to the terminals 82 at the connection points where the lead wires 12, 14 and taps 16 have been soldered. Unwanted portions of the reed frames are then cut off, and in this way the construction of delay line device such as shown in FIG. 2 is realized.
However, the above-described conventional construction wherein the plurality of cores 50 are connected together through the lead wires of the coils 10, is disadvantageous in that the fact that it includes the elongated taps 16 and the lead wires 12, 14 at the input and output ends, makes it very difficult to automate the operation of soldering the elongated taps 16 and lead wires 12, 14; thus, it has heretofore been the practice that such troublesome soldering operation is manually performed, resulting in a low productivity.
As viewed process-wise, the prior art is also disadvantageous not only in that the steps of achieving the connection between the printed circuit board and the lead frames are complicated, but also in that the sheet 40 is required for positioning the cores. Another disadvantage is such that it is likely that since the capacitors 20 are mounted onto the surface of the flat printed circuit board 30, the positions where the capacitors 20 are to be mounted, tend to be deviated during the step of soldering the capacitors 20 to the printed wiring patterns, and short-circuting tends to be caused by flow of solder.
USPTO Backgrounds
USPTO Backgrounds