In recent years, high integration of semiconductor devices has been prompted. Meanwhile, when a plurality of highly-integrated semiconductor devices is arranged on a horizontal plane and is connected by wires for production, an increase in a wire length increases wire resistance and a wire delay.
To overcome this problem, the use of a three-dimensional integration technique has been proposed which stacks semiconductor devices in three dimensions. In the three-dimensional integration technique, for example, a bonding system is used to bond two semiconductor wafers (hereinafter, simply referred to as “wafers”) together. For example, the bonding system includes a surface hydrophilization device, which hydrophilizes bonding surfaces of substrates, and a bonding device which bonds the substrates whose surfaces are hydrophilized by the surface hydrophilization device. In the bonding system, the surface hydrophilization device supplies pure water onto the surfaces of the substrates to hydrophilize the surfaces, and subsequently, the bonding device bonds the substrates together by virtue of the Van der Waals force and a hydrogen bonding (intermolecular force).
Stably bonding the two wafers requires preventing a misalignment between relative positions of the two wafers to be bonded. Typically, an inspection operation for a bonding state of the wafers has been performed by, e.g., moving an image pickup camera in horizontal and vertical directions and measuring reference points formed on the wafers by the image pickup camera. Unfortunately, a conventional inspection device used in this inspection operation requires a triaxial moving equipment, which causes an increase in the size of the inspection device.
USPTO Backgrounds
USPTO Backgrounds