1. Field of the invention
The present invention relates to an arithmetic logic system, and more specifically to a test circuit for a carry look-ahead circuit incorporated in the arithmetic logic system.
2. Description of related art
One recent large demand to data processing apparatuses such as microprocessors is to be able to process a large amount of data at a high speed. Considering this demand on arithmetic logic systems contained in the microprocessors, a high speed processing of a large amount of data is not so easy becuase it needs an increased capacity of carry lines. As one means for solving this problem, a carry look-ahead has been proposed.
In fact, this carry look-ahead can speed up the operation of the arithmetic logic system. However, in the case that a carry look-ahead circuit is used in the microprocessors, since the carry look-ahead circuit is redundant in comparison with the conventional carry transfer circuit, it is very difficult to know a failure in the carry look-ahead circuit from the outside of the microprocessor.
Specifically, in the microprocessor having the carry look-ahead circuit, if the carry look-ahead circuit does not properly operate, the operation speed of the microprocessor is lowered. Therefore, when any failure occurs in the carry look-ahead circuit, if a dispersion or scattering of the operation speed can be observed from the outside of the microprocessor. However, the dispersion or scattering of the operation speed will occur due to various causes other than the failure in the carry look-ahead circuit. Accordingly, it is not allowed to conclude from only the dispersion or scattering of the operation speed that any failure has occurred in the carry look-ahead circuit.
USPTO Backgrounds
USPTO Backgrounds