1. Field of the Invention
The present invention relates to semiconductor integrated circuits and, in particular, to the integration of external waveshaping functions onto an integrated circuit which drives a data signal onto the twisted-pair transmission medium of a local area network.
2. Description of the Related Art
A local area network is a communication system that allows personal computers, workstations, servers, and other devices within a small area, such as a single building or a group of buildings, to transfer information between each other. Each device connected to the network communicates with other devices on the network by following a standard which defines the operation of the network. One of the most widely accepted standards for local area networks is the IEEE 802.3 Ethernet Protocol.
The IEEE 802.3 Ethernet Protocol defines four physical layer specifications which differ primarily in the physical cables utilized. Coaxial cables are defined by a Thick Coax Ethernet (10BASE5) specification, which utilizes a double-shielded coaxial cable, and a Thin Coax Ethernet (10BASE2) specification, which utilizes a single-shielded coaxial cable. Twisted pair cables are defined by a Twisted Pair Ethernet (10BASE-T) specification and a StarLAN (1BASE5) specification.
One aspect of a twisted-pair network which is defined by the twisted-pair specification is the transmit waveform of the data signal. The data signal, which is Manchester-encoded, is shaped in accordance with the twisted-pair specification both to generate a defined amplitude step when the data signal transitions from either a logic one to a logic zero or from a logic zero to a logic one and to attenuate the higher harmonic components of the data signal.
The data signal is typically transmitted onto a twisted-pair cable by first Manchester-encoding the data signal to forman input data signal TX+ and a complementary input data signal TX-. A delayed input data signal TXd+ and a complementary delayed input data signal TXd- are then formed in response to the input data signal TX+ and the complementary input data signal TX-, respectively, by delaying both the input data signal TX+ and the complementary data signal TX- by one-half period.
Next, the four input data signals TX+, TX-, TXd+, and TXd- are resistively combined and filtered to forman output data signal V+ and a complementary output data signal V-. The resistive combination and filtering shape the transmit waveform to provide the defined amplitude step and the required attenuation. A transmit output waveform is then generated on the twisted-pair cable by feeding the output data signals V+ and V- into a transformer connected to the twisted-pair cable.
FIG. 1 shows a block diagram that illustrates a commonly utilized circuit 2 for resistively combining and filtering the input data signals TX+, TX-, TXd+, and TXd-. As shown in FIG. 1, a transmission stage 3, which is typically packaged as an integrated circuit, drives the input data signals TX+, TX-, TXd+, and TXd- onto an external summing resistor network 4 as square-wave current signals.
The external summing resistor network 4 includes an input resistor Rt, a complementary input resistor Rct, a delayed input resistor Rdt, a complementary delayed input resistor Rcdt, and a balancing resistor Rb. The summing resistor network 4 generates both a square-wave transmit voltage signal TXO+ and a square-wave complementary transmit voltage signal TXO- by summing together the voltages generated by driving the input data signal TX+ and the complementary delayed input data signal TXd- across the input resistor Rt and the complementary delayed resistor Rcdt, respectively, and by summing together the voltages generated by driving the complementary input data signal TX- and the delayed input data signal TXd+ across the complementary input resistor Rct and the delayed input resistor Rdt, respectively.
An external filter 5, which is typically implemented as a conventional low-pass L-C filter, generates the output data signal V+ and a complementary output data signal V- by attenuating the harmonic components of both the square-wave transmit voltage signal TXO+ and the square-wave complementary transmit voltage signal TXO-.
The output data signal V+ and the complementary output data signal V- are then fed into an external 2:1 transformer 6, which isolates the preceding circuitry 3, 4, and 5 from a twisted-pair cable 7, to generate a transmitted waveform Tw on the twistedpair cable 7.
FIGS. 2A-C show a waveform diagram that illustrates an example of the transmit voltage signal TXO+, the complementary transmit voltage signal TXO-, and the transmitted waveform Tw. The transmit voltage signal TX0+ and the complementary transmit voltage signal TXO- are shown as 5 volt peak-to-peak signals centered at Vcc/2. The transmitted waveform Tw is shown as a .+-.2.5 volt differential voltage signal in accordance with the twisted-pair specification.
One problem with utilizing circuit 2 is that since the harmonic components of the square-wave data signals TX+, TX-, TXd+, and TXd- are not attenuated prior to the external filter 5, the data signals TX+, TX-, TXd+, and TXd- radiate a significant amount of harmonic switching noise as a result of the high current levels utilized by the transmission stage 3 to drive the data signals TX+, TX-, TXd+, and TXd- onto the summing resistor network 4. The magnitude of the switching noise typically results in circuit 2 failing to satisfy FCC requirements for radiated emissions.
Another problem with utilizing circuit 2 is that the external resistor summing network 4 and the external filter 5 consume a substantial area on a circuit board.
Thus, there is a need for a waveshaping circuit that can integrate the functionality of the transmission stage 3, the summing resistor network 4, and the filter 5 into a single integrated circuit, thereby eliminating the harmonic switching noise radiated by the data signals TX+, TX-, TXd+, and TXd-, and providing increased circuit board space.
In the parent application, a waveshaping circuit was described that allowed the functionality of the summing resistor network 4 and the filter 5 to be integrated with the transmission stage 3 into a single integrated circuit. The waveshaping circuit of the parent application transformed the input data signal TX+ and the delayed input data signal TXd+ into the pair of complementary sinusoidal output waveforms V+ and V- by utilizing phase-lock-loop circuitry to produce a plurality of edges within the pulse widths of the input data signal TX+ and the delayed input data signal TXd+.
Logic circuitry was utilized to produce a pair of complementary logic signals in response to each edge, and current source circuitry was utilized to produce an incremental current in response to each pair of complementary logic signals. By summing together all of the incremental currents, the pair of complementary sinusoidal output waveforms V+ and V- can be formed.
Although the phase-lock-loop circuitry provided a series of edges that fall within the pulse widths of the input data signal TX+ and the delayed input data signal TXd+, phase-lock-loops in general consume a relatively large amount of silicon real estate and are subject to varying degrees of instability as a result of transients, temperature variations, and other related conditions.
Thus, there is a need for a waveshaping circuit that can integrate the functionality of the transmission stage 3, the summing resistor network 4, and the filter 5 into a single integrated circuit, without the use of phase-lock-loop circuitry.
USPTO Backgrounds
USPTO Backgrounds