1. Field of the Invention
The present invention relates to a CMOS peak detector and AC filter and, more particularly, to a CMOS peak detector which utilizes a CMOS transmission gate as a blocking gate to eliminate the forward voltage drop associated with prior art arrangements. A positive peak detector and a negative peak detector may be used in tandem in accordance with the present invention to ascertain the DC component of a low frequency AC input signal.
2. Description of the Prior Art
Peak detectors are conventional components which have been used for many years in a variety of applications. Traditionally, a peak detector comprises an arrangement of diodes and operational amplifiers, interconnected to build a peak detector, as described in the book Operational Amplifier Characteristics and Applications, by Robert G. Irvine, Prentice-Hall, Inc., 1981 at pages 142-143. A conventional circuit follows the voltage peaks of a signal using an operational amplifier as a comparator and stores the highest value on a storage capacitor. If a higher peak signal value later occurs, this new value is stored on the capacitor. The capacitor can later be discharged to obtain the stored value. Negative peak detectors work in the same fashion, where the necessary inputs are reversed so that the capacitor retains the most negative occurring value. A problem associated with this arrangement is that a forward-biased diode is necessary between the input to the op amp and the storage capacitor to block the passage of any input voltage which is smaller than the peak voltage. This blocking diode, as it is referred to, necessarily creates a diode drop between the output of the op amp and the storage capacitor, resulting in a voltage less than the actual peak voltage passing into the capacitor.
An alternative peak detector arrangement which does not utilize a blocking diode is disclosed in U.S. Pat. No. 3,921,010 issued to R. T. Griffin on Nov. 18, 1975. The Griffin arrangement, however, is only capable of generating the positive (VDD) or negative (VSS) voltage supplies as an output, and is used primarily as an analog to digital converter, producing a "1" output for a positive peak and a "0" output for a negative peak. The Griffin arrangement, therefore, can not be used to determine the DC component of an AC input signal, since the DC level produced would always be the average value of the two power supplies, a zero-level DC signal.
The DC component of a low frequency, typically 60 Hz, AC signal is conventionally obtained in the prior art by utilizing large RC filter networks. Such networks require many stages to filter out low AC frequencies and cannot be formed in an integrated circuit, which is desirable in many applications.
A problem remaining in the prior art, then, is to provide a peak detector which does not exhibit a forward diode drop and which can be utilized as an AC filter to determine the DC component of low frequency AC input signal.
USPTO Backgrounds
USPTO Backgrounds