(1) Field of the Invention
The present invention relates to processes used to fabricate semiconductor devices, and more specifically to a process used to create an extended, self-aligned contact region, for a static random access memory, (SRAM), device.
(2) Description of Prior Art
Static random access memory, (SRAM), cells are usually designed to include six, metal oxide semiconductor field effect transistors, (MOSFET), usually four N channel, and two P channel, MOSFETs. The SRAM performance and cost objectives have been successfully addressed by the ability of the semiconductor industry to fabricate SRAM devices, using sub-micron features. The smaller features result in a decrease in performance degrading capacitances and resistances, while also allowing a greater number of smaller SRAM chips, to be obtained from a specific size starting substrate, thus reducing the manufacturing cost of a specific SRAM chip. In addition the processes and structures, needed to create metal contacts to source and drain regions, have been optimized via use of a self-aligned contact, (SAC), structure, contacting underlying source and drain regions located in the semiconductor substrate, between gate structures. The use of SAC structures, have also resulted in additional miniaturization of SRAM devices, allowing performance and cost objectives to be further enhanced.
The use of SAC structures, for contact to source and drain regions of SRAM devices, has however made it difficult to reduce the pitch between the source and drain regions, and the adjacent gate structures. The shrinking space between gate structures, has resulted in the creation of narrow SAC structures, thus resulting in SAC structures with higher resistance than counterparts fabricated using wider SAC structures. This invention will describe a new SAC design in which the SAC opening is comprised of a narrow opening, between gate structures, allowing the desirable SRAM miniaturization to be achieved, but also comprised with a wider opening component, extended to overlay a non-active SRAM region. Thus a tungsten fill of the two shaped SAC opening creates a SAC structure that offers: a low resistance local interconnect level; a narrow spacing between gate structures; and a wide landing area for an overlying metal contact structure.
Prior art, such as Kiyono, et al, in U.S. Pat. No. 5,460,995, show a contact structure, for an SRAM device, however the SAC design and process, used for this invention, were not similar to this invention.
USPTO Backgrounds
USPTO Backgrounds