This invention relates to semiconductor devices and more particularly to improvements in mesa semi-conductor devices and a process of producing the same.
In the early years mesa semiconductor devices were produced by forming the P-N junction in the semiconductor substrate through diffusion, dividing it into a plurality of pellets and etching the lateral surfaces of each pellets to form the mesa regions. In order to eliminate the necessity of separately etching and surface processing the individual pellets, an attempt was made to selectively etch a semiconductor substrate with a P-N junction to form grooves in opposite relationship on the main opposite faces thereof, applying a passivation layer to each groove for protecting the exposed portion of the P-N junction and cutting off the substrate along the grooves. That attempt was advantageous in that the etching and passivation could be effected while the substrate was still in the form of a single wafer but it was disadvantageous in that the substrate included very thin portions sandwiched between pairs of opposite grooves and therefore was relatively apt to be cracked and broken resulting in a poor yield.
Also it was known to offset such grooves on one of the main faces of a substrate from those on the other face thereof. In this measure, the number of pellets into which a single semiconductor substrate could be divided was decreased in order to maintain the same effective area for each pellet. Also it has been difficult to produce semiconductor devices with an ability to withstand high voltage.
In order to improve the process just described, it has been proposed to shallowly diffuse a conductivity type imparting impurity into a semiconductor substrate to form a P-N junction and selectively etch the substrate to form relatively shallow grooves thereon to divide the P-N junction into individual sections. Then the substrate is heated to permit the impurity to be further diffused into the substrate to form one P-N junction between each pair of adjacent grooves. Due to the second diffusion following the selective etching, there has been a danger that any deteriorating element or elements stuck to the substrate in the etching step may be diffused into the latter. In addition, that portion of the P-N junction adjacent to each groove has had a small radius of curvature and therefore tended to restrict the voltage withstood by the resulting device.
USPTO Backgrounds
USPTO Backgrounds