The present invention relates to write drivers for an inductive head in a magnetic data storage system and more particularly to write drivers that include an accurate adjustable current overshoot circuit.
Conventional storage systems include an inductive coil to write information onto a recording surface of the magnetic medium, such as a magnetic disk. The inductive coil writes information by creating a changing magnetic field near the magnetic medium. A write driver circuit is connected to the inductive coil at two terminals. During writing operations, the write driver circuit forces a relatively large current through the inductive coil to create a magnetic field that polarizes adjacent bit positions on the recording surface. Digital information is stored by reversing the polarization of selected bit positions which is done by reversing the direction of the current flow in the inductive coil.
The typical write driver circuit includes an xe2x80x9cH-bridgexe2x80x9d for controlling the direction of current flow through the inductive coil. The H-bridge includes upper xe2x80x9cpull-upxe2x80x9d bi-polar transistors and lower xe2x80x9cpull-downxe2x80x9d bi-polar transistors. The upper bipolar transistors are connected between a first supply voltage and the inductive coil terminals. The lower bipolar transistors are connected between another set of inductive coil terminals and a second supply voltage through a write current sink. The write driver circuit controls the direction of flow through the inductive coil by driving selected transistors in the H-switch between ON and OFF states, thereby applying a limited voltage swing across the inductive coil to reverse the coil""s current flow and to polarize the adjacent bit position on the magnetic medium.
The rate at which information can be stored on a recording surface through an inductive head is directly proportional to the rate at which the direction of current can be reversed in the inductive coil. The rise/fall time of the inductive coil is determined by:
di/dt=V/L
where di/dt is the rate of change of the current over time through the inductive coil, V is the available voltage across the inductive coil, and L is the inductive load. Therefore, the rate of current change through the coil is directly proportional to the available voltage across the inductive coil. The available voltage is determined by subtracting the voltage drops across the H-bridge pull-up transistors, the pull-down transistors, and the write current sink from the supply voltage.
In addition to the rate of current change through the coil, there are other coil current attributes that will affect how magnetic transitions are written to the medium. Some important coil current characteristics are shown in FIG. 6. In particular, the current""s rise time (rate of change), overshoot, undershoot, and settling time are of interest. The desired characteristics for the coil current are a fast rise time and settling time, a controllable amount of overshoot, and very little undershoot.
Of particular interest is the write current overshoot. This is the amount of current that exceeds a desired or steady state value. The write current overshoot characteristic affects how magnetic transitions are written to the disk. Too much overshoot or too little may not optimize magnetic field transitions on the magnetic media. For example, too much write current overshoot may affect magnetic transitions written on adjacent tracks, or a small overshoot may not produce the fastest magnetic transition. A circuit is required that can accurately adjust and control the amount of write current overshoot.
In FIG. 3, transistor 330, transistor 332, transistor 334, and transistor 336 form an H-bridge switch. The coil 338 is activated by current flowing through it that forms magnetic transitions on the disk. The current through the coil 338 can be switched in either direction by turning off or on the appropriate transistors. When transistor 336 and transistor 332 are turned on, current will flow through coil 338 from node 340 to node 342. Under this situation, transistor 334 and transistor 330 are turned off. To change the direction of the current through the coil from node 342 to node 340, transistor 336 and transistor 332 are turned off, and transistor 334 and transistor 330 are turned on. These transistors are controlled by write data signals, namely WHX, WHY, WLX and to WLY. The steady state coil current is determined by the write current mirror circuit 300. The write current mirror circuit 300 includes transistor 312, resistor 316, transistor 304, FET 308, capacitor 310, transistor 314, and resistor 318. A voltage at node 340 is dependent on the current IW. This current IW is adjustable, and consequently, the voltage at node 340 is adjustable. Node 340 is connected to NFET 320, which is connected to node 342. Likewise, node 340 is connected to NFET 322, which is in turn connected to node 344. The NFET 320 and NFET 322 are switches and are complementary in that only one NFET (either NFET 320 or NFET 322) is on at any one time. When NFET 320 is turned on, the voltage at node 340 is approximately the same as at node 342, the transistor 330 is turned on by the voltage at node 342, and the current ICOIL flows through resistor 346. The coil current ICOIL is the amplified current of the master current IW. The typical gain is approximately 20.
The emitter size ratio of transistors 330, 332, and 312 and the resistor size ratio of resistors 316 and 346 determine the gain of the circuit from the write current mirror circuit 300. The coil current is an amplified current of the master current IW. When the NFET 320 is turned on and the NFET 322 is off, the voltage at node 340 is approximately the voltage at node 342. Therefore, transistor 330 is on, and transistor 332 is off. At the same time that NFET 320 turns on, the signal WHY turns on transistor 334 and signal WHX turns off transistor 336. The circuitry that controls transistor 336 and transistor 334 is not shown. Of interest with the present invention is the lower H-bridge transistors, namely transistors 330 and 332.
Typically, NFET 320 and NFET 322 are very large, so consequently, the impedance between nodes 340 and 342 or node 344 is minimized. A small impedance will turn transistor 330 and transistor 332 on faster; however, the gate to drain and source capacitance is high. When either NFET 320 or NFET 322 is turned on, the gate voltage goes high, dumping charge into the base of transistor 330 or transistor 332 through the NFET""s parasitic capacitance. This extra xe2x80x9cboostxe2x80x9d of charge is amplified by transistor 330 or transistor 332 and results in excessive coil current overshoot. Furthermore, the NFET switches, namely NFET 320 and NFET 322, are not controlled by differential signals. Thus, the timing of the gate voltage is dependent on circuit layout. An asymmetric layout of signals WLX and WLY to NFET 320 or NFET 322 could cause NFET 320 and NFET 322 to turn on or off uncomplementary. As a result, the load seen by the write current mirror circuit, particularly at node 340, will change, resulting in the voltage at node 340 changing. The compensation due to capacitor 310 of the write current mirror circuit 300 is important. If the circuit 300 is not well compensated, the voltage at node 340 will change which results in an undesirable current response. Typically, the current through the coil 338 is a multiple of the master current IW with a typical gain of 1-20. Signals WLX and WLY are CMOS level signals to control NFET 320 and NFET 322. Since the signals are not completely differential, this leads to asymmetrical switching between NFET 320 and NFET 322.
The write circuit of the present invention accurately controls the current through the coil that is used to write data to the magnetic medium.
The write circuit of the present invention reduces write current overshoot when write current overshoot is not desired.
The write circuit of the present invention provides the ability to accurately adjust the amount and duration of the coil current overshoot over a wide range of write current settings and overshoot current settings.
The circuit of the present invention controls the overshoot such that the overshoot current amplitude is very insensitive to process, voltage, and temperature changes of the circuit. The write driver of the present invention has an overshoot circuit which requires few additional components. Furthermore, the overshoot circuit requires little additional power dissipation because the overshoot current is controlled at the base of the lower transistors of the H-bridge circuit.
The overshoot circuit includes a delayed write data signal (WBX, WBY) rather than a pulse. Creating a narrow pulse for the overshoot current is difficult.
USPTO Backgrounds
USPTO Backgrounds