1. Field of the Invention
The present invention relates to information writing for a nonvolatile semiconductor memory, and more particularly to a nonvolatile memory system with improved single-sector erasing.
2. Description of the Related Art
A flash memory, which is a kind of EEPROM (Electrically Erasable Programmable Read Only Memory), employs nonvolatile memory elements, such as MOSFETS, (metal-oxide semiconductor field-effect transistors), each having a control gate and a floating gate. The flash memory stores information in individual memory cells, each constituted by a MOSFET according to the transistor threshold voltage. In such a flash memory, the threshold voltage is set low (logic “0”) during the writing operation by putting the drain voltage of the nonvolatile memory element at, for example, 5 V, and by putting the word line connected to the control gate CG at, for example, −10 V as shown in FIG. 18, so as to draw electrical charge from the floating gate FG into the drain region. During an erasing operation, the threshold is set high (logic “1”) by putting the well region at −5 V, for example, and the control gate CG at a voltage as high as 10 V (logic “1”) so as to inject negative charge into the floating gate FG as shown in FIG. 19. Thus, one-bit data is stored in one memory cell.
USPTO Backgrounds
USPTO Backgrounds