1. Field of the Invention
The present invention relates to a semiconductor memory device, and is applied, for example, to a NAND flash memory.
2. Description of the Related Art
There is known a NAND flash memory as an example of semiconductor memory devices which have rapidly been gaining in popularity in recent years. One type of NAND flash memory includes a NAND memory string which is composed of a plurality of memory cells. The NAND memory string is selected by select transistors which are disposed at both ends of the NAND memory string. US 2006/0023558 A1, for instance, discloses an example of the NAND memory string and select transistors.
The select transistors function to cut off an operation voltage, such as a write voltage, which is transferred to the NAND memory string, for example, when data is written in memory cell transistors. Although the size of each memory cell transistor has been reduced and the area occupied by each memory cell transistor has been reduced from generation to generation, the operation voltage at the time of write/erase/read operations has not been decreased.
Under the circumstances, unlike the memory cell transistors, the size of each select transistor, which is required to cut off the operation voltage that is transferred to the NAND memory string, is not made finer, and the reduction in size of each select transistor is restricted in order to maintain the cut-off characteristics. For example, in the case where the gate length of the memory cell transistor is about 90 nm, the channel length of the select transistor needs to be 150 nm to 250 nm or more in order to obtain sufficient cut-off characteristics.
As described above, as regards the conventional semiconductor memory device, there is a tendency that if the area of occupation by the select transistor is reduced, the cut-off characteristics deteriorate, and the conventional semiconductor memory device is disadvantageous in terms of microfabrication.
USPTO Backgrounds
USPTO Backgrounds