Recently, in association with highly integrated semiconductor memory devices, LSI devices constituting the semiconductor memory devices have been increasingly minute. For miniaturization of this LSI device, it is requested to improve dimensional accuracy and position accuracy of a circuit pattern in addition to simply thinning a line width. As a technique to overcome such problem, there has been proposed a Resistive RAM (ReRAM) that uses variable resistive elements, which reversibly change a resistance value, as a memory. This ReRAM includes the variable resistive element between a sidewall of a word line extending parallel to a substrate and a sidewall of a bit line extending perpendicular to the substrate. This structure ensures further highly integrated memory cell array.
In the ReRAM having the bit lines extending perpendicular to the substrate, a resistance change film constituting the variable resistive element is formed at the sidewall of the bit line. However, forming this resistance change film without causing a process damage is not easy.
USPTO Backgrounds
USPTO Backgrounds