As the development and implementation of semiconductor projects becomes increasingly complex, there is often a need for additional peripheral circuitry to achieve design objectives. Some examples of peripheral circuitry may include operational and instrumentation amplifiers, filters, timers, digital logic circuits, analog-to-digital converters (“ADCs”), and digital-to-analog converters (“DACs”). Typically, additional peripheral circuitry tends to consume more power and requires additional space and design considerations which can significantly impact the cost and development cycle of a project.
With the advent of the programmable embedded system-on-a-chip, such as the PSoC® processing device, developed by Cypress Semiconductor Corporation, San Jose, Calif., many of the applications that require peripheral components can now be implemented all within a single integrated circuit. The PSoC® integrates configurable and programmable analog and digital functions, memory, and microcontroller functionality in one package. Analog blocks, for instance, can be configured to produce analog filters, comparators, switch capacitors, dual-tone multi-frequency signaling (DTMF) receivers, and programmable, instrumental, inverting, non-inverting, and operational amplifiers. The digital programmable blocks can be configured to implement, for example, counters, timers, pulse-width modulators (PWMs) and calibration algorithms. As integrated circuits become smaller, faster, and more sensitive, various factors during and after manufacturing can affect the performance. For example, during manufacturing, process variations can result in integrated circuits having significant parametric shifts in various electrical properties. In particular, due to the process variations, the analog circuits within the analog blocks may require calibration to trim out all process variations in the circuit, such as in the ADC, DAC, reference circuits, buffers, etc. Calibration can be performed using read-only memories (ROMs), laser trimming, or flash memories.
FIG. 1 illustrates a block diagram for a conventional system 100 for calibrating a programmable system-on-a-chip. The conventional system 100 includes a central processing unit (CPU) subsystem 120, a programmable logic array 140, and programmable analog blocks 130—all of which reside on an integrated circuit with a common substrate 110. The CPU subsystem 120 includes a microcontroller and flash memory (not shown). The system 100 further includes external calibration circuitry 150. The components contained in the integrated circuit 110 are electrically interconnected. The external calibration circuitry is electrically connected to the programmable analog blocks 130, the CPU subsystem 120, and the programmable logic array 140. The external calibration circuitry 150 is typically integrated on another integrated circuit, but if it is integrated on the same integrated circuit as the CPU subsystem, this circuit is distinct from the CPU subsystem, such as designed-for-test (DUT) circuitry, which can be turned on when calibrating the programmable analog blocks 130.
In one conventional approach, the external calibration circuitry 150 performs calibration routines to set the trim values for the programmable analog blocks 130 of the system 100. Calibration routines performed by the external calibration circuitry 150 are known by those of ordinary skill in the art and additional details regarding their operations have not been described herein.
Additional peripheral circuitry may be undesirable for the reasons discussed above. In another conventional approach, the system 100 uses the microcontroller in the CPU subsystem 120 to calibrate the programmable analog block 130. The microcontroller determines the calibrated values and stores the values in flash memory. Flash memory typically uses at least 1.6 volts for proper operation with the microcontroller. The conventional system 100 does not permit dynamic calibration. In addition, the communication between the programmable analog blocks 130 is inflexible, thereby prohibiting calibration of all available programmable analog blocks 130 with only on-chip resources. This may require additional external calibration circuitry (e.g., 150) to calibrate all available programmable analog blocks 130. In summary, while newer technologies that incorporate a system-on-a-chip provide compact, low power, and cost effective solutions to increasingly complex applications, many analog functional modes of operation require additional external circuitry to perform the necessary calibration algorithms.
USPTO Backgrounds
USPTO Backgrounds