Field of the Invention
The present invention relates to a wafer thinning method for thinning a wafer composed of an SiC substrate and a plurality of devices formed on the front side of the SiC substrate.
Description of the Related Art
Various devices such as integrated circuits (ICs) and large-scale integrations (LSIs) are formed by forming a functional layer on the front side of a wafer formed from a silicon substrate and partitioning this functional layer into a plurality of regions along a plurality of crossing division lines. The back side of the wafer is ground by a grinding apparatus to thereby reduce the thickness of the wafer to a predetermined thickness. Thereafter, the division lines of the wafer are processed by a processing apparatus such as a cutting apparatus and a laser processing apparatus to thereby divide the wafer into a plurality of individual device chips corresponding to the devices. The device chips thus obtained are widely used in various electronic equipment such as mobile phones and personal computers.
Further, power devices or optical devices such as light-emitting diodes (LEDs) and laser diodes (LDs) are formed by forming a functional layer on the front side of a wafer formed from an SiC substrate and partitioning this functional layer into a plurality of regions along a plurality of crossing division lines. As similarly to the case of the silicon wafer mentioned above, the back side of the SiC wafer is ground by a grinding apparatus to thereby reduce the thickness of the SiC wafer to a predetermined thickness. Thereafter, the division lines of the SiC wafer are processed by a processing apparatus such as a cutting apparatus and a laser processing apparatus to thereby divide the SiC wafer into a plurality of individual device chips corresponding to the power devices or the optical devices. The device chips thus obtained are widely used in various electronic equipment.
As described above, the back side of the SiC wafer is ground to thin the SiC wafer to a predetermined thickness before cutting the SiC wafer along the division lines as in the case of the silicon wafer. To achieve a recent reduction in weight and size of electronic equipment, it has been required to further reduce the thickness of a wafer to a thickness of approximately 50 μm, for example. However, such a wafer thinned by grinding is hard to handle and there is accordingly a possibility of damage to the wafer during transfer or the like. The front side of the wafer has a device area where the devices are formed and a peripheral marginal area surrounding the device area. To solve the above problem, there has been proposed a grinding method of grinding the back side of the wafer in only a central area corresponding to the device area, thereby forming a circular recess on the back side of the wafer in this central area, whereby a ring-shaped reinforcing portion is formed on the back side of the wafer in a peripheral area corresponding to the peripheral marginal area (see Japanese Patent Laid-Open No. 2007-19379).
USPTO Backgrounds
USPTO Backgrounds