1. Technical Field
This disclosure relates generally to equipment used in testing electronic packages, such as integrated circuits, and more particularly to an apparatus for interfacing electronic packages and test equipment.
2. Related Applications
Priority is hereby claimed under 35 U.S.C. § 119(e) to co-pending and commonly-owned U.S. Provisional Patent Application No. 60/361,882, which was filed on Mar. 5, 2002, and U.S. Provisional Patent Application No. 60/410,121, which was filed on Sep. 13, 2002, each of which is incorporated herein by reference in its entirety.
3. Related Art
Typically, integrated circuit (IC) packages (devices under test) are removably mounted in sockets which in turn are mounted on a circuit substrate, commonly referred to as a device-under-test or DUT board. The sockets mount individual contacts for electrically connecting each terminal of a device to be tested to an individual circuit path on the DUT board. The DUT board is in turn electrically connected to computerized test equipment. This arrangement facilitates testing providing top loading and unloading and is readily adapted for use with different ICs; however, it does have certain limitations. One such limitation relates to the height required for the interface equipment, i.e., the sockets. The distance between the terminals of the device under test and the location of interconnection with the respective circuit paths on the DUT board is an important parameter, maximizing the fidelity of the electrical signal passing therethrough. The fidelity of the electrical signal is subject to compromise in that distance having largely uncontrolled impedance and high cross talk.
U.S. Pat. No. 6,512,389 to Kocher discloses an apparatus for passing test signals between a mother board and a daughter board, in which spring test probes are positioned in bores in the mother board.
A need exists in the art for improved methods and devices for improving the fidelity of electrical signals passing from test equipment to a device under test.
USPTO Backgrounds
USPTO Backgrounds