The present disclosure relates to an electrostatic discharge protection circuit for preventing an internal element from being damaged due to the generation of static electricity.
In order to implement a digital interface operating at high speed, a medium gate oxide transistor operating at a voltage lower than a high supply voltage provided to an integrated circuit (IC) may be used, and simultaneously a thick gate oxide transistor is used to provide an interface in the IC with the supply voltage as well. In this case, different types of transistors are implemented in an IC, thereby causing manufacturing processes to be complicated and increasing manufacturing price.
In addition, since electrostatic current induced by electrostatic discharge (ESD) in a semiconductor IC tends to concentrate on the weakest part of a transistor, melting may occur at a junction, a contact, or a gate oxide, causing failures. As a result, since the medium gate oxide transistor uses a thin gate oxide, long-term reliability cannot be guaranteed.
USPTO Backgrounds
USPTO Backgrounds