In telecommunication and other information transmission systems, multiplexing of digital information is utilized to transmit multiple information signals simultaneously over a common transmission channel. In such systems, digital information from different sources is interleaved synchronously multiplexed into a single signal for transmission over a channel to a destination receiver. The receiver then demultiplexes the received signal into the original separate information signals.
Systems which organize digital information into discrete sequences or packets may require the information packets to be aligned before multiplexing and transmission. One such system is the synchronous digital hierarchy (SDH) which is used for the transmission of voice, video and other digital information. A general description of SDH is provided in CCITT Recommendation G.707-709 pp. 107-174 (1989). Within an SDH system, one method of transmitting information is to transmit the information in synchronous transport module level 1 frames (STM-1 frames). Each STM-1 frame comprises an 81 byte header containing a pointer and overhead information and a payload of 2349 bytes containing message information. STM-1 frames are transmitted at a rate of 155.52 Mbits/s. Four STM-1 frames may be combined to form a single synchronous transfer module level 4 (STM-4) frame. In this manner, four STM-1 frames may be transmitted simultaneously over a common channel.
In order to form a STM-4 frame, the 2349 byte payloads of four STM-1 frames are aligned and then multiplexed into the payload of a STM-4 frame. In the same manner, the payloads of sixteen STM-1 frames or four STM-4 frames or their equivalents may be aligned and multiplexed into the payload of a synchronous transfer module level 16 frame (STM-16 frame). A general description of synchronous transfer modules is found in CCITT Recommendation G.708, .sctn..sctn. 2.2.7-4.2:3 p. 113-117 (1989). However, the generation of STM-1 frames does not occur simultaneously and therefore, some manner of frame alignment is required in order to transform four STM-1 frames into an STM-4 frame or sixteen STM-1 frames into a STM-16 frame.
In addition, there are various methods for maintaining the proper timing of the operations of interleaving the information signals in multiplexers which must be considered in any implementation of a frame alignment circuit. One prior art method utilizes a system wide synchronous timing clock such that each of the reference signals are supplied to the multiplexer circuit in a synchronous manner. A disadvantage of this technique required complex hardware and overhead communications to maintain synchronization of the different information sources. Further, this method is not applicable to information systems in which the information sources are free running and can not be readily synchronized, such as in an SDH system.
Another method for providing a timing reference to a multiplexer utilizes one specific information stream from a particular information source to provide a timing reference for the synchronous multiplexing. However, a disadvantage of this technique is the inability for the multiplexer to operate in a normal manner when the information stream used to generate the timing signal is lost or interrupted.
Therefore, it would be advantageous to have a circuit to align multiple information frames or information packets which does not utilize a system synchronous timing clock or generate a timing clock signal based on the information produced by a particular information source.
USPTO Backgrounds
USPTO Backgrounds