Example embodiments relate to semiconductor devices and methods of manufacturing the same. More particularly, example embodiments relate to fin-type field effect transistors (finFETs) and methods of manufacturing the same.
When finFETs are formed, dummy gate structures may be formed on active fins, recesses may be formed at upper portions of the active fins that are not covered by the dummy gate structures, and a selective epitaxial growth (SEG) process may be performed to form source/drain layers filling the recesses. When the active fins are close each other, the source/drain layers on neighboring active fins may contact each other so as not to be electrically isolated.
USPTO Backgrounds
USPTO Backgrounds