This invention relates to testing asynchronous circuits.
Typical integrated circuit testers test chips of the kind that implement a single function cadenced at a single clock frequency. Some chips implement functions that involve signals clocked by two or more asynchronous clocks. For example, a chip that serves several processors requests for access to a single memory may communicate with the memory using signals based on one clock rate that is asynchronous with the clocks used for communication with the processors.
USPTO Backgrounds
USPTO Backgrounds