Complementary metal-oxide semiconductor (CMOS) image sensors are gaining in popularity over traditional charged-coupled devices (CCDs). A CMOS image sensor typically comprises an array of picture elements (pixels), which utilizes light-sensitive CMOS circuitry to convert photons into electrons. The light-sensitive CMOS circuitry typically comprises a photo diode formed in a silicon substrate. As the photo diode is exposed to light, an electrical charge is induced in the photo diode. Each pixel may generate electrons proportional to the amount of light that falls on the pixel when light is incident on the pixel from a subject scene. The electrons are converted into a voltage signal in the pixel and further transformed into a digital signal which will be processed by an application specific integrated circuit (ASIC).
A CMOS image sensor, or simply a CMOS sensor, may have a front side where a plurality of dielectric layers and interconnect layers are located connecting the photo diode in the substrate to peripheral circuitry, and a backside having the substrate. A CMOS sensor is a front-side illuminated (FSI) image sensor if the light is from the front side of the sensor, otherwise it is a back-side illuminated (BSI) sensor with light incident on the backside. For a BSI sensor, light can hit the photo diode through a direct path without obstructions from the dielectric layers and interconnect layers located at the front side. This helps to increase the number of photons converted into electrons, and makes the CMOS sensor more sensitive to the light source.
Three-dimensional (3D) integrated circuits (ICs) may be used to achieve a high density required for current applications, such as image sensor applications. When a CMOS sensor is packaged in a 3D IC, a CMOS sensor and its related ASIC may be bonded to a carrier wafer in parallel, which may take a larger area for the carrier wafer. Therefore there is a need for methods and systems to reduce the package area for CMOS sensors bonded to related ASICs.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale.
USPTO Backgrounds
USPTO Backgrounds