Photolithography is a common process used in semiconductor wafer fabrication. In photolithography, positive or negative photoresist is utilized to provide desired islands or holes relative to material on a substrate.
One common electronic device which is fabricated using photolithography is a field effect transistor. Field effect transistors are comprised of a pair of electrically conductive diffusion regions, referred to as a source and a drain, spaced apart within a semiconductive substrate. Such transistors include a conductive gate provided adjacent the separation region between the diffusion regions for imparting an electric field to enable current to flow between the diffusion regions. The substrate area adjacent the gate and between the diffusion regions is referred to as the channel. The semiconductive substrate typically comprises a bulk monocrystalline silicon substrate having a light conductivity dopant impurity concentration. Alternately, the substrate can be provided in the form of a thin layer of lightly doped semiconductive material over an underlying insulating layer. Such are commonly referred to as semiconductor-on-insulator (SOI) constructions.
Integrated circuitry fabrication technology continues to strive to increase circuit density, and thereby minimize the size and channel lengths of field effect transistors. Improvements, in technology have resulted in reduction of field effect transistor size from long-channel devices (i.e., channel lengths greater than 2 microns) to short-channel devices (i.e., channel lengths less than 2 microns).
Photolithography is typically utilized to fabricate desired gate lines for transistors. As channel lengths (gate widths) continue to shrink, it would be desirable to produce or conceive of ways to shorten channel lengths to dimensions below the minimum currently available photo lithographic feature size. Such constitutes the principal motivation resulting in this invention. However, the artisan will appreciate utility of aspects of the invention in other than merely breaking through minimum photolithography limits, with the invention only being limited by the accompanying claims appropriately interpreted in accordance with the doctrine of equivalents.
USPTO Backgrounds
USPTO Backgrounds