The present invention relates to semiconductor devices and, in particular, testing and repairing semiconductor memory devices.
A semiconductor device includes one or more integrated circuit (IC) devices, each of which includes many miniaturized circuits implemented in a single semiconductor substrate, commonly referred to as a “chip.” The IC devices are typically tested before they are used in order to ensure their proper operation. The IC devices can be tested in a limited fashion using built-in self test (BIST) circuitry that is implemented within the IC devices themselves. A more thorough test of an IC device is traditionally accomplished with complex external testing equipment allowing to input various test patterns, codes, and data, and to stress the circuitry of the IC device.
A common example of an IC device is a memory device implemented on a single chip. The memory device includes multiple data storage elements, each of which is configured to store binary information. Examples of memory devices include random access memory (RAM) devices, such as different DRAM and SRAM devices, read only memory (ROM) devices and other non-volatile memory devices such as FLASH memories. In some memory devices, the data storage elements are individually addressable. For example, they can be arranged in an array of rows and columns, and the stored information can be accessed in a particular element in the array based on that element's row and column addresses.
Typically, the memory device includes primary data storage elements that are intended to be used during normal operation, and redundant data storage elements that are used to replace malfunctioning primary data storage elements. When a memory test finds an erroneous primary data storage element, a repair circuit is configured in the memory device to avoid the malfunctioning storage element and use instead a redundant data storage element. For example, if one or more data storage elements do not properly operate in a row of a primary storage element array, the repair circuit switches to a redundant row of storage elements every time the malfunctioning row is addressed.
In traditional memory devices, the repair circuits include “fuse matching” blocks into which the address of the malfunctioning primary storage elements are permanently “burned.” For example, the fuse matching block can include fuses that can be permanently “blown” by laser. Or the fuse matching block can include “anti-fuses” in which selected capacitors can be permanently shorted by high voltage electric pulses to match the erroneous address.
During manufacturing of the chips, variations in the manufacturing processes may cause variations in the device parameters (such as threshold voltage variations and sub-threshold leakage), resulting in “weak” data storage elements that are vulnerable to stress or other external stimuli. Packaging the chips may exaggerate these variations and cause malfunctions in the weak storage elements. After the memory device is packaged, matching a new malfunctioning address by using laser to blow fuses in its repair circuit may be difficult, or even impossible. Although the use of anti-fuses allows a transparent repair process in the packaged device, it involves costly development of anti-fuse technologies. These difficulties can lead to increased manufacturing costs either due to the costly anti-fuse technology or due to the discarding of entire packaged devices for a simple memory failure which can seriously affect the yield of the entire manufacturing process.
For example, a system-in-package (SiP) device includes a memory IC device and an application specific IC (ASIC) device in a single package. Before assembling the SiP device, the memory chip and the ASIC are separately tested. At this stage, errors in the memory chip may be repaired by using laser to permanently blow one or more fuses in the repair circuit. But even if a single bit error happens in the memory chip when it is packaged together with the ASIC, that error cannot be repaired by using the laser to blow the fuses. Thus, the entire SiP device may be required to be discarded even if the ASIC operates perfectly.
USPTO Backgrounds
USPTO Backgrounds