The field emission display (FED) is a novel flat panel display, with flat field emission cathode array as electron source, phosphor as light-emitting material, and controlled in a way of matrix addressing. Compared to other types of displays, FED has the advantages of high image quality of the cathode ray tube (CRT), the slightness of liquid crystal display (LCD), and large scale of plasma display panels (PDP). The FED has the following excellent properties: small size, light weight, low energy consumption, long life, high image quality, high brightness, high resolution, full-color, multi-grayscale, high response speed, no viewing angle restrictions, wide working temperature range, simple structure, needless of heating the filament and the deflection coil or other components, the fabrication process is simple and low-cost for mass production, the image gray-scale and dynamic range are large, needless of polarized light, no harmful X-ray radiation, free to radiation and magnetic interference, self-luminous.
The FED can be classified into diode, triode and multiple structures.
The diode structure FED is composed of upper and under substrates. ITO transparent conductive electrode and three-color phosphor are fabricated on the upper substrate, cathode is fabricated on the under substrate followed by the preparation of CNT field emission materials. The electrodes on the two substrates are perpendicularly arranged, and isolated by the spacers. The fabrication process of diode structure FED is simple, low cost, thus is easy to realize large scale, while the turn-on voltage is very high. However, the voltage of anode can not be too high as it is connected to the drive circuit, which limits the use of high voltage phosphors and the enhancement of the lightness, as well as poor gray-scale reproduction. One need to increase the current density to maintain the high lightness, which will cause rapid aging of the phosphors, and decrease the lifetime of the devices. Without limiting the driving voltage, it is more difficult to design the drive circuit, and difficult to achieve fast dynamic display with multi-gray scale. Therefore, diode FED is limited in the practical application.
To achieve high gray-scale and enhance the lightness, researches of triode and multiple structures FED are inevitable.
Generally, the triode FED is composed of cathode, gate and anode, and can be classified into normal gate, under gate and planar gate structures. The triode FED uses gate to control the field emission of cathode, while not the high voltage as for the diode FED.
For the normal gate FED, cathode and gate are set on the same substrate, and anode on the other substrate, the distance between two substrates is kept by the spacers. The cathode is located under the gate, leading to a higher utilization rate of electrons emitted from the cathode. The cathode and the gate are perpendicularly aligned, with an insulating dielectric layer between the cathode and the gate to avoid the short circuit between the cathode and gate, the fabrication process is complicated and high costly. Usually, the fabrication of the dielectric layer and gate is followed by that of the electronic materials, so the cathode materials subject to damage and contamination during the preparation of the dielectric layer and gate. For this kind of FED, the leakage current of the insulating layer between cathode and gate is large, which will affect the lifetime of the device.
For the under gate FED, cathode and gate are also set on the same substrate, and anode on the other substrate, the distance between two substrates is kept by the spacers. The cathode is located on the gate, leading to a higher utilization rate of electrons emitted from the cathode. The cathode and the gate are perpendicularly aligned, with an insulating dielectric layer between the cathode and the gate to avoid the short circuit between the cathode and gate, the fabrication process is complicated and high costly. Usually, the fabrication of electronic materials is followed by that of the dielectric layer and gate, so damage and contamination of the cathode materials can be avoided during the preparation of the dielectric layer and gate. However, it is easy to cause the short circuit between the cathode and the gate after the fabrication of emission materials on the cathodes. Compared to normal gate FED, the fabrication of under gate FED is simpler, and is easier to realize. However, there are some short cuts such as: charge accumulation, serious dispersion of electrons, lager beam spot, and crosstalk between the adjacent pixel units. The crosstalk of the pixel unit can be reduced by narrowing the spacing of cathode and anode; however, it is not conducive to the increase of the anode voltage, leading to lower luminous efficiency.
For the planar FED, it is free of fabrication of dielectric layer which is necessary for the normal gate and under gate FED. The gate and cathode can be fabricated parallel at one time on the same planar of one substrate. The fabrication process is much simpler, however, it suffers a serious dispersion of electrons and lager beam spot, and need to use scan the high anode voltage to control the images.
On the other hand, FED is a vacuum device, which need some kind of supporting scaffold for isolation. The current technology is limited to fabricate the supporting structure alone; leading to the problems of distribution and placement of spacers.
In a word, it is necessary to develop a novel structured FED, which is needless of spacers between the two substrates, and having a fabrication process of cathode and gate. At the same time, it is able to achieve regulation under low voltage, avoid charge accumulation and cross-talk between two adjacent pixel unit caused by the dispersion of electrons, in order to further improve the uniformity and utilization rate of emitted electrons, and extend the lifetime of the devices.
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