The present invention generally relates to a multiphase material that has a low dielectric constant (or low k), a method for fabricating films of this material and electronic devices containing such films. More particularly, the present invention relates to a low dielectric constant, multiphase material for use as an intralevel or interlevel dielectric film, a cap material, or a hard mask/polish stop in a ULSI back-end-of-the-line (BEOL) wiring structure, electronic structures containing the films and a method for fabrication such films and structures.
The continuous shrinking in dimensions of electronic devices utilized in ULSI circuits in recent years has resulted in increasing the resistance of the BEOL metallization as well as increasing the capacitance of the intralayer and interlayer. This combined effect increases signal delays in ULSI electronic devices. In order to improve the switching performance of future ULSI circuits, low dielectric constant (k) insulators and particularly those with k significantly lower than that of silicon oxide are needed to reduce the capacitances. Dielectric materials that have low k values have been commercially available, for instance, one of such materials is polytetrafluoroethylene (PTFE) with a k value of 2.0. However, these dielectric materials are not thermally stable when exposed to temperatures above 300xcx9c350xc2x0 C. which renders them useless during integration of these dielectrics in ULSI chips which require a thermal stability of at least 400xc2x0 C.
The low-k materials that have been considered for applications in ULSI devices include polymers containing Si, C, O, such as methylsiloxane, methylsesquioxanes, and other organic and inorganic polymers. For instance, materials described in a paper xe2x80x9cProperties of new low dielectric constant spin-on silicon oxide based dielectricsxe2x80x9d by N. Hacker et al., published in Mat. Res. Soc. Symp. Proc., vol. 476 (1997) p25 appear to satisfy the thermal stability requirement, even though some of these materials propagate cracks easily when reaching thicknesses needed for integration in the interconnect structure when films are prepared by a spin-on technique. Furthermore, the precursor materials are high cost and prohibitive for use in mass production. In contrast to this, most of the fabrication steps of VLSI and ULSI chips are carried out by plasma enhanced chemical or physical vapor deposition techniques. The ability to fabricate a low-k material by a PECVD technique using readily available processing equipment will thus simplify its integration in the manufacturing process, reduce manufacturing cost, and create less hazardous waste. A co-pending application (Ser. No. 09/107,567) assigned to the common assignee of the present invention, which is incorporated here by reference in its entirety, described a low dielectric constant material consisting of Si, C, O and H atoms having a dielectric constant not more than 3.6 and which exhibits very low crack propagation velocities. Further reduction of the dielectric constant of such a material will further improve the performance of electronic devices incorporating such dielectric.
It is therefore an object of the present invention to provide a low dielectric constant material consisting of two or more phases and having a dielectric constant of not more than 3.2.
It is another object of the present invention to provide methods for fabricating the multiphase materials of this invention.
It is a further object of the present invention to provide a method for fabricating a multiphase material wherein the first phase is a hydrogenated oxidized silicon carbon film (contains Si, C, O and H and henceforth called SiCOH), and at least a second phase consisting essentially of C and H atoms.
It is a further object of the present invention to prepare a multiphase material that contains nanometer-sized voids.
It is another further object of the present invention to prepare a multiphase material that has a dielectric constant which is at least 10% lower than that of a single phase SiCOH dielectric material.
It is another further object of the present invention to provide a method for fabricating a low dielectric constant, thermally stable multiphase film from a precursor mixture which contains two or more different precursor molecules.
It is still another further object of the present invention to provide a method for fabricating a low dielectric constant material including two or more phases in a parallel plate plasma enhanced chemical vapor deposition chamber.
It is still another further object of the present invention to provide a method for fabricating a low dielectric constant material including two or more phases using a remote plasma chemical vapor deposition process.
It is yet another object of the present invention to provide a method for fabricating a multiphase material for use in electronic structures as an intralevel or interlevel dielectric in a BEOL interconnect structure.
It is yet another further object of the present invention to provide a multiphase material with a low internal stress and a dielectric constant of not higher than 3.2.
It is still another further object of the present invention to provide an electronic structure incorporating layers of insulating materials as intralevel or interlevel dielectrics in a BEOL wiring structure in which at least one of the layers of insulating materials is a multiphase material.
It is yet another further object of the present invention to provide an electronic structure which has layers of multiphase materials as intralevel or interlevel dielectrics in a BEOL wiring structure which contains at least one dielectric cap layer formed of different materials for use as a reactive ion etching mask, a polish stop or a diffusion barrier.
In accordance with the present invention, a novel dielectric material that has two or more phases wherein the first phase is formed of a SiCOH material is provided. The invention further provides a method for fabricating the multiphase material by reacting a first precursor gas containing atoms of Si, C, O, and H and at least a second precursor gas containing mainly atoms of C, H, and optionally F, N and O in a plasma enhanced chemical vapor deposition chamber. The present invention still further provides an electronic structure that has layers of insulating materials as intralevel or interlevel dielectrics used in a BEOL wiring structure wherein the insulating material may be a multiphase film.
In a preferred embodiment, a method for fabricating a dual phase film is described. In the dual phase film, the first phase is formed of hydrogenated oxidized silicon carbon and the second phase is formed of mainly C and H atoms. The method can be carried out by the operating steps of first providing a plasma enhanced chemical vapor deposition chamber, positioning an electronic structure in the chamber, flowing a first precursor gas containing atoms of Si, C, O, and H into the chamber, flowing a second precursor gas mixture containing atoms of C, H, and optionally F, N and O into the chamber, and depositing a dual-phase film on the substrate. Optionally, the deposited film can be heat treated at a temperature of not less than 300xc2x0 C. for a time period of at least 0.25 hour. The method may further include the step of providing a parallel plate reactor which has a conductive area of a substrate chuck between about 300 cm2 and about 700 cm2, and a gap between the substrate and a top electrode between about 1 cm and about 10 cm. A RF power is applied to at least one of the electrodes. The substrate may be positioned on the powered electrode or on the grounded electrode.
The first precursor utilized may be selected from molecules containing at least some of Si, C, O, and H atoms. Oxidizing molecules such as O2 or N2O can be added to the first precursor. Preferably the first precursor is selected from molecules with ring structures such as 1,3,5,7-tetramethylcyclotetrasiloxane (TMCTS or C4H16O5Si4), tetraethylcyclotetrasiloxane (C8H24O4Si4), decamethylcyclopentasiloxane (C10H30O5Si5) molecules of methylsilanes mix an oxidizing agent such as O2 or N2O or precursor mixtures including Si, O and C. The precursor can be delivered directly as a gas to the reactor, delivered as a liquid vaporized directly within the reactor, or transported by an inert carrier gas such as helium or argon. The precursor mixture may further contain elements such as nitrogen, fluorine or germanium.
The second precursor gas mixture utilized may be selected from molecules containing C and H atoms. Optionally, O, N or F atoms may be contained in the molecules, or molecules containing such atoms may be added to the precursor mixture. In one embodiment, the second precursor is selected from the group comprising molecules with ring structures containing C and H atoms, such as cyclic hydrocarbons, cyclic alcohols, cyclic ethers, cyclic aldehydes, cyclic ketones, cyclic esters, pheonols, cyclic amines, or other O, N or F containing cyclic hydrocarbons. More preferably, the second precursor molecule is a multicyclic (or polycyclic) hydrocarbon containing about 6 to 12 carbon atoms, with preferred examples being 2,5-norbomadiene (also known as bicyclo [2.2.1] hepta-2,5-diene), norbomylene 2,5-norbornadiene (also known as bicyclo [2.2.1] hepta-2,5-diene), norbornane (also known as bicyclo [2.2.1] heptane). Other examples are tricyclo[3.2.1.0]octane, tricyclo[3.2.2.0]nonane, connected ring hydrocarbons such as spiro[3.4]octane, spiro[4.5]nonane, spiro[5.6]decane, and the like. Alternatively, cyclic hydrocarbons containing from 5 to 12 carbon atoms (cyclopentane, cyclohexane, and the like) and also cyclic aromatic hydrocarbons containing 6 to 12 C atoms (benzene, toluene, xylenes, and the like) may be used. Optionally, O or F atoms may be contained in the molecules, or molecules containing such atoms added to the precursor mixture.
In another embodiment, a method for fabricating a dual-phase film consisting of hydrogenated oxidized silicon carbon and a second phase consisting essentially of C and H atoms can be carried out by the operating steps of first providing a parallel plate deposition chamber, positioning an electronic structure in the chamber, providing a remote plasma source, flowing a first precursor gas containing atoms of Si, C, O, and H into the plasma source and from there into the deposition chamber, flowing a second gas mixture containing atoms of C, H, and optionally O, directly into the chamber, depositing a multiphase film on the substrate.
In yet another embodiment, a multiphase film is described. The multiphase film is prepared by the same procedures as described above for the dual-phase film, however, the second precursor gas mixture contains atoms of C, H and optionally, F, N, and O in at least two types of molecules. In one example, the mixture consists of at least one of cyclic molecules, as those described above, and at least one of noncyclic type molecules selected from the group of alkanes, alkenes, alkynes, ethers, alcohols, esters, ketones, aldehydes, amines, or other O, N or F containing noncyclic hydrocarbons.
The deposition of the multiphase material of this invention may further include the steps of setting the substrate temperature at between about 25xc2x0 C. and about 400xc2x0 C., setting the RF power density at between about 0.02 W/cm2 and about 5.0 W/cm2, setting the first precursor flow rate at between about 5 sccm and about 1000 sccm, setting the flow rate of the first gas of the second precursor between about 5 sccm and about 1000 sccm, setting the flow rate of the second gas of the second precursor between about 5 sccm and about 1000 sccm, setting the chamber pressure at between about 50 m Torr and about 10 Torr, and setting a substrate DC bias at between about 0 VDC and about xe2x88x92400 VDC.
The present invention is further directed to an electronic structure which has layers of insulating materials as intralevel or interlevel dielectrics in a BEOL interconnect structure which includes a pre-processed semiconducting substrate that has a first region of metal embedded in a first layer of insulating material, a first region of conductor embedded in a second layer of insulating material which includes a multiphase material, the second layer of insulating material being in intimate contact with the first layer of insulating material, the first region of conductor being in electrical communication with the first region of metal, and a second region of conductor being in electrical communication with the first region of conductor and being embedded in a third layer of insulating material including a multiphase material, the third layer of insulating material being in intimate contact with the second layer of insulating material.
The electronic structure may further include a dielectric cap layer situated in-between the first layer of insulating material and the second layer of insulating material, and may further include a dielectric cap layer situated in-between the second layer of insulating material and the third layer of insulating material. The electronic structure may further include a first dielectric cap layer between the second layer of insulating material and the third layer of insulating material, and a second dielectric cap layer on top of the third layer of insulating material.
The dielectric cap material can be selected from silicon oxide, silicon nitride, silicon oxinitride, refractory metal silicon nitride with the refractory metal being Ta, Zr, Hf or W, silicon carbide, silicon carbo-oxide, and their hydrogenated compounds. The first and the second dielectric cap layer may be selected from the same group of dielectric materials. The first layer of insulating material may be silicon oxide or silicon nitride or doped varieties of these materials, such as PSG or BPSG. The electronic structure may further include a diffusion barrier layer of a dielectric material deposited on at least one of the second and third layer of insulating material. The electronic structure may further include a dielectric layer on top of the second layer of insulating material for use as a RIE hard mask/polish stop layer and a dielectric diffusion barrier layer on top of the dielectric RIE hard mask/polish-stop layer. The electronic structure may further include a first dielectric RIE hard mask/polish-stop layer on top of the second layer of insulating material, a first dielectric RIE diffusion barrier layer on top of the first dielectric polish-stop layer, a second dielectric RIE hard mask/polish-stop layer on top of the third layer of insulating material, and a second dielectric diffusion barrier layer on top of the second dielectric polish-stop layer. The electronic structure may further include a dielectric cap layer of same materials as mentioned above between an interlevel dielectric of a multiphase material and an intralevel dielectric of a multiphase material.
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