In recent years, speeding up of the transmission rate with regard to interface signals is in progress. For example, regarding SAS (Serial Attached Small Computer System Interface), the maximum signal transmission stipulated in rate in which standards have been stipulated by ANSI (American National Standards Institute) is 3 Gbps in the initial standard SAS-1, 6 Gbps in the currently mainstream SAS-2, and 12 Gbps in the latest standard SAS-3.
Moreover, regarding PCI Express (Peripheral Component Interconnect Express), the maximum signal transmission rate in which standards have been stipulated by PCI-SIG (PCI Special Interest Group) is 2.5 Gbps in the initial standard Gen1, 5 Gbps in the currently mainstream Gen2, 8 Gbps in Gen3, and 16 Gbps in Gen4 for which the standard is currently being established.
Moreover, with DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory), the maximum signal transmission rate in which standards have been established by JEDEC (Solid State Technology Association) is 1066 Mbps in the older generation DDR2, 2133 Mbps in the currently mainstream DDR3, and 3200 Mbps in the latest standard DDR4.
In order to realize speeding up of such signal transmission rates, the necessity of ensuring the signal transmission quality is increasing even more by preparing a return current path of the ground through which return current will flow against a signal current path so as to obtain an appropriate characteristic impedance, and controlling electromagnetic coupling of the signal current path and the return current path. In light of the above, it is particularly important to design a transmission system comprising a return current path along a signal current path in order to ensure the signal quality.
As a conventional technology aiming to ensure the return current path along the signal current path is publicly known as, for instance, described in PTL 1. The method of ensuring the return current path described in PTL 1 is a method of connecting a plurality of ground layers with multiple through-holes, and preventing the disruption of return current by providing a detour path of the return current to another ground layer via the through-holes even under a mounting condition where the ground layer adjacent to signal wiring is disconnected midway.
USPTO Backgrounds
USPTO Backgrounds