1. Field of the Invention
The present invention relates generally to a method of patterning a semiconductor device, and more particularly, to a method of patterning a semiconductor device by using an electron beam lithography.
2. Description of the Prior Art
In a semiconductor process, usually the pattern is formed on a resist layer in a process of lithography. Then, the resist layer serves as the etching mask to perform the dry or wet etching process so as to transfer the pattern in the resist layer to the layer to be patterned beneath the resist layer. In recent years, a micro fabrication technique has been actually used in patterning a semiconductor device, for example, using a focused beam of a charge particle line, such as an electron beam (e-beam). Generally, in the technique of the e-beam lithography, an e-beam is used to delineate the features of a semiconductor by selectively irradiating a substrate coated with an e-beam sensitivity resist. The e-beam is deflected and shaped in a precise manner to define the require shape in the resist, and the pattern is then developed in the resist.
However, with the increasing miniaturization of semiconductor devices, the design rule of line width and space between lines or devices becomes finer. Therefore, the resolution required by lithography becomes high. That is, is becomes difficult to obtain fine-sized devices in the exposure under a simplified and convenient process.
USPTO Backgrounds
USPTO Backgrounds