1. Field of the Invention
The present invention relates to a circuit board, and particularly to a double layer circuit board and a manufacturing method thereof.
2. Description of the Related Art
With reference to FIG. 4, a conventional double layer circuit board comprises a substrate 30, and the substrate 30 comprises a first circuit 301, a second circuit 302, and at least one via 303. The first circuit 301 is formed on a first surface of the substrate 30, the second circuit 302 is formed on a second surface of the substrate 30, and the first surface is opposite to the second surface. The at least one via 303 is formed through the substrate 30 to connect the first surface and the second surface. At least one connecting pillar 304 that fills the at least one via 303 is formed by plating the at least one via 303 to connect the first circuit 301 and the second circuit 302.
With reference to FIGS. 5A-5H, a manufacturing method of the conventional double layer circuit board comprises the following steps.
In FIG. 5A, a substrate 30 is provided, wherein the substrate 30 comprises a first surface and a second surface, and the first surface is opposite to the second surface.
In FIG. 5B, at least one via 303 is formed to connect the first surface and the second surface of the substrate 30 by drilling the substrate 30 by laser.
In FIG. 5C, a first plating layer 31 is formed on the first surface of the substrate 30 and in the at least one via 303, and a second plating layer 32 is formed on the second surface of the substrate 30 and in the at least one via 303 to electronically connect to the first plating layer 31 in the at least one via 303.
In FIG. 5D, a first photoresist layer 41 is formed on the first surface of the substrate 30 to cover the first plating layer 31, and a second photoresist layer 42 is formed on the second surface of the substrate 30 to cover the second plating layer 32.
In FIG. 5E, the first photoresist layer 41 is patterned to form a groove of a first circuit pattern to expose the first plating layer 31 in the groove of the first circuit pattern, and the second photoresist layer 42 is patterned to form a groove of a second circuit pattern to expose the second plating layer 32 in the groove of the second circuit pattern.
In FIG. 5F, at least one connecting pillar 304 is formed by plating the first plating layer 31 and the second plating layer 32 in the at least one via 303 to fill the at least one via 303. A first circuit 301 is formed in the groove of the first circuit pattern by plating the exposed first plating layer 31, and a second circuit 302 is formed in the groove of the second circuit pattern by plating the exposed second plating layer 32.
In FIG. 5G, the first photoresist layer 41 and the second photoresist layer 42 are removed.
In FIG. 5H, a portion of the first plating layer 31 that is uncovered by the first circuit 301 and a portion of the second plating layer 32 that is uncovered by the second circuit 302 are removed.
The manufacturing method of the conventional double layer circuit board simultaneously forms the first circuit 301, the second circuit 302, and the at least one connecting pillar 304 by plating the first plating layer 31 and the second plating layer 32. When at least one connecting pillar 304 is formed, the first plating layer 31 and the second plating layer 32 in the at least one via 303 are plated to fill the at least one via 303, but the first circuit 301 and the second circuit 302 are respectively formed on the first surface and the second surface of the substrate 30 by plating the first plating layer 31 on the first surface and the second plating layer 32 on the second surface.
Since the first plating layer 31 and the second plating layer 32 are plated at a same time, a plating thickness of the plated first plating layer 31 and the plated second plating layer 32 on the first surface and the second surface is equal to the plating thickness of the plated first plating layer 31 and the plated second plating layer 32 in the at least one via 303.
When the plated first plating layer 31 and the plated second plating layer 32 in the at least one via 303 fill the at least one via 303 to form the at least one connecting pillar 304, the plated first plating layer 31 and the plated second plating layer 32 on the first surface and the second surface are plated for a specific plating thickness to form the first circuit 301 and the second circuit 302. A portion of the first circuit 301 and a portion of the second circuit 302 corresponding to the at least one via 303 are not plated for the specific plating thickness, since the at least one via 303 needs to be filled. Therefore, when the first circuit 301 and the second circuit 302 are formed, a depression 305 is formed on the portion of the first circuit 301 and the second circuit 302 corresponding to the at least one via 303. Further, since depth of the at least one via 303 corresponds to thickness of the substrate 30, the thicker the substrate 30 is, the deeper the at least one via 303 is. Therefore, the depression 305 formed in the portion of the first circuit 301 and the portion of the second circuit 302 corresponding to the at least one via 303 is conspicuous, when the thickness of the substrate 30 is thick.
The first circuit 301 and the second circuit 302 are electronically connected through the at least one connecting pillar 304 in the at least one via 303. Therefore, when the depression 305 is conspicuously formed, a connecting strength between the first circuit 301 and the second circuit 302 may be decreased, and a yield rate of the conventional double layer circuit board may be affected.
Besides, when the at least one connecting pillar 304 is formed, the first plating layer 31 and the second plating layer 32 are simultaneously plated, and the at least one via 303 is filled from two opposite sides. Therefore, an interspace may be easily formed in the at least one connecting pillar 304. An electronic connection between the first circuit 301 and the second circuit 302 is not good because of the interspace. Further, when the conventional double layer circuit board is in use, a temperature of the conventional double layer circuit board is raised, and air in the interspace is expanded. The conventional double layer circuit board may explode due to the expanded air and high pressure in the interspace. Therefore, manufacturing method of the conventional double layer circuit board should be improved.
USPTO Backgrounds
USPTO Backgrounds