The present invention relates to an integrated circuit having insulated-gate transistors (thin-film transistors, TFTs) that are formed on an insulating surface of an insulating material such as glass, a material in which an insulating coating of, for instance, silicon dioxide is formed on a silicon wafer, or a like material. In particular, the invention relates to a complementary integrated circuit having N-channel TFTs and P-channel TFTs.
Complementary circuits using TFTs are conventionally used to drive an active matrix type liquid crystal display device, an image sensor, and the like. However, in general, the absolute value of the threshold voltage of the TFT is larger than that of the MOS transistor using a single crystal semiconductor. Further, the absolute value of a threshold voltage of an N-channel TFT is largely different from that of a P-channel TFT. For example, the threshold voltage is 2 V in an N-channel TFT, and -4 V in a P-channel TFT.
The large difference in the absolute value of a threshold voltage between an N-channel TFT and a P-channel TFT is not preferable in the operation of complementary circuits, and is particularly a large obstacle to reduce a drive voltage. For example, when a complementary inverter is constructed using such TFTs, P-channel TFTs generally having a larger absolute value in a threshold voltage cannot operate properly with a low drive voltage. That is, in substance, the P-channel TFTs function merely as passive elements like resistors, and cannot operate sufficiently fast. To have P-channel TFTs operate as active elements, the drive voltage needs to be sufficiently high.
In particular, when the gate electrode is formed of a material whose work function .phi.M is smaller than 5 eV, for instance, aluminum (.phi.M=4.1 eV), a difference .phi.MS in work function between the gate electrode and the intrinsic silicon semiconductor is as small as -0.6 eV. As a result, the threshold voltage of a P-channel TFT likely shifts to the negative side and that of an N-channel TFT becomes close to 0 V. Therefore, an N-channel TFT is likely rendered in a normally-on state (a current flows between the source and drain even if the gate voltage is 0 V).
In the above circumstances, it has been desired to approximately equalize the absolute value of a threshold voltage of the N-channel TFT to that of the P-channel TFT. In the case of conventional mono-crystalline semiconductor integrated circuit technology, the threshold voltages have been controlled by using N or P type impurity doping at a very small concentration, typically, less than 1.times.10.sup.18 atoms/cm.sup.3. That is, the threshold voltages can be controlled with an accuracy of 0.1 V or less by an impurity doping at 1.times.10.sup.15 to 1.times.10.sup.18 atoms/cm.sup.3.
However, in the case of using non-single crystalline semiconductors, especially, polycrystalline semiconductors, even if an impurity is added at 1.times.10.sup.18 atoms/cm.sup.3 or less, the shift of the threshold voltage is hardly observed. Moreover, if the concentration of the impurity exceeds 1.times.10.sup.18, the threshold voltage rapidly varies and the conductivity becomes p-type or n-type. This is because, polycrystalline silicon generally has a lot of defects in it. Since the defect density is about 1.times.10.sup.18 atoms/cm.sup.3, the added impurities are trapped by these defects and cannot be activated. Further, if the concentration of the impurity becomes larger than the defect density, the excess impurity is activated and changes the conductivity type to p-type or n-type.
USPTO Backgrounds
USPTO Backgrounds