1. Field of Invention
The invention relates to a circuit board and a manufacturing method thereof. More particularly, the invention relates to both a circuit board in which a circuit layer includes circuits formed by different conductive layers and a manufacturing method of the circuit board.
2. Description of Related Art
With current development of the circuit board technology, well-known non-embedded circuit boards have been gradually replaced by embedded circuit boards. Specifically, the common non-embedded circuit board is characterized in that circuits therein are protruded from a surface of a dielectric layer, while circuits in an embedded circuit board are embedded into the dielectric layer. The circuit structure of a circuit board is often formed by performing a photolithography and etching process or a laser ablating process.
For instance, a conventional process for fabricating a build-up circuit structure of an embedded circuit board by laser ablating includes following steps. A dielectric layer is formed on a circuit substrate having a circuit layer. A surface of the dielectric layer is irradiated by a laser beam to form an intaglio pattern and a blind via connecting the circuit layer. An electroplating process is performed to form a conductive layer filling the blind via and the intaglio pattern. So far, the build-up circuit structure of the embedded circuit board is substantially formed.
The depth of the blind via is different from the depth of the intaglio pattern, which is likely to cause improper control of electroplating conditions. Accordingly, when the conductive layer is formed by performing the electroplating process, the thickness of the conductive layer is apt to be non-uniform. When the conductive layer located outside the intaglio pattern and the blind via is subsequently removed, it is difficult to control the thickness of the removed conductive layer. As such, the embedded conductive layer is likely to be inappropriately thinned, or the residual conductive material is prone to be inappropriately left on the dielectric layer. In addition, when a build-up circuit layer is subsequently formed on the dielectric layer, problems of undesirable quality and low yield may occur in the electroplating process, thus reducing manufacturing yield of the build-up circuit structure and deteriorating reliability of the circuit board.
USPTO Backgrounds
USPTO Backgrounds