Since organic thin film transistors can be produced at lower temperature than inorganic semiconductors, a plastic substrate or film can be used as substrates of the organic thin film transistors, and by using such a substrate, a device which is more flexible than a transistor including an inorganic semiconductor, and is lightweight and is hardly broken can be produced. Moreover, since a device can be produced by film formation using a method of applying or printing a solution containing an organic material, a large number of devices can be produced on a substrate of large area at low cost.
Furthermore, since there are a wide variety of materials which can be used for the investigation of transistors, a device with a wide range of varied characteristics can be produced if materials varying in molecular structure are used in the investigation.
Further, organic semiconductor compounds to be used for producing an electric field effect type organic thin film transistor which is one aspect of organic thin film transistors are susceptible to environmental influences, such as humidity and oxygen, and therefore transistor characteristics are likely to deteriorate over time due to humidity, oxygen, etc.
Therefore, in the structure of a bottom-gate type organic thin film transistor device, which is one kind of electric field effect type organic thin film transistors, with an organic semiconductor compound exposed thereon, it is necessary to form an overcoat layer covering the whole structure of the device so as to protect the organic semiconductor compound from being in contact with the open air. On the other hand, in the structure of a top gate type organic thin film transistor device, an organic semiconductor compound is coated and protected with a gate insulating layer.
Thus, in organic thin film transistors, insulating layer materials are used in order to form an overcoat insulating layer and a gate insulating layer, both of which cover the organic semiconductor layer. In this specification, an insulating layer or an insulating film of an organic thin film transistor such as the overcoat insulating layer and the gate insulating layer is referred to as an organic thin film transistor insulating layer. In addition, a material used to form the organic thin film transistor insulating layer is referred to as an organic thin film transistor insulating layer material.
The organic thin film transistor insulating layer material is required to have insulating properties and characteristics superior in electrical breakdown strength when having been formed into a thin film. Further, particularly in the bottom-gate type electric field effect transistor, an organic semiconductor layer is formed on the gate insulating layer. Therefore, the organic thin film transistor gate insulating layer material is required to have affinity with an organic semiconductor compound for forming an interface in closely contact with the organic semiconductor layer and to have flatness of the surface on the organic semiconductor layer side of the film formed from the organic thin film transistor gate insulating layer material.
As a technology responding to such requirements, Patent Document 1 describes that an epoxy resin and a silane coupling agent are used in combination as an organic thin film transistor gate insulating layer material. In this technology, a hydroxyl group produced at the time of a curing reaction of the epoxy resin is reacted with the silane coupling agent. The reason for this is that the aforementioned hydroxyl group enhances the hygroscopic properties of the gate insulating layer material and impairs the stability of transistor performance.
Non-Patent Document 1 describes the use of a resin prepared by thermally cross-linking polyvinylphenol and a melamine compound for a gate insulating layer. In this technology, by cross-linking with the melamine compound, the hydroxyl groups contained in the polyvinylphenol are removed and the film strength is increased simultaneously. A pentacene TFT having this gate insulating layer has low hysteresis and exhibits durability to a gate bias stress.
Non-Patent Document 2 describes the use of polyvinylphenol and a copolymer prepared by copolymerizing vinylphenol with methyl methacrylate for a gate insulating layer. In this technology, the polarity of the whole film is reduced by interactions between the hydroxyl group of vinylphenol and the carbonyl group of methyl methacrylate. A pentacene TFT having this gate insulating layer has low hysteresis and exhibits stable electric properties.
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