1. Field of the Invention
The present invention relates to a printed circuit board and a manufacturing method thereof. More specifically, the present invention relates to a multi-layer printed circuit board incorporating a capacitor function and a manufacturing method thereof.
2. Description of Related Art
With the higher performance of electronic equipment, the number of parts mounted on a printed circuit board is being increased. Due to the miniaturization of electronic equipment, the size of the printed circuit board is required to be further reduced. The area on which the parts can be mounted is being made smaller.
With reduction of the parts in size, the density of surface mounting is becoming higher due to microfabrication of the conductor pattern of the printed circuit board.
The increased number of leads of mounted parts, smaller pitch, increased wiring resistance with a higher multi-layer printed circuit board due to a growing number of mounted parts and finer lines, signal delay due to cross talk noise, heat generation, and malfunction of the equipment with these become problems.
To solve these problems, the wiring length of parts need to be reduced. Specifically, there are proposed a method of burying the parts into a printed circuit board as well as of mounting the parts on the surface of the printed circuit board, and a method of incorporating a function equal to that of the parts into a printed circuit board using a high dielectric sheet material having a high dielectric constant and a paste material. Such techniques disclosed in Japanese Published Unexamined Patent Application Nos. 2002-100875 and Hei 6(1994)-69663 are known.
According to the above related art, the formation of a recess part on the printed circuit board to incorporate a smaller chip part therein to is proposed. At present, the printed circuit board is required to be thinner. Although the chip part is being made smaller, its thickness cannot be sufficiently small, obstructing making the printed circuit board thinner.
The smaller chip reduces the capacitance of a capacitor. It is difficult to respond to a request to make the capacitance larger.
USPTO Backgrounds
USPTO Backgrounds