1. Field of the Invention
The present invention relates to a composite synchronizing signal separation circuit, and more particularly, to a composite synchronizing signal separation circuit of a digital circuit system, which separates a horizontal synchronizing signal and a vertical synchronizing signal from an inputted composite synchronizing signal, and further, generates a field discriminating signal.
2. Description of the Related Art
FIG. 1 is a circuit diagram showing a configuration of a composite synchronizing signal separation circuit according to an analog circuit system disclosed, for example, in "Basic Image Signal Processing", issued on Apr. 1, 1987 by CQ Publishing Co. as an example of the prior art.
In FIG. 1, reference symbols 6a, 6b, 6c respectively designate resistors, 7 designates a capacitor and 8 designates a comparator.
A composite synchronizing signal SYNC is inputted to a minus-side input terminal of the comparator 8 via the resistor 6a. Between the resistor 6a and the minus-side input terminal of the comparator 8, the other end of the capacitor 7 whose one end is connected to an earth potential is connected. The capacitor 7 and the resistor 6a constitute an integration circuit. The resistors 6b and 6c are connected in series, whose one end is connected to a power potential and the other end is connected to the earth potential to constitute a potential dividing circuit. Potential generated at a connecting point of the resistors 6b and 6c is given to a plus-side input terminal of the comparator 8 as a threshold value.
The operation of such conventional composite synchronizing signal separation circuit by an analog circuit is described with reference to a timing chart of FIG. 2 showing the operating state.
The composite synchronizing signal SYNC which is to be inputted is, as shown in FIG. 2 (a), composed of a relatively minor cycle negative-polarity horizontal synchronizing signal and a relatively major cycle negative-polarity vertical synchronizing signal, and during the period of vertical synchronizing signal, the horizontal synchronizing signal is in a positive polarity. Though one horizontal synchronizing period is indicated by fH, before and after the vertical blanking time including the negative-polarity vertical synchronizing signal, the horizontal synchronizing signal is 1/2 of the original one horizontal synchronizing period fH.
When such composite synchronizing signal SYNC is inputted to the integration circuit constituted by the resistor 6a and the capacitor 7, a saw tooth integration wave-form signal SA as shown in FIG. 2 (b) is outputted. The integration wave-form signal SA is inputted to the minus-side input terminal of the comparator 8, and when it is above a threshold potential inputted to the plus-side input terminal of the comparator 8, the signal shaped into a high level is outputted and when it is below, the signal shaped into a low level is outputted from the comparator 8 as shown in FIG. 2 (c). The output signal from the comparator 8 is the vertical synchronizing signal VD.
In the conventional composite synchronizing signal separation circuit as mentioned above, since the vertical synchronizing signal is separated by the analog integration circuit, the time constant of the integration circuit constituted by the resistor and the capacitor must be adjusted, and there was a possibility that a phase shift may be occurs between the horizontal synchronizing signal and the vertical synchronizing signal, by the level of the composite synchronizing signal SYNC which is to be inputted and ambient temperature or the like of the apparatus.
USPTO Backgrounds
USPTO Backgrounds