The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
In recent years, matured photoelectric technologies and semiconductor manufacturing technologies promote the development of display panel technologies. Display panels include liquid crystal display panels, organic electroluminescent display panels, and the like. Generally, a display panel has a display region, an external circuit region outside the display region, and a wiring region located between the display region and the external circuit region. There are multiple pixel structures arranged in an array in the display region, and there are a circuit contact and a driving circuit in the external circuit region. There are multiple wires in the non-display regions. The wires are configured to electrically connect the pixel structures to the driving circuit, or electrically connect the pixel structures to an external circuit, so as to receive a control signal to display.
Currently, display devices are developed towards narrow bezels. Requirements of users on image quality become higher and higher, and a resolution of an image also becomes higher and higher, so a quantity of wires disposed in a peripheral circuit region is also bound to increase, and it is difficult to meet a design requirement of a narrow bezel. Consequently, how to consider both quality of a display image and the design requirement of the narrow bezel is an objective to be urgently pursued by a person skilled in the art.
USPTO Backgrounds
USPTO Backgrounds