Generally, a SOI (Silicon On Insulator) wafer with a single crystal silicon (Si) thin film (a SOI layer) upon an insulating silicon oxide (SiO2) layer (a BOX layer) provides high withstand voltage, since a substrate (the sample subjected to inspection) and the SOI layer, which is the device manufacturing layer, are electrically separated from one another; and the SOI wafer has features that the parasitic capacitance is low, and that, along with the anti radiation capability being great, there is no substrate bias effect. Therefore, beneficial effects such as high speed performance, low electrical power consumption, soft error free and the like are anticipated, and as substrates for next generation elements, various developments are being undertaken.
As a representative manufacturing method for a SOI wafer, there are so called bonding wafer technology and a SIMOX (Separation by IMplanted OXygen) technology. The bonding wafer technology forms an oxidized layer upon one or both of two wafers, and adhere the two wafers together intervening the oxide layer, in which the bonding is performed by heat processing the mechanically clamped wafers, and the SOI layer is manufactured by a mirror finish of the bond wafers by grinding and polishing. Since the crystallinity of the SOI layer made by the bonding is equal to that of the bulk silicon wafer, problems of defects and the like are few, and devices formed on the SOI layers have an excellent characteristics.
As a method for evaluating the defect density and the like within the SOI layer of the SOI wafer, there are proposed a method of washing the SOI wafer with an alkali detergent and dipping it into a solution of hydrofluoric acid to enlarge the etch pits due to the defects, and making the evaluation by measurement (for example, refer to Patent Reference No. 1), and a method of, after binding a SOI substrate and a bulk Si wafer, leaving only the surface Si layer upon the side of the bulk Si wafer, then etching the bulk Si wafer from the side of the surface Si layer using a selective etching liquid, and actualizing crystal defects and evaluating them (for example, refer to Patent Reference No. 2), and the like.
Furthermore, in a SIMOX technology, by oxygen ion implantation into a silicon substrate and high temperature heat processing within an Ar (argon)/O2 (oxygen) gas atmosphere, an oxygen super saturated region is converted into a BOX layer (SiO2 is formed by the oxygen ions being implanted into the Si), and SOI layer remains on the BOX layer, then forms a SOI wafer (a SIMOX wafer). In the SIMOX technology, since grinding and polishing as in the bonding wafer technology are not required, a benefit of comparatively simple manufacturing process is obtained.
However, in the SIMOX technology, there is a problem that during formation of the BOX layer within the silicon substrate by high temperature heat processing, a large number of defects are generated as Si parts which are not oxidized escaping from oxygen implantation. As a method of evaluating density of such defects in a BOX layer, an evaluation method is proposed (for example, refer to Patent Reference No. 3), in which, after eliminating the heat oxidized layer with HF liquid, SOI layer is etched with TMAH liquid and the defects within the BOX layer are etched to form etch pits, these etch pits are measured.
A method for defect analysis is known, in which a piece for analysis with a thin film shape is prepared from any part including the BOX layer, and by TEM (transmission electron microscope) observation of the piece, shape and types of defects are analyzed.
The following references are cited by way of example:
Patent Reference No. 1: Japanese Unexamined Patent Application, First Publication No. H11-74493 (FIG. 3)
Patent Reference No. 2: Japanese Unexamined Patent Application, First Publication No. H11-87450 (FIG. 1)
Patent Reference No. 3: Japanese Unexamined Patent Application, First Publication No. 2000-31225 (FIG. 1)
However, in an inspection of a SIMOX wafer by the above described method for defect evaluation, since the defects are measured not directly, but indirectly by measuring etch pits originating from the defects, there is a problem in the accuracy of inspection. Moreover, since only those defects are etched which penetrate the BOX layer or contact with the SOI layer, defects positioned within the BOX layer are not etched and cannot be measured. In other words, since the defects distributing three dimensionally within the BOX layer escape from measurement, the accuracy of inspection is deteriorated.
In the above described method of analyzing defects, there is a problem that, since the piece for analysis is processed from any part of the BOX layer, when the defect density is high, the piece for analysis include defects in high probability, but when the defect density is low, the probability that the piece for analysis includes defects is low, and analysis of the defects based on observation of such piece for analysis is remarkably low in efficiency. In the prior art, due to the fact that accurate inspection of the defects has been impossible, or efficient analysis has been impossible, it has been difficult to specify manufacturing conditions for reducing production of defects, and it has been impossible to manufacture a SIMOX wafer of high quality with few defects. As well in a SOI wafer made by a bonding wafer technology, a method of accurate evaluation of defects has not been established.
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