1. Field of the Invention
The present invention relates to short circuit protection of a transmission circuit.
More particularly, the present invention relates to the short circuit protection of output signal clamping circuitry, within a transmission circuit, from connections to the voltage supply rails.
2. Discuss of the Related Art
In the following text, figures that illustrate various embodiments of the state of the art and/or the present invention may incorporate the same or similar elements. Therefore, where the same or similar elements occur throughout the various figures, they will be designated in the same manner.
FIG. 1 represents a block diagram illustrating two data transceivers 100, 100' of an audio/video bus AVB.
Since the two illustrated transceivers 100, 100' include identical elements, only one of the transceivers will be described. Furthermore, it should be noted that the audio/video bus AVB can have approximately ten or more transceivers connected to it at any one time.
Transceiver 100 includes a transmission circuit Tx that is provided with a digital input signal Din and a receiver circuit Rx that receives transmitted data. When transceiver 100 is in transmission mode (Tx-mode) its digital input signal Din is converted into a differential digital output signal Dout for transmission via a twisted pair 120. The twisted pair provides a cheap but effective transmission medium.
A commercially available semiconductor device that incorporates such a transceiver 100 is the STV6455 AUDIO/VIDEO BUS INTERFACE which is produced by SGS-THOMSON MICROELECTRONICS.
The STV6455 is an audio and video interface device that allows easy connection and intelligent control of a plurality of the same, or similar, interface devices that share a common AVB. Such devices have to fulfill EIA/NCTA Joint Engineering Committee recommendations for connecting consumer audio and video apparatus.
FIG. 2 illustrates a circuit diagram of the transmission circuit Tx of FIG. 1.
The transmission circuit Tx includes two switches S1, S2, four resistors R1-R4 and two diodes D1, D2.
Diodes D1 and D2, are connected in opposition between the output terminals 200, 210 of the transmission circuit Tx. The respective anode and cathode terminals of diodes D1 and D2 are connected to the output terminal 200 and the respective cathode and anode terminals of diodes D1 and D2 are connected to the output terminal 210.
Diodes D1 and D2 work in opposition as a signal clamp. That is to say, diodes D1 and D2 act such that they clamp the voltage level of the signal between terminals 200 and 210 to a voltage level of +/-Vf, depending upon which one of the two diodes is conducting: Vf denotes the forward voltage drop of diodes D1 and D2 when they are conducting.
Switch S1 and resistor R1 are connected in series between a positive voltage supply rail A and the output terminal 200. Switch S2 and resistor R2 are connected in series between a negative voltage supply rail B and the output terminal 210. Switches S1 and S2 are controlled in unison by the digital input signal Din.
Resistor R3 is connected between the supply rail A and the output terminal 210 and resistor R4 is connected between the supply rail B and the output terminal 200.
When the transmission circuit Tx is in Tx-mode, switches S1 and S2 open and close in response to the signal Din.
By way of an example, consider the following. However, it will be necessary to make a few assumptions. Firstly, assume that switches S1 and S2 close when the digital input signal Din has a logic 1 state and that they open when the digital input signal Din has a logic 0 state: it should be understood that the inverse case could have also been assumed. Secondly, assume that R1=R2, R3=R4 and R3&gt;R1: for a typical transmission circuit Tx, typical values of R1 and R3 are respectively 500 ohms and 15 Kohms, for a typical supply voltage (VA-VB) of 10 volts. The typical values of resistors R1-R4 and of the supply voltage (VA-VB) will be valid for the complete text of this document unless otherwise stated. Resistors R3 and R4 deliberately have substantially larger values than resistors R1 and R2 so as to avoid excessive power dissipation since, unlike resistors R1 and R2, resistors R3 and R4 permanently conduct current when the supply voltages are present. Resistors R1 and R2 only conduct current when switches S1 and S2 are closed. Therefore when the transmission circuit is not in Tx mode, switches S1 and S2 are open.
When the signal Din has a logic 1 state, i.e. when switches S1 and S2 are closed, the majority of the current flows via S1, R1, D1, R2 and S2, since this is the path of least resistance between the supply rails A and B.
FIG. 3 illustrates an equivalent circuit diagram of the transmission circuit Tx when switches S1 and S2 are closed.
Diode D1 has a forward voltage drop Vf that is more positive at the output terminal 200 than at the output terminal 210, as indicated. The current flowing through diode D1 is approximately given by (VA-VB)/(R1+R2)=10/1000=10 milliAmperes.
Referring back to FIG. 2, when the signal Din has a logic 0 state, i.e. when switches S1 and S2 are open, the current flowing between the supply rails A and B can only flow via R3, D2 and R4.
FIG. 4 illustrates an equivalent circuit diagram of the transmission circuit Tx when switches S1 and S2 are open.
Diode D2 has a forward voltage drop, also denoted Vf, that is more positive at the output terminal 210 than at the output terminal 200, as indicated. The current flowing through diode D2 is approximately given by (VA-VB)/(R3+R4)=10/30000=0.33 milliAmperes.
Table 1, hereinafter, illustrates the approximate short circuit current values IAB, flowing from supply rail A to supply rail B, that can be tolerated by the transmission circuit Tx as a result of various combinations of short circuit connections when switches S1 and S2 are open.
Table 2, hereinafter, illustrates the approximate short circuit currents IAB that can be tolerated by the transmission circuitry Tx as a result of various combinations of short circuit connections when switches S1 and S2 are closed.
For Table 2, it should be noted that the respective resistance values of the parallel combinations of resistors R1, R3 and R2, R4 have, for reasons of simplifying the principle, been approximated to R1 and R2: this approximation is justified by the fact that the ratio R1:R3=R2:R4=30:1. It should be understood that a more accurate analysis of the currents IAB can readily be ascertained by those skilled in the art.
TABLE 1 ______________________________________ Short Circuit Current IAB (From: To) (mA) See Ref. Figure ______________________________________ 200:210 10/30000 = 0.33 FIG. 5a 200:A 10/15000 = 0.66 FIG. 5b 210:A 10/15000 = 0.66 FIG. 5c 200:B 10/15000 = 0.66 FIG. 5d 210:B 10/15000 = 0.66 FIG. 5e (200 + 210):A 10/15000 = 0.66 FIG. 5b (200 + 210):B 10/15000 = 0.66 FIG. 5e ______________________________________
TABLE 2 ______________________________________ Short Circuit Current IAB (From: To) (mA) See Ref. Figure ______________________________________ 200:210 10/1000 = 10 FIG. 6a 200:A 10/500 = 20 FIG. 6b 210:A 10/500 = 20 FIG. 6c 200:B 10/500 = 20 FIG. 6d 210:B 10/500 = 20 FIG. 6e (200 + 210):A 10/500 = 20 FIG. 6c (200 + 210):B 10/500 = 20 FIG. 6e ______________________________________
FIGS. 5a-5e illustrate circuit representations of the short circuit combinations of the transmission circuit Tx as set out in Table 1.
FIGS. 6a-6e illustrate approximate circuit representations of the short circuit combinations of the transmission circuit Tx as set out in Table 2.
As noted earlier, the currents IAB for the combinations of short circuits, as set out in Tables 1 and 2, can be tolerated by the transmission circuit Tx. That is to say, the transmission circuit Tx will not work correctly but, it will not suffer any adverse damage or effects due to any of the aforementioned short circuits, i.e. the transmission circuit Tx will recover from these short circuit faults. Neither would any other transceiver 100' or transceivers suffer any adverse damage or effects.
However, there are two possible short circuit conditions that are not illustrated in either of Tables 1 or 2. These two short circuit conditions are when the output terminals 200, 210 of the transmission circuit Tx are respectively connected directly to the positive and negative voltage supply rails A and B or vice-versa.
FIG. 7a illustrates the equivalent circuit diagram of the transmission circuit Tx when the output terminals 200, 210 are respectively connected directly to the positive and negative voltage supply rails A and B.
FIG. 7b illustrates the equivalent circuit diagram of the transmission circuit Tx when the output terminals 200, 210 are respectively connected directly to the negative and positive voltage supply rails B and A.
Referring to FIG. 7a, diode D1 is connected directly across the supply rails A and B such that a short circuit current IAB' flows. Since D1 is forward biased its impedance is negligible: diode D2 being reverse biased. Therefore, the current IAB' flowing through D1 will only be limited by the internal impedance of the voltage supply apparatus that is connected to the supply rails A, B. Since the internal impedance of the voltage supply apparatus will also be negligible, the current IAB' will be very large, so much so that it will completely destroy D1. The transmission circuit Tx will not recover from this particular short circuit fault. Furthermore, there is also the possibility that such a short circuit will affect the other parts of the transceiver 100 and/or other transceivers 100' that are connected to the bus AVB.
Referring to FIG. 7b, this case is exactly the same as that referred to in relation to FIG. 7a, except that in this case, it is diode D2 that is connected directly across the supply rails A and B: diode D1 being reverse biased.
In a best case scenario, either of the short circuit faults associated with FIGS. 7a and 7b will produce a serious problem for the transmission circuit Tx that develops the fault. And in a worse case scenario, either of these short circuit faults will produce a serious problem for all of the other transceivers (100') connected to the AVB.
Such scenarios are best avoided. Accordingly, it is an object of the present invention to overcome these short circuit problems.
Another object of the present invention is to provide a fully recoverable arrangement for overcoming these short circuit problems.
Other objects of the present invention include providing simple, cost effective, and integratable arrangements for overcoming these short circuit problems.
USPTO Backgrounds
USPTO Backgrounds