1. Field
Exemplary embodiments of this patent document relate to a semiconductor design technology and, more particularly, to a control signal generation circuit and a nonvolatile memory device including the same.
2. Description of the Related Art
Semiconductor memory devices are divided into volatile memory devices and nonvolatile memory devices. Volatile memory devices have higher write and read speeds, but cannot retain data without a constant source of power. Nonvolatile memory devices have slower write and read speeds, but can retain data even without a constant source of power. Therefore, nonvolatile memory devices are used to store data that must be retained regardless of whether there is a constant source of power available. Nonvolatile memory devices include Read Only Memory (ROM), Mask ROM (MROM), Programmable ROM (PROM), Erasable Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), flash memory, Phase change Random Access Memory (PRAM), Magnetoresistive RAM (MRAM), Resistive RAM (RRAM), and Ferroelectric RAM (FRAM). Flash memory is divided into NOR and NAND types.
Flash memory not only has the advantage of RAM, in that it may be freely programmed or erased, but it also has the advantage of ROM, in that it can retain data even without a constant source of power. Flash memory is widely used as a storage medium in portable electronic device such as digital cameras, Personal Digital Assistants (PDA), and MP3 players.
In order to increase the data storage capacity of a memory device, more memory cells must be formed in a limited area. This means that the size of the memory cells needs to be reduced. However, since the ability to reduce the size of memory cells is limited, a three-dimensional (3D) memory device including memory cells that are vertically stacked on a semiconductor substrate has been proposed. In a highly integrated 3D memory device, signals are transmitted to different parts of the memory device through various transmission lines. However, when loading of the transmission lines is increased, a mismatch may occur between the timings at which the signals are transmitted, thereby negatively influencing the operation of the memory device.
USPTO Backgrounds
USPTO Backgrounds