Apparatuses and methods consistent with exemplary embodiments relate to semiconductor packages and methods of fabricating the same and, more particularly, to semiconductor packages including passive elements and methods of fabricating the same.
In the semiconductor industry, there is an increased demand for high capacity, thin and small sizes of semiconductor devices and electronic products using the semiconductor devices. Thus, various packaging techniques have been suggested. For example, a semiconductor package may include integrated semiconductor chips having various functions and may have a smaller area than a general package having one semiconductor chip.
A package-on-package (PoP) technique including stacked packages has been suggested in order to realize a high density package including a plurality of semiconductor chips. A PoP-type semiconductor package may be used in order to satisfy small sizes of electronic portable devices and multi-function of mobile products.
Additionally, it is considered that passive elements are mounted on semiconductor packages in order to improve a power integrity characteristic.
USPTO Backgrounds
USPTO Backgrounds