In modern semiconductor devices, the ever increasing device density and decreasing device dimensions demand more stringent requirements in the packaging or interconnecting techniques of such devices. Conventionally, a flip-chip attachment method has been used in the packaging of IC chips. In the flip-chip attachment method, instead of attaching an IC die to a lead frame in a package, an array of solder balls is formed on the surface of the die. One process for forming solder balls is carried out by an evaporation method of lead and tin through a mask for producing the desired solder balls.
One problem with through-mask evaporation is that material is used very inefficiently. The efficiency of material use is becoming increasingly important as recent materials requirements such as ultra-low alpha lead and Pb-free drive have increased material costs. Another problem with through-mask evaporation is that when the bump pitch falls below 225 μm, yields begin to degrade with evaporation. Additionally, longer evaporation times are required with Pb-free solders. Yet a further problem with evaporation methods is that 300-mm evaporation masks used for 300-mm wafers are not very stable or robust.
Other solder ball formation techniques that are capable of solder-bumping a variety of substrates have also been proposed such as solder plating and solder paste screening. In solder plating a layer of solder is applied directly to a conductive pattern. The solder coating can be used as an etch mask. These techniques work fairly well in bumping semiconductor substrates that contain solder structures over a minimum size. One of the more popularly used techniques is a solder paste screening technique which can be used to cover the entire area of an 8 inch wafer. However, with the recent trend in the miniaturization of device dimensions and the reduction in bump-to-bump spacing (or pitch), the solder paste screening technique becomes impractical. For instance, one of the problems in applying solder paste screening technique to modern IC devices is the paste composition itself. Pastes are generally composed of a flux and solder alloy particles. The consistency and uniformity of the solder paste composition become more difficult to control with a decreasing solder bump volume.
A possible solution for this problem is the utilization of solder pastes that contain extremely small and uniform solder particles. However, this can only be done at a high cost penalty. Another problem in using the solder paste screening technique in modern high density devices is the reduced pitch between bumps. Since there is a large reduction in volume from a screened paste to the resulting solder bump, the screen holes must be significantly larger in diameter than the final bumps. The stringent dimensional control of the bumps makes the solder paste screening technique impractical for applications in high density devices.
A more recently developed injection molded solder (“IMS”) technique attempted to solve these problems by dispensing molten solder instead of solder paste. However, problems have been observed when the technique is implemented to wafer shaped substrates. U.S. Pat. No. 5,244,143, which is commonly owned by International Business Machines Corporation, discloses the injection molded solder technique and is hereby incorporated by reference in its entirety. One of the advantages of the IMS technique is that there is very little volume change between the molten solder and the resulting solder bump. The IMS technique utilizes a solder head that fills molds of various materials such as boro-silicate glass, silicon, polymers, metals, and the like that are wide enough to cover most single chip modules. Excess solder is removed as the solder head moves about the mold. The IMS method for solder bonding is then carried out by applying a molten solder to a substrate in a transfer process. When smaller substrates, i.e., chip scale or single chip modules are encountered, the transfer step is readily accomplished since the solder-filled mold and substrate are relatively small in area and thus can be easily aligned and joined in a number of configurations. For instance, the process of split-optic alignment is frequently used in joining chips to substrates. The same process may also be used to join a chip-scale IMS mold to a substrate (chip) which will be bumped. One problem with current IMS systems is that they have been restricted to linear deposition of solder into rectangular molds. That is, the mold and the solder head are moved linearly with respect to each other such that the cavities move perpendicular to a slit in the solder head thereby filling the cavities as they pass. The molds are limited to a rectangular configuration.
Therefore a need exists to overcome the problems with the prior art as discussed above.
USPTO Backgrounds
USPTO Backgrounds