1. Field of the Invention
The present invention relates to a non-volatile memory using a thin film transistor (TFT) and to a method of manufacturing the non-volatile memory.
2. Description of Related Art
The technique for forming a semiconductor thin film on an insulating substrate, especially the one for forming a silicon thin film on a glass substrate, is advancing at a remarkable pace in recent years. Conventionally, an insulated gate field effect transistor such as a MOS FET is formed on a single crystal semiconductor substrate. A TFT that has as its active layer a semiconductor thin film formed on an insulating substrate is expected to have low parasitic capacitance, high operation-speed, less power consumption, and a low manufacturing cost. Great hopes are laid on a system-on-glass in which those characteristics of TFT are utilized to integrate a system LSI on a glass substrate. To realize the system-on-glass, it is indispensable to build a non-volatile memory from a semiconductor thin film.
A non-volatile memory formed on a single crystal semiconductor substrate is typically one composed of a non-volatile memory element (hereinafter referred to as memory MOS FET in which an electric charge accumulating layer (hereinafter referred to as floating gate) isolated electrically is formed in the active layer-gate of the MOS FET. In the memory MOS FET, the threshold changes in accordance with the amount of electric charges held in the floating gate and, therefore, one memory state is distinguished from another memory state depending on the magnitude of the threshold. Electric charges are injected to the floating gate electrically by a tunnel current or hot electrons. Electric charges are withdrawn from the floating gate by a tunnel current electrically, or by ultraviolet irradiation.
The expression “active layer-gate” means a region between an active layer and a gate. In this specification, the name of one component of a device, such as an active layer or a gate, is hyphenated to the name of another component to refer to a region between the former component and the latter component.
In the memory MOS FET, injection and withdrawal of electric charges by a tunnel current take place in a part of a first insulating film (hereinafter referred to as tunnel oxide film) in the active layer-floating gate, or throughout the first insulating film. Therefore, for the sake of low voltage operation and quick rewriting, the tunnel oxide film has to be thin. On the other hand, for the sake of electric charge holding, the tunnel oxide film has to be thick in order to reduce the leak current. Thus the tunnel oxide film of the memory MOS FET is required to have conflicting properties and very quality insulating film is needed for the tunnel oxide film.
The insulating film can be formed by deposition using CVD apparatus, or by thermal oxidization or other methods. Thermal oxidization can provide a good quality insulating film that has only few defects in the active layer-thermal oxide film interface in addition to other merits. Accordingly, a thermal oxide film is desirably used as the tunnel oxide film.
However, in a normal TFT manufacturing process, an active layer formed by a semiconductor thin film etching process drops off sharply along the sides like a cliff. When the active layer having the cliff-like side ends is thermally oxidized. the resultant oxide film is locally thin at the side ends and causes stress concentration as has been commonly known.
The side ends are the left and right faces to the face the active layer that is in contact with the substrate. In other words, the side ends are side faces with respect to the face of the active layer that is in contact with the substrate. The side ends, i.e., the side faces, are not limited to flat faces but may be curved faces in this specification. Also, the side faces may be faceted to have a multitude of faces.
The above problems are illustrated in FIGS. 2A and 2B. FIG. 2A shows the section of the active layer after formation. Reference symbol 201 denotes a substrate having an insulating surface, 202, the active layer, 203, active layer side ends, and 204, corners of the active layer side ends 203 (hereinafter referred to as active layer side end corners). FIG. 2B shows the section of the active layer after formation of a thermal oxide film, which is denoted by 205. The active layer side end corners 204 become pointed during the thermal oxidization step to make the thermal oxide film 205 locally thin.
These problems of locally-thinned oxide film and stress concentration are explained by a simulation using a viscoelasticity model of silicon dioxide. Detailed descriptions can be found on this matter in, for example, a document written by S. Isomae and S. Aoki for ICSSDM Dig. Tech. Papers, 1986 (p. 517) and a document written by R. B. Marcus and T. T. Sheng for Journal of the Electrochemical Society vol. 129, 1982 (pp. 1278-1282).
As described above, the insulating characteristic of a tunnel oxide film is seriously impaired at active layer side ends when a memory TFT is fabricated through the active layer formation process and the thermal oxidization process for obtaining a quality tunnel oxide film in a normal TFT manufacturing process. The term memory TFT refers to a non-volatile memory element in which an electrically isolated floating gate is formed in the active layer-gate of the TFT.
With the semiconductor active layer side end corners pointed, another problem is raised, in which the electric field created by electric charges that are accumulated in the floating gate concentrates around the active layer side end corners even when no voltage is applied to a control gate.
These problems mean an increase in leak current flowing from the floating gate through the active layer side end corners to the active layer in the memory TFT, leading to degradation in electric charge holding characteristic. These problems caused by thermal oxidization of the active layer side ends similarly occur in the case where formation of the oxide film by CVD apparatus or the like precedes thermal oxidization.
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