Deposition processes are commonly used in semiconductor manufacturing to deposit a layer of material onto a substrate. Processing is also used to remove layers, defining features (e.g., etch), preparing layers (e.g., cleans), doping or other processes that do not require the formation of a layer on the substrate. Processes and process shall be used throughout the application to refer to these and other possible known processes used for semiconductor manufacturing and any references to a specific process should be read in the context of these other possible processes. In addition, similar processing techniques apply to the manufacture of integrated circuits (IC) semiconductor devices, flat panel displays, optoelectronics devices, data storage devices, magneto electronic devices, magneto optic devices, packaged devices, and the like. As feature sizes continue to shrink, improvements, whether in materials, unit processes, or process sequences, are continually being sought for the deposition processes. However, semiconductor companies have traditionally conducted research and development (R&D) on full wafer processing through the use of split lots, as the deposition systems are designed to support this processing scheme. This approach has resulted in ever escalating R&D costs and the inability to conduct extensive experimentation in a timely and cost effective manner. Techniques and systems for depositing increasing processing throughput for semiconductor R&D have been previously described. However, some of these systems are amenable to improved accuracy during deposition to increase throughput. Thus, techniques for improving the accuracy of the testing of multiple different process variations on a single substrate is provided to more efficiently evaluate the viability of different materials, unit processes, or process sequences.
USPTO Backgrounds
USPTO Backgrounds