Focal plane arrays (FPAs) are an array of detectors that are biased in parallel from an external voltage supply to generate electric field within a photosensitive area of a pixel, where photogenerated charges are drifted by the applied electric field, and signal is obtained by collecting the drifted charges at an electrode. Typically, photoconductive detectors made of polycrystals or nanocrystals suffer from 1/F noise caused by crystalline defects present at or near the interface between polycrystal or nanocrystal grains. In non-single crystalline detector material, these defects contribute greatly to photosensitivity as well as the source of 1/F noise (or low frequency noise). Generally, 1/F noise results from a wide range of carrier drift velocities or time constants of carriers in these defective materials.
One conventional type circuit operates with a DC voltage level supplied to a voltage divider circuit with the detector resistance connected in series with a load resistance that allows signal to be extracted when the detector resistance changes, but given there is a constant DC current flowing in the detector, it does not suppress low frequency noise. This is the most common biasing scheme. An alternate method is to use the DC signal from the detectors into double correlated sampling circuits that requires optical chopping to generate the reference from which the signal can be subtracted. The limitations of this method are that an optical chopper is required and that the low frequency noise is suppressed up to ½ the chopping frequency, but noise above this frequency is not suppressed and may actually be amplified which limits the noise reduction in this method if the detector knee frequency is above one half the chopping frequency
Another method involves electrically modulating the detector to suppress the low frequency noise by a sine, triangle, or square wave pulse by lowering the average current passing through the detector. This method has the advantage of not requiring an optical chopper, but only suppresses the low frequency noise to a degree such that increased peak-to-peak bias results in increased responsivity and noise for only a modest gain in the signal-to-noise ratio (SNR). However, by reducing the total current during bias, low frequency is further reduced. In yet another method, the voltage across the detector is clamped to a high level voltage, then a switch is thrown that allows the bias across the detector to be discharged across a capacitor where the resulting RC discharge voltage is sampled. As light on the detector changes however, the resistance changes and the resulting RC decay changes. In this method, there is still some current flowing through the detector which can still lead to 1/F noise.
USPTO Backgrounds
USPTO Backgrounds