1. Field of the Invention
The present invention relates to a solid-state imaging apparatus for a digital camera, a method of driving the solid-state imaging apparatus, and an imaging system.
2. Description of the Related Art
According to Japanese Patent Application Laid-Open No. 2001-045375, when CMOS imaging devices are used, there is performed an operation (hereinafter referred to as a BLK operation”) of reading a signal corresponding to one row of pixels and sending the signal to a reading-out capacitor acting as a temporary storage unit. The time required to read from the imaging devices is shortened by making the BLK operation period temporally overlap the horizontal scanning time period for outputting the signal from the reading-out capacitor to the outside of the imaging device.
According to Japanese Patent Application Laid-Open No. 2001-045375, however, since the BLK operation period and the horizontal scanning time period are temporally overlapped, the pixel signal transfer operation in the BLK operation period adds noise by the BLK operation to a signal obtained by scanning in the horizontal scanning time period.
The noise generation mechanism will be described. FIG. 13 illustrates consumption current fluctuation and power source voltage fluctuation when the operating method of Japanese Patent Application Laid-Open No. 2001-045375 is used. When horizontal scanning signal HSRC pulses of the horizontal scanning circuit and pixel signal reading out signal pulses are input to the solid-state imaging apparatus, current is consumed in the clock buffer for waveform shaping of horizontal scanning signal HSRC, the circuit driven by horizontal scanning signal HSRC, and other circuits. More specifically, the time of generation of consumption current approximately corresponds to rise and fall transition periods of horizontal scanning signal HSRC. Here, descriptions are given by taking as an example, the power source voltage; the impedance of paths for receiving ground potential and other voltages has a limited value, so multiplying the impedance by consumption current gives power source voltage drop in the impedance. Thus the power source voltage fluctuation illustrated in FIG. 13 occurs. When horizontal scanning signal HSRC pulses are periodically input, consumption current/power source voltage fluctuation synchronized with the pulses occurs. Typically, as an index for the performance of suppressing effects of power source voltage fluctuation on the signal output, PSRR (Power Supply Rejection Ratio) is used. Power source voltage fluctuation itself does not directly appear as noise in the signal output. However, unless PSRR has an infinite value, power source voltage fluctuation cannot be perfectly removed. Further, PSRR cannot have an infinite value. However, when only horizontal scanning signal HSRC pulses are periodically input, while noise caused by power source voltage fluctuation is generated in signals by horizontal scanning, this noise is synchronized with horizontal scanning signal HSRC. Thus, uniform noise is generated in the signals, so the noise is hard to spot; but when drive signal φTX1 as illustrated in FIG. 13 is input, consumption current/power source voltage fluctuation unrelated to the period of horizontal scanning signal HSRC occurs at time A and time B. Consequently, peculiar noise occurs in the signal output at time A and time B, thus causing image degradation.
According to Japanese Patent Application Laid-Open No. 2001-045375, in addition to the consumption current in the clock buffer for pixel signal transfer, the operation of transferring a signal to the holding capacitor causes a constant current load to charge or discharge the capacitor acting as a temporary storage unit. Accordingly, due to power source voltage fluctuation caused by the drive signal different from horizontal scanning signal HSRC, noise is added to an image signal obtained by horizontal scanning.
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