1. Field of the Invention
The present invention relates to a method of fabricating a flash memory. More particularly, the present invention relates to a method for fabricating a flash memory having a bipolar junction transistor used to do an erase operation.
2. Description of the Related Art
The basic operations of a memory device are write data and read data. The write operation of a flash memory includes a program operation and an erase operation. These two operations are performed by adjusting the threshold voltage of a floating gate. The data stored in the flash memory is changed by performing the program operation and the erase operation.
Fowler-Nordheim tunneling theory is used to perform the erase operation in a p-channel flash memory. Channel hot carrier injection theory or Band-to-Band tunneling theory is used to perform the program operation.
The drawbacks of using Fowler-Nordheim tunneling for the erase operation are low operation efficiency, poor endurance capability, etc.
FIG. 1 is a schematic, cross-sectional diagram used to depict the erase operation of a conventional flash memory.
Referring to FIG. 1, a control gate voltage (V.sub.eg) is much larger than 0V while performing the erase operation. A drain voltage (V.sub.d) and a source voltage (V.sub.g) are floating, thus no hot electrons flow between a source region and a drain region. The substrate voltage (V.sub.sub) is 0V or negative bias. Electrons in the channel tunnel to a floating gate because of Fowler-Nordheim tunneling.
In the method mentioned above, the electrons in the channel tunnel to the floating gate because of a high electrical field produced by the control gate voltage (V.sub.eg) and the substrate voltage (V.sub.sub). A tunneling oxide layer between the substrate and the floating gate suffers the high electrical field, so that the lifetime and reliability of the tunneling oxide layer are affected.
USPTO Backgrounds
USPTO Backgrounds