The present invention generally relates to semiconductor devices, and more particularly relates to preventing gate collapse during fabrication of semiconductor devices.
In many instances, fabrication processes for fin field-effect-transistors (finFETs) utilize flowable oxide in the shallow trench isolation (STI) area to ensure STI oxide gap fill. Flowable oxide is generally a poor quality material and causes severe undercutting in the STI areas during CMOS dual epitaxy processes. The undercutting typically causes high aspect ratio gates to collapse.
USPTO Backgrounds
USPTO Backgrounds