Example embodiments of the present inventive concepts relate to a memory device and/or a method of operating the same. For example, at least some example embodiments relate to a memory device which performs tests on a memory cell array and/or a method of operating same.
Memory devices may be implemented by using semiconductors including materials such as silicon (Si), germanium (Ge), gallium arsenide (GaAs), and indium phosphide (InP). The memory devices may be classified into volatile memory devices and nonvolatile memory devices.
A nonvolatile memory device is a memory device in which stored data is not erased when the memory device is out of power supply. The nonvolatile memory devices may include NAND flash memory (NAND), vertical NAND (VNAND), NOR flash memory, resistive random access memory (RRAM), phase-change memory (PRAM), magnetoresistive random access memory (MRAM), and the like.
A volatile memory device is a memory device in which stored data is erased when the memory device is out of power supply. The volatile memory devices may include static random access memory (SRAM), dynamic random access memory (DRAM), latch, flip-flop, register.
With advances in technology, there have been efforts to reduce the size of the memory devices. However, without actually manufacturing the memory devices, it is difficult to perform tests to determine the effects of reducing the size of the memory devices. On the other hand, when the memory devices are actually manufactured, it is difficult to apply results from the tests to the memory devices, and a long period of time and a high cost are required to manufacture the reduced size memory device and/or remanufacture the memory device to correct issues discovered during the test.
USPTO Backgrounds
USPTO Backgrounds