The present disclosure relates to semiconductor structures and methods of fabricating the same. More particularly, the present disclosure relates to semiconductor devices containing III-V compound semiconductor materials.
In order to be able to make integrated circuits, such as memory, logic and other devices, of higher integration density than currently feasible, one has to find ways to further downscale the dimensions of field effect transistors, such as metal oxide semiconductor field effect transistors and complementary metal oxide semiconductors. Scaling achieves compactness and improves operating performance in devices by shrinking the overall dimensions of the device. With scaling reaching theoretical limits, new device geometries and materials have been explored. Compound semiconductors are receiving renewed attention for use as channel materials for ultra large scale integration (ULSI) digital logic applications due to their high electron hole mobility.
USPTO Backgrounds
USPTO Backgrounds