1. Technical Field
The present invention relates to a driver circuit and a test apparatus. In particular, the present invention relates to a driver circuit that outputs a transmission signal according to a reception signal received from outside and a test apparatus that tests a device under test.
2. Related Art
A test apparatus causes a device under test to output a response signal by supplying a test signal having a prescribed waveform to the device under test, such as a semiconductor apparatus, and detecting the output response signal. The test apparatus then makes a judgment concerning pass/fail of the device under test by comparing the detected response signal to an expected value.
The test apparatus transmits the test signal from an apparatus main body to the device under test via a transmission path such as a cable. The transmission path such as a cable, however, causes a high frequency component of the test signal propagating thereon to be deteriorated. In response to this, the test apparatus outputs a test signal having a high frequency component that is enhanced in advance, such that the test signal achieves the desired waveform upon reaching an input end of the device under test (e.g., Japanese Patent Application Publication No. 2002-40112). In U.S. Pat. No. 6,292,010 Specification, a test apparatus in which a voltage buffer and a current buffer can be replaced and connected at an output terminal thereof is recorded.
Here, the test apparatus generates the test signal having the enhanced high frequency component by adding to the waveform of the test signal to be supplied to the device under test an enhancement waveform that represents the high frequency component of the aforementioned waveform. When the timing at which the test apparatus adds the enhancement waveform to the basic waveform is misaligned, a test signal having a waveform different from the desired waveform is supplied to the device under test, so that accurate testing cannot be performed. Furthermore, in a case where a multitude of transistors are connected to an output terminal of the test apparatus in order to add the enhancement waveform to the basic waveform, the test apparatus has an enlarged output capacitance. Because the band is cut due to the slowing of the rising speed (or falling speed) of the test signal when the output capacitance is large, the test apparatus cannot supply the desired waveform to the device under test, and therefore cannot accurately test the device under test.
USPTO Backgrounds
USPTO Backgrounds