1. Field
Methods and apparatuses consistent with example embodiments relate to a semiconductor package and a method for fabricating the same. Specifically, exemplary embodiments relate to a semiconductor package in which a plurality of semiconductor chips is laminated and a method for fabricating the same.
2. Related Art
In recent years, in accordance with the development of the semiconductor industry and the needs of users, electronic devices have been further reduced in size and weight, and semiconductor elements, as essential components of electronic devices, also have been reduced in size and weight. As a result, a technique of combining multiple semiconductor elements into a single product has been developed. In order to combine semiconductor elements as a single product, a multi-chip package (MCP), which including a plurality of semiconductor chips, is fabricated.
Due to the laminated structure of the semiconductor chip, a thickness of the multi-chip package is increased. To compensate for the thickness of the multi-chip package, the thickness of the semiconductor chip is reduced. However, a thin semiconductor chip may cause various problems. For example, because a thin semiconductor chip is vulnerable to stress applied from the outside, and characteristics of a circuit element in the semiconductor chip may easily change.
USPTO Backgrounds
USPTO Backgrounds