Fault isolation for large electronic modules, such as an arithmetic section of an instruction processor, is most effective if it can be done with a FTO (First Time Occurrence) analysis. Such an analysis is generally based on data capture in the hardware at the time of the error. The effectiveness of FTO analysis is dependent on the error detection coverage and quantity of data captured.
When clear signals fail, they can greatly restrict the usefulness of error capturing mechanisms. This is especially troublesome in an environment where a software analysis routine automatically attempts to interpret the captured data, which can be greatly distorted from what should have been captured due to the failing clear signals. Failure of clear signals can result in large numbers of registers and latches being cleared within an electronic unit, including compare and capture registers. Without a method of detecting whether any clear signals have failed, the driver module for these signals would always have to be considered as a possible source of the failure, and this leads to needless swapping of modules in an attempt to fix the problem.
A method of detecting errors for clear signals is therefore highly desirable. Such faults can be immediately identified as being involved with clear signals. The absence of the detection of a clear signal error eliminates the driver modules from consideration and adds credibility to any values captured in compare and capture registers when other faults occur.
USPTO Backgrounds
USPTO Backgrounds