1. Field of the Invention
This invention relates generally to input/output bus connections and computer peripheral devices, and more particularly to methods and apparatus for efficiently sharing input/output bus connections with peripheral devices.
2. Description of the Related Art
Most computer systems of today are designed to be flexible systems that are typically customized to meet the particular needs of a user. Therefore, the motherboards of most computer systems are designed with a number of input/output (I/O) connections. The types of connections and the number of connections will vary from computer to computer, but recently, most modern computer systems have PCI I/O bus connections, and IDE/ATAPI I/O bus connections integrated directly into the computer system's motherboard. Of course, host adapters may also be used to connect SCSI I/O bus connections to, for example, a PCI I/O bus connection. Through these I/O bus connections, users are able to connect various peripheral devices, such as, CD-ROM drives, CD-R Drives, CD-RW drives, DVD drives, printers, scanners, second hard drives, etc.
For ease of discussion, FIG. 1A shows a computer system's motherboard 102 having a number of I/O bus connections for interconnecting to external peripheral devices. As shown, the motherboard 102 may be equipped with several I/O bus connections, such as, a secondary channel IDE/ATAPI (I/O) 104, a primary channel IDE/ATAPI (I/O) 106, a PCI (I/O) 108, a SCSI (I/O), and a parallel port (I/O) (not shown). In this example, the motherboard 102 has a processor (CPU) 101 for controlling the processing of data in the computer system, as well as interacting with any of the number of peripheral devices. Although there is a wide selection of peripheral devices that may be purchased and connected to the computer system's motherboard 102, the cost of the varying types of devices is not the same.
By way of example, although SCSI peripheral devices have in the past been more common and have several I/O bus connection advantages, IDE/ATAPI peripheral devices are quickly becoming more common place. This is because IDE/ATAPI peripheral devices are substantially less expensive than SCSI and other higher-end peripheral devices. In addition, when SCSI devices are used, the user will also be required to purchase a separate host adapter, which necessarily drives up the cost of SCSI devices. In response to the increased popularity of IDE/ATAPI peripheral devices, most computer manufacturers have been installing IDE/ATAPI I/O bus connections directly into the computer system's motherboard as shown in FIG. 1A.
In FIG. 1A, each of the IDE/ATAPI (I/O) bus connections 104 and 106 are coupled to two peripheral devices. Specifically, the secondary channel IDE/ATAPI (I/O) 104 is connected to a compact disc-recordable (CD-R) drive 110. In this example, CD-R drive 110 is connected as a "master," and an other device 112 is connected as a "slave" device. For completeness, a hard drive device 114 that is set to be a master, and a device 116 that is set to be a slave are connected to the primary channel IDE/ATAPI (I/O) 106.
As mentioned above, although some higher end compute I/O directly integrated into the motherboard, most do not, and are therefore required to use a SCSI host adapter card 118. The host adapter card 118 is shown connected to an I/O 108 of the motherboard 102, which may be a PCI I/O bus. The host adapter card 118 is therefore used to connect up to 7 peripheral devices. In SCSI, each of the peripheral devices is given an ID number that establishes an arbitration priority for the bus. The SCSI protocol also has a well known "disconnect/reconnect" feature that enables a SCSI peripheral device to release the bus and make it available for other SCSI peripheral devices when data is not being transferred by a given peripheral device.
Although this feature works well in SCSI devices, IDE/ATAPI devices which are becoming ever more popular and are typically less expensive than SCSI devices do not have a disconnect/reconnect feature. Therefore, when one IDE/ATAPI device is in control of the bus, it will block access to the bus for the whole time while the IDE/ATAPI device is performing its function. In fact, the bus will remain inaccessibly to other devices even if no data is being transferred to or from the IDE/ATAPI device.
FIG. 1B shows a timing diagram that illustrates the typical stages of a data writing operation (i.e., burning of data) performed by an IDE/ATAPI CD-R drive 110. As mentioned above, a critical aspect of CD-R operations (or other media writing operations) is to ensure that the CD-R 110 device does not run out of data while it is performing a write to a CD media. As shown, when a CD-R write operation is to be performed through the CD-R drive 110, data is initially transferred to the buffer of the CD-R drive 110 during time 150, until the buffer is completely full. Once full, a pre-write calibration operation is commenced, where the CD-R drive's laser is powered up, the head mechanics are positioned, a power calibration is performed, and the writing operation is begun during a time 152.
During time 152, additional data may have been transferred to the CD-R drive's buffer, which leaves small windows of time 140a, 140b, 140c, to 140n for the slave device 112 to access the IDE/ATAPI (I/O) bus connection 104 (i.e., the IDE/ATAPI bus is made accessible to other devices). After these short windows expire, the bus will again become inaccessible, even though data transfers from the host to the CD-R drive 110 may only be occurring for a small fraction of the busy times 154. As a result, once the CD-R drive 110 takes control of the bus, it will virtually cut-off access to the slave IDE/ATAPI device, even if no data transfers are occurring during the busy times 154. In one example, if the user desired to copy data from a slave drive (i.e., a CD-ROM) and write the copied data to a master CD-R drive, the CD-R drive would most likely run out of data to write, and therefore ruin the CD media. This is a likely scenario because the CD-ROM drive is only able to access the bus during the small window of time 140a, 140b, 140c, 140n. As a result, the data stored in the CD media of the CD-ROM may not be accessed sufficiently to enable a transfer of that data to the CD-R drive.
As a further problem, the host CPU, e.g., processor CPU 101 will also remain busy during the busy times 154. Unfortunately, many of the standard computer operations, such as, multi-tasking in other computer programs, scrolling up and down text, and moving a computer mouse across a screen may become jerky, sluggish, or cause a system freeze for several seconds. Consequently, current IDE/ATAPI devices place a severe burden on a host's CPU and make bus access by slave devices virtually impossible.
In view of the foregoing, there is a need for a method and an apparatus that enables a first peripheral device to efficiently communicate to a bus, and also enables other peripheral devices that share the same bus to communicate through the bus when the first peripheral device is not currently in the process of transferring data over the bus.
USPTO Backgrounds
USPTO Backgrounds