Recently, reconfigurable semiconductor integrated circuits such as field programmable gate arrays (“FPGAs”) have attracted attention. The FPGAs use logic blocks provide basic logical information, and change connections among the logic blocks by using switch blocks. A user of an FPGA may achieve a desired logic function in this fashion. Data of the switch blocks for switching the logical information and the connections of the logic blocks are stored in a configuration memory, and the arbitrary logic function is achieved based on the data. The configuration memory is mainly used in two kinds of circuits. One is a multiplexer circuit (“MUX circuit”) for selecting data for changing wiring line connections, and the other is a look-up table circuit (“LUT circuit”) for providing logic data for achieving a desired logic.
The configuration memory may include SRAM cells. However, the SRAM cells may cause soft errors due to collision of high-energy particles or noise. If soft errors occur in the configuration memory of the FPGA, circuit information in the FPGA may be rewritten.
If nonvolatile memory cells are used in the configuration memory, the problem of soft errors may be avoided. For example, if flash memory cells or anti-fuse elements are used, the problem of soft errors may be avoided or alleviated in principle.
However, the flash memory cells may increase the costs since it is necessary that a process for forming CMOS circuits is mixed with a process for forming flash memory cells. The anti-fuse elements may be produced at low costs during a normal CMOS process. However, since they cannot be rewritten, they may not be used in a development stage in which trial and error is required.
USPTO Backgrounds
USPTO Backgrounds