(a) Field of the Invention
The present invention relates to masks forming a polysilicon (polysilicon) and a method for fabricating a thin film transistor using the same and, more particularly, to masks for crystallizing amorphous silicon into polysilicon.
(b) Description of the Related Art
Generally, a liquid crystal display has two panels with electrodes, and a liquid crystal layer sandwiched between the two panels. The two panels are sealed to each other by way of a sealer while being spaced apart from each other by way of spacers. Voltages are applied to the electrodes so that the liquid crystal molecules in the liquid crystal layer are re-oriented to thereby control the light transmission. Thin film transistors are provided at one of the panels to control the signals transmitted to the electrodes.
In the usual thin film transistors, amorphous silicon is used to form a semiconductor layer. The amorphous silicon-based thin film transistor bears a current mobility of about 0.5–1 cm2/Vsec. Such a thin film transistor may be used as a switching circuit for the liquid crystal display. However, as the thin film transistor involves a low current mobility, it is inadequate for directly forming a driving circuit on the liquid crystal panel.
In order to overcome such a problem, it has been proposed that the polysilicon bearing a current mobility of about 20–150 cm2/Vsec should be used to form the semiconductor layer. As the polysilicon thin film transistor involves a relatively high current mobility, a Chip In Glass where the liquid crystal panel has a built-in driving circuit can be realized.
In order to form the polysilicon thin film transistor, it has been proposed to employ a technique of directly depositing a polysilicon layer onto a substrate at high temperature, a technique of depositing an amorphous silicon layer onto a substrate and crystallizing the deposited amorphous silicon layer at 600° C., or a technique of depositing an amorphous silicon layer onto a substrate and heat-treating the deposited amorphous silicon layer using laser. However, as such techniques require high temperature processing, it becomes difficult to employ the techniques for use in processing a liquid crystal panel glass substrate. Furthermore, the uniformity related to the electrical characteristics of the neighboring thin film transistors is deteriorated due to the non-uniform crystalline particle system.
In order to solve such a problem, a sequential lateral solidification (or crystallization) process where the size distribution of the grains of the polysilicon can be controlled in an artificial manner has been developed. This is a technique based on the fact that the grains of the polysilicon are grown perpendicular to the interface between the laser-illuminated liquid phase region and the non-illuminated solid phase region. The laser beams pass through the slit-patterned transmission region of the mask, and completely melt the amorphous silicon to thereby form a slit-shaped liquid phase region at the amorphous silicon layer. Thereafter, the liquid phase amorphous silicon is crystallized while being cooled. The growth of the crystal grains begins from the boundary of the solid phase region where the laser is not illuminated while proceeding perpendicular thereto. The grain growths stop at the center of the liquid phase region while meeting there. Such a process is repeated while moving the mask slits in the growing direction of the grains so that the sequential lateral solidification can be made throughout the entire target area.
However, in case the slit width of the mask is too large, the grain growth beginning from the boundary of the slit does not proceed up to the center of the slit so that small sized particles may be formed at the center of the slit by way of homogeneous nucleation. In order to solve such a problem, the slit-patterned area may be divided into two different regions such that the slit patterns arranged at the two regions are deviated from each other, thereby making the desired crystallization.
However, even with the use of such a technique, the size of the grains of the crystalline particles cannot exceed that of the slit patterns and hence, it is yet limited to control the crystalline particle size in a desired manner.
USPTO Backgrounds
USPTO Backgrounds