The Quanta Image Sensor (QIS) has been proposed as a possible next-generation image sensor. In the single-bit QIS, the specialized, sub-diffraction-limit sized binary-output photo-element sensitive to a single photoelectron is called a “jot”. Central to single-bit as well as multi-bit QIS implementations is single-electron sensitivity (˜0.15 e− r.m.s.) which can be obtained from high, in-pixel conversion gain, e.g., more than 1000 μV/e−. For the high conversion gain needed, the capacitance of the floating diffusion (FD) node needs to be minimized. According to the present inventors' previous QIS work, the capacitance of the FD node has been greatly reduced, but further reductions in FD node capacitance and/or additional or alternative ways to reduce FD node capacitance may still be advantageous and/or desired.
By way of example, in accordance with the present inventors' previous QIS work, some QIS pixel designs incorporating a pump-gate charge transfer with a distal FD and a gateless reset have a greatly reduced FD total capacitance such that the residual part of the FD capacitance is mainly attributed to the MOSFET source-follower (SF). According to a calculation for an example of such a QIS design, to achieve a conversion gain of 10000 μV/e−, the total FD capacitance needs to be lower than 0.16 fF. With a 65 nm CMOS process, a MOSFET SF will contribute about 0.3 fF to the FD capacitance, thus effectively rendering it more difficult to achieve the 10000 μV/e− conversion gain for such a design at this technology node.
USPTO Backgrounds
USPTO Backgrounds