1. Field of the Invention
The present invention relates to a calculation method, a generation method, a program, an exposure method, and a mask fabrication method.
2. Description of the Related Art
A projection exposure apparatus which projects and transfers a circuit pattern formed on a mask (or reticle) onto a substrate such as a wafer by a projection optical system is employed to fabricate a semiconductor device by using photolithography . Along with the recent advance in the micropatterning of semiconductor devices, the projection exposure apparatus is being desired to further improve the resolving power (attain a higher resolution).
As a means for achieving a higher resolution of the projection exposure apparatus, it is a common practice to attain a higher NA of the projection optical system (increasing the numerical aperture (NA) of the projection optical system), and to shorten the exposure light. Also, the RET (Resolution Enhanced Technology) which improves the resolution of the projection exposure apparatus by decreasing the k1 factor (also called the “process constant”) is attracting a great deal of attention.
The smaller the k1 factor, the higher the degree of difficulty of exposure. Conventionally, exposure conditions under which a circuit pattern can be projected faithfully have been detected by repeating experiments several times. That is, exposure (e.g., the exposure conditions and exposure method) has been optimized in this way. At present, however, as the degree of difficulty of exposure is increasing, the detection of the exposure conditions based on experiments requires a long time and high cost. Nowadays, to solve this problem, it is becoming mainstream to optimize, for example, the exposure conditions by repeating exposure simulation using a computer. The mainstream of the simulation technique is the so-called model-based RET which executes simulation based on a physical model of optics.
The model-based RET generally uses partial coherent imaging calculation. Improving the speed of the partial coherent imaging calculation makes it possible to shorten the time taken for the model-based RET. Nowadays, along with the progress in computer environment, the calculation speed is improved by forming a parallel processing system using a plurality of computers. There has also been proposed a technique of improving the calculation speed more effectively than in the formation of a parallel processing system using computers by improving an algorithm which executes the partial coherent imaging calculation.
For example, Cris Spence, “Full-Chip Lithography Simulation and Design Analysis—How OPC is Changing IC Design”, Proceedings of SPIE, U.S.A., SPIE press, 2005, Vol. 5751, pp. 1-14 reports that an algorithm called the SOCS increased the calculation speed (simulation speed) to 10,000 times that before. Also, Alfred Kwok-kit Wong, “Optical Imaging in Projection Microlithography”, U.S.A., SPIE press, 2005, pp. 151-163 describes the partial coherent imaging calculation, but does not introduce an algorithm which attains a calculation speed more than that attained by using the SOCS algorithm. Note that Alfred Kwok-kit Wong, “Optical Imaging in Projection Microlithography”, U.S.A., SPIE press, 2005, pp. 151-163 calls the SOCS coherent decomposition.
Unfortunately, the SOCS requires much time to calculate the TCC (Transmission Cross Coefficient) and decompose it into eigenvalues and eigenfunctions.
USPTO Backgrounds
USPTO Backgrounds