The present invention relates to a semiconductor device which receives the supply of an electric current so as to be permitted to increase the resistance of the device itself, and a method of increasing the resistance of an electric fuse.
Hitherto, there has been used a fuse which receives the supply of an electric current to be permitted to increase the resistance of the fuse itself. In the present specification, such a fuse is called an electric fuse. The electric fuse is set inside an insulator layer. In the specification, a structure having an insulator layer and an electric fuse is called an electric fuse structure. In the specification, an increase in the resistance of an electric fuse is, for example, a phenomenon that the value of an electric current flowing into the electric fuse becomes small, that is, the electric fuse turns into a state that the fuse has a higher resistance than before, or a phenomenon that the flow of an electric current between two elements connected to both ends of the electric fuse stops completely, that is, the electric fuse is cut or melted/cut, or the resistance of the electric fuse becomes infinite. Examples of the electric fuse described in the specification include a fuse for making the use of an electric circuit impossible, a fuse which is used in an analog device or the like to adjust the voltage of the device, and a fuse which is used as a tag for leaving the hysteresis of a process, a test result or the like.    [Patent Document 1] Pamphlet of WO 97/12401    [Patent Document 2] U.S. Pat. No. 5,969,404    [Patent Document 3] U.S. Pat. No. 6,323,535    [Patent Document 4] U.S. Pat. No. 6,433,404    [Patent Non-document 1] V. Klee et al., “A 0.13 μm logic based embedded DRAM technology with electrical fuses, Cu interconnect in SiLk™, sub-7 ns access and its extension to the 0.10 μm generation”, IEDM Conference (2001).
USPTO Backgrounds
USPTO Backgrounds