A stacked type semiconductor memory device in which memory cells are integrated three-dimensionally has recently been proposed. In such a stacked type semiconductor memory device, a stacked body in which electrode films and insulating films are stacked in an alternating manner is provided on a semiconductor substrate, and a semiconductor pillar that passes through the stacked body is provided. A memory cell is formed at each portion where one of the electrode films and the semiconductor pillar intersects. There is demand for a higher degree of integration in such a stacked type semiconductor memory device as well.
USPTO Backgrounds
USPTO Backgrounds