The present disclosure relates to a semiconductor unit including, for example, a plurality of types of semiconductor chips being laminated, a method of manufacturing the semiconductor unit, a solid-state image pickup unit, and an electronic apparatus.
Recently, a solid-state image pickup unit, such as a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) image sensor, has been proposed, which includes different types of semiconductor chips being laminated, for example, as disclosed in Japanese Unexamined Patent Application Publication No. 2010-245506 (JP2010-245506A). In the solid-state image pickup unit of JP2010-245506A, two types of semiconductor chips are bonded together, and connection pads provided on the chips are then electrically connected to each other with through-electrodes. Specifically, a through-electrode is provided for each pad of the chips, and an embedded interconnection is formed by a so-called damascene process for connection between such through-electrodes.
USPTO Backgrounds
USPTO Backgrounds