1. Field of the Invention
The present invention relates generally to a microcomputer which has a built-in read-only memory (hereinafter referred to as a ROM) for storing a program for use with a central processing unit (hereinafter referred to as a CPU) and, more particularly, to a microcomputer which allows ease in developing program that is stored in the ROM.
2. Description of the Prior Art
FIG. 21 illustrates in block form the configuration of a conventional microcomputer having a memory built-in. In FIG. 21, reference numeral 1 denotes a CPU of the microcomputer, 2 a ROM for storing programs that the CPU uses, 3 a random access memory (hereinafter referred to as a RAM), 4 peripheral functions of the microcomputer, and 5 an internal bus which connects these parts, 5a being an address bus, 5b a data bus and 5c a control bus.
The operation of this conventional microcomputer will be described below.
The CPU 1 reads thereinto program from the ROM 2 via the internal bus 5 for actuation of the microcomputer by sequential execution of the program. With the progress of the program execution, the CPU 1 exchanges data between it and the RAM 3 or peripheral functions 4 via the internal bus 5, conducting various data processing.
Incidentally, the ROM 2 is a read-only memory and programs are written therein during manufacture and cannot be rewritten afterward. Accordingly, it is customary in the art for a user to adopt such a scheme as mentioned below in his programming and debugging during program development.
FIG. 22 is a block diagram showing a program development environment for developing programs that are stored in the ROM 2 of the microcomputer. The parts corresponding to those in FIG. 21 are identified by the same reference numerals and no description will be repeated. In FIG. 22, reference numeral 11 denotes a microcomputer whose configuration is shown in FIG. 21, 12 an external bus leading to the internal bus 5 of the microcomputer 11, 13 an emulation memory connected via the external bus 12 to the microcomputer 11 and housed together therewith in a part called a pod, 14 an emulator (hereinafter referred to as an ICE) connected to the external bus 12 connected to the microcomputer 11, 15 a host computer formed by a personal computer or engineering working station (hereinafter referred to as an EWS) connected to the ICE 14, and 16 a user board, on which each terminal of the microcomputer 11 led out of the pod by a cable is connected to a socket placed in the space where the microcomputer 11 is mounted.
Incidentally, the microcomputer 11 has a special mode for use only in program development; it is necessary to prepare facilities of prohibiting access to the built-in ROM 2 and leading out the internal bus 5 to the outside in that mode. An emulation memory 13, formed by a read/write memory (usually a static RAM), is connected to the external bus 12 for emulation of the ROM 2. That is, there is provided outside the microcomputer 11, as a substitute for the ROM 2, the emulation memory 13 which permits reading therefrom and writing thereto through the external bus 12. The CPU 1 of the microcomputer 11 runs the program under development which is loaded in the emulation memory 13 and, if bugs are found, fixes them one by one to complete the program.
A user normally describes a program in C, assembler or similar language on the host computer 15. The program thus described is compiled into a file of a hexadecimal format, which is transferred to the ICE 14. The ICE 14 is connected to the external bus 12 interconnecting the microcomputer 11 and the emulation memory 13 and downloads program codes from the host computer 15 into the emulation memory 13 via the external bus 12. The ICE 14 is connected not only to the external bus 12 but also to the microcomputer 11 by control signals (a reset input, a debugging interruption request input, etc.) for controlling the operation of the microcomputer 11 during debugging and monitor signals for monitoring the operation of the microcomputer 11 from the outside. Upon downloading the program to the emulation memory 12, the ICE 14 resets the microcomputer 11 to start it.
Then the microcomputer 11 begins execution of the program on the emulation memory 13. Signals on the external bus 12 and the monitor signals during the program execution are temporarily stored in a trace memory in the ICE 14. The trace memory is accessible from the host computer 15 in real time, enabling the user to check the state of execution of his developed program. The ICE 14 is equipped with a function of monitoring the signals on the external bus 12 and the monitor signals at any time, a function of suspending the execution of the program through generation of a debugging dedicated interrupt when the state of operation of the microcomputer 11 meets a preset condition, and a function of checking and modifying the contents of internal registers and memories of the microcomputer 11 in the suspended state. Making full use of such functions, the user makes a check to see if his developed program runs as intended and, if not, then tracks down the cause of errors; in the case of programming errors, he fixes the program on the host computer 15 and then downloads it again to the emulation memory 13 via the ICE 14. The program development work proceeds while repeating such operations.
Because of such a configuration as described above, the conventional microcomputer needs to have a special debugging dedicated mode such as a function of inhibiting access to the built-in ROM 2 and leading out the internal bus 5 to the outside for external installation of the emulation memory 13 and a function of allowing a debugging dedicated interruption input or outputting monitor signals for notifying the ICE 14 of the operating conditions in the microcomputer 11; in some instances, it is necessary to prepare a program development dedicated chip without the ROM 2.
Furthermore, the ROM 2 is built in the chip and hence is accessible at high speed, but an access to the external emulation memory 13 at the same speed as that for accessing the ROM 2 requires an expensive and high-speed memory. Since the operation in the chip is becoming increasingly faster with recent improvements in semiconductor processes, accessing the externally connected emulation memory 13 at the same speed as that for accessing the built-in ROM 2 is becoming more and more difficult. Moreover, the ICE 14 monitors signals on the internal bus 5 of the microcomputer 11 and monitor signals therefrom and, upon detection of a preset state, suspends the program execution by sending a debug interruption request to the microcomputer 11 (a break function), but a time delay occurs in requesting the interruption after the state detection, occasionally resulting in the program having al ready run past the initially set point when the program execution is actually suspended after acceptance of the interruption. Besides, since each terminal of the microcomputer 11 is led out of the pod by a cable or the like and connected to the socket of the user board 16, the situation may sometimes arise where, under the influence of a signal transmission delay by the cable or the like, the timing for input and output signals is not the same as in the case where the microcomputer 11 is mounted directly on the user board 16.
USPTO Backgrounds
USPTO Backgrounds