In the field of semi-conductors, with the recent development of electronic equipment having multiple functions, a reduced size and a reduced weight, a circuit has become denser, and a fine circuit pattern having many pins at a narrow pitch has been used. In order to cope with the demand for fineness of a circuit pattern, it has been attempted to connect a plurality of conducting patterns formed on a substrate and a conducting pattern or an Integrated Circuit (IC) or an Large Scale Integration (LSI) via a anisotropic conductive film therebetween.
For example, JP-A-55-161306 (the term "JP-A" as used herein means an "unexamined published Japanese patent application") discloses an anisotropic conductive sheet comprising an insulating porous sheet in which the fine through-holes of a selected area are metal-plated. On connecting an IC, etc., since the sheet has no metallic projections on its surface, it is necessary to form a projected electrode (bump) on the IC on the connecting pad side, making the connection step complicated.
In an attempt to facilitate connection, as shown in FIG. 2, it has been proposed to fill a metallic substance 3 in fine through-holes 2 of an insulating sheet 1 formed in the thickness direction in such a manner that the resulting anisotropic conductive film has metallic bumps 4 projected from the film surface, as disclosed in JP-A-62-43008, JP-A-63-40218, and JP-A-63-94504. However, adhesion between filled metallic substance 3 and insulating film 1 is not so sufficient that the metallic substance is apt to fall off. It follows that the fine through-holes, which ought to exhibit conductivity, fail to exhibit conductivity and lack reliability in electrical connection.
USPTO Backgrounds
USPTO Backgrounds