The present invention generally relates to metal-oxide-semiconductor field-effect transistors (MOSFET), and more specifically, to MOSFET interconnect technology.
The MOSFET is a transistor used for amplifying or switching electronic signals. The MOSFET has a source, a drain, and a metal oxide gate electrode. The metal gate is electrically insulated from the main semiconductor n-channel or p-channel by a thin layer of insulating material, for example, silicon dioxide or glass, which makes the input resistance of the MOSFET relatively high. The gate voltage controls whether the path from drain to source is an open circuit (“off”) or a resistive path (“on”).
N-type field effect transistors (NFET) and p-type field effect transistors (PFET) are two types of complementary MOSFETs. The NFET uses electrons as the majority current carriers and is built directly in a p substrate with n-doped source and drain junctions. The PFET uses holes as the majority current carriers and is built in an n-well with p-doped source and drain junctions.
The fin-type field effect transistor (FinFET) is a type of MOSFET. The FinFET contains a conformal gate around the fin that mitigates the effects of short channels and reduces drain-induced barrier lowering. The “fin” refers to the narrow channel between source and drain regions. A thin insulating high-k gate oxide layer around the fin separates the fin channel from the gate metal.
USPTO Backgrounds
USPTO Backgrounds