1. Field of the Invention
The present invention relates to piezoelectric oscillating circuits and here in particular to a method for manufacturing a piezoelectric oscillating circuit in thin-film technology for adjusting a predetermined natural frequency of the oscillating circuit. Further, the present invention relates to filter arrangements including thus manufactured piezoelectric oscillating circuits.
2. Description of the Related Art
Piezoelectric oscillating circuits generally include a piezoelectric layer, which is at least partially arranged between opposing electrodes. The electrodes may be multilayer structures or single layer structures. The individual layers of a piezoelectric oscillating circuit are manufactured in thin film technology. The natural frequency in such piezoelectric oscillating circuits, which are manufactured in thin film technology, strongly depends on the layer thickness of the individual layers (electrode layers, piezoelectric layers etc.). The separation accuracy of methods used in thin layer technology, for example PVD, CVD, vapor deposition etc., is typically at (max−min)/mean value=10%. The layer thicknesses hereby vary within the substrate (wafer) and from substrate to substrate. By optimizing the deposition processes, this thickness variation may be improved to 2 to 3%.
For use in the LF area, this accuracy may be sufficient, however, piezoelectric oscillating circuits are preferably used in filters of RF applications up to the GHz area. An exemplary filter configuration is a band pass filter which is among others used in mobile communication devices. For such applications, the required accuracy in thin film technology lies below 0.1 percent (max−min) for the location of the natural frequency.
In order to achieve the accuracy of the frequency position required for the RF area, a method for manufacturing a layer having a default layer thickness profile is known. Here, on a substrate after the deposition of the piezoelectric oscillating circuits, the natural frequency is determined at several positions of the substrate/wafer by measurement and from the deviation of the measured frequency from the specified target frequency a required thinning of a top layer of the individual piezoelectric oscillating circuits is determined. This thinning is in this method achieved by a local sputtering off of the top layer using an ion beam. The ion beam has a diameter of about 10 mm, which is substantially larger than the diameter of an individual piezoelectric oscillating circuit (device) which is approx. 1 mm, but is substantially smaller than the diameter of the wafer (substrate), which is at approx. 50-200 mm. A locally different removal on the wafer according to the required frequency correction is achieved by scanning the beam across the substrate with a locally different etching rate and/or speed.
This known method is only applied to a topmost layer of the generated and completed thin layer oscillating circuit, and due to the fact that this method is only applied once to this topmost layer after an overall completion of the piezoelectric oscillating circuit, the following requirements result for the topmost layer and for the reproducibility and accuracy of the etching step.
The depositions of all layers contained within the piezoelectric oscillating circuit result in a scattering of the normal frequency of all produced oscillating circuits of (max−min)/mean value=10%. In order to be able to correct this scattering completely, the mean value needs to be arranged by a corresponding lead in the deposition, so that the natural frequency of all generated piezoelectric oscillating circuits (devices) is below the specified target frequency, as due to the etching off of the topmost layer only a correction of the natural frequency in an upward direction may be performed.
Further, the topmost layer needs to be sufficiently thick, so that a shifting of the natural frequency by 10% is possible by thinning without completely removing this layer. This causes that the piezoelectric oscillating circuits only comprise a minimum scattering in frequency distribution after that correction, the thickness of the topmost layer, however, substantially scatters, as all thickness errors of the overall layer staple need to be corrected by the topmost layer. This causes a strong scattering of other characteristic features of the piezoelectric oscillating circuits, like e.g. the piezoelectric coupling, the excitement of undesired lateral modes or electric losses.
A further requirement resulting from the above known method relates to the accuracy of the etching process. In order to hit a frequency distribution with a width of 10% in a target window of 0.1%, the etching process needs to comprise a relative accuracy and repeatability of better than 1%. This requirement not only results for the etching rate of the process, i.e. the removal of the topmost layer in nanometers, but also for the association which frequency shift is caused by a predetermined thickness removal. Only when both values, the etching rate in nm/sec and the frequency change rate in MHz/nm, are known to be an accuracy greater than 1% and are stable, may the above described local etching step bring all piezoelectric oscillating circuits into the specified frequency window in one process step.
The problem in the above described method is, however, that it is relatively difficult to determine the two relevant parameters, the etching rate and the frequency change rate with an accuracy of below 1% for every wafer.
USPTO Backgrounds
USPTO Backgrounds