1. Field of the Invention
The present invention relates to a design description rewriting device, a design description rewriting method, and a computer readable medium storing a program for performing the method to effectively rewrite design description of development software or design description of an electronic system including a digital circuit, etc. so that the effective performance of the software and the electronic system is improved.
2. Related Art
In the design description of a program and a digital circuit, when description having a high-level abstraction is made by using a general type, there is a tendency that development efficiency and maintenance efficiency are improved while the effective efficiency and quality of the execution program and the digital circuit thus generated are decreased. On the other hand, when description having a low-level abstraction is made by using a concrete type, there is a tendency that development efficiency and maintenance efficiency are decreased because of the decrease in modularity caused by the complicated description while the execution efficiency and quality of the execution program thus generated are improved. Accordingly, when the description is made by using the general type in the first design, the type must be rewritten into the concrete type subsequent to system level test etc.
As a concrete example, when the circuit description is made by using a high-level design technique, the above relationship can be applied to an integer having specified bit width and an integer having unspecified bit width. When the circuit description is made at an operation level without specifying the bit width, development efficiency is improved. However, the circuit thus generated has unnecessary wiring, by which the size of the circuit is increased and the speed of the circuit is decreased. When the circuit description is made in detail by specifying the bit width, development efficiency is decreased due to the complicated description. However, the circuit thus generated does not have unnecessary wiring, by which the size of the circuit is decreased and the speed of the circuit is improved.
As another example, the above relationship can also be applied to a software program described in a dynamically-typed style and a software program described partially or completely in a statically-typed style. In the former case, development efficiency is improved, while execution efficiency and reliability are decreased since static analysis etc. of a compiler cannot be applied. In the latter case, development efficiency is decreased, while execution efficiency and reliability can be improved by applying the static analysis.
In JP-A 2007-287088 (Kokai) and JP-A 2006-190085 (Kokai), a function to judge the bit width is used and provided. Although the disclosed device performs the judgment by analyzing the influence etc. of the type, modularity to change the type is low, by which development efficiency is not enough. Here, the modularity means a property which makes it possible to make a change based on a certain respect only by locally rewriting codes.
Further, in JP-A 2006-228221 (Kokai) which discloses a device to rewrite the type in the design description, modularity is not given to the instructions to rewrite the type, by which development efficiency is not enough.
USPTO Backgrounds
USPTO Backgrounds