Many portable products, such as cell phones, laptop computers, personal data assistants (PDAs) and the like, utilize a processing system that executes programs, such as, communication and multimedia programs. A processing system for such products may include multiple processors, memory for storing instructions and data, controllers, peripheral devices, such as communication interfaces, and fixed function logic blocks configured, for example, on a single chip. At the same time, portable products have a limited energy source in the form of batteries that are often required to support high performance operations from the processing system. To increase battery life, when possible, it is desired to perform these operations at reduced power levels. Many personal computers are also being developed to support high performance operations at low power drain to reduce overall energy consumption.
Processors are added to a processing system to improve performance, but the multiple processors and peripheral devices, such as direct memory access (DMA) bus masters, increase the complexity of accessing memory. To improve memory access performance in a multiprocessor system, local or private data caches are generally used to hold data that is shared between the processors. The sharing of data among multiple processors and by memory access agents, such as the DMA bus masters, causes a cache coherency problem. For example, without control over cache coherency, memory operations, which may be interleaved between the multiple processors and memory agents, may cause copies of shared data in one or more caches to become out of date. To resolve the cache coherency problem, various forms of coherency protocols are used to maintain an ordered use of shared data.
One technique for maintaining coherency involves processors monitoring bus traffic, also termed “snooping”, for writes to the memory system. Snoop monitoring requires a processor to capture the memory address of a write operation and then request a local cache access at the captured memory address to see if shared data is in the local cache. If shared data is found in the local cache, the snooping processor invalidates its copy of the shared data since it would be out of date due to the detected write operation. If shared data is not found in the local cache, no further operation is taken. In either case, the snoop operation accesses the local cache and thereby reduces the effective bandwidth of the cache. In a multiprocessing system, snooping activity increases as the number of processors sharing memory increases and the resulting cache access for each snoop operation can significantly impact the performance of the multiprocessor system.
USPTO Backgrounds
USPTO Backgrounds