1. Technical Field
The present disclosure relates to a reference voltage generating circuit and, more particularly, to an internal reference voltage generating circuit for an input buffer of a high-speed semiconductor memory device, and a semiconductor memory device including the same.
2. Discussion of the Related Art
Owing to the development of mobile systems, the demand for semiconductor memory devices operated on a high-speed low voltage has increased. Conventional semiconductor memory devices operated on such a high-speed low voltage stably receive input signals having a small swing width using input buffers based on a predetermined reference voltage.
The reference voltage of the input buffers, however, is generated outside the conventional semiconductor memory devices and is then supplied to the conventional semiconductor memory devices.
FIG. 1 is a block diagram showing an external reference voltage generating circuit 15 and a semiconductor memory device 100 that receives a reference voltage from the external reference voltage generating circuit 15. Referring to FIG. 1, the external reference voltage generating circuit 15 is formed on a printed circuit board (PCB) outside the semiconductor memory device 100 and generates the reference voltage VREF. The external reference voltage generating circuit 15 applies the reference voltage VREF to the semiconductor memory device 100 through a reference voltage input pin REFIN. Input buffers 11 and 13 then receive the reference voltage VREF.
The external reference voltage generating circuit 15 includes resistors R1 and R2 serially connected to a power voltage VCC and a ground voltage VSS, and generates the reference voltage VREF at a connection point of the resistors R1 and R2. The external reference voltage generating circuit 15 provides the reference voltage VREF to the semiconductor memory device 100 and to a memory controller (not shown) that controls the semiconductor memory device 100.
The semiconductor memory device 100 requires the reference voltage input pin REFIN since the reference voltage VREF is generated from outside the semiconductor memory device 100. Also, a standby current flows from the power voltage VCC to the ground voltage VSS in the external reference voltage generating circuit 15, thereby causing an increase in power consumption of the semiconductor memory device 100.
USPTO Backgrounds
USPTO Backgrounds