With increasing miniaturization and sophistication of semiconductor devices such as memories, solid state image sensors such as CCDs, and the like, silicon wafers as materials are also required to have high qualities in order to increase the product yield of the semiconductor devices. Various silicon wafers complying with such requirement have been developed. The quality of a silicon substrate has great influence on solid state image sensors, and crystallinity of a wafer surface portion, which is assumed to have direct influence on product characteristics, is particularly important. Examples of measures that have been developed to improve the surface quality are as follows: 1) high-temperature treatment in an atmosphere containing inert gas or hydrogen, 2) reduction of grown-in defects by improving pulling conditions, 3) epitaxially grown wafers and the like.
In particular, regarding a solid state image sensor, light is caused to enter a semiconductor and converted into an electric signal, and an image is composed from a generated electric signal. Therefore, not only the quality at the uppermost surface but also the quality at a depth of about several microns from the surface is very important.
As a method of evaluating electrical characteristics of surface quality of a silicon wafer, gate oxide integrity (GOI) evaluation has been known. In the gate oxide integrity (GOI) evaluation, a gate oxide film is formed on a silicon surface by thermal oxidation, and an electrode is formed on the gate oxide film to apply electric stress to the silicon oxide film as an insulator. The quality of the silicon surface is evaluated based on the degree of insulation. If defects and/or metal impurities are present on the original silicon surface, they are taken into the silicon oxide film due to the thermal oxidation, resulting in a nonuniform insulator. That is, presence of defects and/or impurities causes a reduction in the insulation property, and therefore, the quality of the silicon surface is evaluated by observing the degree of the reduction in the insulation property.
The GOI evaluation, in actual devices, relates to reliability of gate oxide films of MOSFETs, and various wafers have been developed for improvement of the GOI evaluation. The GOI evaluation has greatly contributed to studies on grown-in defects relating to COP, and improvement of wafers and devices. However, even when no problem occurs in the GOI evaluation, it is naturally possible that device yield is reduced. Especially in recent years, the number of such events is increasing with an increase in integration density of devices. Particularly in a solid state image sensor, it is necessary to reduce a leakage current caused by a wafer, in view of its principle, such as influence of a current spread from a neutral area outside a depletion layer.
Confronting the above problems, development and improvement of silicon wafer substrates are progressed. However, unless devices such as solid state image sensors are actually manufactured in silicon wafer substrates and evaluated, effects thereof cannot be judged. Therefore, with an attention focused on the structure of a photosensitive portion that can be regarded as the heart of a solid state image sensor, a pn junction is formed in a wafer surface, and a leakage current at the pn junction is measured to evaluate the wafer quality (refer to Patent Document 1, for example). Patent Document 1 discloses a structure with a guard ring, as a cell structure in which a leakage current at a pn junction formed in a wafer surface is measured. In this structure, the guard ring is provided on a peripheral portion of the pn junction, and the guard ring separates an area component (composed of a spread current and a generation current) of a leakage current from a peripheral component (surface generation current) of the leakage current. That is, according to this structure, the width of a depletion layer in the peripheral portion of the pn junction is controlled by adjusting a voltage applied to the guard ring, thereby suppressing a leakage current from the peripheral portion.
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