As technology has progressed, the use of electric motors to perform numerous tasks previously accomplished manually has increased dramatically. For example, a simple manual task like rolling down a vehicle window is performed by the simple push of a button, with a motor performing the actual work of rolling down the window. The manual action of opening or closing car vents to redirect hot or cold air to various locations is performed simply by changing a temperature setting on a control panel. Examples of the use of motors both inside and outside the automobile field to perform tasks like these abound.
Brush-type DC motors, such as mechanically commutated motors, have been found to be especially useful for controlling, for example, the flow of air in vehicle heating, ventilating and air conditioning (HVAC) systems. With the proliferation of such motors in various applications comes the increased need to accurately, effectively, and efficiently control the motors. Some applications, including many vehicle HVAC systems, require that both the direction and amount of rotation of multiple brush-type DC motors be accurately measured and controlled in order for the systems to function effectively. In addition to requiring the ability to control these aspects of motors, most manufacturers are driven by the market to search for ways to minimize the costs of the motors and their associated control systems.
Several methods for monitoring the performance of brush-type DC motors and effectively controlling them have been described in U.S. patents. One method, based on detection of the rapid change in current (i.e., falling edge, interruptions, discontinuities, or fluctuations) due to the commutation process, is commonly referred to as commutation spike or ripple detection. In a conventional pulse count system, commutation spikes are detected in the current waveform characteristics of a brush-type DC motor and used as feedback signals to determine the rotor position. This concept is based on the general principle of detecting the rapid change in current due to the periodic commutation process of a rotating motor. The basic schemes typically consist of sensing the motor current and then conditioning the sensed signal by various techniques such as filtering and amplification or by differentiation. The processed signal is then amplitude qualified by comparing it to a detection threshold, which triggers a pulse generator. The digital pulse can be fed back to a microcontroller for further processing of the rotor position information. This additional processing can include, for example, using the current position of the motor to determine the nature of control signals that should be sent to this or other motors in the system.
Conventional methods of commutation spike detection generally rely on motor current waveform characteristics, which can be highly variable due to a number of factors. These factors include motor manufacturing tolerances and aging effects, dynamic motor loading, temperature effects, and supply voltage fluctuation. Signal degradation due to brush bounce and other noise caused by motor aging can be a major cause of accuracy and reliability concerns. Another drawback is the susceptibility of detection circuitry to electromagnetic interference (EMI), cross-talk and other sources of noise. Detection thresholds must be set to the minimum motor current amplitude, resulting in poor signal to noise ratios and susceptibility to noise in very light load conditions. In addition, applications using asymmetric (unbalanced) magnetized motors are often sensitive to very light and assisted loads, which can result in very unreliable commutation characteristics requiring prediction techniques to achieve desired accuracy.
Another drawback with using a conventional commutation spike detection scheme for determining the shaft position in DC motors relates to the system voltage level. For example, in an automobile application, at higher battery levels, motor speed is proportionally faster than it is at lower battery voltage levels. A conventional commutation spike detection scheme generates an output pulse (e.g. one-shot) for each qualified commutation spike. A blanking or “dead” time following the one-shot output is often used to provide additional noise immunity, which prevents inadvertent triggering on high frequency noise that often precedes a commutation event, resulting in the generation of false pulses. To avoid generating false pulses, the duration of one-shot and blanking-time signals needs to linearly track the motor speed, which is dependant on the battery voltage level.
An additional drawback with a commutation spike detection scheme occurs when the motor is braked. In a typical brush-type DC motor application, motor braking is accomplished by short circuiting the windings of the motor. For an H-bridge configuration, this is normally accomplished by turning on both low-side drivers or both high-side drivers and turning off the opposite half of the H-bridge. At the moment the motor windings are shorted, the energy stored in the motor windings will generate a significant kickback voltage, which contains the same frequency content as the commutation spike. If the brake command is processed after the blank time of a valid commutation event, a false trigger will often be generated. This is known as a “false brake pulse”, and results in an error in pulse counting. Because the control logic that sends the “brake” signal is asynchronous relative to the spike detection circuitry, the inductive kickback due to the shorting of the motor windings in response to a “brake” signal can be detected as a false event, resulting in an error in pulse counting. Due to motor speed and the processing complexity required to synchronize a brake command with the pulse detection circuitry, implementation of a system to reject false brake pulses can be difficult. What is needed is a simple and effective means to synchronize the motor control and pulse detection logic in a circuit that rejects false brake pulses.
In addition to facing the above-described limitations in detecting and processing signals, developers and manufacturers of systems requiring multiple brush-type DC motors also face problems of controlling the motors with optimum efficiency and cost. While pulse count technology serves as a low-cost actuator position feedback alternative to potentiometer feedback or optical encoder systems, there is still a need to minimize the cost of this technology. There have been attempts to integrate the circuit elements for control logic, signal processing, feedback, and power stages of the motor control system into a single package. For the power stage, an H-bridge topology is typically employed for each motor to be driven. The number of driver channels is typically limited to between 1 and 4 due to the size and cost of the power transistors required for the H-bridge circuits, the number of motors per system, and the number of systems. It is generally not cost effective to have more than one spare channel driver in a given motor drive circuit or integrated circuit (IC) in the conventional system.
When system requirements dictate the need for more driver channels than are available in a single IC package, the designer is often faced with a tradeoff between using additional ICs and wasting the spare channels (since not all channels on the new IC are needed), or alternatively using more costly discrete driver technology. In pulse count applications that use a sequential drive scheme (i.e., individual high-side drivers with common low-side transistor pairs that allow for one motor to operate at a time), this can be accomplished by adding an external high-side driver pair and sharing the common return inside the IC, for example. While this solution is simple, it is limited in performance because only one motor can be controlled at a time, and also because adding additional drivers increases the total system throughput time. This situation often typically makes it impossible to take advantage of the low cost of pulse count systems in high-end systems, where throughput is critical to total performance.
Finally, in applications requiring bi-directional control of multiple motor actuators, such as those found in automotive climate control systems, for example, design teams are often faced with making another tradeoff between system cost and system performance. In DC motor applications employing bi-directional motor control, an H-bridge power stage configuration is often employed. An H-bridge configuration typically consists of four power switches, such as field-effect transistors (FETs) or bipolar junction transistors (BJTs), arranged in a configuration resembling the letter “H.” The upper legs, commonly referred to as the high-side of the bridge, typically consist of two top switches connected between a common supply voltage and both motor terminals. The lower legs, commonly referred to as the common or low-side of the bridge, typically consist of two bottom switches connected between both motor terminals and ground. The motor is usually located in the middle, and its state of operation is controlled by the state of the power switches.
With the H-bridge motor control configuration, to drive the motor in the forward direction, the high-side driver connected to the positive terminal of the motor, and the low-side driver connected to the negative terminal of the motor, are turned on to allow electric current to flow through the motor coils. To drive the motor in the reverse direction, the polarity of the motor is reversed by turning on the opposite high- and low-side drivers, and reversing the direction of current flow. Braking is achieved by shorting the motor coils by turning on both low-side drivers and turning off both high-side drivers.
To reduce cost in systems controlling multiple motors, H-bridges are often integrated into a single package, along with associated control circuitry. To further reduce system cost, a sequential drive scheme can be chosen to allow a further reduction in drivers and wiring. This approach consists of having multiple motors share a common low-side driver of the H-bridge while retaining individual high-side drivers for each motor. This approach results in a benefit of reducing system cost because of the reduction in the amount of wire required due to the common wiring connection to the low-side. However, there is a significant impact on the response time which can degrade system performance.
When system performance is critical, a simultaneous drive scheme may be adopted. However, this does not allow for selectable configuration of simultaneous or sequential drive operation in a single package. Therefore, the designer is forced either to have two different driver solutions to meet the challenges of various customers, or to limit itself to a single solution that is either not cost effective and/or of limited performance. A single driver configuration is needed that allows the capability of selecting either a sequential operation when system performance is not critical and low cost is important, or a simultaneous operation when system performance is critical and the cost can be justified.
In addition, designers implementing motor driver solutions are often required to meet various standards. For example, designers implementing solutions for vehicle HVAC systems must meet certain standards relative to how the system responds during failure modes. It is therefore desirable for the system to support fail-safe features necessary to meet various standards.
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