1. Field of the Invention
The present invention relates in general to the fabrication of electronic substrates and more particularly to forming a flexible electrically conductive surface connection that has improved electrical reliability when subjected to mechanical and thermal stressing.
2. Description of the Related Art
Electronic substrates are typically used for providing interconnection between integrated circuit devices used in information processing, such as computers and control systems. These are traditionally made using either ceramic or polymer dielectrics. With polymer dielectrics, individual layers are built up through drilling, lamination, plating and soldering processes. The final surface metal features include input/output pads that are used to form connections with discrete devices as well as to circuit boards or other substrates. To attain high interconnect densities, the input/output pads are typically arranged in an array on one or both surface of the substrate. These input/output are then used to make electrical and mechanical connections to other devices, often by solders.
Similarly, ceramic substrates are produced by mixing a dielectric powder into a slurry with organic binders and solvents, forming tapes by using a casting process, and making greensheets which are punched to form holes or xe2x80x98viasxe2x80x99 into which a conductive metal paste is deposited along with metal traces that act as wiring. A number of these punched and metallized tapes are stacked in alignment and pressed into an unfired laminate that is subsequently sintered. This is a cofired process in which the ceramic and metal powders are consolidated in essentially a single but often complex heating operation. Conductive surface features are formed and metal plating such as nickel and gold, and often solders are attached. These surface features also provide connections to the electrical conductors within the ceramic and their mechanical and electrical performance are very important to the reliability of the substrate and the entire system.
The coefficient of thermal expansion (CTE) of polymer derived substrates are typically between 15 and 18 ppm. This is mainly the result of filling the polymer with low CTE materials such as E Glass, fused silica, alumina and other inorganic powders which act to reduce the composite CTE of the substrate. The CTE of ceramic substrates are typically about 3-6 ppm.
When bare polymer substrates are solder joined by a solder attach Ball Grid Array (BGA) process to a printed circuit board which typically has as CTE of about 18 ppm and these joined parts are thermal cycled as would be encountered during the daily on-off operations of a computer, the CTE mismatch between the substrate and the board is small. The stress on the solder joins are typically quite small and the fatigue life of these solder joins is very long. This is usually independent of the size of the substrate.
When a semiconductor device is joined to one surface of the substrate using a flip chip attach soldering process, the CTE mismatch between the silicon device with a CTE of 3 ppm and the substrate with a CTE of 15-18 ppm is very high. To maximize the thermal cycle fatigue life of these solder joins, an underfill polymer is applied between the substrate and the silicon device. However, this underfill polymer has the undesirable effect of drastically lowering the effective CTE of the substrate in the region of the substrate under the chip. Thus, when a substrate with a large semiconductor device is mounted onto a circuit board, the substrate and board CTEs are no longer matched and the solder connections can fatigue much sooner in the region under the silicon device.
Likewise, when a low CTE ceramic has input/output pads which are solder joined to a circuit board, the even greater mismatch in CTE (3-6 ppm v. 18 ppm) reduces the fatigue life of the solder joins during thermal cycling. This can be overcome by increasing the length of the solder joints by using, for instance, connections that are made of wires or long solder columns to minimize the stress at the joints.
The reliability of the electrical connection between the substrate and the board is affected by a number of parameters which include the CTE difference between the substrate and the board, the stiffness of both, the size of the array and the height of the solder joint. During thermal cycling the board expands and contracts much more than the ceramic substrate. This movement causes a large strain in the solder connections between the board and substrate, the greatest strain occurring at the outermost connections and the least at the center of the array. Repetitive thermal cycling eventually fatigues the solder connections to failure and this creates an open in the electrical pathway between the substrate and board. The longer the solder column, the greater the resistance to solder fatigue. Column Grid Arrays (CGAs) will withstand much greater cycle to failure than BGAs with all other parameters being the same, however CGAs are less desirable than BGAs since CGAs can be easily damaged in handling and their increased length increases inductance, which can impair electrical performance.
Therefore, there is a need for a structure which can be used on the surface of these types of substrates that would allow processing of typical organic or ceramic substrates through ball attach and card joining techniques and which would accommodate stresses to improve thermal cycle life and reduce failure of the solder joints.
It is, therefore, an object of the present invention to provide a structure and method for a connecting structure that includes a first surface and a connection pad on the first surface, wherein, the first surface includes an opening adjacent to the connection pad, and wherein, upon sufficient stress, the opening forms a flap allowing a portion of the connection pad to separate from the first surface. The opening is a U-shaped groove through the first surface. The structure further includes a conductive connecting material on the pad, wherein a force on the conductive connecting material forms the flap. The connecting structure is for joining a first structure with a second structure, and the flap is formed by relative movement between the first structure and the second structure. The sufficient force approximates a force necessary to damage the connecting structure. The flap includes a portion of the first surface. The connecting structure further includes a second surface adjacent to the first surface, wherein a bonding strength of the first surface to the second surface in a region of said connection pad allows formation of the flap upon application of the sufficient force.
Another embodiment of the invention is a method of forming a connecting structure which includes forming a first surface, forming a connection pad on the first surface, and forming an opening in the first surface adjacent the connection pad, wherein, upon sufficient stress, the opening forms a flap allowing a portion of the connection pad to separate from the first surface. The forming of the opening includes forming a U-shaped groove through the first surface, wherein a force on the conductive connecting material forms the flap. The connecting structure is for joining a first structure with a second structure, and the flap is formed by relative movement between the first structure and the second structure. The sufficient force approximates a force necessary to damage the connecting structure. The flap includes a portion of the first surface. The method further includes forming a second surface adjacent the first surface, wherein a bonding strength of the first surface to the second surface in a region of said connection pad allows formation of the flap upon application of the sufficient force.
With the invention, input/output pads are mechanically secured to the substrate until a stress which approximates the delamination force required to break away the inventive input/output pad fingers is encountered. When sufficient force in encountered, the inventive structure (onto which the pads are deposited and connected) is allowed to move and accommodate the stressing without disrupting the electrical connection.
USPTO Backgrounds
USPTO Backgrounds