1. Field of the Invention
The present invention relates to a semiconductor wafer, in particular, to a semiconductor wafer on which more than two types of semiconductor chips are formed.
2. Description of the Related Art
Heretofore one type of semiconductor chip has been, in general, formed on one semiconductor wafer. Since a yield from the one wafer has been dramatically improved along with an increase in diameter of the semiconductor wafer, 20,000 or more of the semiconductor chips can be manufactured when a semiconductor chip having an area of 1 mm2 is formed on an 8-inch semiconductor wafer. If the number of semiconductor chips required for production is less than 10,000, the remaining semiconductor chips may become unnecessary stock, with the result that the benefit of the semiconductor wafer having the larger diameter may not be realized. In order to solve this problem, a measure is taken in which a plurality of types of semiconductor chips is formed on one semiconductor wafer.
In Japanese Published Patent Application JP 5-13570, there is disclosed a method of manufacturing a semiconductor wafer, in which different types of semiconductor chips having different chip sizes are divided by a use of scribe lines having different intervals therebetween.
When the different types of semiconductor chips having the different chip sizes are formed as described above, it is easy to distinguish the semiconductor chips. However, it is difficult to find boundaries between the different types of semiconductor chips through visual and microscopic inspections in the appearance test process when different types of semiconductor chips have the same chip size. Moreover, a reference point for each of the different types of semiconductor chips is unclear, and hence the operations in a probing test process, for example, sometimes have troubles.
USPTO Backgrounds
USPTO Backgrounds