This invention relates to Magnetoresistive Random Access Memories (MRAMs) and other memories where the memory bit has at least two distinct resistance states, and more particularly to the sensing circuitry for such memories.
Non-volatile memory devices, such as FLASH memories, are extremely important components in electronic systems. FLASH is a major non-volatile memory device in use today. Disadvantages of FLASH memory include high voltage requirements and slow program and erase times. Also, FLASH memory has a poor write endurance of 104-106 cycles before memory failure. In addition, to maintain reasonable data retention, the scaling of the gate oxide is restricted by the tunneling barrier seen by the electrons. Hence, FLASH memory is limited in the dimensions to which it can be scaled.
To overcome these shortcomings, other types of nonvolatile memories are being evaluated. One such device is magnetoresistive RAM (hereinafter referred to as xe2x80x9cMRAMxe2x80x9d). To be commercially practical, however, MRAM must have comparable memory density to current memory technologies, be scalable for future generations, operate at low voltages, have low power consumption, and have competitive read/write speeds.
The resistance of the tunnel junction (TJ) changes value depending on the state of polarization of the magnetic layers above and below the tunnel junction. The resistance changes from a lower resistance value when the magnetic fields are aligned in the same direction to a higher resistance value when they are aligned in opposite directions. The value change may be on the order of thirty percent. Therefore, for a low resistance value of 10K ohms, the high resistance value could be about 13K ohms. A sense amplifier for an MRAM needs to detect this difference in value. Because of processing variation in the thickness of the oxide in the tunnel junction, there is a large distribution of resistance values between wafer lots of MRAM circuits. Since the nominal value of the resistance within a wafer also varies, it is useful to detect the state of a bit by comparing the resistance of the tunnel junction in a bit to a nearby midpoint reference that may be formed as a midpoint of a reference bit in the high state and a reference bit in the low state. It is also important to maintain symmetry to balance the loading from the parasitic resistance and capacitance of the bit lines and the column multiplexing.
Many MRAM sense amplifiers use a fixed voltage on a common gate stage to place a fixed voltage across the MRAM cell. Control or voltage reference circuits for such sense amplifiers generate a fixed voltage for the gate of the common gate stage. With large processing variations in the MRAM cell resistance and a fixed voltage across the cell, the MRAM cell provides large variations in current to the sense amplifier, making optimization of the sense amplifier difficult. By using a fixed voltage for the gate of a common gate stage, the voltage on the bit line and consequently across the memory cell is a constant value independent of the resistance of the bit. The current change resulting from bit resistance changing from processing lot-to-lot causes inaccuracies with device matching in the sense amplifier, thereby degrading sensing time and accuracy.
USPTO Backgrounds
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