Technical Field
The present invention relates to a semiconductor device, a method of manufacturing the same and a power converter.
Related Art
A known configuration of a semiconductor device (semiconductor element) includes a semiconductor layer formed from a group III nitride such as gallium nitride (GaN). JP 2014-41917A describes a technique that forms a group III nitride-based p-type semiconductor by ion implantation. The technique described in JP 2014-41917A directly implants a p-type impurity into a semiconductor layer by ion implantation, so as to form a p-type semiconductor in a region of the semiconductor layer in which the p-type impurity is ion-implanted.
In the technique disclosed in JP 2014-41917A, heat treatment for activating the region of the semiconductor layer in which the p-type impurity is ion-implanted causes deterioration of the surface morphology of this region. Deterioration of the surface morphology is likely to cause deterioration of the device characteristics of the semiconductor device and is likely to reduce the crystallinity of the semiconductor layer formed in this region by regrowth. There is accordingly a demand for a technique that improves the surface morphology of a p-type semiconductor region formed by ion implantation.
The reason of deterioration of the surface morphology by the technique disclosed in JP 2014-41917A may be attributed to that an n-type impurity (for example, silicon atom (Si)) adhering to the surface of the semiconductor layer enters lattice points of a group III atom (for example, lattice points of gallium atom (Ga) in gallium nitride (GaN)) where an ion-implanted p-type impurity (for example, magnesium atom (Mg)) is supposed to enter. The p-type impurity failing to enter the lattice points of the group III atom by the presence of the n-type impurity deposits on the surface of the semiconductor layer to form droplets (precipitate). The droplets of the p-type impurity causes deterioration of the surface morphology.
USPTO Backgrounds
USPTO Backgrounds