The present invention relates to semiconductor processing, and more particularly to a method for repairing an isolation dielectric damaged by a hard mask removal process.
During the fabrication of flash memory arrays, a layer of polysilicon referred to as Poly 1 is patterned over a silicon substrate in which trenches filled with an isolation dielectric form isolation regions that separate active device regions. Thereafter, floating gates are formed out of the Poly 1 by etching the Poly 1 over the isolation dielectric regions. One goal of the etching process is to etch as little of the Poly 1 away as possible to create spaces as small as possible.
Previous techniques for etching the Poly 1 include depositing a layer photoresist over the layer of Poly 1, and patterning the photoresist using lithographic techniques to form a mask. The photoresist mask is then used to etch the Poly 1 by exposing the uncovered areas of Poly 1 to light. The,Poly 1 is etched to form parallel lines of Poly 1 that will be used to form floating gates. Thereafter, the photoresist mask is removed.
Although this technique is effective for etching the Poly 1, the lines of Poly 1 can be patterned no closer than 0.14 microns due to lithographic limitations. For some semiconductor applications, however, such as dense memory arrays, the spacing between the lines of Poly 1 needs to be approximately 0.08-0.05 microns. Currently, this is not possible using lithography.
An improved mask and etch technique has recently been developed for patterning materials during semiconductor fabrication that is capable of surpassing lithographic limitations. This mask and etch technique substitutes a hard mask for a photoresist mask when patterning a material during semiconductor fabrication that allows the smaller spaces in the material to be formed. After the material has been patterned, the hard mask is removed using either a dry etch or a wet etch. Both etch techniques, however, may damage the resulting semiconductor. During flash memory array fabrication, for example, if the hard mask is removed using a dry etch, the isolation dielectric in the isolation regions are gouged. Using a wet etch may eliminate the gouging problem, but the wet etch process may erode the surface of Poly 1 and form pits.
Accordingly what is needed is an improved hard mask removal process that results in a non-damaged isolation dielectric in the isolation regions. The present invention addresses such a need.
The present invention provides a method for repairing an isolation dielectric damaged during a semiconductor fabrication process in which a hard mask material is used to pattern a first material, the first material having openings therein exposing isolation regions comprising a first isolation dielectric layer. The method includes etching the hard mask material from the first material, wherein the etch creates gouges in the first isolation dielectric layer, and depositing a second layer of isolation dielectric over the first material, wherein the second isolation dielectric layer fills the gouges in the first isolation dielectric layer. The method further includes polishing on the second layer of isolation dielectric to remove the second layer of isolation dielectric from the first material.
According to the system and method disclosed herein, removing a majority of the hard mask using a wet etch, rather than removing all of the hard mask, prevents the wet etch from damaging the first material. And using a dry etch to remove the remainder of the hard mask substantially eliminates gouging.
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