The present invention relates in general to fabricating semiconductor devices, and, more specifically, to the integration of capacitors in damascene interconnect structures.
Capacitors are used extensively in electronic devices for storage of electric charge. The capacitors essentially comprise two conductive plates separated by an insulator. The capacitance, or amount of charge held by the capacitor per applied voltage, depends upon the area of the plates, the distance between the plates, and the dielectric values of the insulator. Capacitors are used in filters, analog to digital converters, digital memory devices, and various control applications.
Metal-based capacitors are typically incorporated into a device using a subtractive metal etch process, which is conventionally used to form aluminum lines. However, copper has increased in popularity as a metal of choice for fabrication of metallization layers. Copper has a lower resistivity, which allows for the formation of smaller features than with aluminum metallization. Copper also has a higher melting point relative to aluminum such that subsequent device processing steps may be performed at higher temperatures.
Copper metallization in the context of capacitor fabrication has some drawbacks. Capacitors have been fabricated using damascene processes, which require deposition of copper into a recess formed in a dielectric. Damascene processes require several mask operations presenting the need for extensive optical lithography and etching. In addition, the chemical mechanical polishing of copper may compromise the capacitors reliability, because the surface roughness leads to micro structural differences in materials. Moreover, prior to deposition of copper a barrier layer must be deposited to prevent diffusion of copper into the underlying dielectric.
A need exists to provide a capacitor that can be integrated in damascene interconnect structures without the excessive masking operations required from copper metallization, and minimizes the affects of microstructure differences from underlying copper metallization and the affects of copper diffusion.
USPTO Backgrounds
USPTO Backgrounds