1. Field of the Invention
This invention relates to a signal strength meter drive circuit for a radio receiver or tuner, capable of absorbing variations in the voltage characteristics of diodes, transistors, and the like formed in an Integrated Circuit (IC).
2. Description of the Prior Art
Conventionally, a diode level shifting circuit has been employed in the signal strength meter drive circuit of a radio receiver or tuner. When such a circuit is fabricated as an IC, however, variations in the voltage characteristics of the contained elements caused by temperature fluctuations and differences in the diffusing conditions are not compensated for, whereby when the amount of the level shift is large the meter may not indicate any output despite the fact that there is a sufficient antenna input, while when the amount of the level shift is small an offset in the meter output may occur.
The circuit diagram of a conventional signal strength meter is shown in FIG. 1, wherein an intermediate frequency amplifier IF.sub.1 includes differential amplifier transistors Q.sub.24 and Q.sub.25, whose emitters are connected to a constant current source transistor Q.sub.23. The output of amplifier IF.sub.1 is half-wave rectified by a capacitor C.sub.1 and transistors Q.sub.1, Q.sub.2 and Q.sub.3. Similarly, the output of amplifier IF.sub.2 is half-wave rectified by a capacitor C.sub.2 and transistors Q.sub.4, Q.sub.5 and Q.sub.6, and the output of amplifier IF.sub.3 is half-wave rectified by a capacitor C.sub.3 and transistors Q.sub.7, Q.sub.8 and Q.sub.9. The collectors of Q.sub.3, Q.sub.6 and Q.sub.9 are connected to the emitter of transistor Q.sub.10, whose collector current thus represents the sum of the half-wave rectified outputs of amplifiers IF.sub.1 to IF.sub.3. Transistors Q.sub.11 to Q.sub.13 provide constant current biasing for Q.sub.1 - Q.sub.9. Transistors Q.sub. 14, Q.sub.15 and Q.sub.16 constitute a current mirror circuit, whereby the current flowing through a resistor R.sub.1 is the same as the collector current of Q.sub.10. The voltage across R.sub.1 is thus proportional to the collector current of Q.sub.10, and this voltage is level shifted by a circuit comprising transistors Q.sub.17, Q.sub.18, diode D.sub.1 and a resistor R.sub.2 to provide a signal strength meter output at terminal OUT.
The base biasing of Q.sub.10 is stabilized by a circuit comprising transistors Q.sub.19 to Q.sub.22 and diodes D.sub.2 to D.sub.5, and the base of Q.sub.20 is connected to the bases of Q.sub.23, Q.sub.26 and Q.sub.29 to provide constant current biasing therefor.
In the above-described circuit, assuming that the voltage characteristic across resistor R.sub.1 with respect to the antenna input level is designated by curve f in FIG. 3, such characteristic will vary between curves e and g due to variations in the characteristics of transistors Q.sub.19 to Q.sub.22 and/or diodes D.sub.2 to D.sub.5 in the biasing circuit. When the Zener diode D.sub.3 is formed in a monolithic IC, such variation is particularly pronounced and cannot be prevented. Consequently, the output voltage at terminal OUT varies as indicated in FIG. 4 between curves e' and g'. For example, when the voltage across resistor R.sub.1 has a characteristic as shown by curve e in FIG. 3, the voltage characteristic at terminal OUT is as shown by curve e' in FIG. 4. Thus, even if the antenna input level is zero, the meter is activated and indicates an output, which is termed "offset". Further, then the voltage characteristic of resistor R.sub.1 is as shown by curve g in FIG. 3 due to variation error, the circuit output voltage assumes the characteristic shown by curve g' in FIG. 4, whereby the meter reads zero over a certain range when there is actually a small antenna input signal present. Even if the accuracies or characteristics of transistors Q.sub.19 to Q.sub.22, diodes D.sub.2 to D.sub.5, or capacitors C.sub.1 to C.sub.3 are enhanced so that the width between curves e' and g' in FIG. 4 is narrowed, variations in the characteristics of the active elements Q.sub.17, Q.sub.18 and D.sub.1 would still tend to widen the gap between curves e' and g'. Consequently, every circuit element would have to be highly accurate, and from a practical point of view this is extremely difficult and expensive.
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USPTO Backgrounds