This invention relates generally to the connection of components in computer systems and more particularly to an apparatus and method for docking/undocking control for docking and undocking a peripheral device while a computer system is in operation without affecting the operation of a bus.
In a personal computer system, a PCI (Peripheral Component Interconnect) bus, an ISA (Industry Standard Architecture) bus, an EISA (Extended Industry Standard Architecture) bus, and an MC (Micro Channel) bus, etc., are employed as paths of data transfer among devices such as various peripheral devices. Among them, the PCI bus was proposed by Intel Corporation in 1993 and recently replacing other buses with an extended bus of a type which allows relatively high speed data transfer by a burst mode (bus width 32/64 bits, maximum operation frequency 33/66 MHz, maximum data transfer rate 132/264 MBps). The details of the PCI bus are prescribed in the PCI Local Bus Specification Rev.2.1, PCI Special Interest Group publicized by Intel Corporation.
In a notebook type personal computer (hereinafter simply referred to as a xe2x80x9ccomputerxe2x80x9d), the size and the weight are restricted due to the importance of portability; and, it is not basically permitted to add an expansion board to a mother board to enhance functions as have been done conventionally. Accordingly, an expansion slot is provided on a panel surface of a computer housing to allow an adapter card having a RAM and communication function to be selectively attached. Further in order to use the computer alone when it is carried around and allow it to be used with a function approximately similar to a desk top computer when it is used in an office, a docking station is made available which is provided with a hard disk and an expansion slot and to which a computer unit is detachably mounted.
It is convenient for a user to connect and disconnect an adapter card and a docking station to and from a computer unit without interrupting the power source of the computer. However, because a bus line is normally shared by a plurality of devices, if a computer system is mounted to the docking station and one attempts to connect busses to each other without taking a bus cycle into consideration, the load of the bus line may abruptly change, generating a noise which may cause a malfunction of the bus cycle and a disruption of operation of the system.
In order to prevent this, a hot docking/undocking technology is developed for docking and undocking without interrupting the power source of a computer. PUPA 10-187304 discloses a technology of hot docking/undocking an operating computer to and from a docking station which does not support a hot docking/undocking interface. As shown in the schematic block diagram of FIG. 18, this technology provides a bus switch 617 in a PCI bus line 619 of a computer 611 and a DC bridge 623 on a PCI bus line 625 of a docking station 613. When it is detected that a computer is mounted to the docking station with the bus switch 617 being open, a PCI-ISA bridge 627, which is a bus master of the PCI bridge, acquires ownership of the bus and generates a dummy bus cycle such as an I/O read or I/O write on the PCI bus targeting a host-PCI bridge 629.
The host-PCI bridge 629 controls the bus switch 617 to close it while the PCI bus line 619 is in the dummy bus cycle state and to connect the PCI bus line 625 of the docking station to the PCI bus line 619. Because the dummy bus cycle is not used as a regular read/write, the operation of the computer is not affected even if the waveform of the bus cycle is disturbed at the time when the bus switch 617 is closed. However, it is necessary in this technology to provide a new PCI device which can acquire ownership of a bus for hot docking/undocking the PCI bus or to add such functionality to an existing PCI device. While it is known to provide a DS bridge 623 in the side of the docking station or the PCI-PCI bridge with a function of an initiator to generate a dummy bus cycle, this means that a special function is added to these bridges and will restrict selection of bridges.
xe2x80x9cThinkpad 76X, 77Xxe2x80x9d, IBM notebook computer, (Thinkpad is a trademark of International Business Machines Corporation) provides a PCI-PCI bridge within the computer for hot docking/undocking the PCI bus line of the docking station to and from the PCI bus line of the computer. FIG. 19 shows a schematic block diagram showing this technology. In this technology, when a computer 631 is disconnected from a docking station 633 and operates alone, a PCI-PCI bridge 635 is in a disabled state and is not recognized by other devices on PCI bus 637. When the computer 631 is mounted to the docking station 633 while the computer is in operations the PCI bus line 637 is not affected by its bus cycle because the PCI-PCI bridge 635 disconnects the PCI bus line 637 from the PCI bus line 639. The docking station then invokes software to interrupt the computer and the BIOS which receives it enables the PCI-PCI bridge 635. However, because a signal, which is unique to devices and different from a signal which is common to the devices, exists in the signals of the PCI bus in this technology, the number of bus lines connected to the PCI-PCI bridge has to be increased in correspondence to the number of PCI devices on the docking station. Accordingly the number of bus lines passing a connector 641 increases if the PCI-PCI bridge is provided in the computer side and causes the expandability of the docking station to be impeded.
Further, PUPA8-6668 which was invented by the inventor of this patent application and assigned to the applicant of this patent application, discloses a technology in which a CPU monitors REFRESH# signal of the ISA bus to have the buses connected at the start time of a refresh cycle for hot docking/undocking. This technology takes advantage of an empiricism that the activity of the ISA bus is relatively low at the start time of the refresh cycle so that a signal waveform is not likely to be affected by coupling the buses.
Further, PUPA 5-73489 discloses a technology relating to hot docking/undocking of modules on a system bus to which a CPU and a plurality of modules are connected. In this technology, signals on the system bus are monitored by a bus cycle wait system in hot docking a device and the docked device does not receive data on the system bus when another device is transferring data on the system bus. Therefore, there is no likelihood that wrong data will be received and will incidentally match the receiving criteria of that device, putting the status of the end of receipt on a status bus. This technology grants a start permission to that device subject to a condition that data of other devices is not transferred on the system bus.
It is an object of this invention to provide an apparatus and a method of hot docking/undocking between a bus line, such as a PCI bus which interconnects devices of a computer system and peripheral devices of the computer, by adding a simple hardware to the computer.
It is another object of this invention to provide an apparatus and a method for monitoring a turn around cycle of a PCI bus line to hot dock/undock to and from a bus line at a time when noise will not affect a bus cycle when docked or undocked.
It is a further object of this invention to provide a connecting apparatus and method for hot docking/undocking in which there is no need to provide a device for acquiring the ownership of a bus for docking/undocking.
It is a further object of this invention to provide a connecting apparatus and method for hot docking/undocking in which there is no need to provide a PCI-PCI bridge in a computer for hot docking/undocking.
It is a further object of this invention to provide a connecting apparatus and method for hot docking/undocking which does not require a special function in a hot docked/undocked peripheral device.
The principle of this invention lies in focusing on the characteristic of signals in the cycle operation of a bus in connecting a bus or a device to another bus which is in a cycle operation. Specifically, a bus signal which is affected by a noise in hot docking/undocking has a turn around cycle in a cycle operation and the principle of this invention lies in interconnecting bus lines by taking advantage of the timing of the turn around cycle. While the turn around cycle is defined in the protocol of the PCI bus, this invention is not limited to hot docking/undocking of a PCI bus and may be applied to all buses which have a turn around cycle in the cycle operation.
In the PCI bus, because all bus cycles are basically in synchronism with CLK and the period of CLK is as short as 30 nanosecond (at 33 MHz operation), a consideration is made to prevent malfunctioning of the bus, due to a glitch and the like which is expected to occur in changing devices which drive the bus. Specifically, as a standard of a bus cycle, a timing in 1 clock interval which is changed by a device driving the bus, referred to as xe2x80x9cturn around cyclexe2x80x9d, is prescribed. Each device is so prescribed as to neglect a signal level occurring on the bus at this timing. Therefore, if the PCI bus line of the peripheral devices is connected to the PCI bus line of the computer at the timing of the turn around cycle, no malfunctioning is brought to other PCI devices which are in cycle operation, even if a noise is generated on the bus line upon connection. The turn around cycle is required for every PCI signals which may be driven by 2 or more devices.
This invention provides, in one mode thereof, a connecting apparatus for electrically connecting a PCI bus line which interconnects devices comprising a computer system to peripheral devices of said computer, said apparatus comprising; a bus switch circuit for detecting a signal on said PCI bus line to generate a bus switch control signal which responds to a turn around cycle, and a switching device, inserted in a position to divide said PCI bus line into the side of said computer system and the side of said peripheral devices, said switching device having a bus switch responding to said bus switch control signal to perform a connect or disconnect operation. The connecting apparatus of this invention can be applied to any peripheral device which conforms to the PCI bus architecture such as a docking station, an adapter card and an I/O device, etc. In this mode, because the switching device is switched on or off in response to the turn around cycle by the bus switch control signal, the effect of a noise is avoided even if the buses are connected to each other during a cycle operation. The bus switch control circuit and the bus switch can be implemented by a relatively simple hardware configuration. Further, by providing the bus switch control circuit and the bus switch in the computer side, need of providing a special function for hot docking/undocking in the peripheral device side is obviated and the extent of devices which can be hot docked/undocked can be expanded.
In another mode of this invention, the bus switch control signal is generated in response to the turn around cycle related to the start of an address phase while, in further mode, it is generated in response to the turn around cycle related to an idle state. Because the timing when the turn around cycle is generated varies depending on the kind of a PCI signal, a bus line of various PCI signals can be hot docked/undocked by generating a bus switch control signal at each timing to control the switching device.
In further mode of this invention, the bus switch control signal detects the turn around cycle from each of FRAME#, IRDY#, and CLK signals. Because the turn around cycle of a necessary PCI signal can be detected by monitoring only these 3 signals, a simple bus connecting device can be implemented.
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