The present inventive concepts relate to semiconductor devices including a through via, semiconductor packages, and/or methods of fabricating the same.
Recently, there have been increasing demands for lighter, smaller, faster, multifunctional, and/or highly reliable products (e.g., mobile phones or laptop computers) in the electronic industry. In order to meet such requirements, research on the semiconductor package technology has been continuously carried out. Integrated circuits manufactured using conventional wire bonding techniques have some disadvantages such as signal loss, relative high power consumption, and/or design constraints on bonding wires. Thus, an integrated circuit package technology in which semiconductor chips are stacked and vertically connected to each other using a through silicon via (TSV) has been developed to overcome the disadvantages of the wire bonding techniques. According to this technology, highly-integrated circuits can be implemented on a same unit space and/or shorter circuit-to-circuit connections can be implemented, compared to the wire bonding technique. Recently, various studies are being conducted to improve reliability and electrical characteristics of semiconductor packages fabricated by using the TSV techniques.
USPTO Backgrounds
USPTO Backgrounds