The collector output of an RF power amplifier is usually connected with a RF inductor, often referred to as the RF choke, and an output impedance matching network. The other side of the output impedance matching network is terminated with a termination, such as an antenna. The voltage at the transistor collector output is described by
  Vo  =      Vs    +          L      ⁢                                    ⅆ            i                                ⅆ            t                          .            As a result, the voltage at the transistor collector output can be higher than the supply voltage. Furthermore, how high this voltage would be also depends on the impedance of the output impedance matching network. In an output impedance mismatch condition, such as in cases of a loose or obstructed antenna, the reflected signal reflects back to the transistor and produces a large voltage waveform so severe that the transistor junctions can be damaged. Furthermore, the power amplifier, due to the requirement of delivering high output power with high efficiency, often operates at an overdrive condition in which the transistor input voltage is so high that it switches on and off the collector current.
During overdrive, the transistor can be modeled as a switch S in parallel with a capacitor C as shown in FIG. 1. When the switch S is shorted, the current through the inductor is at a maximum. As soon as the switch S is opened, since the inductor current cannot be zero instantaneously, the inductor current flows to the transistor capacitance and the output impedance network. Because of an enormous inductor current, the transient voltage at the collector output can be very high. This excessive voltage overload can lead to device failure and degradation in reliability if it is higher than the breakdown voltages.
Even when the output termination impedance is 50 ohm, the transient collector output voltage waveform during RF overdrive can be larger than the breakdown voltage as shown in FIG. 2a. Since the excess voltage as shown is positive, the C-E and C-B junction are vulnerable. Output impedance mismatch and modulated input signal combined with overdrive can make the voltage overload more severe. For an open termination, such as the case when an antenna is not connected, combined with RF overdrive, the output voltage is the most severe as shown in FIG. 2b. The transient output voltage is so large that it even goes negative in which case the E-B junction is also vulnerable. For a shorted termination combined with RF overdrive, although the voltage overload is not as severe as the open termination, it is still more severe, as shown in FIG. 2c, than a 50 ohm case. Modulation of the input signal can add additional transient output voltage. With just a simple AM modulation with a pulse train combined with RF overdrive, the voltage overload gets even worse as shown in FIG. 2d. For a multiple stage amplifier, the voltage overload at the output stage can be even worse if the driver stages are overdriven, since the voltage spikes of the driver stages would be amplified by the output stages. Usually, the transistor failures due to voltage overload occurs at the output stage, but they can also occur at the driver stages.
The function of a voltage overload protection circuit is to clamp the excess voltage to a safe level and bypass the overload current away from the transistor. This voltage clamp design should take into consideration the voltage swing of the signal so the operation of the power amplifier is not interfered. The voltage overload protection circuit should have low loading capacitance, so the RF performance is not affected.
An ESD protection circuit shown in FIG. 3, which can be used as a voltage overload protection circuit, is designed as a VDD to VSS clamp circuit for CMOS. [Ker, 2001.] To avoid the diode leakage problem associated with un-isolated diodes, the diode is selected doped on a field oxide. This design uses a diode string (D1) to trigger the NMOS (Mn3). The voltage across R3 turns on Mn3.
An ESD protection circuit using a diode string shown in FIG. 4, which can be used as a voltage overload protection circuit, is popular in GaAs HBT design and is commonly used. Because diodes on GaAs are made with epi layers either of MOVCD or MBE, they do not have current leakage problem associated with implanted diodes for Silicon.
When a positive voltage is applied to a PAD (FIG. 4), the diode string (D2) is turned on. The overload current then sinks through the string of diodes. The number of diodes determines the preset voltage that turns on the diodes. When a negative voltage is applied to the PAD, the reverse diode (D3) turns on and sinks the overload current. Because of the series resistance of the diodes, the required area of the diodes is huge. This, in turn, increases the diode capacitance, which can limit the frequency bandwidth.
In the case of SiGe, the implanted diode string without isolation, shown in FIG. 5, is actually a set of bipolar transistors (BPT1) in series as shown in FIG. 6. As the temperature increases, the leakage current from the collector to substrate increases. Because of this current leakage, the latter stages have lower current density due to current flow to ground. This results in declining incremental voltage drop across the diode string. Therefore, the diode should be isolated.
ESD protection of an RF input pin of integrated circuits, such as a telecom integrated, circuit can be difficult. The operation voltage at the RF input pin is low, so the turn on voltage of the ESD protection circuit must be low. Even so, for the RF input pin ESD protection, the base-emitter junction at the RF signal input must turn on first during the ESD event before the ESD protection circuit. The ESD protection circuit can only turn on when the base voltage becomes sufficiently high which is permitted thanks to a base-emitter resistance drop. Because of this inherent problem, the base-emitter always has to endure some amount of ESD stress before the protection circuit turns on. For this reason, ESD voltage protection for the RF input pin is more difficult.
Furthermore, the input ESD protection circuit needs to limit excessive forward base-emitter current during ESD stress. Using a 2-diode string ESD protection circuit would work without introducing a significant resistance voltage drop problem associated with the large number of series diodes in diode strings typically used at the RF output and DC pin. Simulation also shows that a 2-diode string would have low capacitance and low turn on resistance. However, since a two-diode string has a low turn on voltage due to a lower number of diodes, its leakage current is greater if the input voltage swing is large. A 2-diode string, due to its low turn on voltage, has a significant leakage current when the input RF power is more than 10 dBm and worse linearity (2 tone 3rd order inter-modulation products).
Distributed amplifiers have very wide bandwidths due to their transmission line characteristics. However, when ESD protection circuits are added to a distributed amplifier, the capacitance loading of the ESD protection circuits can degrade the bandwidth of the distributed amplifier.
There is therefore a need for an improved ESD protection circuit for use as an overload protection circuit for power amplifiers, an ESD protection circuit for RF input pins for integrated circuits such as telecom circuits, and unit protection cells for a distributed amplifier.
USPTO Backgrounds
USPTO Backgrounds