It is often necessary to parallel power supplies in order to achieve a desired level of power. Such paralleling allows the use of standardized or commercial-off-the-shelf (COTS) modules or units to achieve a level of power which might otherwise require a costly custom-designed power supply. For example, most single-phase power-factor-corrected (PFC) boost AC-DC power supplies available as COTS modules offer no more than 1 KW of power capacity, and must be paralleled in order to provide, say, 10 KW. FIG. 1 is a simplified diagram in block and schematic form illustrating a prior-art paralleled power supply 10 for providing direct voltage to a capacitive load 12. In FIG. 1, the capacitive load 12 includes a load resistor 14 which represents the real or energy-absorbing portion of the load, and a paralleled capacitor 16 which represents the quadrature or out-of-phase (imaginary) portion of the load. The capacitor 16 may be an actual discrete capacitor or capacitor bank, and it may also include the stray capacitance of various components and/or connections. One end of resistor 14 and capacitor 16 is connected to a load reference or ground conductor LG, and the other ends are connected to a load hot terminal LH.
In FIG. 1, a source of alternating current, such as power-line mains, is illustrated as 18. The source of alternating voltage drives a full-wave rectifier represented as a block 20, which as known produces pulsating direct voltage (also known as pulsating direct current) represented by a symbol 22. Pulsating direct voltage is characterized by unidirectional half-sinusoids of voltage, with the voltage value between voltage peaks going to approximately zero volts. The pulsating direct voltage may be viewed as being established or generated between a first common conductor 24 relative to a common second or reference conductor 26. In FIG. 1, a plurality 28 of standardized single-phase switching phase correcting power-supply boost modules 28a, 28b, . . . , 28n are connected to conductors 24 and 26 for receiving pulsating direct voltage from rectifier 20, and for generating direct voltage for ultimate application to the load 12. Each power supply module of set 28 includes first and second power input terminals. More particularly, power supply 28a includes first and second power input terminals or ports 28ai1 and 28ai2, respectively, which are connected to common power conductors 24 and 26, respectively. Similarly, power supply 28b includes first and second power input terminals or ports 28bi1 and 28bi2, respectively, which are connected to common power conductors 24 and 26, respectively, and power supply 28n includes first and second power input ports 28ni1 and 28ni2, respectively, which are connected to common power conductors 24 and 26, respectively. It should be noted that the term “port” formally includes a pair of terminals or electrodes, but common usage extends the definition. Each power supply of set 28 also includes first and second power output terminals, and more particularly power supply 28a includes first and second output terminals 28ao1 and 28ao2, power supply 28b includes first and second output terminals 28bo1 and 28bo2, and power supply 28n includes first and second output terminals 28no1 and 28no2. One example of such single-phase power-factor correcting boost power supply modules is model PFC-1000 manufactured by RO Associates, Inc. of 246 Caspian Drive, P.O. Box 61419, Sunnyvale, Calif. 94088.
Each switching power supply module or element of set 28 of power supplies of FIG. 1 includes internal circuitry, the nature of which may or may not be known to the user. Such power supplies almost always include an input inductor, which is represented in FIG. 1 by inductors 28aI, 28bI, . . . , 28nI connected to the first input ports 28ai1, 28bi1, . . . , 28ni1 of power supplies 28a, 28b, . . . , 28n, respectively. The power supplies also often include a unidirectional current conducting device, illustrated as a diode or rectifier 28aD, 28bD, . . . , 28nD, through which an output or integrating capacitor is charged. In power supply 28a of FIG. 1, these capacitors are represented by a capacitor designated 28aC, and capacitors 28bC and 28nC of power supplies 28b and 28n correspond. The integrating capacitor 28aC, 28bC, . . . , 28nC of each of the power supply modules 28a, 28b, . . . , 28n is connected across the output terminals 28ao1, 28ao2; 28bo1, 28bo2; . . . ; 28no1, 28no2 of the module, for providing a low output impedance. Each switching power supply of set 28 also includes a current sensing resistor for sensing the current flow in the return path. In FIG. 1, power supply 28a has a return current sensing resistor 28aR, power supply 28b has a return current sensing resistor 28bR, and power supply 28n has a return current sensing resistor 28nR. The purpose of these return current sensing resistors in the various switching power supply module or element of set 28 is to provide a signal representing the return current at the second input terminal; this return current signal is compared by a comparator (not illustrated) with a scaled version of the full-wave rectified voltage 22 to produce an error signal, which error signal forces the return current to follow or track the full-wave voltage, thereby forcing the current to be in-phase with the applied voltage, which is the essence of phase correction. Each power supply 28a, 28b, . . . , 28n of set 28 is also associated with a further return current equalizing resistor R1, R2, . . . , Rn of a set 29 of return current equalizing resistors. More particularly, each power supply 28a, 28b, . . . , 28n of set 28 is also associated with a further return current equalizing resistor R1, R2, . . . , Rn, respectively, which is connected between the return current output terminal and the load ground LG. Thus, resistor R1 is connected to return current output terminal 28ao2 of power supply 28a and to LG, resistor R2 is connected to return current output terminal 28bo2 of power supply 28b and to LG, and resistor Rn is connected to LG and to the return current output terminal 28no2 of power supply 28n. 
Within each switching power supply module or element of set 28 of power supplies of FIG. 1, a “line current shaping controller LCSC and associated power FET perform the boost power conversion. When the FET of a module of set 28 is ON or conducting, energy is stored in the associated input inductor (28aI, 28bI, . . . 28nI) associated with the input port of the module. When the FET goes OFF or becomes nonconductive, the inductor produces a reaction voltage which adds to the input voltage to produce the boosted output voltage. At the same time, the average input port current follows the shape of the full-wave rectified or pulsating direct input voltage 22.
In theory, it should be possible to simply connect the output terminals of the various power supplies of FIG. 1 to the load 12. However, some problems arise when the power supplies are paralleled in this manner and connected to the load. A first problem is that the internal impedances of the various power supplies 28a, 28b, . . . , 28n may not be equal, with the result that the current provided by each module may differ from the current provided by the other modules. Such differences in internal impedance may be the result of differences in the gain of the feedback circuits, which as known tends to change the impedance. It may also arise as a result of stray differences in connection resistances. Such current-sharing problems are controlled in the prior art by a set 30 of forward current sharing controllers, including current-sharing controllers 30a, 30b, . . . , 30n, which tend to maintain the same forward current to the load from each power supply module of set 28. Current-sharing controller 30a has an input port 30ai connected to output terminal 28ao1 of power supply module 28a and an output terminal 30ao connected to load conductor LH, and further includes a connection 30ar to ground conductor LG. Current-sharing controller 30b has an input port 30bi connected to output terminal 28bo1 of power supply module 28b, an output terminal 30bo, which is connected to load conductor LH, and a reference terminal 30br, which is connected to ground conductor LG. Current-sharing controller 30n has an input port 30ni connected to output terminal 28no1 of power supply module 28n, an output terminal 30no connected to load conductor LH, and a reference terminal 30nr connected to ground conductor LG. Thus, the output ports of the current sharing controllers of set 30 are connected in common to load supply conductor LH. Each of the current sharing controllers of set 30 is also connected by a reference terminal to ground conductor LG. The current sharing controllers of set 30 are of the soft ramp-up variety, to thereby prevent surge currents from occurring when the initially uncharged load capacitor 16 is connected to the charged output capacitor 28aC, 28bC, . . . , 28nC of any one of the power supply modules of set 28. Such surge currents, as known, may be large enough to cause failure of a capacitor or the interconnections, or to reduce their life expectancy. FIG. 7 is a simplified diagram in schematic form of a prior-art current sharing controller 30 with soft start.
FIG. 7 is a simplified schematic diagram of a prior-art soft-start current sharing controller, together with some ancillary circuits. For definiteness, the controller of FIG. 7 is designated as 30a. In FIG. 7, current sharing controller 30a includes a power FET (PFET) having its power current controlling path connected to input terminal or port 30ai and, by way of a series current sensing resistor 710, to output terminal or port 30ao. Output port 30ao of current sharing controller 30a is connected by way of a terminal 724a to a common node 726. Other current sharing controllers (not illustrated in FIG. 7) are connected to common node 726 by way of terminals 724b, . . . , 724n. A current sensor 728 senses the total current supplied by all the current sharing controllers, and generates a current sense signal on a path 730. Path 730 carries information about the total current to a current share input terminal 732a. 
In FIG. 7, the gate of the PFET is connected to input port 30ai by way of a resistor 712, which provides the PFET with gate voltage more positive than the voltage at output port 30ao to tend to hold the PFET conductive or ON. The gate of the PFET is also coupled to the collector of an NPN bipolar transistor 714. The emitter of transistor 714 is connected to ground by way of an emitter resistor 716. When transistor 714 is ON, collector current flows through resistor 712, and turns OFF the PFET by reducing its gate current toward zero volts. The base of transistor 714 is driven by way of a resistor 718 from the output of a comparator (a high-gain amplifier) 720. When comparator 720 tends to higher output, transistor 714 conducts more and the PFET conducts less. A current regulating arrangement includes resistor 710 and a bipolar PNP transistor 722. When the output current of current sharing controller 30a becomes large enough, the base-emitter junction of transistor 722 becomes forward biased, and the transistor becomes active. When active, transistor 722 adjusts the voltage at the positive (+) input terminal of comparator 720, to tend to drive its output positive and thereby turn OFF the PFET. The inverting (−) input terminal of comparator 720 is connected to A “startup” signal is generated by an external logic circuit (not illustrated) which uses a variety of logic schemes to determine the existence of a start-up condition, and a start-up signal is applied to the noninverting input terminal of comparator 720 by way of an intermediary FET 736.
Improved paralleled power supply arrangements are desired.
USPTO Backgrounds
USPTO Backgrounds