1. Field of the Invention
The present invention relates to a DC-DC converter for dynamically changing an output voltage.
2. Description of Related Art
A DC-DC converter converts a DC voltage of a certain value into a DC voltage of another value. In recent years, logic LSI (Large Scale Integration) to which DVFS (Dynamic Voltage Frequency Scaling) is applied is increasing. In DVFS, an operation frequency and a power source voltage are changed in accordance with a processing state of a processor. Therefore, the DC-DC converter for supplying an electric power to such logic LSI is required to perform dynamic switching control of an output voltage. With a current mode DC-DC converter, there is a known problem that a subharmonic oscillation is generated when a proper slope compensation is not performed. In Particular, with a DC-DC converter for dynamically changing the output voltage, there is a need for performing a proper slope compensation.
In JP2006-033958A (patent literature 1), a technique relating to a DC-DC converter is disclosed. In this technique, a proper slope compensation amount is kept in a current mode switching regulator (DC-DC converter). FIG. 1 is a diagram showing a configuration of the switching regulator in the patent literature 1. Hereinafter, the switching regulator of the patent literature 1 will be described referring to FIG. 1. In the switching regulator of the patent literature 1, a slope compensation value calculation circuit 130 is added to the configuration of a conventional switching regulator.
When a switch 107 is turned on, an input voltage VIN is stored in a coil 108. When the switch 107 is turned off, the energy stored in the coil 108 is outputted to an output capacitor 112 via a diode 109.
An error amplifier 101 amplifies the difference between: a voltage generated by dividing an output voltage VOUT by resistors 110 and 111 serving as feedback resistors; and a reference voltage VREF supplied from a reference voltage source 100.
The slope compensation value calculation circuit 130 inputs the input voltage VIN and the output voltage VOUT to output a proper slope compensation value VC to a slope compensation circuit 102. The slope compensation circuit 102 sets an increase rate of a compensation ramp wave in accordance with the output of the slope compensation value VC. The slope compensation circuit 102 generates the compensation ramp wave having a sawtooth wave shape synchronized with an output signal of an oscillator circuit 104.
An adder circuit 103 inputs the compensation ramp wave outputted from the slope compensation circuit 102 in one of input terminals thereof. The adder circuit 103 inputs a voltage obtained by converting information on a current flowing through the switch 107 or information on a current flowing through the coil 108 into a voltage value in another input terminal thereof.
A comparator 105 inputs an output signal of the error amplifier 101 in an inverting input terminal thereof. The comparator 105 inputs an output signal of the adder circuit 103 in a non-inverting input terminal thereof. An RS latch 106 inputs the output of the comparator 105 in a reset terminal R thereof. The RS latch 106 inputs an output signal of the oscillator circuit 104 in a set terminal S thereof. The oscillator circuit 104 outputs constant periodic pulses as shown in FIG. 1. An output terminal Q of the RS latch 106 is connected to the switch 107. When the output terminal Q of the RS latch 106 indicates “H” (which is the high state of a binary high/low signal), the switch 107 is turned on.
The slope compensation value calculation circuit 130 is formed by an adder and subtractor circuit including resistors 120, 121, 123 and 124, and an amplifier 122. The slope compensation value VC outputted by the slope compensation value calculation circuit 130 is expressed by the following expression (1).VC={(R121)/(2×R120)}(VOUT)−2(VIN)  (1)
In this expression, R121 and R120 respectively denote resistance values of the resistors 121 and 120. The slope compensation value calculation circuit 130 outputs the slope compensation value VC being proportional to (VOUT−2 VIN). Thereby, a current mode step-up type switching regulator holding minimum slope compensation by which the subharmonic oscillation is not generated with any input voltage VIN or output voltage VOUT can be formed.
USPTO Backgrounds
USPTO Backgrounds