(1) Field of the Invention
The invention relates to cold cathode field emission displays.
(2) Description of the Prior Art
Cold cathode electron emission devices are based on the phenomenon of high field emission wherein electrons can be emitted into a vacuum from a room temperature source if the local electric field at the surface in question is high enough. The creation of such high local electric fields does not necessarily require the application of very high voltage, provided the emitting surface has a sufficiently small radius of curvature.
The advent of semiconductor integrated circuit technology made possible the development and mass production of arrays of cold cathode emitters of this type. In most cases, cold cathode field emission displays comprise an array of very small conical emitters, each of which is connected to a source of negative voltage via a cathode conductor line. Another set of conductive lines (called gate lines) is located a short distance above the cathode lines at an angle (usually 90.degree.) to them, intersecting with them at the locations of the conical emitters or microtips, and connected to a source of positive voltage. Both the cathode and the gate line that relate to a particular microtip must be activated before there will be sufficient voltage to cause cold cathode emission.
The electrons that are emitted by the cold cathodes accelerate past openings in the gate lines and strike an electroluminescent panel that is located a short distance above the gate lines. Thus, each of the microtips serves as a single pixel for the total display. In general, even though the local electric field in the immediate vicinity of a microtip is in excess of 1 million volts/cm., the externally applied voltage is only of the order of 100 volts. However, even a relatively low voltage of this order can obviously lead to catastrophic consequences, if short circuited.
The early prior art in this technology used external resistors, placed between the cathode or gate lines and the power supply, as ballast to limit the current in the event of a short circuit occurring somewhere within the display. While this approach protected the power supply, it could not discriminate between individual microtips on a given cathode or gate line. Thus, in situations where one (or a small number) of the microtips is emitting more than its intended current, no limitation of its individual emission is possible. Such excessive emission can occur as a result of too small a radius of curvature for a particular microtip or the local presence of gas, particularly when a cold system is first turned on. Consequently the more recent art in this technology has been directed towards ways of providing individual ballast resistors, preferably one per microtip.
The approach favored by Borel et al. (U.S. Pat. No. 4,940,916 July 1990) is illustrated in FIG. 1. This shows a schematic cross-section through a single pixel. As already discussed, current to an individual microtip 2 is carried by a cathode line 1 and a gate line 4. However, a high resistance layer 3 has been interposed between the base of the microtip and the cathode line, thereby providing the needed ballast resistor. While this invention satisfies the objective of providing each microtip with its own ballast resistor, it has a number of limitations.
The resistivity that layer 3 will need in order to serve as a ballast resistor is of the order of 5.times.10.sup.4 ohm cm. This significantly limits the choice of available materials. Furthermore, sustained transmission of current across a film is substantially less reliable than transmission along a film. The possibility of failure as a result of local contamination or local variations in thickness is much greater for the first case. Consequently, later inventions have focussed on providing individual ballast resistors wherein current flows along the resistive layer, rather than across it.
Kane (U.S. Pat. No. 5,142,184 August 1992) used semiconductor integrated circuit technology to generate his cold cathode display so that individual ballast resistors could be provided in the same way that resistors are provided within integrated circuits in general. FIG. 2 is a schematic cross-section, showing a group of three pixels. Cathode line 203 has been deposited onto silicon substrate 201 and is connected to microtip 204 via diffused resistor 202. Gate 206 and electroluminescent anode 207 complete the basic design. This approach meets the requirement of current transmission along, rather than across, the resistive layer but makes for a more expensive system since an additional mask and diffusion step are required. Additionally, a certain amount of space must be made available for the diffused resistors.
The approach taken by Meyer (U.S. Pat. No. 5,194,780 March 1993) is illustrated in FIG. 3. This shows, in plan view, a portion of a single cathode line which, instead of being a continuous sheet, has been formed into a mesh of lines 15 intersecting with lines 16. A resistive layer 17 has been interposed between the mesh and the substrate (not shown here). Microtips 12 have been formed on the resistive layer and located within the interstices of the mesh. A single gate line intersects the cathode line/mesh, and current from the mesh must first travel along resistive layer 7 before it reaches the microtips. An important disadvantage of this approach is that the presence of the mesh limits the resolution of the display. As will be seen when the present invention is described below, there are easier ways of achieving a good design without the need to sacrifice resolution. Another disadvantage is that the values of the ballast resistors associated with the various microtips vary widely because of the geometry of this design.
USPTO Backgrounds
USPTO Backgrounds