Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Common uses for flash memory include personal computers, personal digital assistants (PDAs), digital cameras, and cellular telephones. Program code and system data such as a basic input/output system (BIOS) are typically stored in flash memory devices for use in personal computer systems.
A charge pump circuit is used in a non-volatile memory device to generate the voltages required for chip operation. A charge pump is an electronic circuit that uses capacitors as energy storage elements to convert DC voltages into other DC voltages.
A typical charge pump uses transistors to control the operation of the pump and connection of voltages to the capacitors. For instance, a typical prior art charge pump can generate a higher voltage through multiple stages. A first stage involves a capacitor being connected across a voltage and charged up. In a second stage, the capacitor is disconnected from the original charging voltage and reconnected with its negative terminal to the original positive charging voltage. Because the capacitor mostly retains the voltage across it, except for leakage, the positive terminal voltage is added to the original, effectively doubling the voltage. The pulsing nature of the higher voltage output is typically smoothed by the use of another capacitor at the output.
FIG. 1 illustrates a typical prior art charge pump circuit. It comprises a charge pump 100 that outputs regulated voltage Vout—reg to a parasitic load 101 and a target load 103. The parasitic load 103 represents line capacitance of the pump output node. The target load 103 is the capacitance of the connected word line to be programmed. Switch SWA 105 is closed during the programming cycles to connect Vout—reg to the target load 103.
FIG. 2 illustrates a timing chart of a typical prior art non-volatile memory device such as the flash memory integrated circuit charge pump circuit of FIG. 1. The timing chart shows that the I/O lines include the addresses, data, and commands for memory operation.
Referring to FIG. 2, when the command for a program operation is received (e.g., 10H), a program enable signal goes high. The program enable signal then causes the charge pump enable signal to go high to initiate the pumping operation in order to precharge bit lines.
One problem with this charge pump operation is that the operation of the pump circuits causes noise on the bit lines. This can cause problems with programming of the cells that are coupled to the bit lines experiencing the noise. Additionally, a fast pump turn-on creates a peak current that causes a downward spike 200 in the supply voltage (VCC) as illustrated in FIG. 2. This can result in unstable memory device operation.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for more efficient use of charge pumps in a non-volatile memory device.
USPTO Backgrounds
USPTO Backgrounds