1. Technical Field
The disclosure relates in general to a semiconductor structure and a method for manufacturing the same, and more particularly to a semiconductor structure having a conductive plug penetrating into the isolation as drain side, thereby decreasing the on-resistance (Ron).
2. Description of the Related Art
Reduction of feature size, improvements of the rate, the efficiency, the density and the cost per integrated circuit unit are the important goals in the semiconductor technology. With the development of semiconductor technology, high power devices have been applied to a variety of electronic products in different fields. Laterally diffused metal oxide semiconductor (LDMOS) or extended drain metal oxide semiconductor (EDMOS) is widely used in high voltage or high power PMIC (power management integrated circuit) application as the driving device.
On-resistance (Ron) is one of key factors of the semiconductor device. The lower the on-resistance or the specific on-resistance (Ron-sp), the lower the power consumption of the semiconductor device. Ron is a very important characteristic for the PMIC products, especially for the portable IC devices. Many improvements have been disclosed by modifying the structures of LDMOS or EDMOS devices; for example, changing the shape of shallow trench isolation (STI) or wells. However, Ron improvement is still limited on current LDMOS or EDMOS devices. No more than about 5% of improvement on the ratio of Ron to breakdown voltage (Ron/BVD) has been achieved by using well scheme or implant optimization.
USPTO Backgrounds
USPTO Backgrounds