1. Technical Field of the Invention
This disclosure relates to a method for manufacturing a semiconductor device.
2. Description of the Related Art
In forming a predetermined pattern in a chip area of a semiconductor device during a typical method of manufacturing the semiconductor device, an insulating film or a metal film is deposited on a main surface of a semiconductor wafer, and then a photosensitive resist is coated on the film deposited on the main surface of the semiconductor wafer. Then, exposure is performed on the wafer by using, for example, a stepper (including stepping projection apparatus, reduced projection exposing apparatus) or an aligner (reflection type equal magnification exposing apparatus). Then, the photosensitive resist covering a predetermined area(s) is selectively removed by performing a developing process on the semiconductor wafer. Thereby, a resist pattern is formed on the semiconductor wafer. Then, a dry-etching process is performed on the semiconductor wafer on which the resist pattern is formed. Thereby, a pattern including the insulation film or the metal film is formed on the device chip area of the semiconductor wafer.
In the above-described manufacturing method, there is a part in a peripheral area of the semiconductor wafer which is not exposed. In such area, there is some photosensitive resist remaining even after performing the developing process. The photosensitive resist remaining in the peripheral area of the semiconductor wafer may become the cause in the creation of undesired foreign matter in subsequent steps (processes) of the manufacturing method.
For preventing this problem from occurring, the peripheral part or the back surface of the semiconductor wafer is cleansed with thinner after the photosensitive resist is coated on the front surface Furthermore, prior to performing the developing process, the peripheral part of the semiconductor wafer is exposed for removing resist in the peripheral part of the semiconductor wafer.
Meanwhile, in the dry-etching process for forming patterns in the device chip area, an end-point detecting method is used. The end-point detecting method is a method that includes monitoring the plasma during the etching process, detecting a light of a predetermined waveform emitted from a target substance, and determining that the dry-etching process is finished according to the rate of change of the intensity of the emitted light.
In recent years and continuing, semiconductor devices are being manufactured in finer sizes and the open area ratio of resist patterns on semiconductor wafers are becoming smaller. As the open area ratio of resist patterns become smaller, the amount of light of the predetermined waveform emitted from the target substance decreases and the rate of change of the intensity of the emitted light becomes smaller. As a result, the precision in detecting the end-point in the end-point detecting method used in the etching process becomes lower due to the small rate of change. In other words, a resist pattern on a semiconductor wafer is to have a sufficient open area ratio in order to satisfactorily use the end-point detecting method in the etching process. Here, “open area ratio” refers to the proportion of an opening area formed in a main surface of a semiconductor wafer with respect to the entire area of the main surface of the semiconductor wafer.
The above-described process of exposing the peripheral part of the semiconductor wafer (periphery exposure process) is also for increasing the open area ratio of the resist pattern on the semiconductor wafer. As shown in FIG. 6A, a periphery exposure apparatus is used for exposing a strip-like area 6 along the peripheral part of the semiconductor wafer 2 before performing the developing process on the semiconductor wafer 2. After performing the periphery exposure process, the developing process is performed on the semiconductor wafer for removing resist from the peripheral area 6 of the semiconductor wafer 2. Thereby, the open area ratio of the resist pattern (which is to be dry-etched) on the main surface of the semiconductor wafer 2 is increased. It is to be noted that reference numeral 4 of FIG. 6A indicates a device chip area and reference numeral 8 of FIG. 6A indicates a non-element forming area (i.e. an area in which no element is formed).
As another method for increasing the open area ratio of the resist pattern on the semiconductor wafer 2, the non-element forming area 8 situated between the device chip area 4 and the peripheral area 6 is subjected to the same pattern exposing process performed on the device chip area 4 (dummy shot) as shown in FIG. 6B.
It is, however, difficult to attain an open area ratio sufficient for detecting the end-point of the dry-etching process by merely removing the resist in the peripheral area 6 of the semiconductor wafer 2 (as shown in FIG. 6A).
Furthermore, in a case where the width of the peripheral area 6 is formed wider for attaining an open area ratio sufficient for detecting the end-point of the dry-etching process, the area of the device chip area 4 becomes smaller. Accordingly, the number of device chips that can be formed on a single semiconductor becomes fewer. This leads to a problem of reduction of productivity.
Furthermore, as shown in FIG. 6B, even if the non-element forming area 8 is subjected to the same pattern exposing process as the device chip area 4, the patterns are too fine that an open area ratio sufficient for detecting the end-point of the dry-etching process cannot be attained. Furthermore, in a case of performing an exposing process on the non-element forming area 8 by using the same method for performing the exposing process on the device chip area 4, an exposure apparatus used for performing a pattern exposure process on the device chip area (pattern exposure apparatus) is also used for exposing the non-element forming area 8. This causes the number of exposure shots of the pattern exposure apparatus to increase. Accordingly, as the number of shots for exposure increases, the amount of light irradiated to the mirror and the lens of the pattern exposure apparatus increases. The more light is irradiated to the mirror and the lens of the pattern exposure apparatus, the more the mirror and lens become heated. Such increase of heat of the mirror and the lens leads to deformation of the lens and the mirror and also results in the deviation or distortion of the exposure field. Moreover, waiting for the heat of the lens and the mirror to settle to a steady temperature for preventing deformation of the mirror and the lens will slow down productivity in manufacturing the semiconductor device.
Conventionally, given that an open area ratio sufficient for detecting the end-point of the dry-etching process cannot be increased, the precision for detecting the end-point of the dry-etching process cannot be improved. This results in inconsistency in the outcome of the dry-etching process and difficulty in manufacturing semiconductor products providing a consistent attribute.
Other than the above-described methods, there is a method of dry etching for a fixed amount of time regardless of the open area ratio of the resist pattern on the semiconductor wafer. This method, however, is unable to determine whether the etching target is thoroughly removed by the dry etching. Accordingly, this method also results to inconsistency in the outcome of the dry-etching process.
Furthermore, there is a method of improving the precision of detecting the end-point of the dry-etching process by modifying a dry-etching apparatus being used (See Japanese Laid-Open Patent Application No. 2000-12527). Although the open area ratio of the resist pattern on the semiconductor wafer may be low by using this method, the end-point of the dry-etching process can be precisely detected. However, such precise detection of the end-point can only be achieved by performing some kind of modification on the configuration of the dry-etching apparatus. It is therefore desired to manufacture a semiconductor product providing a consistent attribute without having to modify the configuration of the dry-etching apparatus, and to form a resist pattern having a sufficient open area ratio in a case of using a conventional dry-etching apparatus.
USPTO Backgrounds
USPTO Backgrounds