1. Field of the Invention
The present invention relates to a semiconductor package, and particularly to a semiconductor package having an impedance matching device for achieving impedance matching between different systems integrated in the semiconductor package by means of a vertical conductive line or combination of a vertical conductive line and a stub transmission line.
2. Description of Prior Art
In the current electronic industry, electronic products, such as mobile phones, bluetooth systems, personal digital assistances and digital cameras, are increasingly required to be lightweight, thin, compact and multifunctional. Consequently, both electronic components and wiring in these electronic products have been increasing in number and reducing in size. This necessitates the introduction of system packaging technology so that subsystems, for example, microprocessors and memory units can be integrated in a semiconductor chip to obtain a compact size.
System-in-package (SiP) is now the fastest growing system-packaging technology since it is a cost-effective solution to high-density system integration in a single package. In a system-in-package structure, more than one semiconductor chips are stacked in three dimensions and passive components are integrated in the same package to reduce the size. When high quality electrical signals are required, decoupling capacitors are generally embedded in the package so as to provide low-loss electrical signal propagation. Therefore, by integration of embedded components at the substrate level, the system-in-package approach provides the advantage of significant area reduction on a printed circuit board. A system-in-package structure generally includes a multilayer substrate having metal wirings arranged thereon to provide high connection density, low cross-talk and good electromagnetic compatibility (EMC) capabilities, whereby the integrity of electrical signal can be maintained when the metal wirings are connected. As this integral electrical signal is able to meet the performance and reliability requirements for the package, maximum power transfer becomes the first consideration.
In the subsystems of a conventional system-in-package structure, besides resistors, reactive elements, such as capacitors and inductors, are also included. Therefore, to attain the maximum power transfer for ensuring the package performance and reliability, a conjugate match of all reactance of subsystems of the package as well as equal resistance of the subsystems is required. As reception and transmission of the electrical signals between various subsystems are accomplished by the metal wirings on the substrate, specific high frequency matching network is needed to reduce signal loss during signal reception and transmission. Generally, passive components, such as an inductor-capacitor (LC), are additionally added to the substrate to constitute such a matching network for impedance matching of the subsystems. However, this method results in increased cost and reduction of available space on the substrate. Further, the wiring area of the matching network is reduced, and flexibility and interchangeability in layout of the wiring is limited.
Hence, it is necessary to provide a semiconductor package having an impedance matching device that is able to achieve impedance matching between different systems integrated in the semiconductor package. The impedance matching device also helps to effectively reduce the wiring area of an impedance matching network of the semiconductor package and enhance the flexibility and interchangeability in layout of the wiring.
USPTO Backgrounds
USPTO Backgrounds