1. Technical Field
The present invention relates to a semiconductor memory device, and more particularly, to a semiconductor memory device having a data bus structure which reduces high frequency noise to data and passes only data having a low frequency.
2. Description of the Related Art
Semiconductor memory devices have been developed focusing on high integration and high capacity based on the high integration, while central processing units (CPUs) that are cores of computer system have been developed mainly focusing on high speed operation.
As a result, the difference between the operation speeds of the CPUs and memory devices continues to increase such that the operation speed of the memory devices becomes a major factor limiting the performance of a computer system.
In addition, in line with the recent trend in the memory, systems toward high speed and low power consumption, the operating voltage of a computer system is being lowered. With the operating voltage being reduced or lowered, the voltage level of a signal used for input and/or output data in a memory system is also being lowered.
However, since in line with the increasing operation speed, high frequency noise occurring in a computer system continues to increase, it is increasingly difficult to secure a voltage margin needed in system operation.
In order to secure a voltage margin of a signal needed in a system operating at high speed, the structure of the bus channel of the system should be optimized so that the signal voltage is maximized and high frequency noise occurring in the system is minimized.
FIG. 1 is a schematic diagram showing an ordinary stub-type memory bus structure. Referring to FIG. 1, in the ordinary stub-type memory bus structure 100, a bus 160 is arranged on a system board, and each memory device 130 on a memory module 140 is connected to the bus 160 through a stub 150 corresponding to the memory device 130 on the memory module 140. A stub 150 has a shape that branches from the bus 160 passing through a module socket 120.
In the bus structure 100 using the prior art stubs shown in FIG. 1, the entire length of a channel, that is, the bus 160, is short, and accordingly, the propagation time of a signal on the channel is short and the electromagnetic interference is small.
However, by the stub structure, discontinuity and impedance mismatching on the channel occur causing reflected wave noise. Accordingly, due to the effect of reflected wave noise, at a high speed operation, serious distortion occurs in the waveform of a signal on the channel and high speed operation of the memory system is restricted.
That is, in the stub-type bus structure, due to the reflected wave noise on the channel, signal integrity degrades.
Therefore, in the stub-type bus structure 100, a stub resistor is generally used on a bus to lessen the degradation of signal integrity due to the reflected wave noise on the channel. The stub resistor is serially connected to the channel.
However, the stub resistor reduces the high frequency noise, and at the same time reduces the signal voltage on the channel such that if a low signal power is used, the size of a signal is further reduced.
Recently, in order to solve this problem, a method in which a serial resistor used for impedance matching on the channel is replaced by a parallel capacitor has been introduced. Though this method lessens signal voltage reduction caused by a serial resistor for channel matching, this method requires a complicated manufacturing process to add a capacitor to the channel in parallel.
To solve the above problems, it would be desirable to provide a semiconductor memory device having a data bus structure in which using only a printed circuit board (PCB) pattern, high frequency noise is removed and only low frequency band data is transferred.
According to an aspect of the present invention, there is provided a semiconductor memory device comprising memory modules which have memories, and a data bus which transfers data to the memory modules, wherein the data bus comprises a low frequency band data pass unit which removes a high frequency component of the data and sends the data to the memory modules.
The low frequency band data pass unit comprises a plurality of stubs which are connected to the data bus in parallel and are formed as printed circuit board (PCB) patterns.
An end of each of the stubs, the end which is not connected to the data bus, is open.
The low frequency band data pass unit comprises a plurality of plates which are connected to the data bus in parallel and are formed as PCB patterns.
The plates are connected to the data bus through short lines formed as PCB patterns.
The low frequency band data pass unit has a shape in which parts having a first, wide, width and parts having a second, narrow, width are alternately connected.
The low frequency band data pass unit has a shape in which line parts having high impedance and line parts having low impedance are alternately connected.
According to another aspect of the present invention, there is provided a semiconductor memory device having memory modules, which have memories, and a data bus which transfers data to the memory modules, comprising a plurality of stubs which are connected to the data bus in parallel and are formed as PCB patterns.
An end of each of the stubs, the end which is not connected to the data bus, is open.
According to still another aspect of the present invention, there is provided a semiconductor memory device having memory modules, which have memories, and a data bus which transfers data to the memory modules, comprising a plurality of plates which are connected to the data bus in parallel and are formed as PCB patterns.
The plates are connected to the data bus through short lines formed as PCB patterns.
According to yet still another aspect of the present invention, there is provided a semiconductor memory device comprising memory modules which have memories and a data bus which transfers data to the memory modules, wherein the data bus has a shape in which parts having a first, wide, width and parts having a second, narrow, width are alternately connected.
That is, a semiconductor memory device comprising memory modules which have memories and a data bus which transfers data to the memory modules, wherein the data bus has a shape in which line parts having high impedance and line parts having low impedance are alternately connected.
Therefore, without adding a separate discrete passive device, a semiconductor memory device as disclosed herein can reduce the high frequency noise of data transferred through a data bus such that the voltage margin of the data improves, the cost for passive devices such as capacitors is reduced, and the process for attaching the passive devices is simplified.
USPTO Backgrounds
USPTO Backgrounds