In many transmitter, receiver or transceiver applications, a local oscillator (LO) signal is used, for instance, for up-mixing or down-mixing a signal to be transmitted or received, respectively. Frequency synthesizers based on digital phase-locked loops (DPLLs) have become an important solution, for instance because of their flexibility and easy configurability for supporting multiple bands. Furthermore, DPLLs may also allow migrating to smaller process nodes. Moreover, a digital loop filter (LF) in a digital implementation of a phase-locked loop may be more immune to noise.
An important figure of merit of a frequency synthesizer is the integrated phase noise within a specified frequency range. One of the contributors to the noise in DPLL implementations is the time-to-digital converter (TDC), which is often used for phase comparison. It may therefore be interesting to reduce the noise of such an implementation.
However, in other fields of technology, time-to-digital converters are used for different reasons, for instance, to measure an elapsed time accurately. Also in these applications, noise properties of a time-to-digital converter or a circuit comprising a time-to-digital converter may be interesting.
USPTO Backgrounds
USPTO Backgrounds