1. Field of the Invention
The present invention relates to a semiconductor device which is provided with a circuit including a semiconductor element such as a transistor. For example, the present invention relates to an electronic device which includes, as a component, any of a central processing unit (CPU) including a register formed using a transistor, a power device mounted in a power circuit, a semiconductor integrated circuit including a memory, a thyristor, a converter, an image sensor, or the like, an electro-optical device typified by a liquid crystal display device, and a light-emitting display device including a light-emitting element.
In this specification, a “semiconductor device” generally refers to a device which can function by utilizing semiconductor characteristics; an electrooptic device, a display device such as a light-emitting display device, a semiconductor circuit, and an electronic device are all included in semiconductor devices.
2. Description of the Related Art
In recent years, the information society has been increasingly developed, and the demand for higher speed, higher capacity, smaller size, lighter weight, or the like of, for example, a personal computer, a cellular phone, or the like has been increased. Therefore, semiconductor devices such as a large-scale integrated circuit (also referred to as a large scale integration (LSI)) and a central processing unit need higher integration, higher operation speed, and lower power consumption.
Power consumption of the semiconductor device is substantially equal to the total of a power consumption generated in an operation state and a power consumption generated in a stop state (hereinafter referred to as a standby power) of the semiconductor device.
The standby power can be classified into static standby power and dynamic standby power. The static standby power is power consumed by generation of leakage current between a source and a drain, between a gate and the source, and between the gate and the drain in a state where voltage is not applied between the electrodes of a transistor in the semiconductor device, that is, in a state where a potential difference between the gate and the source is approximately 0 V. On the other hand, the dynamic standby power is power which is consumed when voltages of various signals such as a clock signal or a power supply voltage continues to be supplied to a circuit in standby state.
Further, in order to increase the operation speed of the semiconductor device, a microfabrication technique has been developed. As microfabrication of a semiconductor device such as a transistor advances, the channel length of the transistor is shortened and the thicknesses of various insulating layers typified by a gate insulating layer are decreased. Therefore, leakage current of the transistor tends to be increased and accordingly the dynamic standby power is increased.
Further, circuit patterns have been miniaturized in accordance with the scaling law, but there was a time when it was considered difficult to achieve a design rule of 100 nm or less. One of the reasons is that in a transistor having a channel length of 100 nm or less, the leakage current caused by a punch-through phenomenon is likely to flow due to a short-channel effect and the transistor becomes incapable of functioning as a switching element. In order to prevent the punch-through current, a silicon wafer may be doped with an impurity with a high concentration; however, the doping causes a problem in that the junction leakage current easily flows between a source and the substrate or between a drain and the substrate.
Against such a problem, a method has been considered for reducing an area occupied by a transistor on a plane and also maintaining the effective channel length of the transistor by forming a three-dimensional transistor in the semiconductor device so as not to cause a short-channel effect. One example is a structure in which a U-shaped vertically long groove portion (trench) is formed in a region where a channel portion of a transistor is formed, a gate insulating film is formed along a wall surface in the groove portion, and a gate electrode is formed so as to fill the groove portion (see Non-Patent Document 1).
A transistor having a channel portion of such a structure has a long effective channel length because a current flows between a source region and a drain region via an indirect route across the groove portion. Thus, an effect of reducing the area occupied by a transistor and suppressing a short-channel effect can be obtained.
In a general large-scale MOS integrated circuit including digital circuits, a complementary MOS (also called CMOS) circuit is formed with a p-type MOSFET and an n-type MOSFET in order to suppress power consumption.
USPTO Backgrounds
USPTO Backgrounds