The present invention relates generally to digital communications receivers, and more particularly, to digital communication receivers having means to correct the phase of a demodulation reference signal and a sampling clock for optimal operation of the receiver.
In a typical satellite communication system, one method of accessing communication channels on a satellite is by time allocation of the channels among users of the system, referred to as time division multiple access (TDMA). Users of the system receive transmitted data from the satellite in a burst mode, i.e., data for the users is contained in a serial bit stream of variable length from the satellite. This bit stream 15 includes a preamble to allow synchronization of the user's receivers to the serial bit stream. Synchronization involves generating a demodulation reference signal of proper phase for demodulation of a phase shift keying (PSK) or a quadrature phase shift keying (QPSK) data (coherent or differential demodulation) from the satellite and generating a sampling clock of proper phase for optimum sampling of the demodulated data. In typical burst mode satellite communication systems, this synchronization is effected during the preamble and for the remainder of the burst the demodulation reference signal and/or the sampling clock are independent of the received data bit stream. Any drift in phase by the demodulation reference signal or the sampling clock during demodulation of the data portion of the serial bit stream causes performance (error rate) degradation of the receiver. This drift in phase is mainly caused by thermal changes and aging of components in the receiver. To obviate these effects, it is common practice to pre-age critical components responsible for generating the demodulation reference signal and the sampling clock (e.g., oscillators, filters) and operate them in thermally stabilized ovens. These practices reduce, but do not eliminate, drift. Pre-aging, while slowing down drift due to aging, is time consuming and expensive. The ovens, on the other hand, require large amounts of power, are bulky and expensive. Further, the requisite power sources needed to operate the ovens are bulky and heavy.
Therefore, it is a primary object of this invention to provide an apparatus which automatically compensates and corrects for drift in phase of the demodulation reference signal and the sampling clock without pre-aging the critical components or operating the critical components in an oven.
An additional object of this invention is to provide an apparatus which automatically adjusts the phase of the demodulation reference signal and the sampling clock to optimize performance of the demodulator.
To implement the above objectives, an indicator is required to indicate the quality of the demodulated data. To do this, it is a further objective of this invention to provide an eye quality monitor for determining the quality of the demodulated QPSK data.
Additionally, a phase shifter is required to phase shift the demodulation reference signal. To do this, it is a further object of this invention to provide a phase shifter which shifts the phas of the demodulation reference signal in response to a control signal.
USPTO Backgrounds
USPTO Backgrounds