Miniaturized electronic components such as integrated circuits (ICs) are typically manufactured using photolithography technology. In a photolithography process, a photoresist layer is formed on a semiconductor substrate, such as a silicon wafer. The photoresist layer is exposed through a photomask with a desired pattern to a source of actinic radiation. The radiation exposure causes a chemical reaction in the exposed areas of the photoresist and creates a latent image corresponding to the mask pattern in the photoresist layer. The photoresist is next developed in a developer solution, usually an aqueous base solution, to remove either the exposed portions of the photoresist for a positive photoresist or the unexposed portions of the photoresist for a negative photoresist. The patterns formed in the photoresist layer can then be transferred to the semiconductor substrate via processes such as deposition, etching, or ion implantation.
A critical dimension (CD) refers to the feature size and spacing between features (patterns) according to a design specification for a semiconductor device. CDs are critical for the proper functioning of the semiconductor device. When the CD of desired lithographic patterns approaches the resolution limit of an optical lithography system, image distortions become a significant problem. As the minimum CDs for semiconductor devices continue to decrease, the limited resolution of lithographic tools poses a challenge to improvements in IC manufacture. In order to make the manufacture of future IC products feasible, lithographic systems will be required to achieve adequate image fidelity when the ratio of the minimum CD to the resolution of the lithographic system becomes very low.
Many methods have been developed to reduce image distortions and improve image fidelity. One class of the enhancement methods adjusts the shapes of mask features to compensate the image distortions. For example, the biasing technique alters the mask shapes by widening the mask shapes at the tips of line features or lengthening the features to compensate for line-shortening effects. However, in some situations geometric constraints that are inherent to the desired circuit pattern may require that the mask shapes be perturbed in opposite directions and/or contradictory positions. In these situations, the biasing technique is ineffective to achieve the desired CDs of the desired image.
Another class of enhancement techniques improves contrast in the images by shifting the phase of the light projected from the mask such as “attenuated phase shift” and “alternating phase shift” techniques. The “attenuated phase shift” technique improves image sharpness by increasing the rate of change in illumination amplitude across the edge of mask features. This is achieved by using a phase-shifting material of slightly negative transmittance for dark areas of the pattern, rather than the conventional material of zero transmittance. The “alternating phase shift” technique achieves further contrast improvement by successively shifting the phase of adjacent bright features between 0° and 180°. In this way, the contrast of illumination intensity across the edge of image features is further increased compared to either conventional masks or the “attenuated phase shift” masks. However, both “attenuated phase shift” and “alternating phase shift” techniques does not directly address the above-mentioned intrinsic geometric constraints in certain circuit patterns, though they do alleviate their severity by reducing image blur.
In addition, the “alternating phase shift” technique often adds unwanted features to image patterns. This occurs when circuit phases are laid out in such a way that the desired alternation in phase can only be achieved by introducing artificial 0° and 180° mask transitions which print as unwanted patterns. For example, when opposite phases are applied to bright regions that pass in close proximity to one another at a certain point on the mask, the phase must make such an unwanted transition if the bright regions are connected together elsewhere in the mask pattern. Such unwanted phase transitions will print as a dark fringe within the nominally bright connecting area, and must be trimmed away using a second exposure.
More recently, Source Mask Optimization (SMO) has been proposed to reduce image distortions and improve image fidelity. SMO is a photolithography resolution enhancement technique used to compensate for image errors due to aberrations, diffraction or process effects. It is not strongly limited by the intrinsic geometric constraints of the pattern layout. SMO technique uses intensively optimized wave distributions to illuminate both the mask and the wafer during lithographic exposures. SMO is proposed as a means for exploiting all available degrees of freedom in the band-limited exposure process. The fundamental goal of SMO is to determine the optimum set of image forming waves that can propagate within the finite numerical aperture (NA) of the projection lens of the exposure tool, as formed using a manufacturable mask. NA is a measure of the directional extent of the light that can be collected by the lens.
SMO may optimize images based on a threshold intensity which determines where the perimeter of a printed feature will be formed. The threshold intensity is the light intensity above which a desired feature will be printed. Conventional SMO techniques assume that printed circuit features at the threshold intensity have a smooth edge. However, it is known that in practice the perimeter of printed circuit features will actually exhibit a fine-scale roughness whose fluctuations are typically sharper than the lens resolution.
In a photolithography process, the width of a resist feature can vary over the perimeter of the feature. This variation of width is called line width roughness (LWR). When the variation of the width along one edge of the resist feature is examined, the deviation of a line edge from a straight line is called line edge roughness (LER). LER is caused by a number of statistically fluctuating effects such as shot noise (photon flux variations), statistical distributions of chemical species in the resist such as photoacid generators (PAGs), the random walk nature of acid diffusion during chemical amplification, and the nonzero size of resist polymers being dissolved during development. It is not always clear which process or processes dominate in their contribution to LER. LER becomes important for feature sizes of 100 nm or less, and can become a significant source of CD local uniformity control problems for features below 50 nm.
While efforts have been made to reduce LER via improved processes and resists, the residual roughness in state-of-the-art IC devices is large enough that improvements in the image to reduce LER in the transferred patterns are also needed.
USPTO Backgrounds
USPTO Backgrounds