1. Field of the Invention
The present invention relates to a reference voltage generator, and particularly to an improved configuration in which a capacitor of a low-pass filter for reducing the noise of a reference voltage source is charged rapidly so that an output voltage is stabilized rapidly.
2. Description of Related Art
A configuration in which a low-pass filter is provided additionally downstream of a reference voltage source in order to reduce the noise of the reference voltage source is disclosed in, for example, JP 8(1996)-272461 A (first conventional example). FIG. 7 shows a circuit according to this first conventional example. In the configuration shown in FIG. 7, a low-pass filter 2 composed of a resistor R and a capacitor C is connected to a point A to which a voltage of a reference voltage source 1 is outputted so as to reduce noise in a voltage outputted to a point B. Hereinafter, a resistance value of the resister R is represented by “R” and a capacitance value of the capacitor C is represented by “C”. In a general configuration, the voltage at the point B is amplified by a non-inverting amplifier using an operational amplifier 3 and outputted as an output voltage Vout from an output terminal 5 by an output transistor 4.
In this configuration, generally, a time constant RC of the low-pass filter 2 is larger than a time constant of, for example, a transistor constituting the reference voltage source 1 or the operational amplifier 3. Because of this, after power-on, a considerable time is required for the output voltage Vout to rise logarithmically with the time constant RC until it is stabilized to a steady state. FIG. 9 shows waveforms of the output voltage Vout until they are stabilized. The horizontal axis indicates a time and the vertical axis indicates a value of the output voltage Vout. It can be understood that in the case of an output waveform P1 of the first conventional example, a considerable amount of time is required until the output voltage Vout is stabilized.
As a solution to this problem, a configuration in which a low-pass filter is charged rapidly while a voltage is monitored is disclosed in, for example, JP 2002-23870 A (second conventional example). FIG. 8 shows a circuit according to this second conventional example. In the configuration shown in FIG. 8, a point B that is an output point of a low-pass filter composed of a resistor R and a capacitor C is connected to one of input terminals of a hysteresis comparator 6. The other of the input terminals of the hysteresis comparator 6 is connected to a point A to which a voltage of a reference voltage source 1 is outputted. The point B is connected to a power source Vdd via a switch SW1, and a terminal of the capacitor C on the point B side is connected to a terminal thereof on the ground side via a switch SW2.
This circuit operates as follows. First, immediately after power-on, a voltage outputted from the reference voltage source 1 to the point A rises immediately to a constant voltage. On the other hand, due to the capacitor C of the low-pass filter, a voltage at the point B rises slowly and logarithmically with a time constant RC. At this time, a comparison is made between the voltage at the point A and the voltage at the point B by the hysteresis comparator 6, and if a voltage difference therebetween is not less than a constant voltage, the point B and the power source Vdd are short-circuited by means of the switch SW1. This causes the capacitor C of the low-pass filter connected to the point B to be charged rapidly.
Consequently, as can be seen from an output waveform P2 of the second conventional example shown in FIG. 9, the output voltage Vout rises rapidly with a time constant having a value obtained by multiplying an equivalent resistance of the switch SW1 when short-circuited and the capacitance C. Compared with the resistance R of the low-pass filter, the equivalent resistance of the switch SW1 when short-circuited is extremely small, thereby reducing a stabilization time required until a steady state is achieved. The switch SW1 is opened at a point in time when a potential difference between the point A and the point B becomes less than the set voltage, after which the voltage at the point B is raised with the time constant RC of the low-pass filter and gradually approximates to the voltage at the point A.
The switch SW2 is used to cause a discharge of electric charges accumulated in the capacitor C at the time of the fall of the output voltage Vout. This allows the output voltage Vout to drop rapidly, thereby reducing a current consumption.
In addition to the above-described configurations, it is known that the time required until the output voltage Vout is stabilized is reduced by, a configuration disclosed in JP 2005-346522 A in which a capacitor is charged while an imbalance in an internal voltage of a reference voltage source is detected by a comparator, and a configuration disclosed in JP 6(1994)-301429 A in which a time constant of a low-pass filter is switched from a small value to a large value.
USPTO Backgrounds
USPTO Backgrounds