A chip card is understood as meaning a card-like carrier having an integrated circuit. The integrated circuit is provided with an interface that enables a data connection to the reader. In this case, the integrated circuit (called chip for short) may be a memory chip, which stores data, or a microprocessor, which can process and manage data. Chip cards having memory chips are used, for example, as telephone cards, health insurance cards and cards for cashless payment. The more complex chip cards having microprocessors are primarily used for encryption, for example for authenticating a SIM module in the GSM mobile radio system, and can carry out complex computation operations. Combinations of the two types of chip card have also been formed to an increasing extent in the meantime.
A standard interface is imperative for widespread use of chip cards. The ISO 7816 standard is the most widespread interface standard for chip cards having contacts and defines mechanical and electrical properties of the chip card in order to ensure compatibility. In order to connect the chip card to the reader, this standard provides eight contact areas, which are shown in FIG. 1. Contact C1 is used to supply a supply potential VDD, contact C2 is used to supply the reset signal RST, contact C3 is used to supply the clock signal CLK, contact C4 is reserved for future use, contact C5 is used to supply the ground potential GND, contact C6 is used to supply a programming potential VPP, contact C7 is used to supply a data signal I/O and contact C8, like contact C4, is reserved for future use (RFU). Of eight contacts, six have a firmly defined function and two are reserved for future expansion. Since only six contacts are required, chip cards which, for reasons of cost, have only six contacts are also found in addition to chip cards having eight contacts.
FIG. 2 shows the transmission of data between a chip card and a reader in accordance with ISO 7816. Of the requisite connections between the chip card contacts 1 and the reader contacts 2, only the connection for the data signal I/O is shown between the contacts C7. Information is exchanged in digital form, bit by bit, between the chip card and the reader by means of this connection. Since there is only one line, either the reader transmits and the chip card receives or the chip card transmits and the reader receives. This type of data transmission is known as serial half-duplex communication. The data which are processed byte by byte by the chip card processor need to be converted into a bit-serial data stream. Each byte is separated into its eight individual bits, which are then transmitted successively over the line.
The duration of such a data bit is determined by a divisor which defines the number of clock pulses for which one data bit lasts. Since chip cards do not have their own clock, the externally applied clock CLK of the reader is used. The data transmission rate is thus directly proportional to the external clock CLK and to the divisor. As the functionality of chip cards increases, the volume of data to be transmitted between the chip card and the reader also increases. In order to maximize the data transmission rate, ever smaller divisors and ever higher frequencies have recently been used. The current data transmission rate upper limit of 10 MHz/32=312.5 kbit/sec is obtained for a maximum clock frequency of 10 MHz and a minimum divisor of 32.
At these high data transmission rates, the time available to the chip card's operating system for controlling transmission and reception and for processing data further is becoming ever shorter. In order to relieve the load on the operating system and on the chip card microprocessor, data interchange is increasingly being assisted by special hardware for data transmission. An interface chip, the “UART” (Universal Asynchronous Receiver Transmitter), can be used to increase the data transmission rates, irrespective of the chip card processor power, and to reduce the expenditure on software for data interchange.
The reader controls communication between the reader and the chip card in accordance with ISO 7816. After the chip card has been inserted into the reader and the reader contacts 1 have been connected to the chip card contacts 2, the contacts are electrically activated in a prescribed order. The chip card then automatically carries out a power-on reset and transmits an answer-to-reset (ATR) message to the reader. This ATR contains various information about the chip card's scope of functions and the data transmission parameters or transmission protocols. After the ATR has been evaluated by the reader, the reader can also optionally transmit a protocol-type-selection (PTS) command to the chip card, which command can be used to set the parameters of the chip card's transmission protocol.
After the data transmission interface has been set up, the reader can transmit commands to the chip card. The chip card processes the command and sends a reply to the reader. The latter transmits the next command, which is processed in a similar manner in accordance with the master/slave principle. Communication, during which the reader is the master and the chip card is the slave, continues until the connection is cleared.
Data are interchanged between the chip card and the reader, in accordance with ISO 7816, via a serial interface using the half-duplex method, the maximum data transmission rate being 312.5 kbit/sec. If this data transmission rate was previously sufficient, it proves to be a bottleneck in communication between the chip card and the reader as the memory power and processor power increase. If data interchange is controlled only by the operating system's software, the processor speed imposes additional limits in this case, with the result that the maximum data transmission rate can be achieved only by using a UART. In order to achieve an even higher transmission rate, work is being put into standardization efforts which provide for reducing the division factor even further and increasing the clock frequency. Internally multiplying the clock rate is also being considered as a solution. An entirely different approach provides for using an additional interface, for example a USB (Universal Serial Bus), which has a higher data transmission rate of 1.5 Mbit/sec to 12 Mbit/sec (U.S. Pat. No. 6,439,464 B1). However, the disadvantage of this solution is that an additional protocol for transmitting the data is also required in addition to an additional interface. All of the hardware and software for controlling the data need to be correspondingly extended.
USPTO Backgrounds
USPTO Backgrounds