Comparator circuits are useful to compare multiple inputs such as in the form of multiple voltages. While many different topologies of comparator circuits are available, certain architectures suffer from common drawbacks, including delays inherent in the circuitry, which delays the time until a valid comparison decision can be made. Some systems require a high slew rate for changing values and resulting comparison results. To accommodate such requirements, typically circuitry that consumes high amounts of current is used. Yet many systems seek to reduce the amount of power consumption and as such, there are tradeoffs that can lead to less than optimal performance.
USPTO Backgrounds
USPTO Backgrounds