1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a metal connection configuration formed on a scribe line area thereof.
2. Description of the Related Art
Scribe line areas are provided to partition semiconductor chips in a wafer. In a prior art semiconductor device, all metal layers and insulating layers are removed from the scribe line areas thereof; however, in this case, a step between the scribe line areas and the other areas is enlarged, so that the manufacturing yield is reduced by etching defects created in the post processes.
In order to reduce the above-mentioned step, an insulating layer partly and forcibly remains in the scribe line areas (see: JP-A-HEI2-54563). Also, a scribe connection layer is formed in the scribe line areas, and the scribe connection layer is connected to a ground voltage terminal or a substrate potential generating circuit, to thereby stabilize the potential at a semiconductor substrate.
Also, it is known to use double metal connection layers as a scribe connection, to thereby further reduce the above-mentioned step (see: JP-A-HEI1-94625). In this case, however, the heat dissipation effect is not sufficient, and as a result, the scribe connection is melted when a large current flows therethrough. This will be explained later in detail.
USPTO Backgrounds
USPTO Backgrounds