1. Field of the Invention
The present invention relates to semiconductor wafer processing equipment and, more particularly, to a method and apparatus for reducing the thermal gradients in a substrate support such as a ceramic wafer support pedestal by controlling the power or current applied to a resistive heater within the pedestal.
2. Description of the Background Art
Within a process chamber of a semiconductor wafer processing system, a semiconductor wafer is typically supported by a substrate support or pedestal while being processed. In many such systems to facilitate processing of the wafer, the pedestal is heated to raise the temperature of the wafer during one or more of the process steps. To facilitate heat transfer to the wafer, the pedestal is fabricated from a ceramic material and the heater is a resistive heater element embedded in the ceramic. The heater element is generally a coil of resistive wire or a metallized layer fabricated from a material such as tungsten. When current is applied to this wire or layer, the element generates heat that is conductively transferred through the ceramic to the wafer.
The resistance of the heater element varies substantially as current is applied to the element and the temperature of the element rises. The resistance of the heater element may change by as much as a factor of three. Consequently, the power applied by the heater varies from, e.g., 2400 watts, when the element is at room temperature (relatively low resistivity of approximately 6 ohms at room temperature), to, e.g., 800 watts, when the element is at operating temperature (relatively high resistivity of approximately 18 ohms at 550xc2x0 C.). Such a large amount of power applied to the heater element when it is cold produces substantial thermal gradients within the ceramic of the pedestal. Such thermal gradients tend to cause cracks in the ceramic which ultimately renders the pedestal useless.
It is common to individually test 200 mm diameter pedestals (the current industry standard) to determine if the heater element resistance value is within an appropriate operating range. For instance, if the resistance value is too low, the power transmitted to the pedestal will exceed the 10 amp limit of the processing system""s capabilities. If the resistance value is too high, the power applied to the pedestal will not be sufficient to elevate pedestal temperature to the desired operating region (approximately 550xc2x0 C.). The next generation wafers and their corresponding pedestal assemblies will be on the order of 300 mm diameter. The increased size of such pedestals makes the heater resistance tolerances even more difficult to control. For example, radiative heat losses at the edges of a 300 mm pedestal must be compensated for on a much greater scale than in a corresponding 200 mm pedestal so as to ensure proper processing and adequate yield of a 300 mm wafer.
Therefore, there is a need in the art for a method and apparatus for reducing the thermal gradients in a ceramic pedestal and compensating for radiative heat losses of larger (300 mm) pedestals by controlling the amount of power or current applied to a resistive heater within a ceramic pedestal.
The disadvantages heretofore associated with the prior art are overcome by the present invention of a method and apparatus for reducing the thermal gradients in a ceramic pedestal. Specifically, the present invention is a heater controller that limits the amount of power or current that is applied to one or more coils of a resistive heater in said pedestal. The heater controller further comprises a zone control module having zone proportional control circuitry for controlling the amount of power provided to one or more zones within the pedestal, each of said one or more zones corresponding to said one or more coils. The apparatus also has a phase angle control module equipped with a wire detection circuit. The wire detection circuit detects the condition of power transmission between the heater controller and the heater.
The subject invention further includes a method of reducing thermal gradients within a substrate support pedestal having one or more zones. The steps of this method are (a) applying an equal amount of power to all of said one or more zones for uniform thermal ramp up of said substrate support pedestal; (b) performing a check of power levels transmitted to said one or more zones; (c) allowing thermal ramp up of the substrate support pedestal to reach a predetermined set point; and (d) upon reaching said set point, maintaining the original amount of power to one of said one or more zones and applying proportionately less power to at least one of the remaining of said zones. In a preferred embodiment of the invention, 100% power is applied to a first outer zone of the substrate support pedestal and 50% of said power is applied to a second inner zone of said substrate support pedestal. The method and apparatus disclosed herein provide for greater control and extended life of a ceramic substrate support such as an electrostatic chuck used for semiconductor wafer processing in a process chamber. The uniform thermal ramp up reduces the likelihood of cracking the ceramic material and the zoned control compensates for heat losses that occur during wafer processing.
USPTO Backgrounds
USPTO Backgrounds