By the term “information handling system” as used herein shall mean any instrumentality or aggregate of instrumentalities primarily designed to compute, classify, process, transmit, receive, retrieve, originate, switch, store, display, manifest, measure, detect, record, reproduce, handle or utilize any form of information, intelligence or data for business, scientific, control or other purposes. Examples include personal computers and larger processors such as servers, mainframes, etc. Such systems typically include one or more PCBs as integral parts thereof, each PCB including a plurality of various components such as capacitors, resistors, modules, etc. mounted thereon. One such PCB can be referred to as a “motherboard” while various other boards (or cards) may be mounted thereon using suitable electrical connectors.
One method of forming a laminate circuitized board structure for use in such information handling systems includes forming layers of dielectric material and electrically conducting material to provide multiple layers of circuits and voltage planes. Circuits can be discrete wiring patterns known as signal planes. Voltage planes can be either ground plane or power planes, and are sometimes collectively referred to as power planes. In one technique of forming such structures, layers of dielectric material and conductive material are successively applied, i.e., the dielectric material is applied and then circuits or voltage planes are provided thereon and, if necessary, through holes formed by drilling or etching. This method relies on each successive step of adding additional structure and the circuitry layers are formed individually, e.g., in each step in forming the plane having circuit traces or formed power planes. This requires precision drilling to form the plated through holes (PTHs) all of which is time consuming, especially where there is a large number of drilled holes required to form PTHs.
More recently, methods have been described that provide a relatively inexpensive photolithographic technique of forming a composite laminate structure (substrate assembly) from individual discrete laminate structures (substrates). For example, see U.S. application Ser. No. 09/812,261, entitled “Printed Wiring Board Structure With Z-Axis Interconnections” and filed Mar. 19, 2001. See also U.S. Pat. No. 6,388,204 (Lauffer et al) and U.S. Pat. No. 6,479,093 (Lauffer et al), the teachings of which are incorporated herein by reference. Although the structures and methods of these inventions provide significant advances and advantages over current PCB fabrication methods, there still exists a need for further refinement. Therefore, continuing efforts are underway in attempting to provide for even greater advantages. The invention defined in parent application Ser. No. 10/322,527 represents one excellent example of a new circuitized substrate specifically adapted for use in information handling systems such as described above.
It is believed that such an improved system will constitute a significant advancement in the art.
USPTO Backgrounds
USPTO Backgrounds