The present disclosure relates generally to semiconductor integrated circuits (ICs). More particularly, the present disclosure relates to scaling of semiconductor devices, such as metal-oxide-semiconductor field effect transistors (MOSFETs).
In order to be able to make integrated circuits (ICs), such as memory, logic, and other devices, of higher integration density than currently feasible, one has to find ways to further downscale the dimensions of field effect transistors (FETs), such as MOSFETs, and complementary metal oxide semiconductors (CMOS). Scaling achieves compactness and improves operating performance in devices by shrinking the overall dimensions and operating voltages of the device while maintaining the device's electrical properties.
USPTO Backgrounds
USPTO Backgrounds