1. Field of the Invention
This invention relates generally to lithography and more particularly to a method and apparatus for increasing the selectivity of a silicon-containing photoresist layer to improve profile control of etched features without decreasing wafer throughput.
2. Description of the Related Art
The ability to work selectively on small well defined areas of a substrate is paramount in the manufacture of semiconductor devices. In the continuing quest to achieve higher levels of performance and higher functional density of the semiconductor devices, the microelectronics industry is committed to applying new processes to further reduce the minimum feature sizes of the semiconductor devices.
As the feature sizes are reduced, the devices can become smaller or remain the same size but become more densely packed. As such, advances in lithographic technologies used to pattern the semiconductor devices must keep pace with the progress to reduce feature sizes, in order to allow for smaller and more dense. For example, one of the main ways to reduce the device critical dimensions (CD) through lithographic technologies has been to continually reduce the wavelength of the radiation used to expose the photoresist.
Sharp lithographic transmission becomes more of a challenge as wafers progress to higher density chips with shrinking geometries. Furthermore, as metallization transitions to dual damascene processes, lithography techniques to pattern holes or trenches in the dielectric become more critical. In particular, the photoresists employed in the lithographic techniques must provide for proper selectivity so that downstream etching processes yield sharp profiles. Moreover, as device features progressively become smaller, the aspect ratios for those same features become greater, thereby making it more difficult to accurately perform etching operations.
Photoresists are typically polymeric materials consisting of multi-component formulations. Additionally, a photoresist may be applied as a single layer or as multiple layers where one of the layers contains silicon. Multi-layered photoresists tend to offer superior formation of a pattern, therefore, the multi-layered photoresists are desirable as semiconductor devices become smaller. However, resist compositions containing silicon, either in the main resist polymer or by post-exposure surface treatment (e.g., silylation), have either failed to deliver adequate improvement in etch resistance or have had poor processing performance due to the unacceptable selectivity past the silicon containing layer.
As a result, there is a need to solve the problems of the prior art to improve the selectivity past the developed photoresist layer containing silicon, without simultaneously decreasing wafer throughput, so that during etching there is improved ability to distinguish between silicon containing photoresists and non silicon containing photoresists or the dielectric.
USPTO Backgrounds
USPTO Backgrounds