GOA (Gate Driver on Array) technology can help to create narrow or borderless display products, and reduce the external integrated circuit (IC) binding process is conducive to enhance productivity and reduce product costs, which has been widely used and research.
Current GOA circuits include cascaded GOA cells, with each GOA cell corresponding to a first scan line. The GOA unit mainly includes a pull-up part, a pull-up control part, a transfer part, a key pull-down part, a pull-down holding part, and a boast capacitor for raising the electric potential. As shown in FIG. 1, FIG. 1 is a circuit diagram of a GOA unit in the prior art, in FIG. 1, the pull-down control circuit is composed of a thin film transistor (TFT) T11, however, under the effect of this pull-down control unit, the waveform of the gate cannot be rapidly lowered in the presence of a large RC load of the gate line, resulting in the presence of a sharp peak, the waveform of one gate, as shown in FIG. 2, causes the waveform of the gate to be abnormal and cannot be outputted normally.
USPTO Backgrounds
USPTO Backgrounds