The invention relates to a diode or IGBT (insulated-gate bipolar transistor) or other semiconductor device, which has soft recovery characteristics in addition to high speed and low losses, and to a manufacturing method for such a device.
Semiconductor devices for use in power applications include diodes, IGBTs and similar devices in 600 V, 1200 V, 1700 V, and similar classes. Recently, there have been improvements in the characteristics of these devices. Power semiconductor devices are used in high-efficiency, power-conserving converter/inverters and other power conversion devices, and are indispensable for control of rotary motors and servomotors.
Such power control equipment is required to have low losses and consume less power, to operate at high speed and high efficiency, and to be environmentally friendly, that is, not to exert adverse effects on the surroundings. In response to such demands, a broad buffer structure for diodes has been proposed. In a broad buffer structure, the average concentration distribution in the N− drift layer has a peak (maximum value) substantially in the center of the layer, and decreases with a certain slope toward the anode and cathode directions (see, for example, Japanese Patent Application Laid-open No. 2003-318412, hereinafter referred to as “Patent Document 1”).
A diode with a broad buffer structure can realize soft recovery characteristics and oscillation suppression in high-speed operation (for example, at carrier frequencies of 20 kHz and higher), which are difficult to attain by conventional technology to lower the emitter injection efficiency and control lifetime distribution (see, for example, Japanese Patent Application Laid-open No. 8-148699, hereinafter referred to as “Patent Document 2”). The following two methods have been disclosed in Patent Document 1 as methods for manufacturing diodes with such a broad buffer structure.
The first method is a method of using an epitaxial growth method to form a region with higher phosphorus concentration than the initial phosphorus concentration of the semiconductor substrate in a region deep in the bulk material, that is, a region 30 to 60 μm or deeper from the surface of the semiconductor chip. The second method is a method of irradiating a FZ (Float Zone) bulk wafer with protons (H+) and performing heat treatment, to convert protons into donors in the vicinity of the proton range Rp within the bulk material. Because bulk wafers are less expensive than epitaxial wafers, the second method is less expensive than the first method.
In addition to the above Patent Document 1, various other methods have been proposed for forming high-concentration N+ layers using proton donor techniques based on proton irradiation and heat treatment (see, for example, Japanese Patent Application Laid-open No. 9-260639, hereinafter referred to as “Patent Document 3” and Japanese Patent Application Laid-open No. 2001-156299, hereinafter referred to as “Patent Document 4”). In Patent Document 4, a method is disclosed in which oxygen thermal donors are used to form an N+ layer. In addition, when there is a need to avoid proton donors, the use of helium in place of protons has been proposed (see, for example, Japanese Patent Application Laid-open No. 2003-249662 hereinafter referred to as “Patent Document 5”).
Further, a method has been proposed, as a method of obtaining an inexpensive broad buffer structure, in which a high-concentration region is obtained within the bulk material by compensating the donor (phosphorus) concentration of the semiconductor substrate with acceptor atoms, as a net doping concentration (see, for example, Japanese Patent Application Laid-open No. 2005-64429, hereinafter referred to as “Patent Document 6”). A method in which proton irradiation is used to form defects in silicon substrate, and heat treatment is performed to adjust the residual defects to locally reduce lifetimes, is also well known (see for example Patent Document 5, Japanese Patent Application Laid-open No. 2001-326366, hereinafter referred to as “Patent Document 7”, and Japanese Patent Application Laid-open No. 10-74959, hereinafter referred to as “Patent Document 8”).
On the other hand, an IGBT manufacturing method in which a commonly used semiconductor substrate (for example a silicon wafer) is reduced in thickness by grinding or similar, ion implantation is performed from the ground surface to a prescribed concentration, and heat treatment is performed, to obtain IGBTs at low cost with low electrical losses (see for example, Published Japanese Translation of PCT Application No. 2002-520885, hereinafter referred to as “Patent Document 9”). In recent years, device development and manufacture using such low-cost methods have become the norm. Other diode structures include for example that of the diode disclosed in Japanese Patent Application Laid-open No. 2001-127308, hereinafter referred to as “Patent Document 10”.
It is difficult to form a region with a higher donor concentration than the initial phosphorus concentration of a semiconductor substrate deep in the bulk material through ion implantation of phosphorus and arsenic as normal donor atoms. One reason for this is that even when phosphorus or arsenic is implanted into the semiconductor substrate at the normal accelerating voltage of 1 MeV, the range Rp is only about 1 μm, and so for practical purposes it is impossible to distribute the phosphorus or arsenic in a region of depth 30 μm or greater.
Hence as explained above, the only choices are to form a high-concentration donor region in the bulk material through compensation, or to form a high-concentration donor region in the bulk material by using atoms lighter than phosphorus or arsenic. Using a compensation method, diffusion must be performed over a long period of time at relatively high temperatures of around 1000° C. in order to cause for example aluminum, gallium, platinum, zinc, or similar, which are lighter than boron and have high diffusion constants, to reach a diffusion depth of 30 μm or greater.
In particular, when these atoms are introduced from the rear-surface side of the substrate, the wafer must be ground and polished to a thickness of approximately 100 μm, and atoms must be introduced by ion implantation from the polished face and diffused. Hence there are the problems that the thin wafer may break during handling, the ion-implanted face may be scratched due to foreign matter, or for other reasons a diffusion region with the desired concentration may not be formed.
On the other hand, in methods which use light atoms such as protons and helium, irradiation with charged particles and heat treatment are performed prior to grinding to make the wafer thin, so that the above-described breaking, scratching, and similar of the wafer can be reduced. However, because control of donor concentrations is difficult, there is a problem in that the desired concentration profile cannot easily be obtained.
For example, in Patent Document 3, a FZ wafer is irradiated with protons at an accelerating voltage of 10 MeV and a dose of 4×1011 atoms/cm2, to form an N+ high-concentration layer (in Patent Document 3, a channel stop layer). The concentration in the N+ high-concentration layer obtained is at most 2.5×1014/cm3, and the width of the low-resistance region in the vicinity of the range Rp is a broad 200 μm or greater.
On the other hand, for 600 V or 1200 V class devices, the width of the low-concentration N− drift layer in the above-described broad buffer structure is approximately 150 μm, narrower than the width (200 μm) of the low-resistance region. Hence using the method disclosed in Patent Document 3, an effective broad buffer structure cannot be formed.
In Patent Document 4 it is stated that the proton irradiation energy is 1 MeV or less, and that the heat treatment temperature is 300° C. or higher and 500° C. or lower. However, the proton irradiation energy for formation of the broad buffer structure is not described. Further, specific fabrication results are also not described. Hence it is unclear whether a broad buffer structure can actually be fabricated.
In Patent Document 5, it is stated that helium is more desirable than protons, and a reason cited for this is that upon irradiation with protons, the device breakdown voltage falls to approximately 60% of the normal value. However, the drop in breakdown voltage due to proton irradiation is due to the fact that a device with an ordinary conventional structure, rather than a broad buffer structure, is fabricated. Further, in Patent Document 5, the specific proton irradiation conditions and heat treatment conditions are not stated.
Moreover, upon comparing FIG. 3 in Patent Document 5 and FIG. 4 in the same reference, it is seen that compared with the device fabricated by helium irradiation with the desired profile of FIG. 4, the concentration in the high-concentration region of a device fabricated by proton irradiation in FIG. 3 is approximately four times the desired concentration, so that precise control is not achieved. Because in Patent Document 5, Patent Document 7, and Patent Document 8 there is no description whatsoever relating to conversion of protons into donors, the method of control for converting protons into donors remains unclear.
Results of experiments performed by the present inventors will now be explained. In these experiments, FZ-N type silicon wafers were irradiated with protons, and after performing heat treatment, the spreading resistance measurement method was used to directly evaluate concentration profiles. The wafer resistivity was 330 Ω-cm, and the phosphorus concentration was 1.4×1013/cm3. The proton irradiation energy was 7.9 MeV, and the dose was 1.0×1012/cm2. An aluminum absorber was used to cause the proton range to extend to a depth of approximately 50 μm from the silicon surface, that is, from the proton irradiation surface. On the proton irradiation surface, a thermal oxidation film approximately 10000 Å thick was formed.
Heat treatment conditions were 60 minutes at 350° C. and 60 minutes at 420° C. Under both conditions, annealing was performed in a nitrogen and hydrogen atmosphere. Samples fabricated in this way were affixed to a mount at an angle of 5°44′, and were polished using a 1/20 diamond compound so that a wafer cross-section is exposed.
Spreading resistance of samples was measured using an SSM2000 by Solid State Measurement. Resistance values obtained in these measurements were converted into carrier concentrations, the results for which appear in FIG. 51 (heat treatment temperature: 350° C.) and FIG. 52 (heat treatment temperature: 420° C.). In both figures, the vertical axis indicates the carrier concentration, and the horizontal axis indicates the distance from the wafer surface (proton irradiation surface), that is, the depth.
From FIG. 51, upon annealing at 350° C. the average concentration of a wafer irradiated with protons (“after proton irradiation” in FIG. 51) in the vicinity of a depth of 50 μm from the surface is seen to be an order of magnitude lower than the concentration in the wafer without proton irradiation (“before proton irradiation” in FIG. 51). This is because numerous defects exist in the vicinity of the proton range, and consequently the resistivity is high in the region at this depth. Hence it is clear that a broad buffer structure such as that disclosed in Patent Document 1 is not obtained.
From FIG. 52, when annealing is performed at 420° C., there is more crystal recovery and resistivity is lower than upon annealing at 350° C., but in the vicinity of the proton range the average concentration in the proton-irradiated wafer (“after proton irradiation” in FIG. 52) is lower than the concentration in the wafer which has not been irradiates (“before proton irradiation” in FIG. 52), and so clearly a broad buffer structure is not obtained. In this way, using a well-known proton irradiation and heat treatment method, it is difficult to form the desired broad buffer structure.
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