1. Field of the Invention
The present invention relates to a semiconductor device capable of suppressing characteristic changes caused during a packaging process of the semiconductor device.
2. Description of the Related Art
Semiconductor devices formed on a wafer are cut and divided into chips through a dicing process to be assembled into packages. During a packaging process through sealing by resin and heat treatment, stress is applied to the semiconductor chip from the package, causing a warp in the semiconductor device whose characteristics are measured after the package assembling of the semiconductor device. Due to the warp, the measured characteristics of the semiconductor device may deviate from electrical characteristics of the semiconductor device measured on the wafer. As to a method for relaxing the stress, there has been proposed so far a method including forming a trench in a scribe region to thereby relax the stress in a wafer form, as disclosed in JP 2003-332270 A.
In such a method as described above, however, the effect for stress relaxation is obtained only in a wafer form, and it has been a problem that the stress relaxation cannot be expected in a chip form after the dicing process.
USPTO Backgrounds
USPTO Backgrounds