This invention relates generally to manufacturing processes for fabricating semiconductor integrated circuit devices. More particularly, it relates to an improved method of applying a developer onto a semiconductor wafer substrate having a ultra-thin resist film coating thereon so as to minimize unexposed film thickness loss during development.
As is generally known to those in the semiconductor industries, there is a continuing trend of manufacturing semiconductor integrated circuits with higher and higher densities on a smaller chip area. As a consequence of this desire for large scale integration, this has led to a continued shrinking of the circuit dimensions and features of the devices so as to reduce manufacturing costs and to improve circuit functionality. The ability to reduce the size structures such as shorter gate lengths in field-effect transistors is driven by lithographic technology which is, in turn, dependent upon the wavelength of light used to expose the photoresist. Currently, optical steppers expose the photoresist using light having a wavelength of 248 nm is widely used in manufacturing, but a radiation having a wavelength of 193 nm is being experimented in research and development laboratories. Further, the next generation lithographic technologies will in all likelihood progress toward a radiation having a wavelength of 157 nm and even shorter wavelengths, such as those used in Extreme Ultra-Violet (EUV) lithography (.apprxeq.13nm).
As the wavelength of the radiation decreases, such classic image exposure techniques cannot be used to satisfactorily generate the pattern linewidths in the photoresist of greater than 0.25 .mu.m (2500 .ANG.). This is due to the fact that the organic-based photoresist materials will become increasingly opaque to the radiation. In order to overcome this drawback, there has been developed in recent years the use of ultra-thin resist (UTR) coatings in order to maintain the desired characteristics of the masked photoresist structures (e.g., near vertical sidewalls for the resist profiles, maximum exposure/focus latitude). In the current state-of-the-art, integrated circuit manufacturers have been using in the resist process a resist coating having a standard photoresist thickness of more than 0.5 .mu.m (5,000 .ANG.) for 248 .mu.m lithography and 0.4 .mu.m (4,000 .ANG.) for 193 .mu.m lithography. Thus, a resist coating having an UTR thickness is considered to be resist films of less than 0.25 .mu.m (2500 .ANG.) in thickness.
However, the development of ultra-thin resist coating is not without any problems due to the fact of the inherent thinness of the resist coating. For positive photoresist, the unexposed areas of the resist coating are insoluble and the exposed areas thereof are dissolved away when the substrate is immersed in an alkaline developing solution so as to produce a positive relief pattern on the substrate. Unfortunately, some of the resist coating, which is not exposed, is typically also dissolved during the development process. This is referred to sometimes as the "unexposed film thickness loss" or UFTL.
The loss of resist coating during the development process typically does not create any problems for the standard photoresist thickness of more than 5,000 .ANG.. For example, the loss of 150 .ANG.for the standard photoresist thickness amounts only to 3% of the total thickness. On the other hand, the loss of 150 .ANG.for the Ultra-Thin Resist (UTR) coating having a thickness of, for instance, 1500 .ANG.would be a serious problem since this would amount to 10% of the total thickness. Such a large percentage loss can adversely affect the subsequent etching processes in which the resist acts as a mask, where the selectivity between the resist and a device layer (film) to be etched is low.
Another problem encountered during the development process for UTR films is that they are more susceptible to critical dimension (CD) variations caused by the location of the developer nozzle. In particular, where a developing solution is dispensed onto the central portion of the substrate surface, the developing solution is then distributed on the substrate surface from the central position to the peripheral position by spinning. It is generally known that the impact point of the stream(s) of developing solution with the resist accelerates development locally. For the standard thickness photoresist coatings, this effect can be tolerated. However, for the UTR film coatings, they cannot be tolerated due to their inherent thinness.
Accordingly, there has arisen a need of providing a way of applying a developer onto a semiconductor wafer substrate having a ultra-thin resist film coating thereon so as to minimize unexposed film thickness loss during development. This is accomplished in the present invention by applying the developing liquid from a developer nozzle which is off-set from the central portion of the wafer substrate and by allowing the developing liquid to contact the wafer substrate for less than 10 seconds.
USPTO Backgrounds
USPTO Backgrounds