The present invention relates generally to computing technology, and more specifically, to peripheral component interconnect (PCI) function measurement block enhancements.
Data regarding the performance of PCI functions attached to a processor (e.g., an IBM z-series processor) are gathered or obtained during the normal operation of the PCI function. The data may be inspected by an Operating System (OS) using a function measurement block (FMB), the location of which is established by a “modify PCI function controls” (MPCIFC) instruction.
The FMB may include a number of fields. For example, a “format” field is included that is one-byte and indicates a format of the remaining fields. A “sample count” field is a 32-bit binary integer that is incremented whenever any of the following fields is updated. A “PCI-load operations” field is a 64-bit binary integer that is incremented each time a PCILG instruction completes with a condition code of zero (0). A “PCI-store operations” field is a 64-bit binary integer that is incremented each time a PCISTG instruction completes with a condition code of zero (0). A “PCI-store-block operations” field is a 64-bit binary integer that is incremented each time a PCISTB instruction completes with a condition code of zero (0). A “refresh-PCI-translations operations” field is a 64-bit binary integer that is incremented each time a RPCIT instruction completes with a condition code of zero (0). A “DMA read/write counters” field represents pairs of 64-bit binary integer counters that are incremented by one for each transfer operation, e.g., a transfer comprising a full or partial 32-byte block.
In further iterations, the FMB described above may be amended to include a “validity indication” field that is a one-bit value indicating whether the DMA read/write counters contain valid numbers. The FMB may include a “time of last update” field that is a 63-bit field indicates the time of the last update of the PCI FMB. The time of last update field has the same format as bits 0-62 of a time-of-day (TOD) clock used by a central processing unit (CPU) and follows the sample count field described above. The FMB may include an “update-in-progress” field that is a 1-bit field that is set when the PCI function begins the process of updating the various counters in the FMB and is reset to zero when the update process has completed. The update-in-progress field immediately follows the time of last update field, and thus, the two fields form a doubleword-aligned 64-bit value.
USPTO Backgrounds
USPTO Backgrounds