This invention relates to printed circuit boards. In particular, the present invention is a method of fabricating a high signal integrity, xe2x80x9csolder bridgexe2x80x9d electrical connection for connecting conducting pads of a printed circuit board, and a printed circuit board having at least one solder bridge for electronically connecting adjacent printed circuit board conducting pads. The solder bridge forms a reliable and secure electrical connection between adjacent conducting pads without the need for electronic components such as zero ohm resistors, dip switches and/or jumper block/header arrays.
Printed circuit boards (PCB""s) with electrical components are widely used in the electronics industry in a variety of products including computers, televisions and telecommunication devices. PCB""s are typically manufactured in a two step process. First, the actual PCB xe2x80x9cblankxe2x80x9d is fabricated from multiple layers of materials and copper traces. The copper traces typically terminate in conducting through-holes or conducting pads to which electrical components can be attached to the PCB blank. In the second part of the PCB manufacturing process, these electrical components, such as resistors capacitors, microchips, etc. are attached to the PCB blank. Through-hole electrical components are generally attached to the conducting through holes of the PCB blank using through-hole processes, while surface mount electrical components are attached to the conducting pads of the PCB blank using surface mount processes.
In typical through-hole mounting processes, the leads of the electrical components are passed through the conducting through-holes in the PCB blank so that the ends of the leads extend beyond a bottom side of the PCB blank. The ends of the leads are then soldered to the bottom side of the PCB blank by a solder wave in which molten solder flows across the bottom side of the PCB blank. The molten solder fills the voids between the electrical component leads and the conducting through-holes to form conductive bonds between the leads and the conducting through-holes on the PCB blank.
In typical surface mounting processes, a solder paste is applied to the conducting pads of the PCB blank through a stencil patterned with openings corresponding to the PCB blank conducting pad locations. Typically, the solder paste is screen deposited onto the conducting pads using the stencil as a mask and a blade to squeegee the solder paste through the holes in the stencil. When the stencil is removed, the solder paste remains on the conducting pads of the PCB blank. Next, the leads of the electrical components are placed on the soldered conducting pads, and the solder paste is subjected to reflow soldering to adhere the leads to the conducting pads. To prevent solder shorts (i.e., the unwanted formation of an electrical connection between conducting pads), due to the imprecise application of the soldering paste or the unwanted flow of solder during the reflow soldering process, the conducting pads are often fabricated on the PCB blank so as to have an edge-to-edge conducting pad separation of between 20-100 mils with a minimum edge-to-edge conducting pad separation of at least 12 mils.
During the process of mounting electrical components to the PCB blank, it is often necessary to simply electrically connect conducting pads to one another with acceptable parasitic capacitance and inductance. Typically, to electrically connect conducting pads in this fashion, it is necessary to use a xe2x80x9cload/no-loadxe2x80x9d process to mount a separate electrical component to the PCB blank after the application of the soldering paste and before the reflow soldering procedure. Types of components that are typically used are xe2x80x9czero ohm resistorsxe2x80x9d, xe2x80x9cdip switchesxe2x80x9d and xe2x80x9cheader array/jumper blocksxe2x80x9d.
Although any one or all of these components can provide the desired electrical connection between conducting pads there are drawbacks to the use of these types of electrical components. For example, all of these solutions to providing an electrical connection, with acceptable parasitic capacitance and inductance, between conducting pads requires the use of separate electrical components (i.e., extra parts). These extra parts increase the overall cost of manufacturing the PCB. Moreover, these extra parts are susceptible to damage during routine handling of the PCB that may adversely affect the operation of the PCB. In addition, these extra parts are susceptible to becoming dislodged or inadvertently misaligned during the reflow soldering process which can adversely affect the electrical connection formed by these separate electrical components and the subsequent operation of the PCB. Further, these separate electrical components take up valuable PCB surface area and degrade the integrity of the electrical signal between the conductor pads connected by these components. Still further, PCB""s employing these separate electrical components are not easily reconfigurable during the PCB manufacturing process, since to accomplish such a task typically requires the addition of automated equipment and/or the reprogramming of automated equipment for mounting these components onto the PCB blank in the desired reconfigured format. Lastly, the design of these separate electrical components limits their PCB mounting configurations, and as such, typically necessitates that these components be mounted to the PCB either parallel (i.e., 180xc2x0) or at a 90xc2x0 angle with respect to other components on the PCB.
There is a need for PCB""s having substantially zero signal degradation electrical connections that minimize parasitic capacitance and inductance between connected conducting pads, and a method of fabricating such substantially zero signal degradation electrical connections between conducting pads of a PCB. In particular, there is a need for PCB""s having these substantially zero signal degradation electrical connections and a method of fabricating these electrical connections between conducting pads that does not require the use of separate electrical components (such as xe2x80x9czero ohm resistorsxe2x80x9d, xe2x80x9cdip switchesxe2x80x9d and xe2x80x9cheader array/jumper blocks) and thereby reduces the cost of manufacturing the PCB. These substantially zero signal degradation electrical connections should not be susceptible to damage during routine handling of the PCB that may adversely affect the operation of the PCB. In addition, these substantially zero signal degradation electrical connections should not be susceptible to becoming dislodged or inadvertently misaligned during the PCB manufacturing process. Further, these substantially zero signal degradation electrical connections should not take up valuable PCB surface area, nor should these electrical connections degrade the integrity of the electrical signal between connected PCB conducting pads. Still further, it should be relatively easy to reconfigure the PCB during the manufacturing process to eliminate, add or change the configuration of these substantially zero signal degradation electrical connections without adding automated equipment and/or reprogramming automated equipment for mounting electrical components onto the PCB blank. Lastly, these substantially zero signal degradation electrical connections should be rotatable through any angle so as to be mountable to the PCB at any angle (not just 90xc2x0 and 180xc2x0) to allow the PCB to employ various conducting pad geometries and groupings to take advantage of available PCB surface space.
The present invention is a printed circuit board product comprising a dielectric structure core having a first surface. At least two conducting pads are located on the first surface of the dielectric structure core. The at least two conducting pads are separated by a pad edge-to-pad edge separation distance of less than 12 mils.
In one aspect of the present invention the pad edge-to-pad edge separation distance is 8 mils. In another aspect of the present invention, the at least two conducting pads are defined by a first conducting pad having an edge and a second conducting pad having an edge. The edge of the second conducting pad is separated from but adjacent to the edge of the first conducting pad such that the edges of the first and second conducting pads define therebetween a surface area of the first surface of the dielectric structure core. In a further aspect of the present invention, a solder bridge at least partially covers this surface area to form a substantially zero signal degradation electrical connection between the first and second conducting pads. In still another aspect of the present invention, the solder bridge covers substantially all of the surface area of the first surface of the dielectric structure core defined between the edges of the first and second conducting pads.
In another embodiment, the present invention provides a printed circuit board product comprising a dielectric structure core having a first surface. At least two conducting pads are located on the first surface of the dielectric structure core. A solder bridge electrically connects the at least two conducting pads.
In a further embodiment, the present invention provides a method of fabricating a substantially zero signal degradation electrical connection on a printed circuit board. The method includes providing a printed circuit board defined by a dielectric structure core having a first surface. The first surface includes a first conducting pad having an edge and a second conducting pad having an edge separated from and adjacent to the edge of the first conducting pad. The edges of the first and second conducting pads define therebetween a surface area of the first surface. The method further includes applying a solder paste on the first and second conducting pads and on the first surface of the dielectric structure core. The solder paste at least partially covers the surface area of the first surface between the edges of the first and second conducting pads to form a substantially zero signal degradation electrical connection between the first and second conducting pads.
In one aspect of the invention, the solder paste covers the entire surface area of the first surface between the edges of the first and second conducting pads. In another aspect of the invention, the solder paste is applied through an opening within a stencil that has been placed atop the first surface of the dielectric structure core.
In still another embodiment, the present invention provides a stencil device for insuring that solder paste is accurately applied to a printed circuit board to create a substantially zero signal degradation solder bridge electrical connection. The printed circuit board is defined by a dielectric structure core having a first surface. The first surface includes a first conducting pad having an edge and a second conducting pad having an edge separated from and adjacent to the edge of the first conducting pad. The edges of the first and second conducting pads define therebetween a surface area of the first surface. The stencil device comprises a stencil plate member defining a first opening sized to substantially correspond to the first conducting pad, a second opening sized to substantially correspond to the second conducting pad and a third opening that links the first opening to the second opening and is sized to correspond to a partial portion of the surface area of the first surface between the edges of the first and second conducting pads. Upon application of solder paste to the stencil plate member, the solder paste flows through the first, second and third openings onto the first and second conducting pads and the first surface of the dielectric structure core to form a substantially zero signal degradation electrical connection between the first and second conducting pads.
In still a further embodiment, the stencil plate member defines an opening sized to substantially correspond to the first conducting pad, the second conducting pad and substantially the entire surface area of the first surface between the edges of the first and second conducting pads. Upon application of solder paste to the stencil plate member, the solder paste flows through the opening onto the first and second conducting pads and the first surface of the dielectric structure core to form a substantially zero signal degradation electrical connection between the first and second conducting pads.
The method of fabricating a zero signal degradation solder bridge electrical connection for connecting conducting pads of a printed circuit board, and a printed circuit board having at least one of these solder bridges of the present invention does not require the use of separate electrical components (such as xe2x80x9czero ohm resistorsxe2x80x9d, xe2x80x9cdip switchesxe2x80x9d and xe2x80x9cheader array/jumper blocksxe2x80x9d). As such the cost of fabricating such a printed circuit board is reduced. In addition, since this zero signal degradation solder bridge electrical connection has such a low profile, it is not susceptible to damage during routine handling, nor is it susceptible to becoming dislodged or inadvertently misaligned during the printed circuit board manufacturing process. Moreover, since the zero signal degradation solder bridge electrical connection forms a short, direct electrical connection between the conducting pads, degradation of the integrity of the electrical signal and parasitic capacitance and inductance between connected conducting pads is minimized especially when compared to the separate electrical components referred to above. Further, it is relatively easy to reconfigure the printed circuit board during the manufacturing process since the reconfiguring of any zero signal degradation electrical connections only requires modification of the stencil which may in some instances be accomplished simply by masking off with tape unwanted solder bridge connections on the stencil. Lastly, these substantially zero signal degradation electrical connections are rotatable through any angle so as to be mountable to the printed circuit board at any angle (not just 90xc2x0 and 180xc2x0) to allow the printed circuit board to employ various conducting pad geometries and groupings to take advantage of available printed circuit board surface space.
USPTO Backgrounds
USPTO Backgrounds