1. Field of the Invention
The present invention relates to a wiring board, a method of manufacturing a wiring board, and a liquid ejection head, and more particularly, to a wiring board, a method of manufacturing a wiring board, and a liquid ejection head, in which very fine electrical wires are formed at high density on a substrate.
2. Description of the Related Art
An inkjet recording apparatus is known as one apparatus for recording text characters and images onto a recording medium, such as paper. An inkjet recording apparatus forms images by means of ink dots, by causing ink to be ejected from a recording head comprising nozzles for ejecting ink, in accordance with an image signal, thereby depositing ink droplets onto a recording medium, while moving the recording medium relatively with respect to the print head. Typical known ink ejection methods are a method which ejects ink from nozzles by means of the bubbles generated in pressure chambers by heat generating elements, and a method which ejects ink from nozzles by means of the volume change of the pressure chambers caused by piezoelectric elements.
In inkjet recording apparatuses of this kind, in order to achieve high image quality on a par with silver halide photography, it is necessary to arrange the nozzles at high density in the recording head. Furthermore, in order to arrange the nozzles at high density in the recording head, it is also necessary to achieve very fine dimensions in the electrical wires connected to the heat generating elements or piezoelectric elements, or the like, and to arrange these wires at high density also. For example, if providing wires for a 2400 dpi (dots per inch) nozzle arrangement on one surface of a substrate, the width and interval of the wires must be 10 μm or less, and in practice, it must be 5 μm or less. In order to achieve further increases in nozzle density in the future, it is thought that even finer wiring, in other words, extremely fine wiring of approximately 1 μm, or less than 1 μm, will be required.
As a method of achieving fine wiring on a substrate at high densities of this kind, the use of semiconductor lithography has been considered, but this requires steps for forming and removing masks, and the like, and therefore it involves high costs.
On the other hand, when forming electrical wires on a substrate by means of a plating process, in order to achieve plating at the order of 1 μm, it is necessary to ensure sufficient bonding force with the under layer, as well as forming a resist pattern.
In order to resolve problems involved in forming very fine electrical wires by plating in this way, Japanese Patent Application Publication No. 6-302936 proposes the formation of electrical wires having high adhesiveness by patterning and roughening the surface of a glass substrate by sandblasting, and then carrying out metal plating on this roughened surface only.
Japanese Patent Application Publication No. 6-196840 proposes that when manufacturing a circuit board by resin molding, very fine undulations be formed in the circuit forming portion of the die, and catalyst seeds be deposited in these undulations before resin molding of the substrate, thereby causing the catalyst seeds to be transferred onto the substrate, whereupon a plating process achieving a high level of adhesiveness is carried out.
Japanese Patent Application, Publication No. 2003-502507 proposes carrying out electroless plating by transferring catalytic ink onto a substrate by means of a stamp corresponding to a wiring pattern, thereby forming a catalyst layer on the substrate, and then transferring resist material onto same by means of a stamp corresponding to the wiring pattern and carrying out etching, thereby forming a pattern in the catalyst layer, whereupon electroless plating is carried out.
Both of the methods described in Japanese Patent Application Publication Nos. 6-302936 and 6-196840 increase plating adhesion by forming undulations in the surface of the substrate, but since these undulations are of the order of 1 μm or above (in Japanese Patent Application Publication No. 6-302936, the depth of the undulations is 2 μm or less, and in Japanese Patent Application Publication No. 6-196840, the surface roughness Ra is 1.0 to 5.0 μm), then if seeking to form fine wires at a high density having a width and interval of 1 μm or less, the undulations in the wiring sections cannot be ignored and they can give rise to breaking of the wires, and the like.
On the other hand, the method described in Japanese Patent Application Publication No. 2003-502507 does not involve roughening of the surface of the substrate, and therefore provides stable electrical connections, but it has drawbacks in that the plating is liable to peel away from the under layer and suitable adhesiveness cannot be guaranteed.
Furthermore, in the above-described related art, the catalyst forming the base points for the plating is simply deposited on the substrate and then transferred, which means that the transfer efficiency is low and leads to the risk of peeling away of the catalyst due to mechanical and thermal stresses both during and after the plating process.
USPTO Backgrounds
USPTO Backgrounds