1. Field of the Invention
The present invention generally relates to a field-effect transistor and a method of producing the field-effect transistor, and more particularly, to a field-effect transistor with reduced third harmonic distortion and a method of producing the field-effect transistor.
2. Description of the Related Art
At present, field-effect transistors (FETs) are being used as power amplifying devices for portable telephone base stations. FIG. 1 illustrates the transconductance (gm) profile (a Vg-Gm characteristic curve) of a conventional field-effect transistor.
As can be seen from FIG. 1, the gm profile of the conventional field-effect transistor has a flat part in the area where gate-source voltage Vgs exists. In accordance with a conventional technique using a field-effect transistor in class-A operation, it is preferable that the flat part shown in FIG. 1 exists in the gm profile in the operation area (the class-A operation area in FIG. 1), because the transconductance (gm) should ideally be constant in class-A operation.
In recent years, field-effect transistors are more often used in class-AB operation (see FIG. 1), to increase the power amplifying efficiency. In class-AB operation, a curved part of the gm profile is utilized.
With the class-AB operation area, however, there is a problem that the third order intermodulation distortion (IM3) increases due to the nonlinear gm profile. It is considered that the nonlinearity is caused by the constant impurity concentration in the channel part of the field-effect transistor.
USPTO Backgrounds
USPTO Backgrounds