In recent years, in accordance with the application of large-scale semiconductor circuits such as large scale integration (LSI) or the like, the miniaturization of wiring, the increase of the amount of power line wiring, and the application of low-voltage power, power circuit analysis has been important in the design stage of a semiconductor circuit. In the power circuit analysis, mesh type power line wiring leading from a power source to a load device is regarded as electrical resistance in the semiconductor circuit, a voltage drop in the power source which occurs owing to the electrical resistance is detected, and it is analyzed whether or not a voltage used for supplying a sufficient power source is applied to each of a number of load devices. At this time, a resistor model is created on the basis of the power line wiring of a whole analysis target circuit, and a voltage current value calculation is performed.
For example, a usual power circuit analysis apparatus 100 illustrated in FIG. 10 is an apparatus that performs power circuit analysis on an analysis target circuit on the basis of the circuit information of the analysis target circuit which is generated in a computer aided design (CAD) system 200, and includes a model generation unit 101 and an analysis unit 102. The model generation unit 101 generates a non-compressed circuit model in which the power line wiring of a whole power circuit is directly modeled. Namely, the model generation unit 101 generates a non-synthetic resistor model that is a non-compressed circuit model from the power line wiring of the whole power circuit. The analysis unit 102 performs power circuit analysis on the basis of the non-compressed/non-synthetic resistor model generated by the model generation unit 101. The CAD system 200 reflects the analysis result of the analysis unit 102 in the circuit information of the analysis target circuit. When analysis is performed on the basis of the non-compressed/non-synthetic resistor model as described above, the number of devices to be analysis targets increases. Therefore, a processing time and a memory capacity especially cited as an enormous amount of computer resources are necessary, and hence it has been difficult to analyze the power circuit on the basis of a realistic time and a realistic memory capacity.
Therefore, for example, a power circuit analysis apparatus 110 illustrated in FIG. 11 has been also proposed. The power circuit analysis apparatus 110 is also an apparatus that performs power circuit analysis on an analysis target circuit on the basis of the circuit information of the analysis target circuit generated in the CAD system 200, and includes a model generation unit 111 and an analysis unit 112. The model generation unit 111 generates a synthetic resistor model in which the resistor of the power line wiring of a power circuit is synthesized. The analysis unit 112 performs power circuit analysis on the basis of the synthetic resistor model generated by the model generation unit 111. The CAD system 200 reflects the analysis result of the analysis unit 112 in the circuit information of the analysis target circuit. In the power circuit analysis apparatus 110, by using the synthetic resistor model, it is possible to significantly reduce a memory capacity necessary for the power circuit analysis and significantly reduce a time necessary for the power circuit analysis compared with a case in which a non-synthetic resistor model is used.
In addition, there has been proposed a technique in which power source analysis is performed in accordance with a resistor model generated on the basis of the circuit information of the segmented region with respect to a plurality of segmented regions into which an analysis target region of a power circuit. According to the technique, since the analysis target region is segmented, it is possible to execute the power circuit analysis in parallel, and it is possible to perform analysis in a short time. In addition to the technique, it is possible to execute the power circuit analysis for only a desired region in a short time compared with a case in which the analysis target region is not segmented.
As described above, the miniaturization of wiring, the increase of the amount of power line wiring, and the application of low-voltage power, the importance of the power circuit analysis has been increased, and the amount of power line wiring of an analysis target has been significantly increased with the progress of a technology in accordance with the application of large-scale integrated circuits. Regardless of such a situation, since the power circuit analysis is performed for the power line wiring of a whole circuit as an analysis target, an immense amount of memory consumption has been necessary at the analysis and an immense amount of time has been necessary for the analysis. Therefore, an immense amount of man-hours is also necessary for specifying and correcting an error position, and it may also be difficult to perform the analysis owing to the lack of computer resources.
In particular, as described above, it has been difficult to analyze the power circuit with a realistic time and a realistic memory capacity, when the non-compressed circuit model is used in which a circuit geometry is directly modeled as illustrated in FIG. 10.
In addition, when the synthetic resistor model is used as illustrated in FIG. 11, it is possible to reduce the amount of memory utilization and a processing time. However, since an actual circuit geometry is different from a circuit geometry after synthesis, it is difficult to correctly specify an error position even if an error is detected on the basis of the analysis.
Furthermore, in a case in which the whole analysis target region is segmented into a plurality of segmented regions, while analysis processing is realized in which the amount of memory utilization and a processing time are lowered, a resistor model of the related art is generated and a voltage current value calculation is performed in the analysis processing thereof. Therefore, enormous amounts of computer resources and a processing time remain to be necessary for matrix operation executed in the voltage current value calculation.
An example of documents relating to a power circuit analysis apparatus and a power circuit analysis method is listed below.
[Patent Document 1] Japanese Laid-open Patent Publication No. 2009-289062.
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