1. Field of the Invention
The present invention relates to a display device driven by a microcomputer having an interruption port.
2. Description of the Prior Art
The display devices for a copier, for indicating copy number, cassette size, paper jamming, waiting state etc. are driven either by static method or by dynamic method. As the driving microcomputer is generally utilized also for other functions such as key entry and copy process control, the dynamic drive is usually employed for the display devices in consideration for example of the limitation in the number of ports. In such dynamic drive each display digit must be driven at an interval so as not to cause a flickering impression on the eyes.
Thus, in a microcomputer control of the display devices for the copier, it has been necessary to divide the main program for controlling the copy process and to insert the program for display at appropriate timings. Consequently a fluctuating execution time of the main program gives rise to irregular drive intervals causing a flickering display, and the prevention of such phenonmenon requires insertion of an excessive number of unnecessary steps.
FIG. 1 shows a conventional microcomputer-controlled display system for a copier, in which there are shown a one-chip microcomputer .mu.COM; 7-segment display elements SET 1, SET2, COPY1 and COPY2 composed of light-emitting diodes or liquid crystal display elements in which SET1 and SET2 respectively display the first and second digit of the copy set number while COPY1 and COPY2 respectively display the first and second digit of the copy counter; a segment drive SD for driving the segments of said display elements SET1, SET2, COPY1 and COPY2 in response to segment signals from output ports PH0-3 and PG1-3 of the microcomputer .mu.COM; and a digit driver DD for lighting said display device SET1, SET2, COPY1 or COPY2 according to said segment signals and in response to a digit signal from output ports PF0-3 of the microcomputer .mu.COM.
Also there are shown an output port R2 for releasing an optical system backward signal upon completion of the original scanning; an output port R3 for releasing a signal for the forward movement of the optical system and for activating the exposure lamp at the start of the original scanning; and an output port R4 for releasing a paper feed signal for energizing a paper feed solenoid at an appropriate timing for paper feeding to lower a constantly rotated paper roll 28, thereby initiating the paper feeding.
The timings of said signals are shown in FIG. 2. During the idle cycle, the digit signals PF0-3 are maintained at a determined duty ratio as shown in the left-hand portion, as the microcomputer repeats the display of the copy counter and the sensing of key entry in this state. However, once the copy cycle is initiated, although the key entry reading is no longer necessary, the microcomputer has to maintain the dynamic display drive and, in addition, has to perform the reading through a port X2 of drum clock pulses DCK which are optically, magnetically or mechanically generated for tracing the functional position of the copying apparatus and the counting of said clock pulses. The flow chart of such procedure is shown in FIG. 3, wherein the loop "a" indicates the level-1 period of the wave form of said drum clock pulse DCK, while the loop "b" indicates the level-0 period of said pulse.
In the flow chart shown in FIG. 3, the microcomputer identifies in the step 4-1 whether the input port X2 for the drum clock pulse is at the level-1 state, then, if X2=1, executes an unrepresented subroutine for display switching, proceeds to the step 4-2 at the trailing end of the drum clock pulse to again identify whether said port X2 is at level-1, then executes the display switching subroutine if X2=0, and proceeds to the step 4-3 at the leading end of the drum clock pulse. In said step 4-3, the content of a memory address A1 storing the first digit of a predetermined pulse number is reduced by one, and the thus reduced number is again stored in said memory address A1. The above-mentioned memory address A1 and other memory addresses A2, A3, to be explained later, store said pulse number to be counted in a hexadecimal code. In the succeeding step 4-4 the microcomputer identifies whether the content of said memory address A1 is equal to 15, and if not, the program returns to the step 4-1. The counting is continued in this manner, and, when A1=15 is reached, the program proceeds to the step 4-5 in which the content of the memory address A2 storing the second digit of said predetermined pulse number is decreased by one and the thus reduced number is again stored in said memory address A2. In the succeeding step 4-6 the microcomputer identifies whether the content of said memory address A2 is equal to 15, and, if not, the program returns to the step 4-1. A similar procedure is repeated also for the memory address A3 storing the third digit of said predetermined pulse number, and the pulse counting is completed when the contents of said memory addresses A1, A2 and A3 all become equal to 15, whereupon the output port R2 is set to release the optical system backward signal.
Thus, in case the clock pulse DCK is shifted to the level-1 state after resetting of the signal PF0 and setting of the signal PF1 in the display switching subroutine during the preceding loop b, the resetting of the signal PF1 and setting of the signal PF2 take place in a subsequent display switching subroutine after the loop 1 and the repitition of step 4-1 unless a state A1=15 is reached in the counting procedure. As each step in the flow chart requires a constant execution time, the output signals from the ports PF0 and PF1 present significantly different duty ratios as shown in the right-hand portion of FIG. 2, leading to correspondingly different display periods of the elements COPY1 and COPY2, thus giving rise to a flickering display. Such phenomenon has been unavoidable, fundamentally arising from sequential control of the microcomputer.
USPTO Backgrounds
USPTO Backgrounds