Over the past ten years, increasing attention has been focused on input current total harmonic distortion (THD) due to the increasing use of nonlinear loads that tend to degrade AC line quality. THD standards, such as IEC-1000.3.2 promulgated by the International Electrotechnical Commission, address input currents of, for example, 16 amperes or less per phase. Although no international standards for high power rectification exist at the present time, some countries, e.g., India and Brazil, have imposed their own requirements on input current THD to protect their AC line quality.
For producing low THD input currents in three-phase rectification, there are three different conventional approaches. The first approach utilizes six controllable power switches to actively control the three input phase currents. Separate current control loops are used to pattern each of the three input phase current waveforms, resulting in lower THD input currents. This power factor correction (PFC) approach, however, requires complex and relatively expensive control and power conversion circuitry. For example, to implement the current control loops, multiple current sensors are required to detect the input currents. Either digital signal processors (DSPs) or multiple analog controllers are required to process the information. Furthermore, the power stage requires six separate switches with independent drivers, with at least three of the drivers "floating."
The second approach to producing low THD input currents is to employ three single-phase PFC "units" to form a three-phase unit. In single-phase PFC units, input currents are controlled by the duty cycle of a power switch to follow the input voltage emulating a resistive load, which in turn, reduces the THD in the input current. If a single-phase unit has already been developed, a three-phase unit can be readily implemented. A major limitation with this approach is the relatively high cost due to the replication of control and power circuitry required to construct the three-phase unit.
A single-switch boost converter operating in discontinuous conduction mode (DCM) with a high output voltage is the third approach to reducing THD in the input currents. In this boost converter, the decay time of a boost inductor current, over a switching cycle, is determined primarily by the difference between the output DC voltage and the input voltage during the switching cycle. The greater the difference, the faster the inductor currents are reduced to zero. Consequently, the input currents' THDs are also reduced. This approach is attractive for its simplicity, higher reliability and associated lower costs. A serious limitation, however, is that the required output voltage for achieving an acceptable THD value is typically very high. The required high output voltage (for achieving low THD input currents) complicates the selection of the power switching components and the design of the successive, or cascaded load, DC/DC converters, especially when the AC input voltages are as high as 440 volts rms.
Accordingly, what is needed in the art is an improved power converter that overcomes the above-described limitations. More specifically, what is needed in the art is a power converter that has the desirable features of the above-described converters, such as simple control, simple power stage, low output voltage and low input current THD without their limitations.
USPTO Backgrounds
USPTO Backgrounds