1. Field of the Invention
The present invention generally relates to storage controllers for disk array subsystems, and more particularly to RAID XOR operations to synchronous DRAM using a read buffer and pipelining of synchronous DRAM burst read data.
2. Description of the Related Art
Due to the increasing importance of business-critical data to many companies, fault tolerance is often a priority for network storage systems. Fault tolerance, in the context of a disk array subsystem, is the ability of a disk array to continue to perform its functions even when one or more disks have failed. Parity RAID is a network storage solution commonly utilized to provide fault tolerance against a single disk failure. RAID, which stands for Redundant Array of Inexpensive Disks, relates to the concept of using multiple inexpensive disks as one logical unit in the place of a single large disk, for improved storage reliability and system performance. This idea, which is now the industry standard, was introduced in a December 1987 article entitled xe2x80x9cA Case for Redundant Arrays of Inexpensive Disks (RAID)xe2x80x9d by D. Patterson, G. Gibson, and R. H. Katz, which is incorporated herein by reference as if set forth in its entirety.
To date, a variety of RAID architectures (industry and proprietary) have been utilized for network storage. RAID 5, which utilizes parity information to provide redundancy and fault tolerance, is one example. RAID 5 architecture (a.k.a. distributed data guarding) spreads or interleaves user data and redundancy information (e.g., parity) across all the disks or drives in an array. In the event of a failed disk, the user data and the parity information allow for recovery or reconstruction of the data of the failed disk.
Generation of parity information has traditionally involved exclusive or (XOR) operations. New parity information has been generated by XORing new data, old data, and old parity information. For example, new data has been written from a write posting cache to an XOR buffer. Old data and old parity information have then been written to the XOR buffer, effectively XORing the old data, old parity information and the new data. The XOR buffer has typically been a region of dynamic random access memory (DRAM).
DRAM has evolved from fast page mode (FPM) DRAM and extended data out (EDO) DRAM to synchronous DRAM. While XORing has typically been accomplished in connection with a read-modify-write cycle, synchronous DRAM has not supported an external read-modify-write cycle.
Briefly, a memory interface controller includes a read buffer to pipeline data from a synchronous dynamic random access memory (SDRAM) in response to a plurality of consecutive SDRAM burst read requests, a write buffer to store write data, an exclusive or (XOR) engine to XOR the write data with the data from the read buffer, and a write interface to write resulting data from XORing the write data and the data from the read buffer to the synchronous dynamic random access memory. Data is pipelined into the read buffer by repeatedly issuing an SDRAM burst read request before data is transferred out of the synchronous DRAM in response to a previous SDRAM burst read request until a desired amount of data is stored in the read buffer.
USPTO Backgrounds
USPTO Backgrounds