Along with making MOSFET devices more highly integrated and having high property, use of high dielectric constant insulating film in the gate insulating film is being studied. An interfacial layer formed from silicon dioxide (SiO2) layer is typically used at the interface between the high dielectric constant insulating film and the silicon (Si) substrate in view of the need for reliability and mobility.
However, film utilizing SiO2 as the interfacial layer has a low dielectric constant so that forming a thin film with an EOT or in other words, equivalent oxide thickness of 0.8 nanometers or less is extremely difficult.
Also, forming a high dielectric constant insulating film directly on the silicon substrate without using an interfacial layer causes large numbers of dangling bonds that adversely affect the electrical characteristics. Moreover, a SiOx layer is formed at the interface between the silicon substrate and the high dielectric constant insulating film during the LSI forming process. Consequently, forming a thin film in an equivalent oxide thickness is difficult.
USPTO Backgrounds
USPTO Backgrounds