The present invention relates to a power module with built-in overvoltage, overcurrent, and thermal protection.
In multi-kilowatt and megawatt inverter applications, output short circuits, power mesh over-voltages, and excessive operating temperatures can cause damage to systems incorporating power devices, the damage often being disproportionate to the cost of the power devices themselves. In addition to desaturation and overcurrent conditions, there are three distinct and well known causes of IGBT failure. The first is failure due to avalanche breakdown, the second is failure due to thermal or power cycling, and third is failure due to overtemperature stress.
Insulated gate bipolar transistor (IGBT) devices available today are extremely rugged. As long as the peak junction temperatures are closely controlled, such devices can withstand tremendous currents and peak power dissipations. For example, a size 7 (7.32 mm by 8.84 mm) device was repetitively tested to conduct up to 200 amps at 600 volts for 10 .mu.s. The average junction temperature was maintained at 90.degree. Centigrade and the test was repeated over 10,000,000 cycles (10 .mu.s pulse at 20 Hz for 6 days) without measurable changes in device characteristics. However, the same device was only able to sustain five cycles of 10 .mu.s avalanche breakdown current at 80 amps prior to destruction. This was because much of the 80 amps went through a very small portion of the die. In other words, where the short circuit test allowed the whole die to conduct the full 200 amps, the avalanche breakdown current was concentrated around a small fraction of the die, melting the aluminum and silicon beneath it. Prior solutions to the problem of avalanche breakdown protection have employed external circuitry, such as snubber circuits, to prevent collector or drain terminals from exceeding the power supply voltage and precipitating avalanche breakdown. Unfortunately, the desirability of snubber circuits is greatly reduced by the fact that they tend to be bulky and expensive.
In the past, failures due to temperature and power cycling have been dealt with by applying a statistically determined limit for thermal cycling prior to replacement of power devices. Unfortunately, such a limit is arbitrary and falls to account for individual device variation and actual operating conditions.
The thermal resistance from the power device junction to its case, R.sub.THJC, is a measure of die attach integrity. If any of the interfaces between the wafer and its outer case become damaged, start to crack, or delaminate, the thermal resistance increases. An increase in R.sub.THJC is an early indication that one or more of the device interfaces (e.g., the solder to copper interface) has fatigued. Previous systems have measured this parameter by allowing the power device under test to dissipate a fixed amount of power, and then measuring the difference between surface junction temperature of the device and the package temperature of the device at the point at which it is attached to the heat sink. The power dissipated is then divided by the temperature difference to obtain R.sub.THJC in W/.degree. C. To obtain reliable and repeatable measurements of R.sub.THJC, placement of the temperature probes must be done with great care, and sufficient time must pass between measurements to allow the device to reach thermal equilibrium.
The collector to emitter saturation voltage, V.sub.CE(SAT), of an IGBT measured at its rated current at 90.degree. C. (I.sub.C90) is a measure of the basic current carrying capacity of a power device. If V.sub.CE(SAT) starts to increase, this is an indication that there is potential device damage or wire bond failure, which, although allowing the device to operate, significantly degrades performance. During power and thermal cycling, wire bonds are stretched and compressed during the expansion and contraction of the device making them brittle and increasing their electrical resistance. In addition, the power device itself may crack or fracture due to this expansion and contraction, also resulting in an increase in the measured V.sub.CE(SAT). Previous systems have measured this parameter by turning on the power device, supplying a known amount of current to pass through the device, and measuring the resultant V.sub.CE(SAT) across the collector (drain) and emitter (source) of the device.
Overtemperature failure may be anticipated through the monitoring of power device junction temperatures. The only way in which previous systems have systematically dealt with overtemperature failure is periodic replacement of power devices during normally scheduled preventative maintenance. The timing of replacement is determined statistically by using extrapolated semiconductor reliability data and calculating expected device lifetimes. Depending upon the application, a particular power device is typically replaced at some time between 10% and 50% of the calculated lifetime for the device. After further data is gathered regarding device replacement in a particular application, an even more aggressive replacement schedule might be implemented.
Thus, there is a need for a power device which provides solutions to all of the above-described problems.
USPTO Backgrounds
USPTO Backgrounds