1. Field of the Invention
The present invention relates generally to an improved form of furnace for use in the manufacture of semiconductor devices. More particularly, it relates to a capsule for use inside such a furnace for providing more uniform loading, process and unloading conditions and to a furnace incorporating such a capsule.
2. Description of the Prior Art
The use of generally tubular shaped furnaces for diffusion, oxidation, chemical vapor deposition and annealing processes in the manufacture of integrated circuits is well established. Critical dimensions in integrated circuits have become smaller, such as submicron line widths, and the diameters of semiconductor wafers in which the integrated circuits are fabricated have become larger, such as 6 inch wafers. These two trends result in the ability to produce more complex integrated circuits and the ability to produce larger numbers of such more complex integrated circuits in each semiconductor wafer.
Such developments have produced increased demands on the furnaces used in the fabrication of integrated circuits. The need for cleaner, more consistent, better controlled process environments has resulted in improved cantilever mechanisms for the insertion and removal of the semiconductor wafers from the furnaces, as disclosed in, for example, U.S. Pat. No. 4,523,885 issued to Bayne et al. This cantilever mechanism significantly reduces levels of particulate contamination in the furnaces. Another example of a cantilever mechanism is disclosed in U.S. Pat. No. 3,774,650, issued July 10, 1973 to Henebry et al.
In these non-contact wafer loading mechanisms, semiconductor wafers are loaded into quartz carriers which are then placed on two rods or a paddle extended from the cantilever carriage assembly. A motor-driven mechanism then slowly inserts the loaded carriers into a quartz process chamber held within the horizontal diffusion furnace. Because the wafer load is suspended on the cantilevered rods or paddle, no contact with the process chamber wall occurs. This "non-contact" loading dramatically reduces particles that would otherwise be generated if the loading apparatus were to "scrape" the process chamber wall.
Further improvements in process conditions result from the use of a secondary tube into which the semiconductor wafers are loaded, which is then placed inside the furnace tube, so that the furnace tube is positioned coaxially around the secondary tube. Such a system is disclosed, for example, in U.S. Pat. No. 4,526,534, issued July 2, 1985 to Wollman. That system achieved a degree of acceptance in the semiconductor industry, but additional improvements are required in order to meet the current and future requirements for integrated circuit manufacture.
USPTO Backgrounds
USPTO Backgrounds