Ion-Sensitive Field Effect Transistors (ISFETs) are often used, for example, to sense the ion concentration of an electrolytic solution. In early ISFET designs, the fluid being sensed was often in intimate contact with the gate dielectric, or separated from the gate dielectric by an ion-sensitive membrane. Ultimately, however, CMOS process flows were used to create relatively low-cost ISFET structures with improved manufacturability.
Known CMOS ISFETs, however, are unsatisfactory in a number of respects. For example, the threshold voltage (Vt) at neutral pH of such devices is known to vary widely. Furthermore, CMOS ISFETs are also prone to voltage drift during operation. These deleterious effects are primarily attributed to the presence of fixed charge within the gate dielectric (and/or passivation layers) as well as process-induced charges within the polysilicon floating gate. While standard UV-erase processes have been used to address part of this problem, the length of time required to remove the trapped charge is generally impractical in a mass-production environment.
Accordingly, there is a need for improved ISFET devices that exhibit improved, controllable Vt characteristics and which are manufacturable using conventional CMOS semiconductor processes.
USPTO Backgrounds
USPTO Backgrounds