1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device in which a film is formed by crystallizing a semiconductor film by radiating an energy beam on the semiconductor film such as amorphous silicon, particularly relates to a method of manufacturing a semiconductor device provided with structure in which the substrate material of a semiconductor film to be crystallized is not even such as a thin film transistor (TFT) used for a liquid crystal display (LCD) and others.
2. Description of the Related Art
A TFT liquid crystal display uses a thin film transistor (TFT) for a pixel provided with a switching function and this TFT is formed on a glass substrate corresponding to each pixel of the liquid crystal display. There are two types of TFTs of TFT consisting of amorphous silicon films and TFT consisting of polycrystalline silicon films, and high-performance TFT consisting of polycrystalline silicon films of these can be produced on a glass substrate at low temperature by irradiating an amorphous silicon film with an energy beam, particularly an excimer laser beam. The peripheral circuit of a liquid crystal display and a pixel switching device can be produced on the same substrate by using such TFT consisting of polycrystalline silicon films. Recently, TFT provided with bottom gate structure attracts attention of TFTs consisting of polycrystalline silicon films because particularly, stable characteristics can be obtained.
This TFT provided with bottom gate structure is constituted as shown in FIG. 9 for example. That is, a gate electrode 101 consisting of molybdenum tantalum (MoTa) is formed on a glass substrate 100 and an oxide film (Ta.sub.2 O.sub.5) 102 is formed on this gate electrode 101. A gate insulating film consisting of a silicon nitride (SiN.sub.x) film 103 and a silicon dioxide (SiO.sub.2) film 104 is formed on the glass substrate 100 including this oxide film 102 and further, a thin polycrystalline silicon film 105 is formed on this silicon dioxide film 104. A source area 105a and a drain area 105b are respectively formed by doping N-type impurities for example in this polycrystalline silicon film 105. A silicon dioxide film (SiO.sub.2) 106 is selectively formed corresponding to the channel area 105c of this polycrystalline silicon film 105 on the polycrystalline silicon film 105. An N.sup.+ doped polycrystalline silicon film 107 is formed on the polycrystalline silicon film 105 and the silicon dioxide film 106 and further, a source electrode 108 and a drain electrode 109 are respectively formed opposite to the source area 105a and the drain area 105b on this N.sup.+ doped polycrystalline silicon film 107.
This TFT provided with bottom gate structure can be manufactured by the following method: That is, after a molybdenum tantalum (MoTa) film is formed on an overall glass substrate 100, a gate electrode 101 is formed by patterning this molybdenum tantalum film by etching so that the film is in a predetermined shape. Afterward, an oxide film 102 is formed on the surface of the gate electrode 101 by anodizing the gate electrode 101. Next, a silicon nitride film 103, a silicon dioxide film 104 and an amorphous silicon film are sequentially formed on the overall oxide film 102 by plasma enhanced chemical vapor deposition (PECVD).
Next, this amorphous silicon film is once fused by irradiating this amorphous silicon film with a laser beam by an excimer laser for example and afterward, crystallized by cooling the film to room temperature. Hereby, the amorphous silicon film is changed to a polycrystalline silicon film 105. Next, after a silicon dioxide film 106 in the shape corresponding to a channel area is selectively formed on the polycrystalline silicon film 105 of a part to be a channel area, an amorphous silicon film including N-type impurities, for example phosphorus (P) and arsenic (As) is formed and changed to an N.sup.+ doped polycrystalline silicon film 107 by irradiating the above amorphous silicon film with a laser beam by an excimer laser again, and the impurities are electrically activated.
Next, after an aluminum (Al) film is formed on the overall film by a sputtering method using argon (Ar) as sputtering gas, this aluminum film and the N.sup.+ doped polycrystalline silicon film 107 are respectively patterned by etching so that they are in a predetermined shape, and a source electrode 108 and a drain electrode 109 are respectively formed on a source area 105a and a drain area 105b. Next, dangling bond and others are inactivated by exposing the above silicon dioxide film to hydrogen and hydrogenating a channel area 105c by a hydrogen radical and atomic hydrogen which both pass through the silicon dioxide film 106. TFT provided with bottom gate structure shown in FIG. 9 can be obtained by the above process.
USPTO Backgrounds
USPTO Backgrounds