1. Field of the Invention
This invention relates to a processing method utilizing chemical or physical reactions caused by plasma at the interface between the gas phase and the solid phase, and it also relates to an apparatus for use in carrying out the method.
2. Description of the Prior Art
The recent amazing progress in the field of microelectronics centered with respect to integrated circuits have been bringing about a great social revolution comparable to the Industrial Revolution, together with such a great advance as seen today in the field of optoelectronics and more especially in the laser technology. Since the integrated circuit was first invented, the degree of integration in integrated circuits has become greater by leaps and bounds, and indeed there have been successively developed large scale ICs (LSIs), very large scale ICs (VLSIs), and ultra large scale ICs (ULSIs). Such high degrees of integration have been achieved through dimensional microminiturization of elements, improvement of device construction and circuits, and so on.
The construction of elements have already reached a level such that further microminiturization can no longer be expected, insofar as the conventional planar (or two-dimensional) structure is concerned. Thus, attention is now directed toward the development of three-dimensional structures, e.g., a structure utilizing trenches formed in a substrate by using a directional-etching technique, and a structure having multi-layer lines formed therein by using a reflow flattening technique. It is anticipated that the degree of integration in integrated circuits will continue to become greater until it reaches the physical possible limit of element structures.
In order to enhance the degree of integration in integrated circuits, it is necessary to reduce the size of elements such as transistors and resistances and the size of the wiring pattern. For a minimized pattern size, a microfine pattern of 1 .mu.m or less is presently being put into practical use, which is comparatively close to the limit of about 0.4 .mu.m when the optical exposure technique is used. According to the optical exposure technique, it is not possible to obtain a pattern finer than the wavelength of light beams. Therefore, in order to obtain a finer pattern, it is necessary to use X rays or electron beams of shorter wavelengths. For the realization of such a fine pattern, the dry etching technique will have an important role in conjunction with the litghography technique.
The dry etching technique is a process for removing unnecessary portions of a film or of a substrate utilizing chemical or physical reactions caused by plasma, radicals, and/or ions at the interface between the gas phase and the solid phase. There are known a number of dry etching techniques, including the gas phase etching technique, plasma etching technique, spatter etching technique, and ion beam etching technique. For the spatter etching and ion beam etching techniques, there are cases in which active ions and/or radicals are used, and in such case the techniques are specifically called the reactive spatter etching technique and the reactive ion beam etching technique, respectively. These techniques can be suitably employed in the process of manufacturing integrated circuits.
The reactive spatter etching technique is also known as the reactive ion etching technique, such that when a sample is exposed to the reactive ions in plasma produced by high frequency discharge of a suitable gas, an etching reaction occurs whereby unnecessary portions of the sample surface are removed. It is noted in this connection that necessary portions are usually protected by a photoresist pattern used as a mask.
FIG. 8 is a schematic diagram showing a reactive ion etching apparatus as an example of conventional dry etching apparatus. As can be seen from the drawing, a reactive gas flow is introduced into a metallic chamber 1 through a gas controller 2, the gas flow being controlled to a proper pressure by an exhaust system 3. An anode 4 is disposed in an upper portion of the chamber 1, and a sample stand 5 which serves as a cathode is disposed in a lower portion of the chamber 1. An RF power supply 7 is connected to the sample stand 5 through an impedance matching circuit 6 so that a high frequency discharge is caused to take place between the sample stand 5 and the anode 4. In such a reactive ion etching apparatus, the reactive ions in the plasma are accelerated in an ion sheath produced by the high frequency discharge to impinge upon the sample 8 (i.e., the material to be etched) so that an etching reaction occurs, which enables a highly directional etching operation, or a so-called anisotropic etching operation, to be carried out.
Proportionately, as the size of an element is reduced, a gate oxide film of for example, a transistor is formed thinner and a diffusion layer is formed shallower. Accordingly, it is required that the dry etching technique be more selective and that the plasma used should be of lower energy. The reason for this is that the charge up of the gate electrode may result in gate oxide breakage, or that impingement of high-energy ions upon the silicon substrate may be a cause of a crystal defect or impurity inclusion. With a view to solving such problems, attention is being directed to the use of an electron cyclotron resonance (ECR) plasma etching technique which utilizes the phenomenon of ECR as a source of plasma generation.
However, the conventional reactive ion etching (RIE) and ECR plasma etching techniques have their disadvantage in respect of process repeatability. This is considered to be due to the fact that since an atmosphere having depositing characteristics is used in order to satisfy high selectivity and anisotropy requirements, the etching characteristics of the technique are greatly affected by deposited films on the inner wall of the chamber. For example, in ECR plasma etching wherein SF.sub.6 is used as a principal gas, the rate of etching is found to be dependent on the number of processed pieces, which is taken as one of the main factors responsible for process instability.
In the etching techniques using plasma, it is necessary to apply a negative bias voltage to the sample stand in order to accelerate the positive ion produced in the plasma. For application of a negative bias voltage, two methods are available for use, namely, a fixed bias method which uses an independent DC power supply and a self bias method which utilizes a negative voltage generated by DC-floating the sample stand by means of a capacitor.
In order to attain improved process repeatability, an attempt has been made with respect to the self bias method, such that a negative bias voltage is kept at a predetermined value. For example, in the reactive ion etching technique wherein the ion energy during etching operation corresponds roughly to the DC potential V.sub.dc at the sample stand, the RF power is controlled so that V.sub.dc can be kept constant.
However, it is known that the condition of plasma is not only dependent on the DC potential V.sub.dc at the sample stand, but also on other factors, such as electron density and ion density in the plasma, as well as electron temperature. The above method cannot control the values of these important parameters, therefore it has rarely been used in actual etching operations.
USPTO Backgrounds
USPTO Backgrounds