1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory apparatus.
2. Related Art
In recent years, electrically writable and erasable nonvolatile semiconductor memory apparatuses have been developed to provide higher performances. As the nonvolatile semiconductor memory apparatuses, there are EEPROMs (Electrically Erasable Programmable Read Only Memories). Two typical examples of EEPROMs are of a floating gate type (hereinafter also referred to as the FG type) and a MONOS (Metal Oxide Nitride Oxide Semiconductor) type.
The fundamental structure of a FG-type EEPROM is a stacked structure that includes, from the top layer, a control gate electrode, an interelectrode insulating film (also referred to as an interpoly insulating film), a floating gate electrode, a tunnel insulating film (a SiO2 film), and a substrate in this order. When a positive high voltage is applied to the control gate electrode, electrons are injected (written) into the floating gate electrode from the substrate side. When a negative high voltage is applied to the control gate electrode, electrons are removed (erased) from the floating gate electrode into the substrate. Ideally, electrons that are once written remain in the floating gate electrode, unless an erasing operation is not performed. Thus, such a structure functions as a nonvolatile memory apparatus (see JP-A 8-125042 (KOKAI), for example).
A fundamental structure of the MONOS type is a stacked structure that includes, from the top layer, a control gate electrode, a block insulating film, a trapping film, a tunnel insulating film, and a substrate in this order. At the time of writing in this structure, electrons are injected by applying a high voltage, as in the case of a FG-type structure. However, the electros are stored in the trapping film. At the time of erasing, holes are injected so that the stored electrons and the injected holes cancel each other, which is an aspect not seen in the characteristics of a FG-type structure.
To realize a high-performance nonvolatile semiconductor apparatus, the write efficiency may be increased. To increase the write efficiency, a large number of electrons are injected over a short period of time by applying a high voltage to the tunnel insulating film, or the leakage current is increased. It is known that the leakage current obtained when an electric field Eox (=Vox/Tox) is applied to the tunnel insulating film stays substantially the same (without dependence on Tox) while the voltage Vox applied to the tunnel insulating film is equal to or higher than 3.1 V−3.2 V (corresponding to the barrier height). Where Vox is a voltage applied to the tunnel insulating film and Tox is a film thickness of a tunnel insulating film. This is because the dominant mechanism of leakage current is based on the so-called Fowler-Nordheim (F-N) current Jfn, which is approximately expressed by the following equation (1):
                              J          fn                =                              AE            ox            2                    ⁢                      exp            ⁡                          (                              -                                  B                                      E                    ox                                                              )                                                          (        1        )            
Wherein, A and B represent the constants depending on the tunnel mass of electrons and the barrier height felt by electrons in the tunnel insulating film. As can be seen from this equation, the leakage current does not depend on the film thickness Tox but depends on the electric field Eox. The general requirements for the tunnel insulating film to satisfy with respect to the leakage current are as follows. The leakage current needs to be 1.0×10−16 A/cm2 or lower in a low electric field of 3 MV/cm, and needs to be 0.1 A/cm2 or higher in a high electric field of 13 MV/cm. Therefore, it is considered that the electric field Eox should be made higher so as to increase the write efficiency. However, a higher electric field Eox leads to a higher voltage, which is not desirable. If the voltage becomes higher, the reliability of the tunnel insulating film is adversely affected.
When a high voltage is applied to the tunnel insulating film, a phenomenon called “stress induced leakage current” (hereinafter also referred to as SILC) is caused, and as a result, the leakage current increases in a low electric field. It is considered that this phenomenon is caused by defects formed in the tunnel insulating film. When the voltage applied to the tunnel insulating film is high, the electrons tunneling through the bandgap of the tunnel insulating film move into the conduction band of the tunnel insulating film. When the electrons in the conduction band reach the anode side, the electrons retain a large energy. Impact ionization is then caused by the energy, and holes are generated. The holes generated here travel in the direction opposite to the traveling direction of the electrons, and cause defects in the tunnel insulating film. The defects trigger the SILC. Therefore, it is preferable that the leakage current is increased to achieve higher write efficiency, without an increase in the electric field Eox. For example, it is ideal to obtain a leakage current of 0.1 A/cm2 or higher when the electric field Eox is 13 MV/cm, or a leakage current of 0.1 A/cm2 when the electric field Eox is lower than 13 MV/cm.
To achieve this, the inventors have suggested a technique of forming a trapping site (a site that captures and releases electrons) having a level that is shallow with respect to the conduction band of the tunnel insulating film (Japanese Patent Application No. 2006-332313 (JP-A 2008-147390 (KOKAI))). In the tunnel insulating film suggested in JP-A 2008-147390 (KOKAI), the tunneling current in a low electric field is restricted to substantially the same amount as that in an insulating film not having a trapping site, and electrons tunnel through the trapping site in a high electric field. Accordingly, the tunneling probability becomes higher than that in the case of an insulating film not having a trapping site, and the leakage current becomes higher. In this manner, this tunnel insulating film can achieve higher write efficiency without an increase in electric field Eox, and is considered to be an ideal tunnel insulating film.
If the voltage can be made even lower, the SILC can be restricted, and the reliability of the tunnel insulating film can be further increased. To do so, the tunnel insulating film should be made thinner. However, if the tunnel insulating film becomes 5 nm or less, the D-T (Direct Tunneling) current becomes dominant even when the electric field Eox is a low electric field of 3 MV/cm, and the requirements of the tunnel insulating film are not satisfied. In view of this, the film thickness of the tunnel insulating film cannot be reduced to 5 nm or less.
In a low-electric field, a tunnel insulating film having a trapping level is basically the same as an insulating film not having a trapping site as to I-V characteristics. Therefore, the film thickness of a tunnel insulating film having a trapping level cannot be reduced to 5 nm or less. A tunnel insulating film having a trapping level has the advantage that, the leakage current can be increased in a high electric field, and accordingly, the write efficiency can be made higher than the write efficiency achieved with an ordinary tunnel insulating film. However, such a tunnel insulating film having a trapping level is disadvantageous in that its film thickness cannot be made 5 nm or less, since the charge retention properties as a nonvolatile semiconductor memory apparatus are degraded if the leakage current becomes higher in a low electric field.
Meanwhile, as a technique for reducing leakage current, the use of a high-dielectric film is known (see Japanese Patent No. 3,357,861, for example). According to Japanese Patent No. 3,357,861, the leakage current in a low electric field cannot be reduced merely by the use of a single-layer high-dielectric film, and the leakage current in a high electric field cannot be increased. However, if a stacked structure includes a high-dielectric film and a low-dielectric film at an appropriate ratio, the leakage current can be reduced in a low electric field, and can be increased in a high electric field. The equivalent oxide thickness (EOT) of the tunnel insulating film having such a stacked structure can be reduced, and the voltage can be lowered accordingly. Generally there is a tendency that the higher a dielectric constant, the lower the barrier height. This tendency leads to the problem of an increase in current due to the thermal excitation of electrons; however, this problem can be solved by the stacked structure in Japanese Patent No. 3,357,861. Thus, the leakage current can be reduced by the use of a stacked structure including a low-dielectric film that tends to have a large barrier height.
However, if the tunnel insulating film is required to have exactly the same properties as an oxide film, it is difficult to satisfy the requirements merely with the use of the insulating film of the stacked structure disclosed in Japanese Patent No. 3,357,861. With this structure, a smaller EOT than 5 nm can be realized, and accordingly, a high leakage current of 0.1 A/cm2 required for writing can be obtained at a low voltage Vins. However, in terms of the equivalent oxide field Eox defined as Vins/EOT, it is necessary to induce a higher electric field than 13 MV/cm. To sum up, a stacked structure of a low-dielectric film and a high-dielectric film has the advantage that its thickness can be reduced while the leakage current in a low electric field is restricted to a sufficiently small amount, but is disadvantageous in that a high electric field Eox is necessary to obtain a high current required for writing.
As described above, in accordance with the related art, the EOT of the tunnel insulating film cannot be reduced to 5 nm or less, while the leakage current requirements for a nonvolatile semiconductor memory apparatus are satisfied. Since a reduction in film thickness cannot be achieved, it is necessary to apply a high voltage at the time of data writing or erasing. As a result, defects are formed in the insulating film, and the SILC is caused.
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