1. Field of the Invention
The present invention relates to the field of integrated circuit fabrication, particularly to a trim process for critical dimension control for integrated circuits.
2. Description of the Related Art
In the semiconductor industries, integrated circuit (IC) devices have become faster, smaller, and more efficient. This trend has continued with the development of fabrication technology to increase circuit densities on chips.
Reducing critical dimension is one of the important ways to increase circuit densities. The critical dimension (CD) is the dimension of the smallest geometrical features (width of interconnect line, contacts, trenches, etc.) which can be formed during semiconductor device manufacturing. Critical dimensions need to be reduced in order to facilitate the formation of smaller components and faster, more efficient circuits.
One way of reducing the CD is using a photolithography employing light of a short wavelength. However, as the wavelength of light decreases, photoresist materials become increasingly opaque to the light. Therefore, the current photolithographic technology has a limit in reducing the CD.
Another way of reducing the CD is trimming or shrinking a photoresist pattern by an etch process after forming the pattern by a photolithographic process. A trim process is typically employed for reducing feature edge roughness, reducing size of features, and/or increasing spaces between features. However, etching into underlying layers or structures with small CDs can be troublesome when only using such a photoresist. When etching deep into a substrate to define small features, the photoresist pattern is altered by the etch process by the time the etch process is complete. This causes the substrate to be etched outside of the desired pattern. Poor etching can cause defects in the performance of the device and poor yields. To avoid this problem, a hard mask has been used to transfer a pattern from a photoresist into a substrate.
Yet another way of reducing the CD is shrinking or trimming a hard mask by an etch process after transferring a pattern from photoresist but before transferring the pattern into a substrate. However, this method is not without any problems. While shrinking the pattern width of a hard mask, the thickness of the hard mask can also be reduced. U.S. Pat. No. 6,420,097 illustrates a process by which a hard mask is selectively recessed beneath photoresist. However, while shrinking the hard mask, the substrate or layer of interest underlying the hard mask is also exposed to the hard mask etchant through the openings of the hard mask. These problems prevent the use of an aggressive etch process to reduce the CD. Furthermore, the process is limited to use of particular materials that will permit recessing, and even this can result in deviations from the desired dimensions.
USPTO Backgrounds
USPTO Backgrounds