1. Field of the Invention
The present invention relates to a method of producing a transistor structure, especially an MOS transistor structure, and to a transistor structure made by the process.
The invention takes as its point of departure methods for creating a low-impedance contact between a metallizing layer and a semiconductor material of a first conductivity type, over whose semiconductor surface an insulation layer and a semiconductor layer are disposed.
2. Description of the Related Art
Such a contact structure is known from U.S. Pat. No. 4,898,835, for instance. The insulation layer and the semiconductor layer are formed by the gate oxide and the gate of an MOS power transistor.
The European patent disclosure EP 0 704 894 A2 also discloses a method of producing a low-impedance contact between a metallizing layer and a semiconductor material. The process in EP 0 704 894 A2 which creates a self-adjusted contact hole has the advantage of producing a smaller contact opening, without having to take multiple adjustment allowances into account. Because of the smaller area of the contact region, there is a lower turn-on resistance, so that the power loss or switching loss to be dissipated makes a reduced cooling expense possible. The reference essentially relates to DMOS transistors, although other types of transistors, such as an NMOS transistor, are also mentioned.
In some types of transistor, degradation of the gate oxide can occur, caused by "hot" electrons. In the operation of such transistors, a field intensity peak can occur at the channel edge on the drain side, and this can accelerate the channel electrons to near their limit speed. Some of these "hot" electrons can thereby overcome the potential barrier at the boundary between silicon and silicon oxide, where they are trapped by positive traps located near the boundary face. A second effect of "hot" electrons is that they break open silicon-hydrogen bonds and can thus create boundary face states. In an n-channel transistor, this leads above all to degradation of the drain current, because both the number and the mobility of the channel electrons are reduced by these effects.
LDD doping (LDD stands for lightly doped drain) is currently widely used as an effective provision to counteract such oxide degradation. However, the creation of an LDD dopant profile, like the creation of a self-adjusted contact, requires the use of a spacer technique. The problem then arises that creating an LDD dopant profile and creating a self-adjusted contact make different demands of the spacers to be used. Furthermore, the two spacer processes must be integrated into the overall process control at different sequence positions.
USPTO Backgrounds
USPTO Backgrounds