I. Field of the Disclosure
The technology of the disclosure relates generally to the structure of magnetic tunnel junction (MTJ) devices that can be used, for example, in magnetic random access memory (MRAM) for storage of data.
II. Background
Semiconductor storage devices are used in integrated circuits (ICs) in electronic devices to provide data storage. One example of a semiconductor storage device is a magnetic random access memory (MRAM). MRAM is non-volatile memory in which data is stored by programming a magnetic tunnel junction (MTJ) as part of an MRAM bit cell. One advantage of an MRAM is that MTJs in MRAM bit cells can retain stored information even when power is turned off. Data is stored in the MTJ as a small magnetic element rather than as an electric charge or current.
In this regard, FIG. 1 is an illustration of an MTJ 100 provided in an MRAM bit cell to store data as a function of magnetization directions of two (2) layers in the MTJ 100. Data is stored in the MTJ 100 according to the magnetic orientation between two layers: a free layer 102 disposed above a pinned layer 104. In the MTJ 100, the free and pinned layers 102, 104 are formed from a ferromagnetic material with perpendicular magnetic anisotropy (i.e., the magnetization direction is perpendicular to a layer plane), to form a perpendicular MTJ (pMTJ). However, the aspects of the disclosure are not so limited, and the magnetization directions in the MTJ 100 according to the disclosure may be parallel to the plane of the layers therein. The MTJ 100 is configured in a “bottom-pinned” configuration wherein the pinned layer 104 is disposed below the free layer 102. The free and pinned layers 102, 104 are separated by a tunnel junction or tunnel barrier layer 106, formed by a thin non-magnetic dielectric layer. The free and pinned layers 102, 104 can store information even when the magnetic H-field is ‘0’ due to a hysteresis loop 108 of the MTJ 100. Electrons can tunnel through the tunnel barrier layer 106 if a bias voltage is applied between two electrodes 110, 112 coupled on ends of the MTJ 100. The tunneling current depends on the relative orientation of the free and pinned layers 102, 104. When using a spin-torque-transfer (STT) MTJ (not shown), the difference in the tunneling current as the spin alignment of the free and pinned layers 102, 104 is switched between being parallel (P) and anti-parallel (AP) is known as a tunnel magnetoresistance (TMR) ratio.
When the magnetic orientation of the free and pinned layers 102, 104 is AP (shown in FIG. 1 as MTJ 100), a first memory state exists (e.g., a logical ‘1’) (also referred to herein as an “AP state”). When the magnetic orientation of the free and pinned layers 102, 104 is P (shown in FIG. 1 as MTJ 100″), a second memory state exists (e.g., a logical ‘0’) (also referred to herein as a “P state”). The magnetic orientation of the free and pinned layers 102, 104 can be detected in order to read data stored in the MTJ 100 by sensing the resistance when current flows through the MTJ 100. Data can be written and stored in the MTJ 100 by applying a magnetic field or electrical current to change the magnetic orientation of the free layer 102 to either a P or AP magnetic orientation with respect to the pinned layer 104. The magnetic orientation of the free layer 102 can be changed, but the magnetic orientation of the pinned layer 104 is fixed.
When reading data stored in the MTJ 100, a read voltage differential is applied between the electrodes 110, 112 to allow current to flow through the MTJ 100. A low resistance, as measured by a voltage differential between the electrodes 110, 112 divided by a measured current, is associated with a P magnetic orientation between the free and pinned layers 102, 104, and thus, the MTJ 100 is considered as being in a P state. A high resistance is associated with an AP magnetic orientation between the free and pinned layers 102, 104, and thus, the MTJ 100 is considered as being in an AP state. When writing data to the MTJ 100, a write voltage differential is applied between the electrodes 110, 112 to generate a write current through the MTJ 100. If the state of the MTJ 100 is to be changed from a P state to an AP state, a write current (IP-AP) flowing from the bottom electrode 112 to the top electrode 110 is produced to induce a STT at the free layer 102 to change the magnetic orientation of the free layer 102 to be AP with respect to the pinned layer 104. This is shown by the MTJ 100′ in FIG. 1. If, on the other hand, the state is to be changed from an AP state to a P state, a write current (IAP-P) flowing from the top electrode 110 to the bottom electrode 112 is generated to induce a STT at the free layer 102 to change the magnetic orientation of the free layer 102 to be P with respect to the pinned layer 104. This is shown by the MTJ 100 in FIG. 1.
FIG. 2 is a schematic diagram illustrating exemplary layers of a conventional pMTJ 200 provided in an MTJ stack structure 202 that can be employed in the MTJ 100 in FIG. 1. The pMTJ 200 includes highly reliable pinned/reference layers that can be provided by high perpendicular magnetic anisotropy (PMA) materials (i.e., materials having a perpendicular magnetic easy axis). In this regard, the MTJ stack structure 202 includes a pinned layer 204 of a high PMA material disposed on a seed layer 205 (e.g., a Ta/Pt bilayer) above a bottom electrode 206 (e.g., made of TaN) electrically coupled to the pinned layer 204. A tunnel barrier layer 208 provided in the form of a Magnesium Oxide (MgO) layer in this example is disposed above the pinned layer 204. An MgO tunnel barrier layer 208 has been shown to provide a high TMR. A free layer 210, shown as a Cobalt (Co)-Iron (Fe)-Boron (B) (CoFeB) layer in this example, is disposed above the tunnel barrier layer 208. The CoFeB free layer 210 is a high PMA material that allows for effective current-induced magnetization switching for a low current density. A conductive, non-magnetic capping layer 212, such as a Tantalum (Ta) and/or thin Magnesium Oxide (MgO) material for example, is disposed above the free layer 210 to protect the layers of the MTJ stack structure 202. A top electrode 214 is disposed above the capping layer 212 to provide an electrical coupling to the free layer 210.
In the MTJ stack structure 202 in FIG. 2, the magnetic orientation of the pinned layer 204 is fixed. Accordingly, the pinned layer 204 generates a constant magnetic field, also known as a “net stray dipolar field,” that may affect, or “bias,” a magnetic orientation of the free layer 210. This magnetic field bias, at best, can cause an asymmetry in the magnitude of current necessary to change the magnetic orientation of the free layer 210 (i.e., IP-AP is different than IAP-P). The current necessary to change the magnetic orientation of the free layer 210 towards the bias orientation is reduced while the current necessary to change the magnetic orientation of the free layer 210 against the bias is increased. At worst, this magnetic field bias can be strong enough to “flip” the value of a memory bit cell employing the pMTJ 200 in FIG. 2, thus decreasing the reliability of the subject MRAM.
In this regard, to reduce or prevent a magnetic field bias being provided by the pinned layer 204 on the free layer 210, the pinned layer 204 in the MTJ stack structure 202 in FIG. 2 includes a synthetic anti-ferromagnetic (SAF) structure 216. The SAF structure 216 includes a hard, first anti-parallel ferromagnetic (AP1) layer and a second anti-parallel ferromagnetic (AP2) layer separated by a non-magnetic anti-ferromagnetic coupling (AFC) layer 218 (e.g., a Ru layer). The AP1 and AP2 layers are permanently magnetized and magnetically coupled in opposite orientations to generate opposing magnetic fields. The opposing magnetic fields produce a zero or near-zero net magnetic field towards the free layer 210, thus reducing the magnetic field bias problem at the free layer 210. The AP1 and AP2 layers are provided as face-centered cubic (FCC) or hexagonal closed packed (HCP) crystalline structure materials, such as Co—Pt layers, to provide a very high anisotropy material to provide a highly stable magnetic reference configuration.
In order to achieve higher TMR in this MTJ stack structure 202, a CoFeB spin polarization enhancing layer 222, as well as the MgO tunnel barrier layer 208, preferentially has a body-centered cubic (BCC) crystalline structure with [001] orientation of the crystalline grains along the growth axis of the MTJ stack structure 202. Typically, the CoFeB spin polarization enhancing layer 222 and the MgO tunnel barrier layer 208 are mostly amorphous as deposited. Crystallization is usually induced through a post deposition annealing step at temperatures between 250-400° Celsius (C) for a duration between ten (10) and one hundred twenty (120) minutes, for example. The orientation of the developed crystalline grains of this CoFeB spin polarization enhancing layer 222 and MgO tunnel barrier layer 208 after annealing strongly depends on the template created by the layers below the CoFeB spin polarization enhancing layer 222 and the MgO tunnel barrier layer 208. If the templating layers below the CoFeB spin polarization enhancing layer 222 and MgO tunnel barrier layer 208 are amorphous or BCC with [001] orientation along the growth axis, the CoFeB spin polarization enhancing layer 222 and MgO tunnel barrier layer 208 will crystallize with BCC structure and [001] orientation along the growth axis. This crystallization with BCC structure and [001] orientation will lead to higher TMR. However, if the CoFeB spin polarization enhancing layer 222 and MgO tunnel barrier layer 208 are directly grown on a FCC or HCP material like Ru or [Co/Pt], which are part of the AP1 layer and AP2 layer, a crystallization of the CoFeB spin polarization enhancing layer 222 and MgO tunnel barrier layer 208 different from BCC [001] occurs and leads to lower TMR.
In this regard, a texture breaking layer 220, provided in the form of an Iron (Fe)—Ta material in this example, is disposed above the Co—Pt layers in the AP2 layer. The CoFeB spin polarization enhancing layer 222 is disposed above the texture breaking layer 220 in the AP2 layer. The MgO material for the tunnel barrier layer 208 is then deposited on top of the CoFeB spin polarization enhancing layer 222. In a post deposition annealing step, both the CoFeB spin polarization enhancing layer 222 as well as the MgO tunnel barrier layer 208 can crystallize with BCC [001] structured grains on top of the texture breaking layer 220. With the BCC [001] crystallized grains of the CoFeB spin polarization enhancing layer 222 and the MgO tunnel barrier layer 208, a higher TMR can be achieved if an appropriate free layer (e.g., the CoFeB free layer 210) is chosen on top of the MgO tunnel barrier layer 208.
However, in a scaled device (e.g., a pMTJ pillar with 20 nanometer (nm) diameter) the SAF structure 216 of the pMTJ 200 in FIG. 2 that forms the pinned layer 204 provides the AP1 and AP2 layers disposed below the tunnel barrier layer 208 may include more than twenty (100) layers each having a thickness between 2-20 Angstroms (A), providing for a thicker pinned layer 204 disposed below the tunnel barrier layer 208. For example, the AP2 layer may be 5.0 nm thick as an example and the AP1 layer may be 40 nm thick in order to reach an average dipolar perpendicular stray field acting on the free layer 210, which is smaller than 200 Oe for a device patterned to a 20 nm diameter pillar. Consequently, the overall thickness of the pinned layer 204 in this example might be larger than 45 nm Thus during fabrication, imperfections or variations due to uneven deposition of materials across the planes of the layers can propagate through the MTJ stack structure 202 as material layers forming the AP1 and AP2 layers, thus creating a “rough” surface at a base of the tunnel barrier layer 208. In general, thicker layers below the tunnel barrier layer 208 will lead to an increased roughness of the MTJ stack structure 202 at the level of the tunnel barrier layer 208. Because the tunnel barrier layer 208 is a relatively thin layer (e.g., 5-15 A), roughness at the base of the tunnel barrier layer 208 may degrade the functionality of the pMTJ 200 by reducing the TMR and reduction of the perpendicular anisotropy of the free layer 210 on top of the tunnel barrier layer 208. Further, roughness in the layers in the MTJ stack structure 202 can lead to increased inter-diffusion among layers, thus making the MTJ stack structure 202 less tolerant towards exposure to high temperature annealing cycles as typically encountered during back end of line (BEOL) CMOS fabrication.
In addition, the AP1 layer thickness in the pMTJ 200 may need to be increased at a scaled diameter in order to compensate (i.e., provide a greater opposite magnetic field to the AP2 layer) for the larger distance from the free layer 210 due to the thickness of the AP2 layer. This is shown by example in an exemplary graph 300 in FIG. 3, where the net dipolar stray field (Hdip[Oe]) generated by the pinned layer 204 in the pMTJ 200 in FIG. 2 increases for a reduced number of layers provided in the AP1 layer for a given diameter of the pMTJ 200 (e.g., 20 nm). The net dipolar stray field can be reduced with an increase in the number of layers in the AP1 layer of the pMTJ 200. However, an increased AP1 layer thickness makes interlayer roughness control and integration in advanced nodes with reduced intermetal height difficult. An increased AP1 layer thickness also increases the moment difference between the AP1 layer and the AP2 layer, thus creating a higher spin flip risk.
USPTO Backgrounds
USPTO Backgrounds