The present invention relates to timing or clocking systems wherein the clocking systems are useful for recovering data signals recorded on a record member. All of the tracks of the record member are simultaneously read but independently timed. When certain error inducing situations occur, such as signal drop out, it is desired to have the clock recover as quickly as possible and to maintain its frequency of operation throughout a defect area. In particular, steps have been tried to improve so called clock recovery i.e., generate timing signals based upon the signals being sensed in a multi-tracked system. In such systems, it is desired to reduce average error lengths, enhance clock recovery after a defect, improve immunity to synchronization loss events, improve accelerating tracking capability of the record medium, improve signal to noise ratio in the signal recovery channel, and eliminate high gain loop modes. All of these improvements relate to independent phase lock loops (PLLs) currently used in multi-track and magnetic tape systems.
USPTO Backgrounds
USPTO Backgrounds