The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor devices and structure.
In the past, the semiconductor industry utilized various methods and structures to form bi-lateral or bi-directional diode structures for applications such as electrode-static discharge (ESD) protection. The diodes usually were formed as zener diodes. Generally, it was desirable for the diode structure to have a symmetrical current-voltage characteristic curve and to also have a sharp knee for the current-voltage characteristic. However, it was difficult to obtain both a sharp knee for the current-voltage characteristic and to obtain a symmetrical current-voltage characteristic curve.
Accordingly, it is desirable to have a bi-directional diode structure that has a substantially symmetrical current-voltage characteristic curve, and that has a sharp knee for the current-voltage characteristic curve.
For simplicity and clarity of the illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be very close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to at least ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are reasonable variances from the ideal goal of exactly as described. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions generally may not be straight lines and the corners may not be precise angles.
USPTO Backgrounds
USPTO Backgrounds