This invention relates to electronic tuning type receivers, and more particularly to an electronic tuning type receiver using D/A converters in which the power consumption can be considerably reduced whenever the electric power source is be brought to an "off" state.
As a result of contemporary progress in electronics, a variety of electronic tuning type receivers have been proposed. In electronic tuning systems, control of a receiving frequency is effected by voltage-controlling a variable capacitance in the tuning section. For this purpose, a variety of tuning voltage control systems have been proposed. In one such system, the tuning voltage is represented by a digital value in view of the stability of such a signal.
The digital value is subjected to a digital-to-analog conversion with the analog output employed as a tuning control voltage. For this purpose, a variety of digital-to-analog (D/A) converters are known and disclosed in this art.
A preferable D/A converter is formed using a pulse synthesizer and a low-pass filter because the number of terminals involved is a factor in providing the D/A converter in the form of an integrated circuit. In the pulse synthesizer, the output of pulse oscillator is subjected to frequency division with a frequency divider having a plurality of stages. The frequency division output of the stages of the frequency divider are selectively synthesized corresponding to a parallel digital signal into a serial pulse train which corresponds to the digital signal. The pulse train is applied to the low-pass filter to obtain a DC voltage.
These circuits are included in a station-selecting-voltage generating section which is in the form of an integrated circuit. The station-selecting-voltage generating section has a preset circuit. In this section, a requirement exists to maintain stored signals even after the power switch is turned off, and accordingly an auxiliary electric source with a capacitor is employed to continuously supply current to the section after the receiver power switch is turned off.
The station-selecting-voltage generating section has circuit elements which consume electric power in addition to the memory adapted to store the preset values. For example, the pulse oscillator used to supply pulses to the pulse synthesizer consumes a relatively large amount of electric power. Accordingly, the electric power consumption will be high while the power switch is in an "off" state. Therefore, in the situation where the storage element is maintained with the aid of the auxiliary electric source while the power switch is in the "off" state,it becomes difficult to maintain the preset conditions for a long period of time.
Since a small amount electric power is supplied to the station-selecting-voltage generating section to maintain the preset value, at all times, if a pulse signal is applied thereto for some reason while the power switch is in the "off" state, it may cause erroneous operations, or a frequency received may be shifted.
Referring now to FIGS. 1 and 2 a generic example of a digital-to-analog converter circuit with a memory function is shown. It comprises a digital-to-analog (D/A) conversion process section 1 for converting a digital input into a signal having a corresponding period or pulse width. A resistor 2 and a capacitor 3 form a low-pass filter section 25 adapted to pass only the low frequency components of the output of the D/A conversion process section 1 and to apply an analog signal to an output terminal 4. A memory 5 is adapted to store a digital input and to control the conversion operation of the D/A conversion process section 1 in accordance with the contents stored therein. A clock signal generator 6 applies a clock signal to the D/A conversion process section 2 and the memory 5. A diode 7 and a capacitor 8 form an electric source input section to the D/A conversion process section 1, the clock signal generator 6 and the memory 5. A resistor 9 and a capacitor 10 form an electric source "off" state detecting circuit adapted to supply a signal to the D/A conversion process section 1, the memory 5 and the clock signal generator 6 when the electric source is in "off" state. The discharge current of the capacitor 8 obtained when the electric source is in "off" state is employed as an auxiliary electric source.
In the D/A converter circuit of FIG. 1 upon application of the electric source Vcc, the electric sorce Vcc is applied through the diode 7 to the capacitor 8 to charge it and then it is applied to the various circuit elements. Furthermore, upon application of the electric source Vcc, the capacitor 10 is charged through the resistor 9, and hence the signal to the various circuit elements is released.
In this condition, a digital input signal is applied to the D/A conversion process section 1, and the converter generates an output signal having a period or pulse width corresponding to the input value in accordance with the output of the memory 5.
The pulse signal generated by the D/A conversion process section 1 is, for instance, as indicated in FIGS. 2 (a) or (b). The output signal of the D/A converter 1 is converted in to an analog signal, as indicated by the dotted line in FIGS. 2(a) or (b) by means of the low-pass filter 25 comprising resistor 2 and capacitor 3. The analog signal is applied, as a tuning signal, to a tuning section (not shown) through the output terminal 4.
If the electric source Vcc is brought to the "off" state, the output of the electric source "off" state detecting circuit formed with the resistor 9 and the capacitor 10 has a low level "L" signal and as a result, the signal is supplied to the various circuit elements to stop the operations.
However, in the D/A converter circuit of the general type shown in FIG. 1, the consumption current is considerably increased depending on the timing of generating the electric source "off" state detecting signal. The output stage of the D/A converter 1 is typically made up of a CMOS integrated circuit or the like. Therefore, if the detecting signal is supplied to interrupt the operation of the section 1 with the output signal being at a level "H" signal, then the output signal flows continuously in the load, and therefore the capacitor 8 employed as the auxiliary electric source is instantly discharged.
On the other hand, if the detecting signal is produced when the output signal of the D/A conversion process section 1 is at "L", the consumption current in this section is zeroed, and only the static current for maintaining the storage in the memory 5 is allowed to flow. Thus, the total amount of consumption current becomes very small, and therefore the data in the memory can be maintained by the capacitor 8 for a long period of time.
As is apparent from the above description, in this type of digital-to-analog converter, the amount of consumption current is greatly varied and furthermore the data maintaining period of time is also varied depending on the timing of generating the electric source "off" state detecting signal. The probability of increasing the data maintaining period of time in the case of FIG. 2(a) is higher than that in the case of FIG. 2(b) because the high level period in the former case is longer than that in the latter.
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