Having reference now to prior art FIG. 1A, a conventional signaling arrangement 100 is shown, having a plurality of drivers in block 101, a plurality of receivers in block 150 to receive signals driven by the plurality of drivers in block 101, and a plurality of signal paths 120 (120A, 120B, 120C are referenced) to couple the plurality of drivers in block 101 to the plurality of receivers in block 150.
In FIG. 1B, three signal paths 120 (120A, 120B, 120C) are depicted, with parasitic capacitors 130 (130AB, 130BC) coupling signal path 120B to adjacent neighbors 120A and 120C. It is well known thatI=C*dV/dt 
When signal paths 120A and 120C are not switching, transition rate d(V−Gnd)/dt, on signal path 120B will have a particular rate based on the driver-supplied I (current) and the capacitance driven (130AB and 130BC, and possible additional capacitances not shown).
When signal paths 120A and 120C are switching at the same time and in the same direction as signal path 120B, there is no dV/dt across capacitors 130AB and 130BC, and signal path 120B will therefore switch faster (have a faster transition rate) than when signal paths 120A and 120C are not switching.
On the other hand, when signal paths 120A and 120C are switching at the same time and in opposite direction as signal path 120B, dV/dT across capacitors 130AB and 130BC are effectively doubled, and the transition rate on signal path 120A will be slowed down, increasing delay from a driver 101B to receiver 150B.
In the waveforms of FIG. 1B, the bottom waveforms show signal paths 120A (120A1) and 120C (120C1) both rising; corresponding waveform of signal path 120B (120B1) is shown to rise relatively fast in the upper waveforms. In the case when signal path 120B (120B3) is rising but signal paths 120A (120A3) and 120C (120C3) are falling, transition of signal path 120B is showed down (as will be signal paths 120A and 120C, depending on switching signal paths that may be coupled on other sides of signal paths 120A and 120C). When signal paths 120A and 120C are not switching, signal path 120B2 will have a transition faster than signal path 120B3 but slower than 120B1. Other transitions will be apparent, such as transition of signal path 120A in the same direction as 120B but signal path 120C switching in the opposite direction of signal path 120B.
The timing uncertainties described briefly above may cause significant increases in signal propagation times resulting in difficulties in achieving “late mode” timing as the signals may arrive too late and not be reliably clocked into a latch. On the other hand, when signals are switching in a same direction, difficulties may arise in achieving “early mode” timing as signals may arrive at a latch before a previous clock has ended.
FIG. 2 shows a prior art drawing of, again, three parallel signal paths, but having one or more repowering buffers to facilitate signal propagation in resistive signal paths. It will be understood that the adjacent switching coupling effects apply to signal paths having resistive signal paths as well as signal paths having little series resistance. As shown in FIG. 2, drivers 201 (201A, 201B, 201C) drive signals on respective signal paths. Buffers 290 (290A, 290B, 290C) repower RC (resistive-capacitive) degraded signals. Receivers 250 (250A, 250B, 250C) receive the signals at receiver ends of the signal paths and drive signals 260 (260A, 260B, 260C) to logic blocks.
In the waveform shown, input signal 240B is driven by driver 201B at point 280. A signal at 280 is shown to rise and taper off for an extended period as current is needed to charge capacitance further down the RC signal path, the capacitance being simply drawn in FIG. 2 as the two capacitors referenced as “C”. A waveform for point 281, at input of repowering buffer 290B is shown, delayed and degraded from the waveform at point 280. It will be recognized that the “R” and the “C” are in fact distributed between points 280 and 281 and the drawing of FIG. 2 is simplified for example. Similar waveforms will occur for the segment having points 282 and 283. Without repowering block 290B, a waveform at point 283 would be even more dramatically delayed and degraded.
USPTO Backgrounds
USPTO Backgrounds