This invention relates to digital computing systems, and more particularly to an arbitration device and scheme for use in such computing systems.
With the introduction of large scale integrated circuit technology, the modular building-block or component approach to digital computing systems has spurred the design of multiple component structures coupled to multiple buses for data and instruction transmission. In such multi-bus structures, more than one system component share a common memory over a common bus. Alternatively, more than one bus in a system may need access to a common memory; and, in such event each bus is coupled to a separate bus controller. Since only one bus controller can have access to the system memory at a time, a technique for resolving simultaneous requests among bus masters must be provided.
An exemplary prior art device for use with multi-microprocessors is disclosed in an article entitled "Bus Arbiter Streamlines Multiprocessor Design" by James Nadir and Bruce McCormick published in the June, 1980 issue of Computer Design.
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