The present disclosure relates generally to optoelectronic communication with an electronic device, and particularly to the interconnection and attachment arrangement for providing optoelectronic communication between an electronic chip on a first level package and a high density optical transceiver.
Typically, optoelectronic transceivers are mounted on a second level package, such as a printed circuit board, and are provided with their own heat sink and a means of being electrically interconnected with a printed circuit board, such as via a socket or a solder Ball Grid Array (BGA). The typical pitch of the electrical connections in a BGA is approximately 1.27 mm, although some products use finer pitches such as 1.0 or 0.8 mm. The size of an optoelectronic transceiver is largely determined by the area required by the heat sink and/or the area required for electrical connections between the optoelectronic transceiver and the second level package.
The trend in the computer industry regarding large servers is to utilize multiple processor groups, each group containing multiple processors on a first level package, such as a Multi-Chip Module (MCM), which must be interconnected with very high speed data buses to enable the totality of processors to act in unison, otherwise referred to as symmetric multi-processing (SMP) configuration. The first level package provides dense electrical interconnection between the multiple processor chip(s), each of which may contain multiple processor cores, and cache memory chip(s), which may also be mounted on the MCM or other first level package. To connect between multiple MCMs, copper interconnect technology has been used as the interconnect medium, but is limited in its ability to scale to the bandwidth/distance requirements of next generation servers. These limitations are primarily associated with the signal loss and distortion in the electrical transport media, such as printed circuit boards and connectors for example, and bandwidth reduction due to skin effect at high data transmission rates. To overcome some of these limitations, optical interconnection, which does not have the copper limitations and can operate at speeds sufficient to satisfy future generation server interconnection requirements, is becoming the interconnection technology of choice.
There have been a number of proposed inventions for integrating optical transceivers into modules, but they have had varying drawbacks for practicality and utility in computing systems. In one example, a flex circuit is used to connect a 2-dimensional (2-D) dense transceiver to the transceiver. While this solution appears to be quite practical and useful for a variety of applications, the electrical signals going to and from the transceiver must traverse a path of roughly 2-3 cm through the flex circuit. This drawback will limit (a) the maximum possible number of signal channels, due to the 1-dimensional nature of the electrical signal path array from CMOS to O/E devices, and (b) the bandwidth per signal path. In addition, the non-planarity of this package will make the assembly somewhat difficult.
Moreover, since the n×n laser arrays typically emit light perpendicular to the surface of the device, the optical interconnection and heat removal approaches are many times at odds with each other for these devices. Since each of these functions requires a full 2-dimensional surface, to operate most effectively, an ideal packaging technology would have 3 surfaces, which is difficult, for planar devices.
Accordingly, there is a need in the art to provide an improved apparatus and method for providing optoelectronic communication with electronic chips, and particularly with electronic chips on a first level package such as MCMs in large high speed servers using materials and packaging that closely integrate electrical, optical, and thermal heat flow management, while preserving full 2-dimensional capability for electrical, optical and thermal flow.
USPTO Backgrounds
USPTO Backgrounds