1. Field of Invention
The present invention relates generally to methods and apparatus for polishing the surface of a semiconductor wafer using a chemical mechanical polishing process. More particularly, the present invention relates to methods and apparatus for applying pressure differentials on the back side of a semiconductor wafer to improve the performance of chemical mechanical polishing processes.
2. Description of Relevant Art
Chemical mechanical polishing, which is often referred to as xe2x80x9cCMP,xe2x80x9d typically involves mounting a wafer, faced down, on a holder and rotating the wafer face against a polishing pad mounted on a platen. The platen is generally either rotating or in an orbital state. A slurry containing a chemical that chemically interacts with the facing wafer surface layer and an abrasive that physically removes portions of the surface layer is flowed between the wafer and the polishing pad, or on the pad in the vicinity of the wafer.
In semiconductor wafer fabrication, CMP is often utilized in an effort to planarize various wafer layers which may include layers such as dielectric layers and metallization layers. The planarity of the wafer layers is crucial for many reasons. For example, during wafer fabrication, planar layers reduce the likelihood of the accidental coupling of active conductive traces between different metallization layers, e.g., layers of active conductive traces, on integrated circuits housed on the wafer. Planar layers further provide a surface with a constant height for any subsequent lithography processes.
Polishing pressure, or the pressure applied to a wafer by a polishing pad, is generally maintained at a constant, e.g., uniform, level across the wafer. A uniform polishing pressure is maintained in an effort to ensure that the same amount of material, or film, is removed from all sections on the surface of a wafer. The amount of material removed from the surface of a wafer is governed by Preston""s Equation, which states that the amount of material removed from the surface of a wafer is proportional to the product of the polishing pressure and the relative velocity of the wafer. The relative velocity of the wafer is generally a function of the rotation of the wafer. Using Preston""s Equation, if the relative velocity of the wafer is maintained at a constant level, and the polishing pressure is at a uniform level across the wafer, then the amount of material removed from the wafer is constant.
During CMP, a wafer is held against a polishing pad with a uniform downforce such that the surface of the wafer may be evenly polished by the polishing pad. FIG. 1 is a diagrammatic cross-sectional representation of a wafer carrier assembly which may be used with a CMP apparatus such as an Avantgaard 676, available commercially from Integrated Processing Equipment Corporation (IPEC) of Phoenix, Ariz. A wafer carrier assembly 104 is generally used to transport a wafer 112 in order to position wafer 112 over a polishing pad 124, which is mounted on a platen 125. Wafer carrier assembly 104 typically includes a wafer carrier 106, or carrier plate, a wafer carrier film 108, and a retaining ring 110. Wafer 112 is supported by wafer carrier assembly 104 such that when a negative pressure, i.e., a vacuum, is applied through vacuum inlet 116 when wafer 112 is to be moved over a polishing pad 124, the negative pressure xe2x80x9cpermeatesxe2x80x9d openings 120 in wafer carrier 106 and wafer carrier film 108 to force wafer 112 against carrier film 108. That is, the vacuum created through openings 120 essentially suctions wafer 112 against carrier film 108 for transport.
When wafer 112 comes into contact with polishing pad 124 for polishing purposes, the vacuum applied through vacuum inlet 116 is released, and wafer 112 may be held against polishing pad 134 with a uniform back pressure applied by a pneumatic cylinder mechanism (not shown). In general, wafer carrier assembly 104 includes a shaft 126 which is coupled to a pneumatic cylinder mechanism (not shown) that is arranged to apply a downforce on wafer 112 in order to polish a front side 128 of wafer 112 using polishing pad 124. The downforce on wafer 112 is applied when the pneumatic cylinder mechanism presses down on wafer carrier assembly 104.
Once a polishing pad has been repeatedly used, e.g., is near the end of its pad life, the effectiveness of the polishing pad decreases. Since replacing polishing pads is time-consuming and expensive, a polishing pad is typically repeatedly used until non-uniformity on the surfaces of wafers polished using the polishing pad is at a level which is considered to be unacceptable. Generally, after a polishing pad has been repeatedly used to polish wafers over a period of time, the polishing pad has a tendency to become xe2x80x9cglazed.xe2x80x9d As is well known in the art, pad glazing occurs when the particles eroded from wafer surfaces, in addition to particles from abrasives in the slurry, glaze or otherwise accumulate over the polishing pad.
Pad glazing is generally most evident during CMP performed on an oxide layer such as a silicon dioxide layer. Herein and after, CMP performed on an oxide layer will be referred to as xe2x80x9coxide CMP.xe2x80x9d During oxide CMP, eroded silicon dioxide particulate residue, along with abrasives in the slurry, have the tendency to glaze the polishing pad. When pad glazing occurs, the polishing rate of the wafer surface is reduced, and a non-uniformly polished wafer surface is produced due to uneven removal of the glaze.
In general, during CMP, as the number of wafers processed using a particular polishing pad increases, the material, or film, removal rate near the axial center of the wafer typically becomes increasingly slower due to pad glazing. Pad conditioning generally helps to prevent the glazing effect. However, as the polishing pad degrades, film removal non-uniformity increases. The film removal non-uniformity typically results in faster film removal at the wafer edge than near the center of the wafer. The increasingly slower material removal rate near the center of the wafer is generally known as xe2x80x9ccenter-slowxe2x80x9d polishing. In order to compensate for center-slow polishing, pad conditioning may also be used to shape the profile of a polishing pad such that contact between the polishing pad and the center of a wafer is increased. In general, a polishing pad is fabricated from a material such as a compressible poromeric polyurethane. As will be appreciated by those skilled in the art, conditioning of a compressible poromeric polyurethane becomes less effective after repeated conditioning.
Increasing the contact between a polishing pad and the center of the wafer results in an increased polish rate at the center of the wafer. However, conditioning the polishing pad has the tendency to become less effective as the polishing pad ages. Further, replacing polishing pads is both time-consuming and expensive. Hence, prolonging the life of a polishing pad while reducing film removal non-uniformity is desirable. As such, what is desired is a method and apparatus for reducing wafer surface non-uniformity that occurs during CMP after a polishing pad has been used repeatedly. In other words, what is desired is a method and apparatus slows down the film removal non-uniformity degradation.
In accordance with the present invention, non-uniform pressure distributions are provided across the back side of a semiconductor wafer to enable polishing pressure to be varied across the wafer and, hence, the polishing pad which is used to polish the wafer during a chemical mechanical polishing (CMP) process. Varying the polishing pressure across the polishing pad enables problems which may arise when a polishing pad has been used repeatedly, e.g., center slow polishing, to be alleviated. By way of example, to compensate for center slow polishing, the pressure applied around the axial center of the wafer may be higher than pressures applied away from the center of the wafer.
According to one aspect of the present invention, a chemical mechanical polishing apparatus for polishing a first surface of a semiconductor wafer includes a polishing pad which polishes the first surface of the semiconductor wafer. The apparatus also includes a first mechanism which is used to hold, or otherwise support, the wafer during polishing, and a second mechanism that is used to apply a non-uniform pressure distribution through the first mechanism, directly onto a second surface of the wafer. The second mechanism is further used to facilitate polishing the first surface of the semiconductor wafer such that the first surface of the semiconductor wafer is evenly polished. In one embodiment, the second mechanism is arranged to apply both positive pressure and negative pressure substantially simultaneously across the second surface of the semiconductor wafer.
According to another aspect of the present invention, a chemical mechanical polishing apparatus for polishing a first surface of a semiconductor wafer includes a polishing pad which polishes the first surface of the wafer and a mechanism which applies a non-uniform pressure distribution directly across portions of a second surface of the wafer. The mechanism also supports the wafer while the first surface of the wafer is being polished. In one embodiment, the mechanism for applying the non-uniform pressure distribution includes a retaining ring, a carrier, and a carrier film which cooperate to support the wafer. In such an embodiment, the mechanism may also include an air supply which provides the non-uniform pressure distribution along the second surface of the wafer.
In another embodiment, a carrier and a carrier film are used to facilitate the application of the non-uniform pressure distribution along the second surface of the wafer. In such an embodiment, a plurality of openings, coupled to an air supply, are defined through both the carrier and the carrier film to provide the non-uniform pressure distribution along the second surface of the semiconductor wafer.
According to yet another aspect of the present invention, a method for planarizing a first surface of a semiconductor wafer using chemical mechanical polishing includes holding the wafer over a chemical mechanical polishing pad. A non-uniform pressure distribution is then applied directly over a second surface of the wafer, and the first surface of the wafer is polished with the chemical mechanical polishing pad. In one embodiment, applying the non-uniform pressure distribution over the second surface of the wafer involves simultaneously applying both a positive pressure and a negative pressure. In another embodiment, pressurized air is applied directly over the second surface of the semiconductor wafer.
These and other features and advantages of the present invention will be presented in more detail in the following detailed description of the invention and in the associated figures.
USPTO Backgrounds
USPTO Backgrounds