The present invention relates to a capacitor using a metal oxide in a capacitor insulating film, a semiconductor memory device using such a capacitor, and a method for manufacturing the same.
In recent years, along with developments in the digital technology for electronic equipment, the amount of data to be processed and stored has been increasing. Meanwhile, the level of functionality required for such electronic equipment has also been increasing, and the size of a semiconductor device used in electronic equipment and the size of a semiconductor element used in the semiconductor device have been rapidly reduced.
Along with this trend, techniques have been widely researched and developed in the art that allow the use of a high-permittivity dielectric material as a capacitor insulating film, instead of using silicon oxide or silicon nitride as in the prior art, in order to realize a higher degree of integration of a dynamic RAM device, for example.
Furthermore, ferroelectric films, which are spontaneously polarized, have been actively researched and developed in the art, aiming to realize a non-volatile RAM device that operates at a lower voltage than in the prior art and is capable of performing high-speed write and read operations. In a semiconductor memory device using such a high-permittivity dielectric material or a ferroelectric material in a capacitor insulating film, stacked memory cells have been used, instead of using planar memory cells as in the prior art, for highly-integrated memory devices whose storage capacity is on the order of megabits.
A conventional semiconductor memory device will now be described with reference to the drawings.
FIG. 15 is a cross-sectional view illustrating an important part of a conventional semiconductor memory device disclosed in Japanese Laid-Open Patent Publication No. 11-8355.
As illustrated in FIG. 15, the conventional semiconductor memory device includes a transistor 105, which includes source/drain regions 102 formed in an upper portion of a semiconductor substrate 101, and a gate electrode 104 formed over a channel region of the semiconductor substrate 101 via a gate insulating film 103. An interlayer insulating film 106 is formed on the semiconductor substrate 101 so as to cover the entire surface thereof including the transistor 105, and a contact plug 107 electrically connected to one of the source/drain regions 102 is formed in the interlayer insulating film 106.
An insulating hydrogen barrier layer 108 made of silicon nitride (Si3N4) is formed on the interlayer insulating film 106, and a conductive hydrogen barrier layer 109 made of titanium nitride (TiN) is formed on an upper end of the contact plug 107.
A lower electrode 110 containing iridium dioxide (IrO2) or ruthenium dioxide (RuO2) is formed on the insulating hydrogen barrier layer 108 so as to be connected to the conductive hydrogen barrier layer 109.
A buried insulating film 111 made of silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (SiON), etc., is formed on the insulating hydrogen barrier layer 108 between the lower electrodes 110.
A capacitor insulating film 112 made of a ferroelectric material such as lead zirconate titanate (Pb(Zr, Ti)O3) or strontium bismuth tantalate (SrBi2Ta2O9) is formed on the buried insulating film 111 including the lower electrode 110, and an upper electrode 113 containing iridium dioxide or ruthenium dioxide is formed on the capacitor insulating film 112. Moreover, an insulating hydrogen barrier layer 114 made of silicon nitride, etc., is formed on the upper electrode 113.
However, the conventional semiconductor memory device as described above has two problems as follows.
First, the conductive oxide film of the lower electrode 110, which is made of iridium dioxide or ruthenium dioxide and serves as a barrier against oxygen, is reduced by hydrogen that is generated during the manufacturing process, whereby the barrier property thereof against oxygen is deteriorated.
Second, the high-permittivity dielectric material or the ferroelectric material of the capacitor insulating film 112 is reduced by hydrogen that is generated during the manufacturing process, whereby the electrical characteristics thereof as a capacitor are deteriorated.
The first problem, i.e., the reduction of the lower electrode having an oxygen barrier property during the manufacturing process, will first be described with reference to FIG. 16A and FIG. 16B.
As illustrated in FIG. 16A, when a buried insulating film 111A is deposited after patterning the lower electrode 110 containing iridium dioxide or ruthenium dioxide, hydrogen ions are generated from monosilane (SiH4) or ammonia (NH3), which is a material gas, and iridium dioxide or ruthenium dioxide is easily reduced by the hydrogen ions. The reduction reaction is particularly pronounced in a case where a plasma CVD method is used for depositing the buried insulating film 111A.
As a result, the diffusion barrier property against oxygen atoms in the buried insulating film 111 is deteriorated. Therefore, during an oxygen annealing process performed at about 650xc2x0 C. to 800xc2x0 C., which is necessary for crystallization of the capacitor insulating film 112, which is made of a high-permittivity dielectric material or a ferroelectric material and formed on the lower electrode 110, oxygen ions diffused from the capacitor insulating film 112 are diffused through the lower electrode 110 to reach the interface between the lower electrode 110 and the contact plug 107, as illustrated in FIG. 16B. This causes a contact failure, e.g., an increase in the contact resistance.
Next, the second problem, i.e., the reduction of the capacitor insulating film made of a high-permittivity dielectric material or a ferroelectric material during the manufacturing process, will be described with reference to FIG. 17.
In an actual semiconductor memory device, a plurality of capacitors and transistors are both arranged two-dimensionally in a so-called xe2x80x9carray patternxe2x80x9d, as illustrated in FIG. 15 or FIG. 17. In a case where the capacitor insulating film 112 of the capacitors, which are arranged in an array pattern, is made of a high-permittivity dielectric material or a ferroelectric material, a metal oxide is used in many cases, as described above. Therefore, it is not possible to prevent some of the capacitors arranged in an array pattern that are located along a periphery 100 of the array pattern from being reduced by hydrogen ions, only with the insulating hydrogen barrier layer 108 provided under the capacitors and the insulating hydrogen barrier layer 114 provided over the capacitors, for the following reason. As illustrated in FIG. 17, although the diffusion of hydrogen ions into the capacitors in the upward direction and the downward direction of the semiconductor substrate 101 can be prevented, it is not possible to prevent the diffusion of hydrogen ions in a lateral direction, i.e., in a direction parallel to the substrate plane, into those capacitors that are located along the periphery 100.
Japanese Laid-Open Patent Publication No. 2001-237393 discloses a semiconductor memory device in which a capacitor is covered completely with a hydrogen barrier layer. However, in a semiconductor memory device in which a plurality of capacitors are arranged in a two-dimensional array pattern, the deterioration of the characteristics of the capacitors cannot be prevented unless all of the plurality of capacitors are covered completely with the hydrogen barrier layer.
Moreover, Japanese Laid-Open Patent Publication No. 11-126881 discloses a semiconductor memory device in which a plurality of capacitors are covered completely with a hydrogen barrier layer. However, this publication does not disclose means for applying a voltage to an upper electrode 110 shown in FIG. 1 of the publication. Assuming that a contact hole is provided for the application of a voltage to the upper electrode 110, a hydrogen barrier layer 111 covering the upper electrode 110 needs to be etched. If such an etching process is performed for making an opening in the hydrogen barrier layer 111, the capacitors are deteriorated by hydrogen that is generated during a resist ashing process, which is performed after the opening is made, or by hydrogen that is generated during the subsequent wiring steps (i.e., a series of processes, including filling the contact hole with a plug, depositing and patterning a wiring layer, sintering the obtained wires using a hydrogen gas, and forming an insulating film that fills the space between the wires), as stated in Japanese Laid-Open Patent Publication No. 2001-44376.
As described above, in the conventional semiconductor memory device, it is difficult to completely cover the memory cell array, including a plurality of capacitors arranged in an array pattern, with a hydrogen barrier layer.
The present invention has been made to solve these problems in the prior art, and a first object thereof is to make it possible to maintain the oxygen barrier property of a lower electrode in a capacitor, a second object thereof is to make it possible to prevent a capacitor insulating film of a capacitor made of a metal oxide from being reduced, and a third object thereof is to make it possible to reliably prevent the characteristics of a capacitor from being deteriorated in a case where a memory cell array is divided into blocks, and the memory cell array is covered for every one or more blocks.
In order to achieve the first object, the present invention employs a structure in which the side surface of the lower electrode of a capacitor is covered with a first insulating barrier layer that prevents the diffusion of oxygen and hydrogen. In order to achieve the second object, the present invention employs a structure in which the side surface of the capacitor insulating film of a capacitor is covered with a second insulating barrier layer that prevents the diffusion of hydrogen. In order to achieve the third object, the present invention employs a structure in which a memory cell array is divided into blocks, and capacitors are covered, for every one or more blocks, with an insulating barrier layer that prevents the diffusion of hydrogen.
Specifically, a first capacitor of the present invention, which achieves the first object set forth above, includes: a lower electrode; a capacitor insulating film made of a metal oxide and formed on the lower electrode; an upper electrode formed on the capacitor insulating film; and a buried insulating film surrounding the-lower electrode, wherein: the lower electrode includes a conductive barrier layer that prevents diffusion of oxygen; and an insulating barrier layer that prevents diffusion of hydrogen is formed so as to be in contact with at least a side surface of the conductive barrier layer in a side surface of the lower electrode.
With the first capacitor, hydrogen that is generated during the deposition of the buried insulating film surrounding the lower electrode is prevented from being diffused into the lower electrode by the insulating barrier layer formed on the side surface of the lower electrode. As a result, in a case where the conductive barrier layer of the lower electrode that prevents diffusion of oxygen is made of a metal oxide, for example, the conductive barrier layer is prevented from being reduced by hydrogen, whereby the conductive barrier layer can maintain its barrier property against oxygen.
In the first capacitor, it is preferred that the buried insulating film is formed in a hydrogen-containing atmosphere.
In the first capacitor, it is preferred that the buried insulating film is made of silicon oxide (SiO2) or silicon nitride (Si3N4).
In the first capacitor, it is preferred that the insulating barrier layer also prevents diffusion of oxygen.
In the first capacitor, it is preferred that the conductive barrier layer includes a layered film made of a first conductive barrier layer that prevents diffusion of oxygen and hydrogen, and a second conductive barrier layer that prevents diffusion of oxygen.
In such a case, it is preferred that the first conductive barrier layer includes one of, or is a layered film including at least two of, titanium aluminum nitride (TiAlN), titanium aluminum (TiAl), titanium silicon nitride (TiSiN), tantalum nitride (TaN), tantalum silicon nitride (TaSiN), tantalum aluminum nitride (TaAlN), and tantalum aluminum (TaAl).
Moreover, in such a case, it is preferred that the second conductive barrier layer includes one of, or is a layered film including at least two of, iridium dioxide (IrO2), a layered film including a lower layer made of iridium (Ir) and an upper layer made of iridium dioxide (IrO2), ruthenium dioxide (RuO2), and a layered film including a lower layer made of ruthenium (Ru) and an upper layer made of ruthenium dioxide (RuO2).
In the first capacitor, it is preferred that the insulating barrier layer includes one of aluminum oxide (Al2O3), titanium aluminum oxide (TiAlO), and tantalum aluminum oxide (TaAlO).
A second capacitor of the present invention, which achieves the first object set forth above, includes: a lower electrode; a capacitor insulating film made of a metal oxide and formed on the lower electrode; an upper electrode formed on the capacitor insulating film; and a buried insulating film surrounding the lower electrode, wherein: the lower electrode includes a conductive barrier layer that includes one of, or is a layered film including at least two of, iridium dioxide (IrO2), a layered film including a lower layer made of iridium (Ir) and an upper layer made of iridium dioxide (IrO2), ruthenium dioxide (RuO2), and a layered film including a lower layer made of ruthenium (Ru) and an upper layer made of ruthenium dioxide (RuO2); and an insulating barrier layer including at least one of aluminum oxide (Al2O3), titanium aluminum oxide (TiAlO), and tantalum aluminum oxide (TaAlO), is formed so as to be in contact with at least a side surface of the conductive barrier layer in a side surface of the lower electrode.
With the second capacitor, hydrogen that is generated during the deposition of the buried insulating film is prevented from being diffused into the lower electrode by the insulating barrier layer formed on the side surface of the lower electrode. As a result, the conductive barrier layer is prevented from being reduced by hydrogen, whereby the conductive barrier layer can maintain its barrier property against oxygen.
A first semiconductor memory device of the present invention, which achieves the first object set forth above, includes: a transistor formed on a semiconductor substrate and including a source region and a drain region; an interlayer insulating film formed on the semiconductor substrate so as to cover the transistor; a contact plug formed in the interlayer insulating film so as to be electrically connected to the source region or the drain region of the transistor; and the first or second capacitor of the present invention in which the lower electrode is formed on the contact plug.
The first semiconductor memory device includes the first or second capacitor of the present invention, whereby hydrogen that is generated during the deposition of the buried insulating film is prevented from being diffused into the lower electrode by the insulating barrier layer formed on the side surface of the lower electrode. As a result, in a case where the conductive barrier layer of the lower electrode that prevents diffusion of oxygen is made of a metal oxide, for example, the conductive barrier layer is prevented from being reduced by hydrogen, thereby preventing the deterioration of the characteristics of the capacitor.
A first method for manufacturing a semiconductor memory device of the present invention, which achieves the first object set forth above, includes: a first step of forming a gate electrode on a semiconductor substrate, and then forming a source region and a drain region in the semiconductor substrate on opposite sides of the gate electrode, thereby forming a transistor; a second step of forming an interlayer insulating film on the semiconductor substrate including the transistor; a third step of forming a contact plug in the interlayer insulating film so as to be electrically connected to the source region or the drain region; a fourth step of forming a first conductive film on the interlayer insulating film, the first conductive film including a conductive barrier layer that prevents diffusion of oxygen; a fifth step of patterning the first conductive film so as to be electrically connected to the contact plug, thereby forming a lower electrode from the first conductive film on the interlayer insulating film; a sixth step of forming an insulating barrier layer that prevents diffusion of hydrogen on the interlayer insulating film so as to cover an upper surface and a side surface of the lower electrode; a seventh step of forming a first insulating film on the insulating barrier layer, and then flattening the first insulating film and the insulating barrier layer so that the lower electrode is exposed; an eighth step of forming a second insulating film made of a metal oxide on the first insulating film and the insulating barrier layer, which have been flattened, including the exposed upper surface of the lower electrode, and forming a second conductive film on the second insulating film; and a ninth step of patterning the second conductive film, the second insulating film and the first insulating film so that a remaining portion extends over the lower electrode, thereby forming, on the lower electrode, an upper electrode from the second conductive film and a capacitor insulating film from the second insulating film, and forming a buried insulating film from the first insulating film, the buried insulating film surrounding the lower electrode.
With the first method for manufacturing a semiconductor memory device, in a case where the conductive barrier layer of the lower electrode that prevents diffusion of oxygen is made of a metal oxide, the conductive barrier layer is prevented from being reduced by hydrogen, whereby the conductive barrier layer can maintain its barrier property against oxygen.
In the first method for manufacturing a semiconductor memory device, it is preferred that the buried insulating film is formed in a hydrogen-containing atmosphere.
In the first method for manufacturing a semiconductor memory device, it is preferred that the fourth step includes a step of forming a first conductive barrier layer that prevents diffusion of oxygen and hydrogen, and a step of forming a second conductive barrier layer that prevents diffusion of oxygen.
A third capacitor of the present invention, which achieves the second object set forth above, includes: a lower electrode; a capacitor insulating film made of a metal oxide and formed on the lower electrode; an upper electrode formed on the capacitor insulating film; and a buried insulating film surrounding the lower electrode, wherein: the lower electrode includes a conductive barrier layer that prevents diffusion of oxygen and hydrogen; a first insulating barrier layer that prevents diffusion of hydrogen is formed so as to be in contact with at least a side surface of the conductive barrier layer in a side surface of the lower electrode; a second insulating barrier layer that prevents diffusion of hydrogen is formed so as to cover an upper surface and a side surface of the upper electrode and a side surface of the capacitor insulating film; and the second insulating barrier layer covers the lower electrode and is in contact with the first insulating barrier layer.
With the third capacitor, hydrogen that is generated during the manufacturing process is not diffused into the capacitor insulating film through the side surface thereof, whereby the metal oxide is not reduced. In addition, the capacitor is covered with the second insulating barrier layer with no gap, whereby the capacitor is prevented from being reduced by hydrogen. As a result, it is possible to obtain a capacitor having predetermined electrical characteristics.
In the third capacitor, it is preferred that the buried insulating film is formed in a hydrogen-containing atmosphere.
In the third capacitor, it is preferred that the buried insulating film is made of silicon oxide (SiO2) or silicon nitride (Si3N4).
In the third capacitor, it is preferred that the first insulating barrier layer also prevents diffusion of oxygen.
In the third capacitor, it is preferred that the conductive barrier layer includes a layered film made of a first conductive barrier layer that prevents diffusion of oxygen and hydrogen, and a second conductive barrier layer that prevents diffusion of oxygen.
In such a case, it is preferred that the first conductive barrier layer includes one of, or is a layered film including at least two of, titanium aluminum nitride (TiAlN), titanium aluminum (TiAl), titanium silicon nitride (TiSiN), tantalum nitride (TaN), tantalum silicon nitride (TaSiN), tantalum aluminum nitride (TaAlN), and tantalum aluminum (TaAl).
Moreover, in such a case, it is preferred that the second conductive barrier layer includes one of, or is a layered film including at least two of, iridium dioxide (IrO2), a layered film including a lower layer made of iridium (Ir) and an upper layer made of iridium dioxide (IrO2), ruthenium dioxide (RuO2), and a layered film including a lower layer made of ruthenium (Ru) and an upper layer made of ruthenium dioxide (RuO2).
In the third capacitor, it is preferred that the first insulating barrier layer and the second insulating barrier layer are made of aluminum oxide (Al2O3), titanium aluminum oxide (TiAlO), or tantalum aluminum oxide (TaAlO).
A fourth capacitor of the present invention, which achieves the second object set forth above, includes: a lower electrode; a capacitor insulating film made of a metal oxide and formed on the lower electrode; an upper electrode formed on the capacitor insulating film; and a buried insulating film surrounding the lower electrode, wherein: the lower electrode includes a conductive barrier layer that includes one of, or is a layered film including at least two of, titanium aluminum nitride (TiAlN), titanium aluminum (TiAl), titanium silicon nitride (TiSiN), tantalum nitride (TaN), tantalum silicon nitride (TaSiN), tantalum aluminum nitride (TaAlN), and tantalum aluminum (TaAl); a first insulating barrier layer including at least one of aluminum oxide (Al2O3), titanium aluminum oxide (TiAlO), and tantalum aluminum oxide (TaAlO), is formed so as to be in contact with at least a side surface of the conductive barrier layer in a side surface of the lower electrode; a second insulating barrier layer including at least one of aluminum oxide (Al2O3), titanium aluminum oxide (TiAlO), and tantalum aluminum oxide (TaAlO), is formed so as to cover an upper surface and a side surface of the upper electrode and a side surface of the capacitor insulating film; and the second insulating barrier layer covers the lower electrode and is in contact with the first insulating barrier layer.
With the fourth capacitor, the second insulating barrier layer, which is made of one material selected from the same group of materials as that for the first insulating barrier layer, is formed so as to cover the upper surface and the side surface of the upper electrode, the side surface of the capacitor insulating film and the lower electrode and to be in contact with the first insulating barrier layer. Thus, the capacitor is covered with the second insulating barrier layer with no gap, whereby the capacitor is prevented from being reduced by hydrogen.
A second semiconductor memory device of the present invention includes: a transistor formed on a semiconductor substrate and including a source region and a drain region; an interlayer insulating film formed on the semiconductor substrate so as to cover the transistor; a contact plug formed in the interlayer insulating film so as to be electrically connected to the source region or the drain region of the transistor; and the third or fourth capacitor of the present invention in which the lower electrode is formed on the contact plug.
The second semiconductor memory device includes the third or fourth capacitor of the present invention, whereby hydrogen that is generated during the deposition of the buried insulating film is prevented from being diffused into the lower electrode by the insulating barrier layer formed on the side surface of the lower electrode. Furthermore, hydrogen that is generated during the manufacturing process is not diffused into the capacitor insulating film through the side surface thereof, whereby the metal oxide is not reduced. In addition, the capacitor is covered with the second insulating barrier layer with no gap, whereby the capacitor is prevented from being reduced by hydrogen.
A second method for manufacturing a semiconductor memory device of the present invention includes: a first step of forming a gate electrode on a semiconductor substrate, and then forming a source region and a drain region in the semiconductor substrate on opposite sides of the gate electrode, thereby forming a transistor; a second step of forming an interlayer insulating film on the semiconductor substrate including the transistor; a third step of forming a contact plug in the interlayer insulating film so as to be electrically connected to the source region or the drain region; a fourth step of forming a first conductive film on the interlayer insulating film, the first conductive film including a conductive barrier layer that prevents diffusion of oxygen and hydrogen; a fifth step of patterning the first conductive film so as to be electrically connected to the contact plug, thereby forming a lower electrode from the first conductive film on the interlayer insulating film; a sixth step of forming a first insulating barrier layer that prevents diffusion of hydrogen on the interlayer insulating film so as to cover an upper surface and a side surface of the lower electrode; a seventh step of forming a first insulating film on the first insulating barrier layer, and then flattening the first insulating film and the first insulating barrier layer so that the lower electrode is exposed; an eighth step of forming a second insulating film made of a metal oxide on the first insulating film and the first insulating barrier layer, which have been flattened, including the exposed upper surface of the lower electrode, and forming a second conductive film on the second insulating film; a ninth step of patterning the second conductive film, the second insulating film and the first insulating film so that a remaining portion extends over the lower electrode, thereby forming, on the lower electrode, an upper electrode from the second conductive film and a capacitor insulating film from the second insulating film, and forming a buried insulating film from the first insulating film, the buried insulating film surrounding the lower electrode; and a tenth step of forming a second insulating barrier layer that prevents diffusion of hydrogen so as to cover the upper electrode, the capacitor insulating film and the buried insulating film and to be in contact with the first insulating barrier layer beside the lower electrode.
With the second method for manufacturing a semiconductor memory device, it is possible to prevent the capacitor insulating film made of a metal oxide of the capacitor from being reduced during the manufacturing process, in addition to the effects of the first method for manufacturing a semiconductor memory device as described above.
In the second method for manufacturing a semiconductor memory device, it is preferred that the first insulating film is formed in a hydrogen-containing atmosphere.
In the second method for manufacturing a semiconductor memory device, it is preferred that the ninth step includes a step of, after the patterning of the first insulating film, patterning the first insulating barrier layer into substantially the same shape as the patterned first insulating film.
In the second method for manufacturing a semiconductor memory device, it is preferred that the fourth step includes a step of forming a first conductive barrier layer that prevents diffusion of oxygen and hydrogen, and a step of forming a second conductive barrier layer that prevents diffusion of oxygen.
A third semiconductor memory device of the present invention, which achieves the third object set forth above, includes: a first transistor formed on a semiconductor substrate and including a source region and a drain region; an interlayer insulating film formed on the semiconductor substrate so as to cover the first transistor; a first contact plug formed in the interlayer insulating film so as to be electrically connected to the source region or the drain region of the first transistor; a lower electrode formed on the interlayer insulating film so as to be electrically connected to the first contact plug, the lower electrode including a conductive barrier layer that prevents diffusion of hydrogen; a capacitor insulating film made of a metal oxide and formed on the lower electrode; and a memory cell array including an upper electrode formed on the capacitor insulating film, the upper electrode being provided for one or more blocks each including a plurality of lower electrodes, wherein an insulating barrier layer that prevents diffusion of hydrogen is formed so as to cover a periphery of one or more of the blocks.
With the third semiconductor memory device, the insulating barrier layer that prevents diffusion of hydrogen is formed so as to cover the periphery of one or more blocks of the memory cell array, whereby it is possible to reliably prevent the deterioration of the characteristics of the capacitor.
It is preferred that in the block of the third semiconductor memory device, the upper electrode is electrically connected to a second contact plug, which is connected to a source region or a drain region of a second transistor, via a conductive barrier film that prevents diffusion of hydrogen.
It is preferred that in the block of the third semiconductor memory device, the upper electrode is electrically connected to a second contact plug, which is connected to a source region or a drain region of a second transistor, via the lower electrode.
A fourth semiconductor memory device of the present invention, which achieves the third object set forth above, includes: a first transistor formed on a semiconductor substrate and including a source region and a drain region; an interlayer insulating film formed on the semiconductor substrate so as to cover the first transistor; a first contact plug formed in the interlayer insulating film so as to be electrically connected to the source region or the drain region of the first transistor; a lower electrode formed on the interlayer insulating film so as to be electrically connected to the first contact plug, the lower electrode including a conductive barrier layer that prevents diffusion of hydrogen; a capacitor insulating film made of a metal oxide and formed on the lower electrode; and a memory cell array including an upper electrode formed on the capacitor insulating film, the upper electrode being provided for one or more blocks each including a plurality of lower electrodes, wherein: a first insulating barrier layer that prevents diffusion of hydrogen is formed so as to be in contact with the plurality of lower electrodes and to cover a bottom surface of the block; a second insulating barrier layer that prevents diffusion of hydrogen is formed so as to cover an upper surface and a side surface of the upper electrode and a side surface of the capacitor insulating film, thereby covering an upper surface and a side surface of the block; and the second insulating barrier layer is in contact with the first insulating barrier layer along a periphery of one or more of the blocks.
With the fourth semiconductor memory device, the first insulating barrier layer that prevents diffusion of hydrogen is formed so as to be in contact with the plurality of lower electrodes and to cover the bottom surface of the block, in addition to the effects of the third semiconductor memory device as described above, whereby it is possible to more reliably prevent the deterioration of the characteristics of the capacitor.
In the fourth semiconductor memory device, it is preferred that the conductive barrier layer includes one of, or is a layered film including at least two of, titanium aluminum nitride (TiAlN), titanium aluminum (TiAl), titanium silicon nitride (TiSiN), tantalum nitride (TaN), tantalum silicon nitride (TaSiN), tantalum aluminum nitride (TaAlN), and tantalum aluminum (TaAl).
In the fourth semiconductor memory device, it is preferred that the first insulating barrier layer or the second insulating barrier layer includes at least one of aluminum oxide (Al2O3), titanium aluminum oxide (TiAlO), and tantalum aluminum oxide (TaAlO).
In the fourth semiconductor memory device, it is preferred that the first insulating barrier layer is made of silicon nitride (Si3N4).
A third method for manufacturing a semiconductor memory device of the present invention includes: a first step of forming a gate electrode on a semiconductor substrate, and then forming a source region and a drain region in the semiconductor substrate on opposite sides of the gate electrode, thereby forming a transistor; a second step of forming an interlayer insulating film on the semiconductor substrate including the transistor; a third step of forming a contact plug in the interlayer insulating film so as to be electrically connected to the source region or the drain region; a fourth step of forming a first conductive film on the interlayer insulating film, the first conductive film including a conductive barrier layer that prevents diffusion of oxygen and hydrogen; a fifth step of patterning the first conductive film so as to be electrically connected to the contact plug, thereby forming a plurality of lower electrodes from the first conductive film on the interlayer insulating film; a sixth step of forming a first insulating barrier layer that prevents diffusion of hydrogen on the interlayer insulating film so as to cover an upper surface and a side surface of the plurality of lower electrodes; a seventh step of forming a first insulating film on the first insulating barrier layer, and then flattening the first insulating film and the first insulating barrier layer so that the plurality of lower electrodes are exposed; an eighth step of forming a second insulating film made of a metal oxide entirely across an upper surface of the first insulating film and the first insulating barrier layer, which have been flattened, including an upper surface of the exposed lower electrodes; a ninth step of forming a second conductive film on the second insulating film; a tenth step of patterning the second conductive film, the second insulating film and the first insulating film so that a remaining portion extends over a block including the plurality of lower electrodes, thereby forming an upper electrode from the second conductive film so as to cover the block, forming a capacitor insulating film from the second insulating film, and forming a buried insulating film from the first insulating film, the buried insulating film filling a space between the plurality of lower electrodes; and an eleventh step of forming a second insulating barrier layer that prevents diffusion of hydrogen so as to cover the upper electrode, the capacitor insulating film and the buried insulating film in the block and to be in contact with the first insulating barrier layer along a periphery of the block.
With the third method for manufacturing a semiconductor memory device, the second insulating barrier layer is formed so as to cover the upper electrode, the capacitor insulating film and the buried insulating film in the block and to be in contact with the first insulating barrier layer along the periphery of the block, whereby it is possible to prevent the characteristics of the capacitor from being deteriorated during the manufacturing process.
A fourth method for manufacturing a semiconductor memory device of the present invention includes: a first step of forming gate electrodes on a semiconductor substrate, and then forming source regions and drain regions in the semiconductor substrate on opposite sides of the gate electrodes, thereby forming a first transistor and a second transistor; a second step of forming an interlayer insulating film on the semiconductor substrate including the first transistor and the second transistor; a third step of forming a first contact plug and a second contact plug in the interlayer insulating film so as to be electrically connected to the source region or the drain region of the first transistor and the second transistor, respectively; a fourth step of forming a first conductive film on the interlayer insulating film, the first conductive film including a conductive barrier layer that prevents diffusion of oxygen and hydrogen; a fifth step of patterning the first conductive film so as to be electrically connected to the first contact plug and the second contact plug, thereby forming a plurality of lower electrodes from the first conductive film on the interlayer insulating film; a sixth step of forming a first insulating barrier layer that prevents diffusion of hydrogen on the interlayer insulating film so as to cover an upper surface and a side surface of the plurality of lower electrodes; a seventh step of forming a first insulating film on the first insulating barrier layer, and then flattening the first insulating film and the first insulating barrier layer so that the plurality of lower electrodes are exposed; an eighth step of forming a second insulating film made of a metal oxide entirely across an upper surface of the first insulating film and the first insulating barrier layer, which have been flattened, including an upper surface of the exposed lower electrodes; a ninth step of removing a portion of the second insulating film over the lower electrode that is connected to the second contact plug in a block including the plurality of lower electrodes; a tenth step of forming a second conductive film on the second insulating film and on the lower electrode that is connected to the second contact plug; an eleventh step of patterning the second conductive film, the second insulating film and the first insulating film so that a remaining portion extends over the block, thereby forming an upper electrode from the second conductive film so as to cover the block, forming a capacitor insulating film from the second insulating film, and forming a buried insulating film from the first insulating film, the buried insulating film filling a space between the plurality of lower electrodes; and a twelfth step of forming a second insulating barrier layer that prevents diffusion of hydrogen so as to cover the upper electrode, the capacitor insulating film and the buried insulating film in the block and to be in contact with the first insulating barrier layer along a periphery of the block.
With the fourth method for manufacturing a semiconductor memory device, a voltage can be applied to the upper electrode from the second transistor through the second contact plug without making an opening in the second insulating barrier layer, in addition to the effects of the third method for manufacturing a semiconductor memory device as described above. As a result, it is no longer necessary to provide an opening and wiring in the second insulating barrier layer covering the upper electrode, and thus the exposure to hydrogen is eliminated, whereby it is possible to prevent the deterioration of the characteristics of the capacitor.
A fifth method for manufacturing a semiconductor memory device of the present invention includes: a first step of forming a gate electrode on a semiconductor substrate, and then forming a source region and a drain region in the semiconductor substrate on opposite sides of the gate electrode, thereby forming a transistor; a second step of forming an interlayer insulating film on the semiconductor substrate including the transistor; a third step of forming a first insulating barrier layer that prevents diffusion of hydrogen on the interlayer insulating film; a fourth step of forming a contact plug in the interlayer insulating film and the first insulating barrier layer so as to be electrically connected to the source region or the drain region; a fifth step of forming a first conductive film on the first insulating barrier layer, the first conductive film including a conductive barrier layer that prevents diffusion of hydrogen; a sixth step of patterning the first conductive film so as to be electrically connected to the contact plug, thereby forming a plurality of lower electrodes from the first conductive film on the first insulating barrier layer; a seventh step of forming a first insulating film on the first insulating barrier layer including an upper surface of the plurality of lower electrodes, and then flattening the first insulating film so that the plurality of lower electrodes are exposed; an eighth step of forming a second insulating film made of a metal oxide entirely across an upper surface of the first insulating film, which has been flattened, including an upper surface of the exposed lower electrodes; a ninth step of forming a second conductive film on the second insulating film; a tenth step of patterning the second conductive film, the second insulating film and the first insulating film so that a remaining portion extends over a block including the plurality of lower electrodes, thereby forming an upper electrode from the second conductive film so as to cover the block, forming a capacitor insulating film from the second insulating film, and forming a buried insulating film from the first insulating film, the buried insulating film filling a space between the plurality of lower electrodes; and an eleventh step of forming a second insulating barrier layer that prevents diffusion of hydrogen so as to cover the upper electrode, the capacitor insulating film and the buried insulating film in the block and to be in contact with the first insulating barrier layer along a periphery of the block.
With the fifth method for manufacturing a semiconductor memory device, the second insulating barrier layer is formed so as to cover the upper electrode, the capacitor insulating film and the buried insulating film in the block and to be in contact with the first insulating barrier layer along the periphery of the block, whereby it is possible to prevent the characteristics of the capacitor from being deteriorated during the manufacturing process.
A sixth method for manufacturing a semiconductor memory device of the present invention includes: a first step of forming gate electrodes on a semiconductor substrate, and then forming source regions and drain regions in the semiconductor substrate on opposite sides of the gate electrodes, thereby forming a first transistor and a second transistor; a second step of forming an interlayer insulating film on the semiconductor substrate including the first transistor and the second transistor; a third step of forming a first insulating barrier layer that prevents diffusion of hydrogen on the interlayer insulating film; a fourth step of forming a first contact plug and a second contact plug in the interlayer insulating film and the first insulating barrier layer so as to be electrically connected to the source region or the drain region of the first transistor and the second transistor, respectively; a fifth step of forming a first conductive film on the first insulating barrier layer, the first conductive film including a conductive barrier layer that prevents diffusion of hydrogen; a sixth step of patterning the first conductive film so as to be electrically connected to the first contact plug and the second contact plug, thereby forming a plurality of lower electrodes from the first conductive film on the first insulating barrier layer; a seventh step of forming a first insulating film on the first insulating barrier layer including an upper surface of the plurality of lower electrodes, and then flattening the first insulating film so that the plurality of lower electrodes are exposed; an eighth step of forming a second insulating film made of a metal oxide entirely across an upper surface of the first insulating film, which has been flattened, including an upper surface of the exposed lower electrodes; a ninth step of removing a portion of the second insulating film over the lower electrode that is connected to the second contact plug in a block including the plurality of lower electrodes; a tenth step of forming a second conductive film on the second insulating film and on the lower electrode that is connected to the second contact plug; an eleventh step of patterning the second conductive film, the second insulating film and the first insulating film so that a remaining portion extends over the block, thereby forming an upper electrode from the second conductive film so as to cover the block, forming a capacitor insulating film from the second insulating film, and forming a buried insulating film from the first insulating film, the buried insulating film filling a space between the plurality of lower electrodes; and a twelfth step of forming a second insulating barrier layer that prevents diffusion of hydrogen so as to cover the upper electrode, the capacitor insulating film and the buried insulating film in the block and to be in contact with the first insulating barrier layer along a periphery of the block.
With the sixth method for manufacturing a semiconductor memory device, a voltage can be applied to the upper electrode from the second transistor through the second contact plug without making an opening in the second insulating barrier layer, in addition to the effects of the fifth method for manufacturing a semiconductor memory device as described above. As a result, it is no longer necessary to provide an opening and wiring in the second insulating barrier layer covering the upper electrode, and thus the exposure to hydrogen is eliminated, whereby it is possible to prevent the deterioration of the characteristics of the capacitor.
In the third or fifth method for manufacturing a semiconductor memory device, it is preferred that the tenth step includes a step of, after the patterning of the first insulating film, patterning the first insulating barrier layer into substantially the same shape as the patterned first insulating film.
In the fourth or sixth method for manufacturing a semiconductor memory device, it is preferred that the eleventh step includes a step of, after the patterning of the first insulating film, patterning the first insulating barrier layer into substantially the same shape as the patterned first insulating film.
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USPTO Backgrounds