1. Field
The disclosure relates to circuit design, and in particular, to techniques for designing a transconductor configurable to have low transconductance (Gm).
2. Background
In the art of electronics, a transconductance element is designed to generate an output current proportional to an input voltage. In certain applications, a very low transconductance (or correspondingly, very high resistance) is desired, e.g., to maintain a DC bias voltage at a node while introducing minimal bandwidth degradation. Providing elements with very low transconductance in integrated circuits poses a challenge, as the required die area is generally proportional to the size of the resistance, which would be very large in this case.
It would be desirable to provide robust and area-efficient techniques for implementing transconductance elements in integrated circuits configurable to have very low transconductance.
USPTO Backgrounds
USPTO Backgrounds