1. Field of the Invention
The present invention relates to a circuit emulation apparatus for cellularizing an STS (Synchronous Transmission Signal) frame of the STM (Synchronous Transmission Mode) into ATM (Asynchronous Transfer Mode) cells and multiplexing ATM cells into an STS frame, and more particularly to a circuit emulation apparatus and a frame length compensation method by which an AU pointer (Administrative Unit pointer) rewriting system for keeping the frame length fixed even if an abnormal STS frame length is detected.
2. Description of the Related Art
The structure of an STS-1 frame as an example of STS-N frame is shown in FIG. 3. Referring to FIG. 3, the STS-1 frame 208 shown includes an RSOH (Regenerator Section Over Head) 201 composed of 3 columns×3 rows, an AU-3 pointer 202 composed of one column×3 rows, an MSOH (Multiplex Section Over Head) 203 composed of 5 columns×3 rows, and an STS-1 payload 207 composed of 9 columns×87 rows.
The STS-1 payload 207 is formed from a POH (Path Over Head) 204 composed of 9 columns×1 row, a payload 205 composed of 9 columns×28 rows, and a fixed stuff byte 206 composed of 9 columns×1 row. The POH 204 is formed from J1, B3, C2, G1, F2, H4, Z3, Z4 and Z5. The J1 signifies a position designated by the AU-3 pointer 202.
The structure of the AU-3 pointer is shown in FIG. 4. Referring to FIG. 4, the AU-3 pointer 301 is composed of an H1 byte, an H2 byte and an H3 byte. The H1 byte is composed of 8 bits. The bits 7 to 4 form a new data flag 302 indicative of whether or not the AU-3 pointer has been changed, the bits 3 to 2 form an AU type 303 indicative of an AU type, and the bits 1 to 0 form a pointer value 304 indicative of the pointer value.
The H2 byte is composed of 8 bits. The bits 7 to 0 form a pointer value 305 indicative of a pointer value. The H3 byte is composed of 8 bits. The bits 7 to 0 form a negative stuff action 306 for stuffing operation.
A multiplexed structure of an STS-3 frame formed from three STS-1 frames is shown in FIG. 5. It is to be noted that the RSOH and the MSOH are omitted in FIG. 5. In the following description, the RSOH and the MSOH are removed from an STS-1 frame and an STS-3 frame.
Particularly, FIG. 5 illustrates that different channel data of an STS-1 frame (#1) 413, another STS-1 frame (#2) 414 and a further STS-1 frame (#3) 415 are multiplexed into an STS-3 frame 424.
The STS-1 frame 413 is formed from an AU-3 pointer 401 and an STS-1 payload 410. The STS-1 frame 414 is formed from an AU-3 pointer 402 and an STS-1 payload 411. The STS-1 frame 415 if formed from an AU-3 pointer 403 and an STS-1 payload 412. The STS-3 frame 424 is formed from an AU-pointer 416 composed of one column×9 rows, and a payload 423 composed of 9 columns×261 rows.
In the multiplexing, first the AU-3 pointer 401, AU-3 pointer 402 and AU-3 pointer 403 are multiplexed in order of #1-H1, #2-H1, #3-H1, #1-H2, #2-H2, #3-H2, #1-H3, #2-H3 #3-H3 into the AU-pointer 416.
Then, a POH 405 formed from 9 columns×1 row in the STS-1 payload 410 is multiplexed into a POH 420 composed of 9 columns×1 row in the payload 423; a POH 407 formed from 9 columns×1 row in the STS-1 payload 411 is multiplexed into a POH 421 composed of 9 columns×1 row in the payload 423; a POH 409 composed of 9 columns×1 row in the STS-1 payload 412 is multiplexed into a POH 422 composed of 9 columns×1 row in the payload 423; a POH 404 composed of 9 columns×1 row in the payload 410 is multiplexed into a POH 417 composed of 9 columns×1 row in the payload 423; a POH 406 composed of 9 columns×1 row in the STS-1 payload 411 is multiplexed into a POH 418 composed of 9 columns×1 row in the payload 423; and a POH 408 composed of 9 columns×1 row in the STS-1 payload 412 is multiplexed into a POH 419 composed of 9 columns×1 row in the payload 423.
The structure of ATM cells for one period upon structured data transfer is shown in FIG. 6. FIG. 6 shows the structure of an ATM cell where it includes an ATM header 501 composed of 5 bytes, an SAR-PDU (Segmentation And Reassembly-Protocol Data Unit) header 502 composed of 1 byte, a structured pointer 503 composed of 1 byte, and a payload 504 formed from 46 bytes.
FIG. 6 illustrates that eight ATM cells each formed from an ATM header 501 composed of 5 bytes, an SAR-PDU header 502 composed of 1 byte and a payload 505 composed of 47 bytes are transferred as ATM cells for one period by structured data transfer.
The ATM header 501 are composed of totaling 5 bytes including a VPI (Virtual Path Identifier) composed of 12 bits, a VCI (Virtual Channel Identifier) composed of 16 bits, a PT (Payload Type) composed of 3 bits, a CLP (Cell Loss Priority) composed of 1 bit and an HEC (Header Error Control) composed of 8 bits.
The SAR-PDU header 502 is formed from an SN (Sequence Number) 506 composed of 4 bits, and an SNP (Sequence Number Protection) 507 composed of 4 bits. The SN values in the SAR-PDUs of the 53 bytes×8 ATM cells are allocated in order of 0, 1, 2, 3, 4, 5, 6, 7.
The structured pointer 503 is included in an ATM cell whose SN value represents one of 0, 2, 4 and 6 (even-numbered bytes) and indicates the top of the STS-N frame. It is to be noted that the structured pointer 503 is allocated only to one place in the eight ATM cells in the 53 bytes×8 ATM cells.
From the foregoing, the circuit emulation apparatus cellularizes, for example, an STS-3 frame formed by multiplexing three STS-1 frames formed from different channels in accordance with the cell format of FIG. 6 as illustrated in FIG. 5 or multiplexes three different STS-1 frames assembled from ATM cells shown in FIG. 5 into an STS-3 frame.
It is to be noted that the circuit emulation apparatus can similarly cellularize an STS-(N×M) frame (except the RSOH and the MSOH: in the following expression, the RSOH and the MSOH are excepted from an STS-(N×M) frame) formed by multiplexing M (M is an any integer) STS-N (N is any integer) frames (except the RSOH and the MSOH: in the following expression, the RSOH and the MSOH are excepted from an STS-N frame) formed from different channels into ATM cells in accordance with the cell format of FIG. 6 or an multiplex M different STS-N frames assembled from ATM cells into an STS-(N×M) frame.
Now, a multiplexing method by the circuit emulation described above is described.
FIG. 7 illustrates a multiplexed structure (when a frame of an abnormal length is generated) of an STS-3 frame from three STS-1 frames. Particularly, FIG. 7 illustrates multiplexing of different channel data of an STS-1 frame (#1) 601, another STS-1 frame (#2) 602 and a further STS-1 frame (#3) 603 into an STS-3 frame 604.
For example, referring to FIG. 7, when the circuit emulation apparatus multiplexes three STS-1 frames into an STS-3 frame, if the frame length of the Nth frame of the STS-1 frame (#1) 601 is abnormal and the circuit emulation apparatus detects the abnormal length frame, then the payload in the N+1th frame of the STS-1 frame (#1) 601 is allocated to an AU-pointer 605. In this instance, the AU-pointer value which originally is in the AU-pointer 605 is allocated to a payload 606 in the N+1th frame.
To eliminate this, a method is available wherein, when an abnormal length frame is detected by a segmentation section in a circuit emulation apparatus, the frame of the abnormal length is converted as it is into an ATM cell and a reassembly section in the circuit emulation apparatus inserts dummy data using a buffer to compensate for the frame length.
However, mere insertion of dummy data gives rise to the following problem.
In particular, it is assumed here that, when an STS-3 frame formed by multiplexing three STS-1 frames formed from different channels is cellularized into ATM cells or three different STS-1 frames assembled from ATM cells are multiplexed into an STS-3 frame, a frame of an abnormal length is inputted to a segmentation section in a circuit emulation apparatus.
In this instance, if the abnormal length frame is cellularized as it is into ATM cells and the ATM cells are inputted from an ATM switch to a reassembly buffer, then since no drop or loss of data of the frame occurs between the segmentation section to the reassembly section although the frame length is abnormal, if the reassembly section inserts dummy data in order to compensate for the frame length, then the amount of data stored into the reassembly buffer increases.
Therefore, if a frame of a similar abnormal length appears by a plurality of numbers of times, then the stored amount in the reassembly buffer increases by an amount equal to the dummy data inserted, and finally, the reassembly buffer will suffer from an overflow.
A similar problem occurs also where an STS-(N×M) frame formed by multiplexing M STS-N frames formed from different channels is cellularized into ATM cells or M different STS-N frames assembled from ATM cells are multiplexed into an STS-(N×M) frame.
USPTO Backgrounds
USPTO Backgrounds