1. Field of the Invention
The present invention relates to a packaging method.
2. Description of Related Art
A packaging structure is disclosed in, for example, JP-11-8270-A (corresponding to WO98/58409). In this structure, a substrate and a semiconductor device are placed in such a manner that one side of the substrate and one side of the semiconductor device are opposed to each other. Furthermore, a primary bump formed on a surface of a pad on the one side of the substrate, and a secondary bump formed on the one side of the semiconductor device, are ultrasonically bonded together. The primary bump and the secondary bump include gold as a main component thereof, and the pad includes aluminum as a main component thereof.
In the course of the ultrasonic bonding, ultrasonic energy is applied to the substrate underneath the pad. Therefore, to prevent damage to the substrate, a conventional packaging method by means of the ultrasonic bonding includes controlling ultrasonic bonding conditions such as amplitude, a load, oscillation time, and temperature.
However, when the substrate is friable, the range of ultrasonic bonding conditions under which the damage is prevented is narrowed down. Hence, a bonding method having the broader range of ultrasonic bonding conditions is demanded.
A certain semiconductor substrate, for example, a silicon IC substrate may be employed for the substrate underneath the pad having aluminum as a main component thereof. Such a substrate includes a friable insulating layer, which is made of a silicon oxide-insulating layer such as a dielectric interlayer. In the above case, particularly, the range of ultrasonic bonding conditions under which the damage is prevented becomes extremely narrow, and thus the substrate is difficult to be put to practical use.
In order to address such difficulty, the inventors of the present application have produced a substrate 10 experimentally shown in FIG. 8. The substrate 10 is an IC substrate that includes a silicon semiconductor substrate. At one side of the substrate 10, an insulating layer 12, which is made of, for example, a silicon dioxide film or the like, is formed. Furthermore, pads 13 are formed on the insulating layer 12.
On a surface of each pad 13, a primary bump 31 that includes gold as a main component thereof is formed respectively, by means of, for example, plating, a wire bonding method, or the like. A reinforcing layer 200 that includes a Ni—Au plating or the like is positioned between the pad 13 and the primary bump 31. Through the intervention of the reinforcing layer 200, a load imposed during the ultrasonic bonding on a material underneath the pad 13 can be mitigated, and accordingly, damage to the material underneath the pad 13, for example, to the insulating layer 12 or the like, can be reduced.
Nevertheless, the intervention of the reinforcing layer 200 entails, for example, a process whereby the reinforcing layer 200 is formed, which may lead to an increase in the number of processes and in production costs.
USPTO Backgrounds
USPTO Backgrounds