Inspection systems are often utilized in production and/or testing of semi-conductor devices. An inspection system may include an illumination system configured to illuminate at least a portion of a semi-conductor wafer. The inspection system may scan for wafer defects or impurities by detecting illumination reflected from the illuminated portion of the wafer. In some instances, illumination delivered to the illuminated portion of the wafer may cause undesired thermal and/or photochemical damage to the wafer.
Reducing an energy level of illumination delivered to the illuminated portion of the wafer may mitigate thermal/photochemical damage. However, reducing the energy level of illumination delivered to the illuminated portion of the wafer may undesirably affect signal-to-noise ratio (SNR) of illumination detected by the inspection system, thereby limiting resolving power and/or accuracy of the inspection system. Accordingly, systems and methods of illumination energy management are desired to mitigate illumination-induced wafer damage while maintaining acceptable SNR of the inspection system.
USPTO Backgrounds
USPTO Backgrounds