1. Field
This disclosure relates generally to integrated circuits using substrates, and more specifically, to integrated circuits having vias through the substrate.
2. Related Art
Through-substrate vias (TSVs), also called through-silicon vias because the substrate is nearly always silicon in current semiconductor manufacturing, have provided increased functionality of integrated circuits. The TSVs, however, result in manufacturing challenges and have side effects. One of the side effects is that the stress induced by a TSV affects an area around the TSV and thus alters the performance of semiconductor devices near the TSV. A solution is to simply have a design rule that prohibits placing transistors, or other elements affected by stress, near a TSV. This reduces area available for transistors and the other elements affected by stress. The seriousness of the problem varies with how many TSVs there are and how much stress they induce.
Accordingly there is a need to provide further improvement in TSVs and methods therefor.
USPTO Backgrounds
USPTO Backgrounds