One differentiating feature of imaging sensors such as CCD and CMOS image sensors is the image quality generated under low light conditions. To produce a high quality image under low light conditions, imaging sensors generally need to eliminate as much noise as possible. One way to reduce noise is correlated double sampling (CDS). CDS generates a corrected pixel value by finding the difference between a raw integrated signal for an exposed pixel and a reset signal for the pixel. Subtracting the actual dark or reset output level of a pixel sensor from the actual light-induced signal of the pixel sensor effectively removes static fixed pattern noise and several types of temporal noise.
The subtraction of signals CDS can be done either in the analog or digital domain. Analog CDS generally requires large capacitors to sample and hold the reset voltage during the exposure time. These capacitors may be subject to leakage particularly for long exposure times. In contrast, digital CDS can store digital reset values in RAM, which is not subject to data degradation during the exposure time.
FIG. 1 illustrates an imaging system 100 that performs digital CDS by subtracting the reset signal from the raw image signal for a pixel after the separate signals have been converted to digital values. Imaging system 100 includes a CMOS image sensor array 110 including rows and column pixel sensors, a row control circuit 120, sample-and-hold circuits 130, column select circuitry 140, an analog-to-digital converter 150, a digital data path 160, a reset buffer 170, and a digital processor 180.
Row control circuit 120 can begin a digital CDS process in imaging sensor 100 by resetting a selected row of pixel sensors in CMOS sensor array 110. Sample-and-hold circuits 130 then immediately sample the reset voltages of the pixel sensors in the selected row. The reset voltages can then be sequentially converted to digital reset values, using column select circuit 140 to select individual sampled reset voltages and ADC 150 to convert the individual reset voltages into the digital reset values. The digital reset values can then be saved in buffer 170 for later use.
While the reset voltages are being converted to digital reset values, the selected row of pixel sensors discharge (or charge) the reset voltages at a rate that depends on the intensity of incident light on individual pixel sensors. At the end of an exposure time Texp, the pixel voltages, which were initially at the reset voltage levels, indicate the integrated light intensities over the exposure time Texp. Sample-and-hold circuits 130 then sample the integrated voltages of pixel sensors in the selected row, and column select circuit 140 and ADC 150 sequentially convert the integrated voltages to digital integrated values. Processor 180 can then determine the difference between the digital reset values in reset buffer 170 and the just determined the digital integrated values.
Some potential drawbacks of digital CDS are frame rate reduction and timing changes during imaging. For each frame of corrected pixel data, separate output of digital integrated values and reset values doubles the data to flow through the analog channel (e.g., through ADC 150 in FIG. 1) when compared to imaging without digital CDS. In a worst case, serial output of twice the data can nearly double the time required to capture an image or frame.
FIG. 2A illustrates the timing of an imaging process 200 without digital CDS. For imaging process 200, a first row of pixel sensors is reset at time T0 and begins integration of the incident light intensities on the pixel sensors. The integrated voltages for the first row are sampled at a time T0+Texp, where Texp is the exposure time, and a conversion and output process for the sampled integrated voltages for the first row of pixel sensors can commence. The integration process for the next row can begin at a time T1 that is selected so that integration for the row finishes when output of pixel values for the preceding row is complete. Accordingly, output of pixel values for the next row starts immediately after output of pixel values for the preceding row is complete. The total time Ttot required to output a frame of pixel data using the process of FIG. 2A is thus given by Equation (1) where Texp is the exposure time, Tout is the time required to output a row of digital data, and Nrow is the number of rows in the image sensor.Ttot=Texp+Nrow*Tout  (1)
A conventional imaging device generally cannot implement the timing of FIG. 1 if the imaging device performs digital CDS. FIG. 2B illustrates the effect of resetting each row at times T0, T1, and T2 that are the same described for FIG. 2A. In particular, reset times T1, T2, . . . are selected to provide uninterrupted output of sample data from successive rows. Sampling and output of reset data begins when each row is reset, e.g., at times T0, T1 . . . , and sample and output of integrated data occurs after the passage of exposure time Texp, e.g., at times T0 Texp, T1+exp, . . . A conflict arises if the output of reset values overlaps the output of integrated values. Accordingly, output of digital reset values cannot be added to process 210 unless the exposure time is long enough that all reset values can be output before exposure of the first row is complete (i.e., Texp>Tout*(Nrow+1)).
The timing of the imaging process for the conventional imaging device 100 must be altered to prevent output of reset data from conflicting with the output of raw pixel data. The alterations generally increase time required from output of data representing an image. In particular, the time required for an imaging process for a frame using digital CDS in imaging device 100 of FIG. 1, is greater than 2*Nrow*Tout and typically much greater than the time Texp+Nrow*Tout required for the imaging process 210 without digital CDS. Methods and systems that provide faster digital CDS processes and higher frame rates for shorter exposure times are thus desired.
USPTO Backgrounds
USPTO Backgrounds