In a solid-state imaging device including a plurality of pixels arrayed in a form of a plurality of rows and a plurality of columns, AD conversion circuits of a single slope type are provided to respective columns, so that the AD conversion circuits perform AD conversion of analog signals from the pixels of the respective columns and thereby generate digital signals. Each of the AD conversion circuits coverts the level of a pixel analog signal into time by comparing a ramp-like slope voltage with the pixel analog signal, and counts this time by use of a counter circuit (pixel count). Consequently, the pixel analog signal is converted into a digital value. At this time, in order to improve the performance of the AD conversion circuit, it is desirable to reduce the time necessary for counting the level of an analog signal (pixel count).
USPTO Backgrounds
USPTO Backgrounds