In the semiconductor components that have been disclosed to date, based on Si substrates, it is predominantly copper interconnects that are responsible for the electrical contact-connection of the individual functional layers or functional elements of a level and also between the levels. A particular problem that has emerged with the use of copper interconnects is that Cu atoms can diffuse into the surrounding dielectric and can, therefore, alter the electrical properties of the semiconductor component, even to the extent of rendering it unable to function.
Of course, other substrates, such as glass, GaAs, InP, circuit boards, printed wiring boards, etc., can also be considered as substrates in addition to Si substrates.
To prevent Cu atoms from diffusing into the dielectric, it is customary to use diffusion barriers, which are introduced at the side walls of the Cu interconnects, i.e., are introduced between the Cu interconnect and the surrounding dielectric (SiO2) and consist, for example, of Ta(N). The term Ta(N) used below is in the present context to be understood as meaning a compound with any desired stoichiometry comprising tantalum and any desired proportion of nitrogen. This ensures sufficient protection against diffusion.
However, since the copper layer is uncovered at the top following the patterning of the copper interconnects by means of the standard CMP (chemical mechanical polishing) processing, this copper layer has to be passivated in order to prevent any oxidation. This is achieved by the uncovered interconnect surface (Cu layer) being provided with a suitable dielectric layer, e.g., SiN-PECVD layer.
However, drawbacks of this interface are the weak point in terms of electromigration and stress migration, and the fact that the bonding is less than optimum. By way of example, selective deposition of cobalt on the uncovered metal surfaces by means of electroless electrolysis processes has been attempted with a view to achieving an improvement in this respect, but this has not to date led to the desired level of success.
USPTO Backgrounds
USPTO Backgrounds