Packaged electronic devices, such as integrated circuit devices encapsulated in a ball grid array package, often are surface mounted on a printed circuit board (PCB) to define an electronic assembly. In such a configuration, a plurality of electrical conductors, such as a plurality of solder balls, can be utilized to electrically and physically interconnect the packaged electronic device and the PCB. Historically, the electrical conductors have been the primary mechanism by which the packaged electronic device is affixed to the PCB.
More recently, it has become common to surface mount larger packaged electronic devices, such as those with a footprint of 6 mm by 6 mm or greater, on a PCB. In addition, and subsequent to surface mounting on the PCB, these larger packaged electronic devices often are expected to withstand hundreds, or even thousands, of thermal cycles that can extend across a temperature range of 150 degrees Celsius, or more. In such situations, the thermal stresses induced in the plurality of electrical conductors can lead to failure of one or more of the electrical conductors, rendering the electronic assembly nonfunctional.
To decrease the stress that is applied to the electrical conductors, an underfill dielectric layer can be utilized. The underfill dielectric layer can extend between the packaged electronic device and the PCB, can encapsulate the electrical conductors, or can adhere the packaged electronic device to the PCB. Thus, the underfill dielectric layer can support a portion of the thermal stresses induced by the thermal cycles, thereby improving the durability of the electronic assembly.
In practice, a wide range of different underfill layers are utilized, and these underfill layers have differing electrical properties. As an example, a dielectric constant of the underfill layers can vary between approximately 2 and 4. This variation in the electrical properties of the underfill layers can have undesired impacts on the performance of the electronic assembly. As an example, the electrical performance of receive and transmit channels within the packaged electronic device can be de-tuned, which can lead to poor signal transfer between the packaged electronic device and the PCB.
USPTO Backgrounds
USPTO Backgrounds