1. Field of the Invention
The present invention relates generally to the reduction or elimination of “cross-talk” between semiconductor device signal traces by interposing a grounding element between the signal traces. More particularly, the present invention relates to interposing a grounding element between printed circuit board traces and vias to minimize or eliminate mutual coupling between signal conductors.
2. State of the Art
Cross-talk between two adjacent conductive signal traces is a result of electrostatic and electromagnetic coupling between the conductive traces. Electrostatic and electromagnetic coupling is related to the impedance of a signal trace such that as mutual coupling increases, impedance increases. Cross-talk between signal traces is undesirable because it may cause signal delays and interference with signals transmitted through the signal traces. The primary factors affecting cross-talk include the surface area of the signal trace directed to an adjacent signal trace, the distance between the signal traces and the dielectric constant (∈r) of the material between the signal traces. Air has a dielectric constant of 1, while printed circuit board resin conventionally has a dielectric constant of between 3 and 4. In general, coupling and cross-talk between two adjacent conductive signal traces increases as the facing surface areas of the traces increase, as the dielectric constant of the material between the signal traces increases, and as the distance between the signal traces decreases.
With the continuous desire of manufacturing smaller semiconductor devices, the distances between signal traces have necessarily been reduced, and multiple-layer and specially fabricated semiconductor and printed circuit board materials have been used to compensate for the electromagnetic coupling caused by closer conductors. One approach to canceling the electromagnetic coupling of a bias source in an electronic device is disclosed in U.S. Pat. No. 4,349,848 to Ishii et al. (issued Sep. 14, 1982). Ishii et al. uses impedance cancellation methods to cancel mutual coupling between signal traces by placing bias currents having opposite phases in two separate signal traces running parallel to each other. In this way, the however, is not conducive to all signal traces, and is particularly not conducive to signal traces which do not run in parallel or do not carry complementary signals.
Another approach known in the art for reducing electromagnetic coupling between signal traces is to alternatively design printed circuit board or semiconductor materials which inherently reduce coupling. U.S. Pat. No. 5,785,789 to Gagnon et al. (issued Jul. 28, 1998) discloses multilayer circuit board structures comprising discrete, partially-cured, microsphere-filled resin layers. By specially fabricating circuit board layers, the dielectric constant of the printed circuit board is lowered, resulting in lower conductivity and coupling through the circuit board material. U.S. Pat. No. 3,990,102 to Okuhara et al. discloses a semiconductor integrated circuit comprising a dielectric isolation region and both a high resistivity layer and a low resistivity layer adjacent to monocrystalline regions to shield electrostatic coupling between circuit elements and prevent cross-talk. Specially designed and fabricated semiconductor and printed circuit board materials are conventionally, however, more expensive than standard materials.
Isolation of regions or signal traces using grounding and capacitive planes have also been used to reduce electromagnetic coupling. One approach to reducing cross-talk, as illustrated in FIG. 1, is to use a ground plane 2 on a substrate 4 to couple cross-talk 6 from a signal trace 8 to ground. Through the use of a ground plane 2, the signal traces 8 may be placed closer together than without the ground plane 2. A similar approach, shown in FIG. 2, is to use a ground plane 2 and a relatively thinner substrate 10. By using a thinner substrate 10, the signal traces 8 are placed closer to the ground plane 2 and, as a result, may then be placed closer to each other. Thus, everything else being equal, placing the ground plane 2 closer to the signal traces 8 decreases coupling and impedance, and allows for closer spacing of signal traces 8, as shown in FIG. 2.
U.S. Pat. No. 5,451,917 to Yamamoto et al. (issued Sep. 19, 1995) discloses a high frequency circuit shielded from external interference through a series of grounding and capacitive layers surrounding dielectric circuit layers. U.S. Pat. No. 5,371,653 to Kametani et al. (issued Dec. 6, 1994) discloses a multilayer circuit board comprising grounding layers above and below each layer of signal traces, each grounding layer being separated from the signal traces by insulative layers and further being thermally coupled to conductive grounding pins to release heat from the internal layers of the structure. U.S. Pat. No. 4,626,889 to Yamamoto et al. (issued Dec. 2, 1986) discloses several configurations of signal trace conductors and conductor layers in a printed circuit board, the printed circuit board also having grounded layers above and below the configurations of signal trace conductors, separated from the signal trace conductors by insulative layers. U.S. Pat. No. 5,945,886 to Millar (issued Aug. 31, 1999) also discloses a multilayer printed circuit board structure having a signal bus comprising straight signal traces of equal electrical length extending on a first layer of a printed circuit board and returning on a second layer of the printed circuit board. The first and second signal trace layers of the printed circuit board each have a distinct, adjacent ground plane. Coupled to each of the ground planes, Millar discloses additional straight signal traces parallel to, and of length equal to, the other signal traces. The additional signal traces are placed within a signal layer of the circuit board, in between the other parallel signal traces. The outer layers of the multilayer structures disclosed by Millar include circuit traces. Similar to specially designed substrate layers, however, the more layers which are included on a substrate, the more expensive the substrate is to fabricate.
Therefore, it is desirable to have a substrate design which reduces or eliminates cross-talk in a variety of signal trace configurations, yet does not require expensive specialty substrate layers and designs, or extensive multiple layer systems used in the prior art.
USPTO Backgrounds
USPTO Backgrounds