1. Technical Field of the Invention
The present invention relates to power electronics and, more particularly to a single stage single switch power factor correction circuit with reduced voltage stress.
2. Description of Related Art
A conventional method of solving the problem of harmonic current in a power supply is the power factor correction (PFC) circuit. For example, input AC power is rectified by a bridge-type rectifier device and input to a PFC circuit for power correction, then converted by a voltage converter for outputting to a load.
In this single-stage approach, input current shaping and isolation are performed in a single step. Further, this single stage is implemented with only one controlled semiconductor switch. These single-stage single-switch circuits integrate a step-up inductor and an energy storage capacitor. When the single switch is switched on, the electric current flow through the inductor to a first transformer coil for providing energy to a secondary coil of a DC voltage transformer and storing energy in the inductor. When the switch is switched off, the energy stored in the inductor is delivered to the energy storage capacitor.
The voltage on the bus or boost capacitor varies with the inputted AC power. Therefore, if the AC power is a wide-range AC input and the load has wide variations, then the voltage on the capacitor will vary enormously depending on the design thereof. In order to endure high voltage and have a sufficient capacitance for decreasing the variation in the output voltage, a capacitor with higher capacitance and higher voltage rating is required. However, this type of capacitor is very expensive and bulky. Because of this problem, currently used single-stage single-switch PFC circuits generally suffer from excessive voltage stress on their energy storage capacitor which limits their use and drives up cost.
One approach to this problem includes the addition of a xe2x80x9cfeedbackxe2x80x9d winding to reduce the voltage stress as described in, xe2x80x9cSingle Stage, Single Switch Input Current Shaping Technique with Reduced Switching Lossxe2x80x9d by Laszlo Huber and Milan Jovanovic, IEEE Volume 15, No.4, July 2000. With this feedback winding approach, two additional primary windings are employed to keep the voltage of the energy-storage capacitor below a desired level in the entire line and load ranges (e.g., 400 V at the universal line range of 90-264 Vrms). However, this feedback approach has shortcomings which leads to increased cost and increased complexity of the converter.
The present invention achieves technical advantages as method and apparatus for reducing the voltage stress in a single-stage single-switch (SSSS) converter by modulating the predetermined operating frequency of the converter lower responsive to increasing voltage stress. A control circuit and associated cooperable frequency setting capacitance (CT) and resistance (RT) are coupled to the primary circuit and the secondary circuit of the SSSS converter via a switch. A frequency foldback device is coupled to CT or RT and cooperable therewith to lower bus voltage stress by modulating the frequency of the switch. The operating frequency is modulated (i.e. reduced) from the predetermined operating frequency upon detection of voltage threshold transition.
USPTO Backgrounds
USPTO Backgrounds