1. Field
This disclosure relates to ferroelectric memory devices, more particularly methods to link multiple ferroelectric memory devices together for memory operations.
2. Background
Most commonly used memory devices have inorganic semiconductor materials such as silicon as the basis of their architectures. These memories are typically addressed in a matrix fashion, with the memory cells or locations laid out in an x-y grid. Each intersection point of the x-y grid is manufactured to contain a memory cell, making addressing of each cell more convenient and organized. This is true for many types of memories with which most users are familiar, including volatile and non-volatile memories.
However, one disadvantage of the silicon or other inorganic materials is that they require an individual electronic circuit for each memory cell. This raises the complexity of the manufacturing process, as the desire for higher density memory requires smaller components for that circuit. The raise in complexity has an accompanying raise in the cost of manufacturing the memories.
Organic materials provide a solution to this problem. Organic memory devices, sometimes also referred to as passive organic memory devices, generally have an organic layers such as polymers sandwiched between arrays of electrodes. Controlling the voltages between the two electrodes on either side of a particular location in the organic layer can temporarily alter the properties of the layer. The alteration of the properties can then be manipulated to store data. Generally, the organic material, the electrodes and their addressing lines will be referred to as a polymer ferroelectric memory array, or a ferroelectric memory array.
These polymer ferroelectric memory arrays are considered to be passive arrays. They do not have an individual electronic circuit for each location. They do not typically have transistors or capacitors as part of each memory cell as is commonly used in dynamic random access memory (DRAM). They are therefore simpler and easier to manufacture. However, currently these memory arrays have slower access times. Techniques may be developed that allow for faster access, making the polymer ferroelectric memory arrays a more competitive solution for main memory applications.
USPTO Backgrounds
USPTO Backgrounds