During the design of packaging for semiconductor chips, various aspects such as heat dissipation and electrical performance must be considered. Devices such as power metal oxide semiconductor field effect transistors (MOSFETs) are susceptible to overheating during device operation due to high current cycling.
To reduce the impact of high thermal output during operation, dual heat dissipating package (i.e. “dual cool”) assemblies have been developed. These packages can include a thermally and electrically conductive leadframe subassembly which connects to a source and gate side of the power MOSFET, and a thermally and electrically conductive bridge or clip which connects to a drain side of the power MOSFET. Portions of the leadframe and clip can remain exposed subsequent to an encapsulation process, and thereby function as heat sinks to route heat away from the functioning chip. Additionally, a the leadframe can provide output leads for the gate region, and the drain-side clip or bridge, or another conductive structure connected to the bridge or clip, can provide output leads for the drain.
Some conventional dual cool packages have the drain oriented on the top side of the package facing away from a printed circuit board (or other receiving substrate) for dissipating heat to ambient air. The formation of these devices includes the use of flip chip mounting of the semiconductor die to the leadframe. During this process, a plurality of conventional leadframes are connected in a matrix, and each semiconductor die from a singularized semiconductor wafer is removed from a wafer carrier assembly in turn, and attached to a die pad of the leadframe using a flip chip process. During the process, the die is inverted in flip chip fashion and the source region and gate region are mechanically and electrically connected to the die pad, for example using an infrared alignment system to align the die with the leadframe. Next, an individual clip or bridge is attached to the drain of the die and, depending on the device design, to other conductive structures. The bridge or clip is pre-formed (bent) to route leads to the source side of the device, or to facilitate connection with another conductive structure which will provide output leads from the drain region. A stamping process or a punch process can be used to bend or form the bridge or clip.
During the manufacture of each power MOSFET semiconductor wafer, the plurality of dice are manufactured in a source-up position. During die attach, the flip chip process requires each individual die to be removed from the wafer carrier, and then inverted for attachment to a die pad of the leadframe. The chip can be aligned with the leadframe using an infrared alignment system to position the die relative to the leadframe. Subsequently, each clip or bridge is individually handled and attached one by one to the drain sides of the dice. Conductive die attach adhesive which connects the source region and gate region to the leadframe, and which attaches the drain region to the bridge or clip, is then cured. The dice, leadframe, and clips or bridges are then encapsulated in an epoxy resin material or otherwise packaged, then separated using a singularizing process. During encapsulation, a portion of the leadframe and clip or bridge remains exposed to provide dual heat sinks, at least one for the source side and one for the drain side.
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