The fabrication of conventional storage media including non-volatile memory devices, faces many challenges as storage density increases and individual memory storage cell size decreases. Magnetic random access memory (MRAM) devices have several attractive features. Unlike conventional random access memory chip technologies, data in MRAM devices is not stored as electric charge or current flows, but rather by magnetic storage elements. Moreover, unlike dynamic random access memory, MRAM devices are all non-volatile and do not require refreshing to preserve the memory state of a cell.
An MRAM device may include storage elements formed from two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates may be a permanent magnet set to a particular polarity and the other plate may have a field that can be changed to match that of an external field to store memory. This configuration is known as a “spin valve” and is the simplest structure for an MRAM bit cell. A memory device may be built from a grid of such “cells”, such as a two dimensional array.
A recent variant of MRAM is a spin-transfer torque random-access memory, or STT-RAM which has the advantages of lower power consumption and better scalability over conventional magnetoresistive random access memory, which utilizes magnetic fields to flip the active elements. Spin-transfer torque is where the orientation of a magnetic layer in a magnetic tunnel junction or spin valve can be modified using a spin-polarized current. The effects are usually most evident in nanometer scale devices. Accordingly, as device sizes of non-volatile memories scale to sub 100 nm dimensions, the use of STT-MRAM technology becomes more attractive.
Patterning of MRAM devices such as STT-MRAM may take place by defining a patterned mask formed on top of a stack of layers that contains at least two magnetic layers separated by an insulating layer. The patterned mask typically contains isolated mask features that expose regions of the substrate that lie between the mask features, which exposed regions are subsequently etched away through the stack of layers that constitute a memory device. After etching, isolated islands or pillars remain, which constitute individual memory bits. However, although direct etching has been adopted to define such memory devices, typical materials used in the stack of layers are difficult to etch. Moreover, after etching, the empty regions between the memory bits are filled with dielectric. Because the memory bit performance is extremely sensitive to the condition of the sidewall of the island, great care must be taken to clean and passivate the island sidewalls before the dielectric fill process is performed. It is with respect to these and other considerations that the present improvements have been needed.
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