1. Field of the Invention
The present invention relates to a semiconductor device, having a CMOS (Complementary Metal Oxide Semiconductor) structure, and a method for manufacturing the same.
2. Description of Related Art
A structure, having a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) formed on a semiconductor substrate and having a so-called high stress nitride film formed on the semiconductor substrate to apply stress to a channel region of the MOSFET, has been known from before. An ON current of the MOSFET can be increased by this structure.
An NMOSFET (N channel MOSFET) and a PMOSFET (P channel MOSFET) differ in the type of stress to be applied to the channel region to increase the ON current. That is, with an NMOSFET, the ON current can be increased by applying a tensile stress to the channel region and thereby improving an electron mobility in the channel region. Meanwhile with a PMOSFET, the ON current can be increased by applying a compressive stress to the channel region and thereby improving a hole mobility in the channel region.
When in a chip on which a CMOS circuit is mounted, a high stress nitride film for applying a tensile stress to a channel region (hereinafter referred to as a “tensile stress film”) is formed on a semiconductor substrate, a tensile stress can be applied to the channel region of an NMOSFET. Consequently, the ON current of the NMOSFET can be increased. However, because a tensile stress is also applied to the channel region of a PMOSFET, the hole mobility decreases in the PMOSFET channel region and the ON current of the PMOSFET decreases. Oppositely, when a high stress nitride film for applying a compressive stress to a channel region (hereinafter referred to as a “compressive stress film”) is formed on a semiconductor substrate, a compressive stress can be applied to the channel region of the PMOSFET. Consequently, the ON current of the PMOSFET can be increased. However, because a compressive stress is also applied to the channel region of the NMOSFET, the ON current of the NMOSFET decreases.
Thus, in a case where an NMOSFET and a PMOSFET are mixedly mounted on a semiconductor substrate, for example, forming of a tensile stress film on the semiconductor substrate followed by selective removal of the tensile stress film from a region in which the PMOSFET is formed and leaving of the tensile stress film on a region in which the NMOSFET is formed may be considered. Because the tensile stress can thereby be applied only to the channel region of the NMOSFET, the ON current of the NMOSFET can be increased while preventing decrease in the ON current of the PMOSFET. Further, forming of a compressive stress film on the semiconductor substrate followed by selective removal of the compressive stress film from the region in which the NMOSFET is formed and leaving of the compressive stress film on the region in which the PMOSFET is formed may be considered. Because the compressive stress can thereby be applied only to the channel region of the PMOSFET, the ON current of the PMOSFET can be increased while preventing decrease in the ON current of the NMOSFET.
A high stress nitride film is used as an etching stopper film in an etching step for forming a contact hole in an interlayer insulating film laminated on a semiconductor substrate (on the high stress nitride film). Thus, when a high stress nitride film is selectively removed, a low stress nitride film must be selectively formed anew as an etching stopper film in the film-removed region. Selective formation of the low stress nitride film is accomplished, for example, by forming the low stress nitride film on an entirety of the semiconductor substrate and employing photolithography or etching to selectively remove the low stress nitride film from regions where a tensile stress film or a compressive stress film remains. However, such selective removal of the high stress nitride film and selective formation of the low stress film leads to a significant increase in a number of manufacturing steps.
USPTO Backgrounds
USPTO Backgrounds