Switchmode DC-DC power converters are commonly used in electronic devices. They operate by converting the voltage of an available voltage source to a voltage that complies with the voltage requirements of one or more components of the device. More particularly, switchmode DC-DC power converters operate to convert a direct current (DC) input voltage to a DC output voltage that is higher (boost converter) or lower (buck converter) than the DC input voltage. A common application of a buck converter is the conversion of an available voltage source in a personal computer (PC) to a voltage compatible with the voltage source requirements of devices and integrated circuits (e.g. the central processing unit (CPU)) on the motherboard of the PC.
A conventional DC-DC buck converter 10 is shown in FIG. 1. A first Silicon-based n-channel metal-oxide-semiconductor field effect transistor (MOSFET) 12, commonly referred to as the “high-side switch” of the converter 10 is coupled to a second Silicon-based MOSFET 14, which is referred to as the “low-side switch”. Together, high-side switch 12 and low-side switch 14 control current flow through an inductor 16. During a charging phase of operation of converter 10, a controller 18 maintains high-side switch 12 in an ON condition and maintains low-side switch 14 in an OFF condition, thereby coupling a DC input voltage, VIN, to inductor 16. This charging phase energizes inductor 16, which stores energy in its magnetic field. Following the charging phase, converter 10 enters a discharging phase, during which time controller 18 maintains high-side switch 12 in an OFF condition and maintains low-side switch 14 in an ON condition, thereby decoupling VIN from inductor 16. During this discharging phase inductor 16 operates as a current source, supplying current from the energy stored in its magnetic field into capacitor 22 and load 24. Schottky diode 20 clamps any negative voltage from inductor 16 that may occur between the turn-OFF of switch 12 and the turn-ON of switch 14.
During the charging and discharging phases of operation of converter 10, current through inductor 16 rises and falls linearly, resulting in a triangular-shaped current signal. Capacitor 22 filters the inductor current so that the output voltage, VOUT, of converter 10 is essentially DC. It can be shown that the average value of VOUT over time is equal to the product of the duty cycle, D, of the high-side switch switching period and the value of VIN. By way of a feedback loop 26, VOUT is fed back to controller 18, which dynamically compares VOUT to a reference voltage VREF and modifies D depending on whether the value of VOUT is higher than the desired output voltage level or lower than the desired output voltage level.
In addition to switchmode power converters being of widespread use in the PC market, they are also prevalent in the wireless device industry. In this technology sector, switchmode power converters are used to not only provide efficient conversion for powering the baseband portion of the wireless device, but are also used to improve the efficiency of the power amplifier (PA) of the radio frequency (RF) transmitter portion of the wireless device. (The PA is usually the dominant power consumer of a wireless device.)
The PA of a wireless device is designed so that the battery voltage supplied is large enough to permit maximum linear output voltage swing for the largest RF signal present at the PA RF input. However, because smaller RF input levels (i.e. lower PA drive levels) require less DC power for the same gain, the PA becomes inefficient at lower drive levels. To improve efficiency at lower drive levels, a dynamic control technique known as “envelope tracking” has been developed. According to this technique, the envelope of the PA RF input signal is tracked and used to regulate the battery voltage into a dynamically variable voltage source. The envelope tracking technique thereby improves PA efficiency. When applied to a conventional linear amplifier this technique tends to degrade linearity, as it varies the bias of the active devices. However, when applied to polar transmitters there is no sacrifice of linear performance, and the desired efficiency improvement is more readily realized.
Accurate envelope tracking requires that the switching frequency of the switchmode DC-DC power converter be about 20 to 50 times higher than the required signal envelope bandwidth. For a signal such as EDGE (Enhanced Data GSM (Global System for Mobile Communications) Environment) this envelope bandwidth is 1 MHz, whereas for UMTS (Universal Mobile Telecommunications System) this envelope bandwidth expands to 10 MHz. For EDGE, this means that the DC-DC power converter must switch at a 20-50 MHz rate. This switching frequency requirement increases to 200-500 MHz for UMTS application. Unfortunately, most DC-DC power converters operate with a switching frequency below 1 MHz, and a 2 MHz switching frequency is considered to be extremely high. To meet this efficiency need, therefore, there is a need to increase the switching frequency of DC-DC converters by a factor of about 20 to 200.
To evaluate the applicability of a variety of transistor types to the high-speed, high-current applications described above, a figure-of-merit (FoM) defined by the product of the transistor switch on-resistance RDSon and the average input capacitance CGS of the transistor (defined as the ratio of the gate-charge QG required to turn on the FET to the gate-source voltage VGS required to set up the controlling electric field, so that here CGS=QG/VGS) may be used. This FoM has units of time and may be expressed as τFET=RDSon CGS. The validity of this approach is seen in FIG. 2, which plots several combinations of gate-charge and the corresponding channel resistance achieved for Silicon MOSFETs available commercially. The best-fit τFET model is drawn among the points as a continuous curve. Different values of τFET are needed for the PMOS and NMOS devices, which in this instance are 580 nanoseconds (ns) and 80 ns, respectively. It is also found that different manufacturers have slightly different values of τFET for their competitive devices, which demonstrates another intention for this FoM in that it should allow comparison of devices across process types.
Since the conducting channel of a FET is controlled by the electric field between the gate and source terminals, the turning ON and OFF of this conducting channel depends on repeatedly moving this gate-charge into and out of the transistor. The value of the gate current required, to move this charge depends on the amount of time allowed to move the charge. Clearly, to achieve high operating speed it is strongly desired to have a minimum amount of gate-charge necessary to control the channel. Assuming that no more than 40% of the operating time is spent in switching transitions (a very generous assumption) then it is possible to determine practical maximum values for τFET, depending on the desired operating frequency fCLK. This determination is presented in FIG. 3. Commonly available values of τFET for modem Silicon MOSFET switching transistors range between 0.025 and 0.09 ns. As FIG. 3 shows, these values limit the operating frequency of the Silicon MOSFET switching transistor (using CMOS driver circuitry) to under 1 MHz. To exceed this operating frequency it is necessary to use bipolar-based drive circuitry, a technique that is widely used in industry today. This is undesirable from both cost and integration compatibility points of view. It is strongly desired to design using only CMOS technology for cost reasons. Any use of bipolar transistors on a chip forces the use of a more expensive process. For most DC-DC switching converters the power switch transistors are external already, so process compatibility with these huge transistors is not an issue anyway. How to control and drive these huge transistors is an extremely important issue.
An alternative figure of merit, called FET-FOM, can be considered which emphasizes the joint desirability of low switch on-resistance RDSon, low gate-charge (QG), and low gate-source voltage (VGS). This is defined as the product of these three parameters: FET-FOM=RDSon QG VGS. To compare various devices of different technologies, this alternative method has merit in that when gate-charge and gate-source voltage scale down together, the value of τFET will not change but the value of FET-FOM will fall on the fact that both parameters are now lower.
To realize the desired efficiency improvements discussed above, the switching transistors of the DC-DC power converter must be capable of switching ampere-scale currents within a small fraction of the period of switching frequency. For example, to use a switching frequency of 100 MHz, the transistors must switch the supply currents ON or OFF in typically under one nanosecond. These requirements demand that the driving circuitry in the controller of the converter be robust enough to translate the low-level CMOS logic outputs of the controller 18 into drive signals capable of driving switching transistors 12 and 14. Due to the large gate capacitances of the switching transistors 12 and 14, however, the required size of the drivers could be prohibitively large and in many instances, irrespective of size, simply unable to transfer the gate charge QG fast enough to switch the switching transistors at the desired speed. This driver problem, in addition to the limits on the achievable τFETS of Silicon-based switching devices, renders the conventional converter 10 in FIG. 1 of no practical use for many applications including, for instance, use in the envelope tracking wireless device application described above.
There is prior art where GaAs technology is used to build the entire DC-DC converter, including GaAs device technology to drive the switching transistors of the converter. See, G. Hanington, A. Metzger, P. Asbeck and H. Finlay, “Integrated DC-DC Converter having GaAs HBT Technology”, Electronics Letters, vol. 35, pp. 2110-2112, 1999; M. Ranjan, K. H. Koo, C. Fallesen, G. Hanington and P. Asbeck, “Microwave Power Amplifiers with Digitally-Controlled Power Supply Voltage for High Efficiency and Linearity”, 2000 IEEE MIT-S International Microwave Symposium Digest, pp. 495, Jun. 2000; S. Ajram, R. Kozlowski, H. Fawaz, D. Vandermoere and G. Salmer, “A fully GaAs-based 100 MHz, 2 W DC-to-DC Power Converter”, Proceedings of the 27th European Solid-State Device Research Conference, Stuttgart, Germany, 22-24 Sep. 1997. However, in addition to these prior art approaches using all-GaAs technology (e.g. GaAs MESFETs and/or HBTs), all of the prior art in which HBTs are employed is applicable to the boost (higher output voltage than input voltage) converter configuration only. That prior art is not applicable to the buck (lower output voltage than input voltage) converter configuration. HBT devices (or other bipolar devices) cannot be used for the shunt element (synchronous rectifier) because current flows in the reverse direction through these types of elements.
In summary, the gate-charge required by Silicon MOSFET transistors is simply too high to achieve the operating frequencies necessary to support EDGE, UMTS and other high-frequency envelope following DC-DC converter applications. It would be desirable, therefore, to find an alternative approach, which can both meet the desired operating frequencies and reduce the costs of driver circuitry by allowing standard CMOS technology to be used.
USPTO Backgrounds
USPTO Backgrounds