1. Field of the Invention
The present invention relates generally to field effect semiconductor devices, and more particularly, to a field effect semiconductor device having both low-noise operating characteristics and high-power operating characteristics.
2. Description of the Background Art
In recent years, as the demand for microwave communication systems such as satellite broadcasting and microwave communication have arisen, miniaturization of communication devices has been required. In the communication device in the microwave communication system, high-power operating characteristics are required at the time of transmission, while low-noise operating characteristics are required at the time of receiving.
As a conventional device used for such a communication device, a high electron mobility transistor (HEMT) which is one of field effect transistors (FETs) has been known. In the HEMT, however, good low-noise characteristics are obtained, while good high-power characteristics are not obtained.
As another conventional device, an FET having a highly doped channel has been known. In this device, superior high-power characteristics are obtained, while good low-noise characteristics are not obtained.
Therefore, a field effect semiconductor device having both low-noise operating characteristics and high-power operating characteristics has been recently developed, as described in TECHNICAL REPORT OF IEICE, ED93-175, NW93-132, ICD93-190 (1994-01), pp. 47-54 and IEEE ELECTRON DEVICE LETTERS, VOL. 14, NO. 7, pp. 354-356, July 1993, for example. The field effect semiconductor device is referred to as a two-mode channel FET (TMT) device.
FIG. 5 is a schematic cross sectional view showing the structure of a conventional TMT device. In FIG. 5, an undoped GaAs buffer layer 102, an undoped InGaAs channel layer (hereinafter referred to as a first low-noise drift layer) 103, and an undoped graded In.sub.x Ga.sub.1-x As channel layer (hereinafter referred to as a second low-noise drift layer) 104 are formed in that order on a GaAs substrate 101. The In composition ratio x in the second low-noise drift layer 104 is decreased in a graded manner from 0.2 to 0 upward from the side of the substrate 101.
An n-GaAs electron-supplying and channel layer (hereinafter referred to as a high-power drift layer) 105 and an n-AlGaAs barrier layer 106 having an Al composition ratio of 0.22 are formed in that order on the second low-noise drift layer 104. n-GaAs cap layers 107a and 107b are formed spaced apart from each other on the barrier layer 106. A gate electrode 108 in Schottky contact with the barrier layer 106 is formed on the barrier layer 106 exposed between the cap layers 107a and 107b and a source electrode 109 and a drain electrode 110 in ohmic contact with the cap layers 107a and 107b are respectively formed on the cap layers 107a and 107b.
In the TMT device, at a deep applied gate voltage (a gate-source voltage) V.sub.gs, the low-noise drift layers 103 and 104 become channels in an electron drift mode. In this case, electrons are well confined in quantum wells of the low-noise drift layers 103 and 104, whereby the electrons are hardly affected by impurities in the high-power drift layer 105 doped at a high density, thereby to obtain super-low-noise characteristics. On the other hand, at a shallow applied gate voltage V.sub.gs, the high-power drift layer 105 doped at a high density mainly becomes a channel in an electron drift mode, thereby to obtain high-power characteristics.
Furthermore, in the TMT device, the applied gate voltage V.sub.gs can be also so selected between the above described voltages that the low-noise drift layers 103 and 104 and the high-power drift layer 105 mainly become channels in an electron drift mode. In the case of a TMT device having an n-type high-power drift layer (an n-type channel), a shallow applied gate voltage V.sub.gs means such an applied gate voltage that a depletion region shrinks, while a deep applied gate voltage V.sub.gs means such an applied gate voltage V.sub.gs that a depletion region extends.
In order to further improve high frequency characteristics in the TMT device, the gate length L shown in FIG. 5 must be decreased to decrease gate capacitance. If the gate length L is set to not more than approximately 0.15 .mu.m, electrons drifting in the high-power drift layer 105 are controlled by the applied gate voltage V.sub.gs only in a narrow gate portion in a case where the applied gate voltage V.sub.gs is shallow (in the range in which high-power characteristics are obtained). On the other hand, larger overshoot of electron velocity occurs in the narrow gate portion in a case where the applied gate voltage V.sub.gs is deep (in the range in which low-noise characteristics are obtained). Therefore, the transconductance (gm) in the range in which the applied gate voltage V.sub.gs is shallow is lower than that in the range in which the applied gate voltage V.sub.gs is deep, whereby transconductance (gm)--applied gate voltage (V.sub.gs) characteristics are not flat (plateau shaped). The transconductance (gm) is the ratio of the change in a drain current to the change in the applied gate voltage, which represents the amplification degree of a signal.
If the gm--V.sub.gs characteristics are not plateau shaped, an output signal is made nonlinear with respect to an input signal in high-power operation of the TMT device, that is, an output signal is distorted. Therefore, if the TMT device is used for a digital handy phone, for example, noises are increased at the time of signal transmission.
In the conventional TMT device shown in FIG. 5, the n-AlGaAs barrier layer 106 having a high Schottky barrier height must be exposed between the cap layers 107a and 107b by the etching process so as to provide the gate electrode 108. The etching process damages the exposed n-AlGaAs barrier layer 106, thereby to make it difficult to produce the TMT device at low cost and with high yield.
If high conductive regions are provided by the ion implantation process and the anneal process beneath the source electrode 109 and the drain electrode 110 instead of providing the cap layers 107a and 107b for ohmic contact of the source electrode 109 and the drain electrode 110, the TMT device can be fabricated at low cost and with high yield.
In such a structure, however, it is considered that the impurities in the high-power drift layer 105 are diffused into the second low-noise drift layer 104 in the anneal process. Therefore, pinch-off characteristics of a drain current in the vicinity of the threshold of the drain current in drain current (I.sub.ds)--applied gate voltage (V.sub.gs) characteristics is degraded. As a result, if the TMT device is used as a low-noise device, the transconductance (gm) is greatly decreased, thereby to degrade noise characteristics.
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