Technical Field of the Invention
Computers and related peripheral equipment, satellite and communication systems are becoming ever more sophisticated and powerful. However, data transfer into and out of processors remains a limiting factor. The combination of increased parallelism and optics is the focus of optical interconnect technology. One approach to optical interconnect technology uses so-called flip-chip techniques where the advantages of silicon process technology are combined with the optical properties of III-V semiconductor materials. In this technology, emitter-detector arrays are fabricated separately from a CMOS substrate. The emitter-detector arrays are then inverted, aligned with the CMOS substrates and secured in place using solder balls to form electrical contacts and epoxy to rigidly mount the emitter-detector array to the CMOS chip. In one construction the CMOS chip contains emitters such as vertical cavity surface emitting lasers (VCSELs) and detectors such as p-i-n diodes. Most of the light emitted by an optoelectronic device such as a vertical cavity surface-emitting laser (VCSEL) leaves the immediate vicinity of the emitter vertically. However, some light leaks laterally, and it can be detected by a nearby detector. This light adds noise to the signal received at that detector, which detracts from the overall performance of the system.
The light leakage contains some information about the optical signals being propagated through the system. In many devices, there is a need to make separate circuitry that uses that signal/information to enhance system performance, but such circuitry adds cost to the structure. Light leaking from an emitter to neighboring detectors constitutes a loss of optical power, which can adversely affect the performance of some systems, especially where the coupling is weak. The light that is lost can also decrease noise margins.
It is therefore an object of this invention to provide an improved electro-optical transceiver system with controlled lateral leakage and method of making it.
It is a further object of this invention to provide such an improved electro-optical transceiver system and method which blocks lateral leakage of light from emitters to detectors.
It is a further object of this invention to provide such an improved electro-optical transceiver system and method that directs, channels and controls the laterally leaked light.
It is a further object of this invention to provide such an improved electro-optical transceiver system and method that beneficially directly applies the laterally leaked light without electronic circuitry to enhance system performance.
It is a further object of this invention to provide such an improved electro-optical transceiver system and method which reduces cross-talk in the plane of the array of the transceivers.
It is a further object of this invention to provide such an improved electro-optical transceiver system and method which improves the signal to noise ratio.
It is a further object of this invention to provide such an improved electro-optical transceiver system and method which effects control of the lateral light leakage as an integrated part of the integrated circuit fabrication process and with minimal additional steps.
An object is a method for integration of controlled lateral light leakage photonic devices on an integrated circuit comprising flip-chip bump bonding a first substrate having first photonic devices to a second substrate having second photonic devices; and filling voids between the first and second substrate interstitially of the photonic devices with an underfill, wherein a portion of the underfill blocks a wavelength of light.
Objects include, the method for integration of photonic devices, wherein the wavelength of light is that of the photonic devices. And, further comprising the step of building a blocking medium with the underfill, building one or more transmissive channels in the blocking medium, and/or, wherein said portion of the underfill is placed around one or more sides of one or more of the photonic devices. Furthermore, wherein the first and second substrate form a first planar array and further comprising the steps of stacking one or more planar arrays on the first planar array, wherein the underfill blocks the wavelength of light in three dimensions.
An object of the invention is a method for integration of photonic devices on integrated circuits, comprising providing an array of first photonic devices including dummy devices mounted on a first substrate, providing an array of contacts on a second substrate and flip-chip bonding the first photonic devices to the contacts. Filling the voids between the substrates interstitially of the first photonic devices with a first underfill; removing the first substrate, masking the first photonic devices leaving exposed pre-selected dummy devices, removing the dummy devices and the associated first underfill and preserving the first underfill associated with the masked first photonic devices leaving an array of holes with contacts. And, providing a spaced array of second photonic devices on a third substrate matching the array of holes, flip-chip bonding the second photonic devices to the contacts in the holes, and filling the voids between the substrates associated with the second photonic devices with a second underfill, at least a portion of the second underfill being absorptive at the wavelength at which the photonic devices operate for controlling lateral light leakage between the first and second photonic devices.
An additional object is the method for integration of photonic devices, wherein at least a portion of the first underfill is absorptive at the wavelength at which the photonic devices operate for controlling lateral light leakage between the first and second photonic devices in the plane of the array. In addition, wherein at least a portion of the first underfill and second underfill form a blocking medium, and, further comprising one or more transmissive channels in the blocking medium.
Yet a further object is the method for integration of photonic devices, wherein the first and second substrate is composed from the group comprising gallium arsenide, silicon, indium phosphide, indium gallium arsenide nitride, silicon germanium, and gallium arsenide. Furthermore, wherein said underfill is comprised from the group comprising an epoxy and a photoresist.
An object includes the method for integration of photonic devices, wherein said second substrate includes an application specific integrated circuit. Another object is wherein one of the first and second devices includes light emitters and the other includes light detectors. Also, wherein one of the first and second devices includes vertical cavity surface emitting lasers and the other includes p-i-n diodes. And, wherein the dummy devices are the same as the first devices.
And, an object includes the method for integration of photonic devices, further comprising the step of removing the first substrate except for said first devices. Additionally, further comprising the step of removing the third substrate except for the second devices.
The invention results from the realization that an improved electro-optical transceiver system with controlled lateral light leakage and method of making it can be achieved by disposing a blocking medium interstitially of the emitter and detector devices in the planar array comprising the transceiver system, which blocking medium absorbs light at the wavelengths at which the emitters and detectors operate to isolate or at least control the lateral light leakage between the emitters and detectors in the plane of the array.
This invention features an electro-optical transceiver system with controlled lateral light leakage. There is a plurality of emitter devices and detector devices including at least one of each arranged in a planar array for transmitting and receiving, respectively, energy in a predetermined wavelength. A blocking medium disposed interstitially of the devices and being absorbing at the predetermined wavelength blocks energy at the predetermined wavelength laterally leaking from an emitter device to one or more of the detector devices.
In a preferred embodiment the blocking medium may include a transmissive medium channel for transmitting energy at the predetermined wavelength to the blocking medium between selected devices in the plane of the array. The blocking medium may surround at least one emitter device in the plane of the array. It may surround at least one detector device in the plane of the array; it may surround each emitter device in the plane of the array; it may surround each detector device in the plane of the array. The emitter devices may be vertical cavity surface emitting lasers. The detectors may be p-i-n diodes. The blocking medium may include an epoxy; the blocking medium may surround pre-selected pairs of emitter and detector devices; the blocking medium may include an underfill for supporting the chips. There may be a number of stacked planar arrays of emitters and detectors and the blocking medium may include a transmissive medium channel for transmitting energy at the predetermined wavelength through the blocking medium between selected devices in different planar arrays.
The invention also features a method for integration of photonic devices on integrated circuits including providing an array of first photonic devices including dummy devices on a first chip; providing an array of contacts on the second chip; and flip chip bonding the first photonic devices to the contacts. The voids between the chips interstitial of the first photonic devices may be filled with an underfill. The first photonic devices may be masked leaving exposed pre-selected dummy devices. The dummy devices and the associated underfill may be removed while the underfill associated with masked photonic devices is preserved and there is left an array of holes with contacts. A spaced array of second photonic devices on a third chip is provided matching the array of holes. The second photonic devices are then flip chip bonded to the contacts in the holes. The voids between the chips associated with the second photonic devices are filled with an underfill. At least a portion of the underfills is absorbing at the wavelength at which the photonic devices operate for controlling lateral light leakage between first and second devices in the plane of the array.
In a preferred embodiment, the first and third chips may include gallium arsenide and the second chip may include silicon. The second chip may include an application specific integrated circuit. One of the first and second devices may include light emitters and the other light detectors. One of the first and second devices may include vertical cavity surface emitting lasers and the other may include p-i-n diodes. The dummy devices may be the same as the first devices. The first and third chips may include indium phosphide or indium gallium arsenide nitride. The second chip may include silicon germanium or gallium arsenide. The underfill may include an epoxy. The first chip may be removed except for the first devices and the third chip may be removed except for the second devices.
The invention also features a method for integration of low lateral light leakage photonic devices on an integrated circuit including flip chip bump bonding a first chip having first photonic devices to a second chip having second photonic devices and filling the voids between the chips interstitially of the devices with an underfill at least a portion of which blocks light at the wavelength at which the photonic devices operate.
Still other objects and advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only a preferred embodiment of the invention is described, simply by way of illustration of the best mode contemplated for carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention.
USPTO Backgrounds
USPTO Backgrounds