1. Field of the Invention
The present invention relates to a field effect transistor, and more specifically to a vertical MOS-FET (metal-oxide-semiconductor field effect transistor) having a gate bonding pad and a gate finger.
2. Description of Related Art
One typical conventional vertical double-diffused MOS-FET includes a number of cells formed in a silicon substrate of for example n-type and connected in parallel to one another. Each cell is formed of a p-type diffusion region formed in the n-type substrate and called a "base region", a n-type source region formed in the base region, and a gate electrode formed through a gate oxide film to bridge the source region and the substrate region. The substrate functions as a drain in common to all the cells.
In the above structure, the gate electrode is formed in common to the number of cells and connected at one end to a gate bonding pad formed of for example aluminum. The gate electrode is ordinarily formed of polysilicon and therefore has a relatively high resistivity. Accordingly, a gate serial resistance becomes large at a position remote from the gate pad. In order to solve this problem, the gate pad of aluminum is extended to form a gate finger overlapping the gate electrode. In this case, since no cell can be formed under the gate finger and the gate pad, a p-type diffusion region is formed under the gate finger in order to ensure connection of a depletion layer between cells. Therefore, a pn junction is formed between the substrate and a p-type diffusion region formed under the gate bonding pad and the gate finger.
In addition, a p-type diffusion region is also formed at a periphery of the substrate so as to form a source/drain protection diode which functions to protect the device from an overvoltage applied between a source and a drain and also to increase the breakdown voltage changing rate dv/dt. The peripheral p-type diffusion region is electrically connected to a source electrode and biased to a ground level. In the conventional vertical MOS-FET, therefore, the peripheral p-type diffusion region is formed continuous to the p-type diffusion region formed under the gate bonding pad and the gate finger.
The above mentioned vertical FET is often used in a DC servo motor driving circuit in the form of a full-bridge circuit as shown in FIG. 1. The shown full-bridge driving circuit includes a pair of FETs Q.sub.1 and Q.sub.2 connected in series between Vdd and the ground and another pair of FETs Q.sub.3 and Q.sub.4 connected in series between Vdd and the ground. A motor M is connected between a connection node between the FETs Q.sub.1 and Q.sub.2 and a connection node between the FETs Q.sub.3 and Q.sub.4.
When the FETs Q.sub.1 and Q.sub.4 are turned on and the FETs Q.sub.2 and Q.sub.3 are turned off, a current I.sub.1 flows through the FET Q.sub.1 to the motor M, and a current I.sub.2 flows from the motor M through the FETs Q.sub.4. In this situation, a rotation direction can be reversed by turning off the FETs Q.sub.1 and Q.sub.4 and turning on the FETs Q.sub.2 and Q.sub.3. Just after the FETs Q.sub.1 and Q.sub.4 are turned off, a counter electromotive force occurs because the motor is an inductive load. As a result, the source/drain protection diode in the FET Q.sub.3 is biased in a forward direction, so that a diode current I.sub.3 flows through the FET Q.sub.3. This current becomes large if a switching speed (di/dt) is large. If the source/drain protection diode in the FET Q.sub.3 is biased in a forward direction, minority carriers are injected into the n-type drain region (i.e., the substrate) from the peripheral p-type diffusion region electrically connected to the source electrode.
In this process, the carriers move within the p-type diffusion region before the carriers are drawn from the drain region. In this case, if a carrier mobility exceeds 200 A/.mu.S, the carrier drawing efficiency is limited by a diffusion resistance of the p-type diffusion region (on the order of 200 m.OMEGA./.quadrature.). As a result, the carriers are concentrated into a cell portion contiguous to the p-type diffusion region formed under the gate bonding pad and the gate finger, and the cells are often broken down.
On the other hand, when the counter electromotive force is absorbed or disappears, namely when the biasing of the FET is restored or returned from a reverse direction to a forward direction, the minority carriers injected into the n-type drain region are pulled back to the p-type diffusion region. In this process, because of the internal resistance of the p-type diffusion region, the carriers are not effectively absorbed in a portion of the p-type diffusion region near to the cell section, and therefore, flow into the cells near to the gate pad and the gate finger, so as to turn on a parasitic bipolar transistor formed of the source region, the base region and the drain region. As a result, the cells are broken down.
USPTO Backgrounds
USPTO Backgrounds