The present invention relates to a disk storage apparatus suitable for reduction in power consumption in a disk access operation. The invention also relates to a power supply control method suitable for reduction in power consumption in a disk access operation.
In general, a function called "preread cache" is provided in a disk storage apparatus, such as a hard-disk drive (HDD), which is connected in use to a host system (hereinafter referred to simply "host") such as a computer system via a host interface.
In the preread cache function, after sectors requested by a read command from the host are read out from a disk (disk medium) and transmitted, data of sectors having sector numbers following the sector number of the last one of the read-out sectors is preread onto a buffer memory in the order of sector numbers. If a sector requested by the next read command from the host coincides with the preread sector, the associated data on the buffer memory is immediately transferred to the host without access to the disk. With this function, the performance of the interface between the disk storage apparatus and the host can be enhanced.
The details of the preread cache function will now be described with reference to FIG. 1 and FIGS. 2A to 2D.
The data of n-sectors, i.e. sector A through sector B, on a disk 180 shown in FIG. 1 which have been requested by a read command R1 from the host is read from the disk 180 onto a read-data buffer region (cache region) defined in a buffer memory 181 under control of an HDC (disk controller), and the data is transferred in parallel to the host (see FIG. 2A). If the transfer of the data requested by the read command R1 is completed, preread is effected.
In general, however, the buffer memory 181 has a less capacity than the disk 180. For example, at the time when sectors from sector B+1((n+1)th sector), which follows sector B, to sector C ((n+m)th sector) have been preread, the buffer memory 181 (or the read-data buffer region thereof) becomes full (see FIG. 2B) and no space remains in the buffer memory 181 for storing the read data. The HDC which controls the buffer memory 181 detects this state and stops the preread.
If the next read command R2 from the host has made a cache hit (i.e. coincidence between the sector read in the buffer memory 181 and the sector requested by the host) and the hit sector data has been transferred to the host and as a result space has been caused in the buffer memory 181 (see FIG. 2C), preread is resumed from sector C+1 (=D) following the last sector (last read-out sector) C preread before the previous preread was stopped (see FIG. 2D).
In the prior art, in order to reduce the power consumption of the HDD in a time period between the temporary stop of preread and the resumption of preread, there is known a method in which power supply to the circuit elements relating to R/W (read/write), that is, R/W circuits relating to read/write channels, disk access of the HDC, etc., is stopped.
An operation in the above prior art, which follows the completion of preread and is accompanied with the above-mentioned power supply control, will now be described with reference to FIGS. 3A and 3B.
In the prior-art technique, the CPU needs to check, at regular intervals, whether space has been caused in the buffer memory. In this case, in order to resume the preread in a shortest time after space has been caused in the buffer memory, the CPU needs to check the buffer memory at a timing at which the sector D, which follows the last sector C read by the preread cache function, has reached a position where read by the magnetic head is permitted at every rotation of the disk 180.
However, if the generation of check timing of the buffer memory is performed only with a timer (CPU timer) of the CPU, the check timing may gradually be shifted due to a timer error from the timing at which the subsequently read sector D reaches the position of the magnetic head. In such a case, an excess time may be needed to actually start read-out after the presence of space is confirmed.
In the prior art, with use of the CPU timer, a timing (i.e. timing at sector X in FIG. 3A) is provided several servos (one servo normally including 2 to 5 sectors) before the subsequently read-out sector D, that is, the next target sector D, arrives at the position of the magnetic head. At this timing, a check is started as to whether space is present in the buffer memory (step P1) and power supply to the P/W circuit is resumed (step S2).
Then, it is checked whether space exists in the buffer memory (step P3).
If there is no space in the buffer memory, the position of the last sector C read out by the preread cache is confirmed, and the CPU timer is reactivated to generate timing of the sector X. After the power to the R/W circuit turned off (step P4), the control returns to step P1. On the other hand, if there is space in the buffer memory, the read-out of sectors beginning with the target sector D is started (step P5).
This method is similarly applied to the write operation. After a write command is completed or when transfer of data from the host has been temporarily stopped, all data transmitted from the host and stored in the buffer memory are written in the disk. If the buffer memory becomes empty in consequence, the CPU stops power supply to the R/W circuit.
In anticipation of write to the next sector, it is checked whether the buffer has become not empty, at every rotation of the disk at a timing generated by the CPU timer. In addition, in order to prevent this timing from shifting from the position of the sector on which data is to be written next, power supply to the R/W circuit is resumed/stopped at every rotation of the disk.
In the above-described prior art, in order to prevent power from being consumed in vain by the R/W circuit while the read/write operation is not actually performed, power supply to the R/W circuit is temporarily stopped and is reapplied to the R/W circuit before a predetermined time read/write operation is resumed in the state in which the buffer memory is full in the read operation and empty in the write operation, and it is checked whether the read/write operation can be resumed.
More specifically, in the above prior art, even after the buffer memory has become full due to the preread cache of the read operation, it is necessary to check the empty state of the data buffer at regular intervals. For this check, power is supplied to the R/W circuit at regular intervals. As a result, power is supplied to the R/W circuit at every rotation of the disk until the next read/write command is issued from the host. According to this method, compared to a method in which power is constantly supplied, the power consumption can be reduced. However, power is consumed to some degree since it is supplied to the R/W circuit at regular intervals until the next command is issued.
In the write operation, too, if the buffer memory has become empty, power is supplied to the R/W circuit at regular intervals, and power is consumed to some degree.
USPTO Backgrounds
USPTO Backgrounds