Semiconductor fins are currently patterned using lithography. The lengths of the fins are defined using a cut or ‘save’ lithography step in the orthogonal direction.
At tight fin pitches, however, the corner rounding of the save pattern causes fin length variability. Fin length variability affects the effective circumference of the fin that undesirably leads to varying device performance fin-to-fin. Further, any mis-alignment or overlay errors of the save pattern with respect to the fin pattern can result in sliver defects, i.e., the unintentional save of fin that was not meant to be saved.
Therefore, techniques that reduce fin length variability that arises due to corner rounding and sliver defects that arise due to alignment and overlay errors would be desirable.
USPTO Backgrounds
USPTO Backgrounds