1. Field of the Invention
The present invention relates to system-on-a-chip architecture. More particularly, the present invention relates to a field programmable gate array and a microcontroller in a system-on-a-chip architecture.
2. The Background Art
An integrated circuit uses a network of metal interconnects between individual semiconductor components, which are patterned with standard photolithographic processes during wafer fabrication. Multiple levels of metallized patterns may be used to increase the flexibility of the interconnects.
It has long been recognized that a user-programmable interconnect technique would allow lower tooling costs, and faster delivery time. To such an end, field programmable gate array (FPGA) circuits were developed. An FPGA is an array of uncommitted gates with uncommitted wiring channels. To implement a particular circuit function, the circuit is mapped into the array and the wiring channels and appropriate connections are programmed to implement the necessary wiring connections that form the circuit function.
A gate array circuit can be programmed to implement virtually any set of functions. Input signals are processed by the programmed circuit to produce the desired set of outputs. Such inputs flow from the user's system, through input buffers, then through the circuit, and finally back out to the user's system via output buffers. Such buffers provide any or all of the following input/output (I/O) functions: voltage gain, current gain, level translation, delay, signal isolation, or hysteresis.
There are essentially two configurations of programmable circuit elements used to provide flexibility to the user for programming the FPGA. In the first configuration, example of which is disclosed by El Gamal, et al. in U.S. Pat. No. 4,758,745, the FPGA can be permanently programmed by the user. In the second configuration, an example of which is disclosed by Freeman in U.S. Pat. No. 4,870,302, the FPGA can be changeably programmed by the user.
An application-specific integrated circuit (ASIC), such as a microcontroller is a mask-programmable gate array offers higher functionality and performance and more efficient use of space than an FPGA which offers lower design costs and greater user flexibility. Also, an ASIC can implement any variety of I/O function and often at a higher speed than an FPGA. Other dedicated functional circuitry may also offer higher functionality and performance than its equivalent configured from FPGA components.
In a system-on-a-chip (SOC) with both an FPGA and an ASIC portion provides some portion of the advantages of both designs. Of major concern in designing an SOC is providing a suitable interface between the FPGA and ASIC portions. In order for the IC to perform its tasks properly, the FPGA and ASIC portions must be able to communicate effectively with each other.
USPTO Backgrounds
USPTO Backgrounds