1. Field of the Invention
The present invention relates to a differential amplification circuit, and more particularly, to a differential amplification circuit extending an operation region and improving a linearity.
2. Description of the Background Ar
A radio frequency (RF) circuit configured with a single ended circuit often has disadvantages such as a signal coupling event and an even order distortion event in a highly integrated circuit like a system-on-a-chip (SoC).
Hence, a differential circuit is generally employed to overcome the above disadvantages.
The typical differential circuit is used more frequently in a highly integrated circuit (e.g., SoC) than in the aforementioned single ended circuit because the differential circuit has a high common mode rejection ratio (CMRR) and second-order intercept point (IIP2).
However, when the typical differential circuit uses a fully differential amplifier (FDA), an operation region may be reduced due to a voltage headroom limitation associated with the FDA.
Another type of FDA was introduced by Nokia Corporation to overcome the voltage headroom limitation
The other type of FDA was taught in an article, entitled “Cancellation of Second-Order Intermodulation Distortion and Enhancement of IIP2 in Common-Source and Common-Emitter RE Transconductors” (IEEE, Vol, 52, NO. 2, February, 2005),
FIG. 1 illustrates the other type of FDA introduced by Nokia Corporation.
The other type of FDA includes first to fourth transistors MN1, MN2, MNb1, and MNb2, a current source Isb, first and second bias resistors RB and RB, and first and second capacitors C1 and C2.
The first and second transistors MN1 and MN2 are parts of an amplification circuit, wherein the first and second transistors MN1 and MN2 are configured as a differential pair that amplifies a difference between input voltages Vin+ and Vin−.
The first and second transistors MN1 and MN2 are biased by the first and second bias resistors RB and RB, and the current source Isb. The first and second bias resistors RB and RB have the same resistance level.
The first and second capacitors C1 and C2 are configured in a direct current (DC)-blocking circuit that removes a DC component from the input voltages Vin+ and Vin−. The third and fourth transistors MNb1 and MNb2 are configured as a bias circuit.
The first and second transistors MN1 and MN2, which are the differential pair of the amplification circuit, are configured to common source circuits. Due to this configuration, the first and second transistors MN1 and MN2 can reduce second-order intermodulation (IM2) distortion and enhance IIP2.
A method of reducing the IM2 distortion and enhancing the IIP2 by the configuration of the amplification circuit with the differential circuit is described in the aforementioned article, and thus, detailed description thereof will be omitted.
The above differential circuit allows a sufficient level of voltage headroom, and thus, the operation region can be enlarged,
However, the other type of FDA may not improve the linearity since the improvement on the linearity of the entire differential circuit usually depends on the improvement on the linearity of the first and second transistors MN1 and MN2 of the amplification circuit.
USPTO Backgrounds
USPTO Backgrounds