One type of circuitry device is a field effect transistor. Typically, such includes opposing semiconductive material source/drain regions of one conductivity type having a semiconductive channel region of opposite conductivity type therebetween. A gate construction is received proximate the channel region, typically between the source/drain regions. The gate construction typically includes a conductive region having a thin dielectric layer positioned between the conductive region and the channel region. Current can be caused to flow between the source/drain regions through the channel region by applying a suitable voltage to the conductive portion of the gate.
Typical transistor fabrication methods include a step referred to as source/drain re-oxidation. Such may be conducted for any of a number of reasons depending upon the materials, sequence and manner by which transistor components have been fabricated prior to the re-oxidation step. For example, one method of providing a gate dielectric layer is to thermally grow an oxide over a bulk or semiconductor-on-insulator substrate. In certain instances, source/drain regions are provided by conducting ion implantation through this oxide layer after the gate construction has been patterned to at least partially form the source/drain regions. The heavy source/drain implant is likely to damage and contaminate the oxide remaining over the source/drain regions. Even if all the oxide were removed over the source/drain regions prior to the implant, damage to the crystal lattice and the source/drain outer surface typically occurs from the source/drain implant(s). Accordingly and regardless, a re-oxidation step is conducted to grow a fresh, uncontaminated oxide on the source/drain regions towards repairing certain damage caused by the implant. This typically occurs after any remaining damaged oxide has been stripped from over the source/drain regions.
Typically, this re-oxidation also grows a very thin thermal oxide on tops and sidewalls of the conductive components of the gate construction. Further, it fends to slightly thicken the gate oxide under the gate corners, and thereby round the lower outer edges of the typical polysilicon material of the gate. The ion implantation and any oxide stripping can weaken or mechanically compromise the gate oxide at the sidewall edges of the gate, and tend to increase the field effect transistor gate-to-drain overlap capacitance. The thickening and rounding of the gate oxide at the corners can reduce gate-to-drain overlap capacitance, and relieve the electric-field intensity at the corner of the gate structure, thus enhancing the gate oxide integrity at its edge. Further, the thermal oxide can serve as a dopant diffusion mask preventing dopant diffusion from subsequently deposited insulative interlevel dielectric layers.
Numerous thermal re-oxidation processes exist. The invention is directed to transistor fabrication methods involving oxidation of the outer surfaces of source/drain regions.
USPTO Backgrounds
USPTO Backgrounds