1. Field of the Invention
The present invention relates to a plasma display panel (hereinafter, referred to as "PDP") system, and more particularly, to a method and an apparatus which is capable of efficiently using power need to drive electrodes of the PDP.
2. Description of the Prior Art
In general, the PDP is classified into an AC type PDP and a DC type PDP according to a driving voltage applied to a discharge cell. The AC type PDP is driven by a sine wave alternating current or a pulse voltage whereas the DC type PDP is driven by a direct current. Since electrodes of the AC type PDP are covered with a dielectric and do not receive an ion damage according to the discharge, a life span of the electrodes of the AC type PDP is longer than that of the DC type PDP. Also, the AC type PDP memorizes a wall charge generated on a surface of the dielectric by a polarization into an inside cell.
A color AC type PDP which is mainly used for a broad screen television has a front panel and a rear panel. The front panel has a scan and sustentation electrode (hereinafter, referred to as Y) and a sustentation electrode (hereinafter, referred to as X) which are designed on a glass substrate in parallel. The rear panel has a cell space for sealing gas and an R-G-B address electrode (hereinafter, referred to as Z) which is designed on a rear glass substrate.
In order to drive the PDP, a DC high voltage has to be periodically applied between the X and Y electrodes to sustain the discharge between the X and Y electrodes. The two electrodes operate as a capacitor, so that a power applied to the two electrodes is not perfectly consumed. Accordingly, the PDP recovers an electric charge remained between the X and Y electrodes to decrease the power consumption of the PDP. A circuit recovers the applied power after applying the power to the X and Y electrodes and applies the recovered power to the X and Y electrodes in order to decrease the power consumption which is called to power recovery circuit.
The power recovered by the power recovery circuit is overlapped with the DC high voltage for driving the electrodes and is applied to the electrodes with the DC high voltage. At this time, for an efficient use of the power, a timing for applying the recovered power to the electrodes is very important concerning an applying timing of the DC high voltage.
In a case where the timing of the recovered power is faster than the applying timing of the DC high voltage, a waveform of the applied voltage is distorted and recycling rate of the recovered power decreases. On the contrary, in a case where the timing of the recovered power is slower than the applying timing of the DC high voltage, the recycling rate of the recovered power decreases since the DC high voltage is applied to the electrodes before the recovered power is efficiently applied.
However, since the applying timing of the recovered circuit is fixed by a configuration of a hardware of the power recovery circuit, the recovered power can not be efficiently used in the prior power recovery circuit.
USPTO Backgrounds
USPTO Backgrounds