1. Field of the Invention
The present invention relates to an information processing apparatus and method of controlling an operating frequency thereof, and more particularly to an information processing apparatus and method of controlling an operating frequency thereof for preferably executing a DMA transfer.
2. Related Art
Recently, information processing apparatuses, which are driven by a built-in battery and typically represented by mobile phones, are widely used outside the home and when a user is traveling. Further, the information processing apparatuses are provided with not only a voice communication function and an e-mail function but also with a reproduction function of moving image data, music data, and the like a one-segment broadcast looking/listening/recording function, and the like so that they have a sophisticated function.
As the function of the information processing apparatuses is made sophisticated, it is indispensable to enhance the performance of a processor by increasing an operating frequency. However, the power consumption of the information processing apparatuses is increased as the operating frequency is increased. Therefore, mobile equipments such as mobile phones and the like, in particular, have a problem in that they cannot be continuously used for a long time because the drive time of a built-in battery is made short.
To cope with the above problem, there is conventionally disclosed a technique capable of reducing the power consumption of an information processing apparatus by changing an operating frequency (refer to, for example, Japanese Unexamined Patent Application Publication No. 2002-99432). Further, there is also known a technique for obtaining the idle ratio of a CPU each predetermined time and changing an operating frequency according to the obtained idle ratio of the CPU.
An information processing apparatus is provided with a DMA (Direct Memory Access) controller for executing a DMA transfer for directly transferring data is between memories or between a memory and an external storage unit without passing through a CPU. In many information processing apparatuses manufactured recently, the speed of a DMA transfer executed by the DMA controller depends on a clock for determining the operating frequency of a CPU, and, in this case, the speed of the DMA transfer is naturally increased by an increase of the operating frequency of the CPU.
The CPU may be placed in an idle state here. In an information processing apparatus, in which a DMA transfer speed depends on a clock for determining the operating frequency of a CPU, when the CPU is placed in the idle state as described above, the operating frequency is reduced. Since the DMA transfer speed is reduced by the reduction of the operating frequency, a DMA transfer time is increased.
As described above, the conventional technique for controlling the operating frequency of a CPU does not sufficiently take a DMA transfer speed into consideration.
USPTO Backgrounds
USPTO Backgrounds