This invention relates to the field of high frequency circuit design, including but not limited to RF and microwave circuit design, and more specifically, to high frequency circuit designs simultaneously interchangeable into multiple domains, such as prototype and production domains.
In the late 1800s, after Heinrich Hertz confirmed J. C. Maxwell""s wave equations, and proved that electromagnetic energy radiates through the air in the form of long transverse waves, many new fields of endeavor were born, ranging from radio, TV and sonar, which emerged in the first half of the 20th century, to wireless communications, including cellular, PCS, fixed wireless, and satellite communications, which became prevalent in the latter half of the 20th century.
As these applications have evolved, the trend has been to utilize higher and higher operating frequencies, both because high frequencies facilitate faster and higher capacity information transmission than low frequencies, but also because high frequency transmissions are more efficient and entail smaller circuit elements than low frequency transmissions. In order to support these applications, electrical engineers and circuit designers have had to develop circuits capable of operating at the high frequencies.
This has posed significant challenges since, at high frequencies, many circuit elements, such as resistors, capacitors, and inductors, typically deviate quite a bit from their idealized behavior. Compounding this problem is that, at high frequencies, voltages and currents are no longer spatially uniform when compared to the physical size of the circuit elements, and instead must be treated as propagating waves, such as transverse electromagnetic (TEM) waves in which the electric and magnetic field components are orthogonal to each other and to the direction of propagation. Consequently, conventional circuit analysis techniques, in which circuit elements are modeled as idealized lumped elements which obey Kirchoff""s circuit laws, no longer apply since they ignore the spatial variations in the voltage and current which occur at high frequencies, and do not account for the manner in which circuit elements deviate from their ideal behavior. Instead, more advanced models using transmission line and distributed elements, which account for this spatial variation in voltage and current, and which account for the frequency dependent behavior of the circuit elements, are required.
The non-ideal behavior of circuit elements at high frequencies can be illustrated with reference to FIGS. 1A, 2A, and 3A, which depict simplified, first order, high frequency models of, respectively, a resistor, capacitor and inductor, and FIGS. 1B, 2B, and 3B, which are respectively a plot of the real part of the impedance exhibited by the model of FIGS. 1A, the imaginary part of the admittance exhibited by the model of FIG. 2A divided by 2xcfx80f, and the imaginary part of the impedance exhibited by the model of FIG. 3A divided by 2xcfx80f, over high frequencies. (In FIGS. 1B, 2B, and 3B, both axes are assumed to be log10 scale axes).
Referring to FIG. 1A, a resistor R is modeled as two inductors L in series with each other and the parallel combination of a capacitor C and the resistor R. The inductors L model the leads to the resistor R, and C represents stray capacitance. Referring to FIG. 1B, the dotted line represents the idealized behavior of the resistor R, and the solid line represents the frequency-dependent behavior exhibited by the resistor at high frequencies. As illustrated, the real part of the impedance starts out at the value R, and then, as the frequency increases, decreases due to the effect of the stray capacitance, beginning at the point identified with numeral 102.
Referring to FIG. 2A, a capacitor C is modeled as inductor L in series with resistor Rs, and with the parallel combination of the capacitor C and resistor Re. The inductor L represents parasitic lead inductance, and the series resistor Rs represents losses through the leads. The resistor Re represents losses through the capacitor dielectric at high frequencies. Referring to FIG. 2B, the dotted line represents the idealized behavior of the capacitor, and the solid line represents the behavior of the capacitor at high frequencies. As illustrated, the capacitor starts out exhibiting idealized behavior (where the imaginary part of the admittance divided by 2xcfx80f is constant and does not vary with frequency when both are plotted on log10 scale axes). Then, as the frequency increases, this admittance parameter begins to increase at the point identified with numeral 104.
Referring to FIG. 3A, the inductor L is modeled as a shunt capacitance Cs in parallel with the series combination of inductor L and series resistance Rs. The shunt capacitance Cs represents the parasitic capacitance introduced by adjacent coils of the inductor, and the series resistance Rs represents losses which occur through the coils and leads of the inductor. Referring to FIG. 3B, the dotted line represents the idealized behavior of the inductor, and the solid line represents the behavior of the inductor at high frequencies. As illustrated, the inductor starts out exhibiting idealized behavior (where the imaginary part of the impedance divided by 2xcfx80f is constant and does not vary with frequency when both are plotted on log10 scale axes). Then, as the frequency increases, this impedance parameter begins to increase at the point identified with numeral 106
At this point, a natural question to consider is what frequencies are xe2x80x9chighxe2x80x9d frequencies? The answer is that a xe2x80x9chighxe2x80x9d frequency is one which depends upon the circumstances and includes consideration of several factors such as whether the more sophisticated circuit analysis techniques referred to above are required, whether the corresponding wavelength is comparable with or less than the physical dimensions of the circuit elements involved, whether parasitic reactances are significant compared to the primary parametric value, and whether unspecified responses at higher harmonics thereof contribute to circuit performance. Referring to the table below, which is a classification of the frequency spectrum developed by the Institute of Electrical and Electronic Engineers (IEEE), it can be seen that the wavelength begins to be comparable to the physical dimensions of typical circuits elements at a point somewhere within or preceding the VHF band. In light of this factor and the other factors mentioned above, a general rule is that, a xe2x80x9chighxe2x80x9d frequency is any frequency beyond a point somewhere within or preceding the VHF band. Coincidentally, RF frequencies are generally understood to extend from somewhere within the VHF band to and including the S band, so xe2x80x9chighxe2x80x9d frequencies are generally understood to include RF frequencies. Moreover, microwave frequencies are generally understood to begin at and extend beyond the C band, so a xe2x80x9chighxe2x80x9d frequency is generally understood to include microwave frequencies as well.
The design of a high frequency circuit typically undergoes two distinct phases, a prototype phase and a production phase. During the prototype phase, also sometimes referred to as the pre-production phase, one or more prototypes of the circuit are typically built and then tested to make sure the circuit works for its intended purpose. During this phase, it is common for the circuit to be tuned. In order to allow changes which are inherent to tuning to be easily and flexibly made, the circuit elements as typically implemented as surface mounted devices (SMD) where the circuit elements are mounted and soldered onto the surface of a suitable substrate such as a printed wiring board (PWB) or printed circuit board (PCB). Since the elements are mounted on the surface of the substrate, they are accessible and can easily be changed.
Examples of surface mounted devices include thin-film chip resistors of aluminum or beryllium based materials, ceramic single-plate or multilayer capacitors, and wire-wound or flat coil inductors. Current thin-film chip resistors are available in the following size codes: 0402, 0603, 0805, 1206, and 1218 (the number represented by the first two digits multiplied by ten is the length of the resistor in mils, and the number represented by the next two digits multiplied by ten is the width of the resistor in mils; hence, a resistor with a size code of 0402 has a length of 40 mils and a width of 20 mils). For these devices, the resistances range from {fraction (1/10)} xcexa9 to several Mxcexa9. Current surface mounted capacitors are available in sizes ranging from 15 mils square for a single layer configuration to 400 by 425 mils for multi-layer configurations. The capacitances of these devices range from 0.1 pF to several xcexcF. Current surface mounted wire-wound inductors are available in sizes ranging from 60 by 30 mils to 180 by 120 mils. The inductances of these devices range from 1 nH to 1000 xcexcH. Flat coil implementations are available at sizes as small as 2 mm by 2 mm, with inductances ranging from 1 to 500 nH. (For purposes of comparison, note that 1 mil=0.0001 inch=0.0254 mm).
During the production phase, the design is typically frozen, and production volumes of the circuit then manufactured. Since further design changes are not typically possible, the need for surface mounted implementations is lessened or eliminated. However, the surface mounted implementations are usually adhered to in the production phase even though alternative implementations are available that are cheaper and require less board space than the surface mounted implementations.
One such alternative that has recently become available, due to the advent of multi-layer substrates such as multi-layer printed wiring boards (PWBs) and printed circuit boards (PCBs), is integrated implementations in which the components are integrated into one or more layers of the multi-layer substrate. At present, these integrated implementations are available for passive components, i.e., resistors, capacitors, and inductors, and it is expected that integrated implementations will soon become available for additional components, such as active components, and surface acoustic wave (SAW) components such as SAW filters. In these integrated implementations, the components are typically integrated within one or more microvia layers on the uppermost portion of a multilayer PWB or PCB. These integrated implementations can provide cost savings of 1-2 ¢ per component and consume less board space compared with corresponding surface mounted implementations.
However, despite these advantages, the surface mounted implementations are still adhered to in the production phase because it is generally considered too risky to switch to the integrated implementations, even for high volume production runs. The fear is that the integrated implementations will introduce unanticipated parasitic capacitances or inductances, or otherwise deviate from their expected behavior at high frequencies, causing unacceptable circuit performance or degradation. Since this type of risk is generally avoided during the production phase, the integrated implementations are typically unexploited despite the cost and board space savings that are possible.
In xe2x80x9cSMXxe2x80x94A Novel Object-Oriented Optimization System,xe2x80x9d M. H. Bakr, et al., 2001 IEEE MTT-S Digest, pp. 2083-2086, and xe2x80x9cSpace-Mapping Optimization of Microwave Circuits Exploiting Surrogate Models,xe2x80x9d M. H. Bahr, et al., IEEE Transactions on Microwave Theory and Techniques, Vol. 48, No. 12, December 2000, pp. 2297-2306, a certain space-mapping technique is proposed for mapping between coarse and fine models, but the two models are only represented in a single domain and focused on a single implementation, and therefore fall far short of a solution to the problem described above.
Hence, there is a need for an enabling technology that will allow these alternative integrated implementations to be utilized more fully during the production phase of high frequency circuits.
The invention provides a process of designing a high frequency circuit in multiple domains, such as prototype and production domains. The process begins by obtaining one or more parameters relating to a first domain and one or more parameters relating to a second domain.
The one or more parameters for either domain may relate to a substrate for supporting one or more circuit elements or to transmission media on or within the substrate. The substrate for either domain may be any suitable element for supporting one or more circuit elements, including, without limitation, a PWB (printed wiring board) (which for purposes of this disclosure is defined to include PCBs (printed circuit boards)), silicon, or low temperature co-fired ceramic (LTCC). Both single layer and multi-layer substrates are possible, possibly with one or more of the top-most or bottom-most layers implemented as microvia layers.
The one or more parameters for either domain may be physical parameters including, without limitation, for each layer of the substrate, parameters defining the layer and the material in the layer, including permittivity (xcex5r), permeability (xcexcr), loss tangent (tanxcex94s), height (h) or height range; parameters defining the metallization of the layer, including conductivity ("sgr"r), thickness (t), and etch factor; parameters defining the layer stackup, including the configuration of the ground, power, and signal planes; parameters defining trace rules, including minimum and maximum line spacing and widths; and parameters defining via rules, including via stack dependencies, via hole sizes or size ranges, via spacings or spacing ranges, and via hole pad size requirements or dependencies.
The one or more parameters for either domain may also be electrical parameters defining, for each layer, and for one or more possible ground plane configurations, the width of a transmission line having a characteristic impedance (Z0) of 50 xcexa9, the characteristic impedance (Z0) of a maximum size transmission line (such as for supporting an 0805 component), and the characteristic impedance (Z0) of a minimum size transmission line. Other possible electrical parameters include coupled line characteristics such as Zeven, Zodd, c, xcex3even, and xcex3odd for one or more or a range of line spacings (where xcex3 is a complex propagation constant having as a real part xcex1, the attenuation constant, and having as an imaginary part xcex2, the wave number or propagation constant). The one or more electrical parameters may be derived from the one or more physical parameters or separately provided in addition to the physical parameters. In some cases, the electrical parameters may be provided in lieu of the physical parameters.
Once the parameters for the first and second domains have been obtained, the process proceeds to deriving, responsive to one or more of these parameters, interchangeable implementations in the first and second domains of the one or more circuit elements.
In one embodiment, this step involves first specifying a template of a domain-independent implementation of a circuit element, and then mapping this template into an implementation of the element in the first domain, e.g., a prototype domain surface mounted capacitor mounted on the surface of a single layer substrate, and also mapping this template into an implementation of the circuit element in the second domain, e.g., a production domain capacitor integrated within the bottom-most layer of a two layer substrate.
To ensure that the implementations are interchangeable, models of each of the implementations may be derived and one or more characteristics of the models may then be compared over a desired frequency range to ensure that the implementations are in fact interchangeable. Examples of the models which may be obtained include without limitation EM simulation models, parameterized models, lumped element equivalent circuit models, or any combination of the foregoing. One-port, two-port, or multi-port models are possible. Moreover, parameterized models in terms of scattering (S), admittance (Y), impedance (Z), hybrid (h), chain (ABCD), or other parameters are also possible. The models should be sufficient to accurately represent the behavior of the corresponding implementations over a desired frequency range, e.g., 0.5 GHz to 5.0 GHz in increments of 0.5 GHz.
Examples of the characteristics which may be compared include susceptance (imaginary part of one of the Y parameters), reactance (imaginary part of one of the Z parameters), conductance (real part of one of the Y parameters), resistance (real part of one of the Z parameters), absolute value of any of the Y, Z, S, h, or ABCD parameters, or phase of any of the Y, Z, S, h, or ABCD parameters. If the one or more characteristics do not adequately match over the desired frequency range, adjustments may then be made to one or both of the implementations until these one or more characteristics adequately match over the desired frequency range.
In one embodiment, primary characteristics of the models are compared, and adjustments made to one or both of the implementations until these characteristics very nearly match exactly over the desired frequency range. A xe2x80x9cprimaryxe2x80x9d characteristic is one which bears a relationship, whether direct, inverse, proportional, functional or otherwise, to the value of the circuit element being modeled and possibly other parameters such as frequency. For a capacitor or inductor, examples of the primary characteristic include the imaginary part of Y21 or YB, the imaginary part of Z21 or ZB, or any other these parameters multiplied by or divided by frequency, since these bear a relationship to the value of the respective circuit element, i.e., capacitance of the capacitor and the inductance of the inductor. For a resistor, examples of the primary characteristic include the real part of Y21 or YB, or the real part of Z21 or ZB, since these bear a relationship to the resistance of the resistor.
Then, one or more secondary characteristics of the models may also be compared, typically after the effects of the primary characteristic has been removed, and additional adjustments made to one or both of the implementations until one or both of these characteristics match. Sequential optimization is also possible, where, after the effects of the primary characteristic has been removed, the type and number of parasitics needed to account for the residual behavior of the circuit element are sequentially determined over different segments of the frequency spectrum. Additional adjustments may be needed to obtain matches between each of these sets of parasitics. Generally speaking, a xe2x80x9csecondaryxe2x80x9d characteristic is one which bears a relationship, whether direct, inverse, proportional, functional or otherwise, to the value of a parasitic circuit element in the model and possibly other parameters such as frequency. Moreover, as general rule, the degree of match of the secondary characteristics need not be as exact as with the primary characteristic. For a parasitic capacitor or inductor, examples of secondary characteristics include the imaginary part of Y11, Y22, YA, or YC, the imaginary part of Z11, Z22, ZA, or ZC, or any of these parameters multiplied by or divided by frequency. For a parasitic resistance, examples of secondary characteristics include the real part of Y11, Y22, YA, or YC, or the real part of Z11, Z22, ZA, or ZC.
If the one or more characteristics are sufficiently similar to warrant a conclusion that there is a match, the process may conclude since two interchangeable implementations of the same one or more circuit elements have been produced in first and second domains. If not, additional adjustments may be made to one or both of the implementations until there is a sufficient match.
The implementations, corresponding models and model characteristics, templates, and parameters may be tangibly embodied in a variety of forms, e.g., on human readable or audible media such as paper, on processor readable media such as disk, or (in the case of the implementations) as physical circuitry. In addition, the process itself may be tangibly embodied on a processor readable medium, e.g., as a series of computer executable instructions embodying the process stored on a processor readable medium. The process may also be tangibly embodied in the form of a computer program product, e.g., computer program, program code, or code module which, upon execution by a process, performs the process.
In addition to the foregoing process, the invention also provides a product comprising interchangeable implementations in first and second domains of one or more circuit elements of a high frequency circuit. Again, these interchangeable implementations may be tangibly embodied in a variety of forms, i.e., on human readable or audible media, processor readable media, or as physical circuitry. In addition, the implementations may be accompanied by corresponding models of the implementations and/or model characteristics and/or the parameters from which the implementations and models were derived. This underlying information may be useful for purposes of analyzing the impact of changes in technology, parameters, frequencies, and the like, and whether the implementations can still be considered interchangeable in light of these changes.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.
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