1. Technical Field
The inventive concept relates to a non-volatile semiconductor memory device and a fabrication method thereof and, more particularly, to a phase change memory device having a 3 dimensional stack structure and a method of fabricating the same.
2. Related Art
Semiconductor memory devices are classified into volatile memory devices and nonvolatile memory devices depending on retention of stored data after power is turned off. DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory) are regarded as the volatile memory devices and the flash memory devices, i.e., the EEPROM (Electrically Erasable Programmable Read Only Memory) devices are regarded as the nonvolatile memory devices.
Currently, flash memory devices which are nonvolatile memory devices are frequently used in a variety of electronic appliances such as digital cameras, cellular phones, or MP3 players. However, it takes a relatively long time to program data into the flash memory devices or to read from the flash memory devices. New semiconductor devices have been developed as substitutes of flash memory devices, such as, MRAM (Magnetic Random Access Memory), FRAM (Ferroelectric Random Access Memory) or Phase-change Random Access Memory (PRAM).
A phase change memory device as a substitute memory device uses phase change material which reversibly phase-changes between a crystalline state and an amorphous state by exposure to heat in the storage medium. Typically, a chalcogenide (GST)-based material which is comprised of germanium (Ge), antimony (Sb) and tellurium (Te) is used as the phase change material. The heat supply source for the phase change material is electric current through a conductor that releases an amount of heat (i.e., Joule heating) which depends on the intensity of the supplied current and the current supply time. Phase change materials also exhibit different electrical resistivities according to the crystalline state and the amorphous state so that a logic information scheme can be designed which depends on the resistance differences exhibited between the phases.
However, a problem in the phase change memory device is a need to improve of their integrity, i.e., compactness. Accordingly, a study for reduction in chip dimensions has been developed. However, due to limit of exposure light source, it faces to limit to reduce a minimum feature size.
USPTO Backgrounds
USPTO Backgrounds