The present invention is related to the simulation of electronic systems and, in particular, to techniques for the efficient simulation of electronic systems.
With the increase in size and complexity of electronic systems, such as in the fields of computer processing and telecommunications, it is often impractical to build a physical prototype of the system before it is manufactured. Instead, a prototype design is often simulated by a computer for design verification and testing. This saves time and lowers costs. Nonetheless, large amounts of valuable computing time and computational power are often required for the simulation of complex systems.
In some simulations the system can go into an “idle” state where no meaningful operations are performed by the simulated system. Heretofore, the simulations have remained in an idle state until the occurrence of an event which engaged system operations once again. In the meantime, the simulations ground on to occupy the valuable time of the simulating computer with nothing of interest to show to the simulator. For example, depending upon the particular simulated system, idle states of a few milliseconds at each occurrence can stretch the simulation time to more than an hour where meaningful operations occur in only a fraction of this time. Ultimately this increases the time-to-market of the simulated system and its cost. It is useful, then, if a simulation can be accelerated by removing the “dead time” of idle states so that only meaningful operations are performed by the simulated system without adversely affecting the simulation itself. Computing time is reduced and computational power is directed toward meaningful operations, rather than sitting idly by. As a result, the simulated electronic system can be constructed much more quickly and at lower cost.
The present invention allows the acceleration of simulations by advancing the simulated system, “time warping” the simulation, through idle states to the next relevant system events.
USPTO Backgrounds
USPTO Backgrounds