1. Technical Field
The invention relates to a method and an apparatus for self-calibration. Particularly, the invention relates to a method and an apparatus for self-calibrating a driving capability and a resistance of an on-die termination of an output interface physical layer.
2. Related Art
Along with development of semiconductor manufacturing technology, integrated circuits become possible, i.e. the circuits can be integrated into a chip. Since the chip has advantages of high performance and low cost, the integrated circuits become a trend. Moreover, since electronic apparatuses are gradually developed towards digitization, the integrated circuits are widely applied in the electronic apparatuses. However, since a signal transmission mode in internal of the chip is different to a signal transmission mode outside the chip, an output interface physical layer is configured in the chip to transmit signals in internal of the chip to external of the chip. Therefore, in order to correctly transmit the signals, stableness of the output interface physical layer becomes an important issue in device design (for example, chip design).
USPTO Backgrounds
USPTO Backgrounds