As is known, operating electronic components produce heat. This heat should be removed in order to maintain device junction temperatures within desirable limits, with failure to remove heat effectively resulting in increased component temperatures, potentially leading to thermal runaway conditions. Several trends in the electronics industry have combined to increase the importance of thermal management, including heat removal for electronic components, including technologies where thermal management has traditionally been less of a concern, such as CMOS. In particular, the need for faster and more densely packed circuits has had a direct impact on the importance of thermal management. First, power dissipation, and therefore heat production, increases as device operating frequencies increase. Second, increased operating frequencies may be possible at lower device junction temperatures. Further, as more and more devices or components are packed onto a single chip, heat flux (Watts/cm2) increases, resulting in the need to remove more power from a given size chip or module. These trends have combined to create applications where it is no longer desirable to remove heat from modern devices solely by traditional air cooling methods, such as by using air cooled heat sinks with heat pipes or vapor chambers. Such air cooling techniques are inherently limited in their ability to extract heat from an electronic component with high power density. The need to cool current and future high heat load, high heat flux electronic devices therefore mandates the development of aggressive thermal management techniques, using, for instance, liquid cooling.
As an example, some existing supercomputers have compute nodes that route their traffic through racks of switching equipment to other compute nodes. Every switch in this data path adds latency. At a supercomputing scale, there is a point that increasing the number of compute drawers will not increase performance due to the additional switching latency.
In a system using hub modules, networking and compute traffic is routed to idle compute processors with the hub modules to maximize speed and efficiency. In the system, every compute drawer is directly connected to every other compute drawer via the hub modules, which typically include traffic routing hub chips and a network of fiber-optic transmit and receive modules.
In a system with a network of fiber optic transmit and receive modules or fiber optic interconnects, scalability is enabled to a much higher level than previously possible. However, a problem exists creating a reliable arrangement having manufacturability and delivering a required package density and heat removal.
USPTO Backgrounds
USPTO Backgrounds