The present invention generally relates to check systems, and more particularly to a check system for checking a comparison check function of an information processing apparatus such as a work station which is provided with dual microprocessors to improve reliability.
FIG. 1 generally shows a conventional information processing apparatus 510. The information processing apparatus 510 includes dual microprocessing units (MPUs) 511 and 513, a comparison check circuit 515 for comparing outputs of the MPUs 511 and 513, a memory 517 which stores programs for carrying out processes of the information processing apparatus 510, a bus controller 519 for controlling a bus 523, and an input/output channel 521 which controls input/output of data. Although not shown in FIG. 1, a cathode ray tube (CRT) display device for displaying data, a keyboard for entering data, a memory device for storing data and the like are coupled to the input/output channel 521.
As a part of the RAS mechanism, the information processing apparatus 510 is provided with two identical MPUs 511 and 513. The MPUs 511 and 513 independently execute the same program which is stored in the memory 517 in response to common data which is entered. A processed result including an address output from the MPU 511 and a processed result including an address output from the MPU 513 are supplied to the comparison check circuit 515. The comparison check circuit 515 compares the two processed results from the MPUs 511 and 513 and generates a warning when the two processed results differ, so as to interrupt the process of the information processing apparatus 510. It is possible to detect a fault in the MPUs 511 and 513 based on the warning generated from the comparison check circuit 515.
However, the MPUs 511 and 513 which are installed in the conventional information processing apparatus carry out identical operations. For this reason, the MPUs 511 and 513 output identical processed results and there is no means of checking the comparison check function of the information processing apparatus 510.
The checking of the comparison check function is made before the MPUs 511 and 513 are installed in the information processing apparatus 510. Alternatively, a pseudo error generation signal is supplied to the comparison check circuit 515 as a substitute for checking the comparison check function after the MPUs 511 and 513 are installed in the information processing apparatus 510. But in any case, there is a problem in that there is no means of accurately checking the comparison check function after the MPUs 511 and 513 are installed in the information processing apparatus 510.
USPTO Backgrounds
USPTO Backgrounds