This invention relates to silicon capacitive pressure sensors, and more particularly to a silicon capacitive pressure sensor having a glass dielectric deposited using an ion milling technique.
In the art of silicon capacitive pressure sensors, it is known to provide such a sensor as a single sensing element. Prior art single element silicon capacitive pressure sensors typically comprise a pair of parallel conductive silicon plates joined together with an insulative borosilicate glass spacer by a field-assisted, vacuum bonding process. This forms an evacuated chamber within the opposing conductive plates and spacer. The opposing silicon plates comprise the plates of a pressure variable capacitor. See, for example, U.S. Pat. Nos. 4,415,948, 4,405,970 and 4,530,029. Examples of electronic circuitry used to process the sensor output signals indicative of sensed pressure are described and claimed in U.S. Pat. Nos. 4,743,836 and 4,517,622.
In a silicon capacitive pressure sensor, one conductive silicon plate forms a diaphragm that flexes inwardly in the presence of fluid pressure applied to the outside surface of the diaphragm that is greater in magnitude than the pressure (usually vacuum) in the chamber. The second conductive silicon plate forms a substrate that is normally held rigid. The deflection of the diaphragm causes a variation in the distance between the plates, thus varying the capacitance of the plates. Thus, the capacitive pressure sensor is operative to transduce pressure variations into corresponding capacitive variations. The borosilicate glass serves not only to separate the plates, but also to seal the vacuum chamber therebetween. The silicon diaphragm and substrate are normally doped to make them appropriately electrically conductive.
These pressure sensing devices are particularly well suited for miniaturization due to the fine dimensional control achievable using the semiconductor and thin-film technologies. They are also well suited to the measurement of small differential pressures in various commercial and aerospace applications. Microcircuit technology can produce a large number of pressure sensors fabricated from a single silicon wafer.
However, in any silicon capacitive pressure sensor, parasitic capacitance is a limitation on the accuracy of the sensor. This is because such parasitic capacitance may result in an overall long-term drift (20 years) of the sensor output. This is especially true in high accuracy (0.05% or 500 ppm) pressure sensing applications at high temperatures (120.degree. C.). This limiting factor may make some sensor designs unsuitable for demanding aerospace applications, such as electronic engine controls ("EECs") and air data computers ("ADCs").
Parasitic capacitance is the inherent capacitance of the non-pressure sensitive interstices of the sensor structure. For example, the parasitic capacitance of the borosilicate glass spacer may comprise upwards of 50% of the total capacitance of the sensor. Such parasitic capacitance reduces the sensor gain because it adds in parallel to the pressure sensitive capacitance of the sensor. This reduces both the dynamic range of the sensor and its sensitivity to pressure changes. Also, the aging in the electrical properties of the dielectric material disposed between the silicon plates has been identified experimentally as the major contributing factor to the drift of the sensor. Thus, a large effort has been placed in the past on reducing such capacitance through variations in the design of the sensor architecture.
However, parasitic capacitance is inherent in any physical structure and there is a minimum practically achievable value that may still be unacceptable in high sensitivity sensing applications. U.S. Pat. No. 4,405,970 discloses a method of reducing the parasitic capacitance in a silicon capacitive pressure sensor by providing specific borosilicate glass structures that separate fixed portions of the two capacitive plates at a relatively long distance from each other. Another approach to reducing the parasitic capacitance is disclosed U.S. Pat. No. 4,467,394, in which a three-plate device is utilized that, when combined with appropriate signal processing circuitry, eliminates the parasitic capacitance from the measurement. This, in turn, eliminates the resulting overall drift and instability of the sensor. A further approach to eliminating the parasitic capacitance is disclosed in U.S. Pat. No. 4,951,174.
In the fabrication of the prior art silicon capacitive pressure sensors, it is known to deposit the borosilicate glass dielectric spacer onto the silicon substrate using conventional radio frequency ("RF") diode and RF magnetron sputtering techniques. However, such techniques meet with only limited degrees of success. A common problem with these techniques is that the borosilicate glass does not always suitably adhere to the silicon substrate. Because of the critical requirements of the borosilicate glass to have good adhesion to the silicon, low stress, and the required stoichiometry, it is extremely difficult to reach the design objectives of the sensor using these RF techniques.
Accordingly, it is a primary object of the present invention to achieve performance stability of a silicon capacitive pressure sensor by providing a method of applying a glass onto a silicon substrate such that the glass has good adhesion to the silicon, has low stress and the required stoichiometry.
It is a general object of the present invention to utilize a ion milling approach to apply a glass dielectric material onto a silicon substrate or wafer.
It is another object of the present invention to provide a precision, high-performance silicon capacitive pressure sensor having a pair of silicon capacitive plates separated by a glass spacer applied to one of the plates by an ion milling procedure.
The above and other objects and advantages of this invention will become more readily apparent when the following description is read in conjunction with the accompanying drawings.
USPTO Backgrounds
USPTO Backgrounds