This application claims priority from EPC App""n 93830482.1, filed Nov. 30 1993, which is hereby incorporated by reference. However, the content of the present application is not necessarily identical to that of the priority application.
This invention relates to a circuit for generating a stable reference voltage. In particular, the invention relates to a circuit capable of providing a reference voltage which compensates for temperature and process parameters, and is highly stable with respect to the value of a supply voltage.
As is known, many types of electronic circuits require a reference voltage Vref which is stable over time. Several solutions have been proposed to derive, for example, such a reference voltage Vref from the supply voltage Vcc of the electronic circuit.
The simplest way of achieving this is, for example, to provide a resistive partition of the supply Vcc. In other words, it might suffice that a resistive divider be connected between a supply voltage pole and ground, with the reference voltage being picked up from a resistor linking node. But this solution is not devoid of serious problems:
integrated circuit resistors are made to wide manufacturing tolerances, which does not allow their values to be known with any accuracy; this may result in producing a reference voltage which varies from the target voltage; and
the integration of the resistors is not advantageous from the standpoint of circuit area occupation, which reflects unfavorably on integration costs.
In addition, the reference voltage may be affected by thermal drift from the circuit operating temperature and/or interferences with the supply voltage. An improved resistive divider can be implemented using a transistor-type of divider as shown in FIG. 1 herewith. A series of three MOS transistors can provide, for example, a reference voltage which is unaffected by temperature.
The last-mentioned solution would, however, have a drawback in that it produces a reference voltage which is closely dependent on the supply voltage Vcc. Furthermore, the latter voltage cannot amount to anything less than three times the threshold voltage of the MOS transistors, which rules out the use of circuits with low voltages.
Further prior approaches can only provide a stable reference voltage at the expense of increased circuit complexity; and even so, the reference voltage cannot be set in an accurate way. The underlying technical problem of this invention is, therefore, to provide a circuit arrangement which is uniquely simple and ensures an accurate and constant reference voltage as temperature and process parameters vary, while being quite stable with respect to the voltage supply.
An important idea which leads to the present invention is that of using a first, natural p-channel MOS transistor associated with a second, n-channel MOS transistor which is also a natural one; the reference voltage is obtained as the difference between the threshold voltages VT of these two transistors.
Based on this idea, the technical problem is solved by a circuit comprising two field-effect transistors of opposite type, connected in series between one supply voltage (e.g. ground) and a reference output node. A load element is connected to pull the node between the two transistors toward the other supply voltage. Preferably, an additional (and weaker) load element is provided to draw current through the first load element and second transistor. Thus, the reference voltage output is equal to the difference between the respective threshold voltages of the two transistors. This provides a reference voltage which is uniquely stable against variations in temperature and process parameters. The features and advantages of a circuit according to the invention will be apparent from the following description of an embodiment thereof, given by way of example and not of limitation with reference to the accompanying drawings.
USPTO Backgrounds
USPTO Backgrounds