In the manufacture of printed wiring boards and laminate chip carriers it is advantageous to use electroless plating to plate copper and gold. Electroless copper plating enables lines, tabs, and pads to be manufactured without commoning bars employed in electrolytic plating and without plating a full layer of copper. Electroless copper pattern plating involves depositing a seed layer, then applying a resist to mask areas that are not to be plated. However, the resist must be capable of withstanding the hot alkaline electroless plating bath; and provide high resolution to provide fine line circuitry. Few resists meet both requirements. Moreover, if a resist is employed, the resist and the seed are typically stripped before further processing.
Electroless plating of gold is employed in many of the newer high technology printed wiring boards and laminate chip carriers, to protect structures such as SMT and wirebond pads from oxidation during processing. Not all products can be commoned and electrolytically plated with gold, so electroless gold plating is employed. Conventional resist materials or masking materials are not suitable for electroless plating of gold because they lack sufficient resolution to mask wirebond tabs and fine pitch SMT pads, or they are not chemically compatible with the electroless gold plating bath. The gold electroless plating bath either degrades the resist so that it lifts off, or leaches materials into the bath which interfere with the electroless plating. In an attempt to avoid these problems, a resist is typically not used; gold is electrolessly plated on all metal features of the product. After the metal is electrolessly plated, a solder mask is applied to protect the circuits during subsequent soldering operations.
However, such an approach unnecessarily consumes gold since gold is plated to areas where the gold is not required. Furthermore, processing and handling of circuitized products after the gold plating step, stains and contaminates the gold pads; this in turn results in scraping of defective products. Moreover, many soldermasks do not adhere well to the plated gold layer.
It would be desirable to have a method for selectively electrolessly plating gold which does not require that the gold be plated over all the metal features of the substrate. It would also be desirable to have a method for selectively plating electroless plating copper.
The present invention provides new methods for electroless plating of metal particularly gold and copper onto substrates, such as circuitized substrates, which reduces processing steps, reduces metal consumption, and reduces the scraping of parts due to contamination. The method employs a permanent plating resist. The method for electrolessly plating metal onto a substrate, comprises the following steps: providing: an uncured, photoimagable, dielectric permanent plating resist comprising epoxy resin system comprising: from about 10 to 80% of phenoxy polyol resin which is the condensation product of epichlorohydrin and bisphenol A, having a molecular weight of from about 40,000 to 130,000; from about 20 to about 90% of an epoxidized multifunctional bisphenol A formaldehyde novolac resin having a molecular weight of from about 4,000 to 10,000; from about 35% to about 50% of a diglycidyl ether of bisphenol A having a molecular weight of from about 600 to about 2,500; and from about 0.1. to 15 parts by weight of the total resin weight, a cationic photoinitiator; applying the permanent plating resist on the substrate; photopatterning the permanent plating resist to form apertures therein which expose areas of the substrate; and electrolessly plating metal onto the exposed areas of the substrate.
The permanent plating resist is useful to protect the substrate areas including for example metallized features on the substrate, from the electroless deposition of metal during electroless plating; thus selective plating of metal is achieved. The permanent plating resist is not degraded by conventional gold or copper electroless baths. The invention also relates to circuitized structures produced by the methods of electroless plating.
USPTO Backgrounds
USPTO Backgrounds