1. Technical Field of the Invention
The present subject matter relates generally to testing integrated circuits and more particularly to improving measurement techniques for integrated circuits.
2. Background Information
The ubiquitous presence of integrated circuits (ICs) in almost every electronic device is testament to their importance in today's society. ICs are generally manufactured in wafer form, where multiple ICs are manufactured in an array using photolithography techniques. The ICs may be tested at various stages in the manufacturing process. For example, the ICs may be tested while they are in wafer form. The ICs also may be tested after they have been packaged by providing signals to the various pins of the package and examining the output pins.
One method of providing signals to the various pins of the package includes constructing an application specific circuit board for testing purposes, often called a “load board.” The load board contains the IC to be tested, sometimes referred to as a device under test. FIG. 1 depicts a group of load boards 10A-C coupled to a tester 12. Load boards 10A-C include at least one device under test (DUT) 14A-C and oscillators 16A-C. Oscillators 16A-C are coupled to the DUTs 14A-C and provide a timing signal to each DUT 14A-C. Tester 12, which also includes an oscillator 18, is capable of performing various measurements on the DUTs 14A-C. The particular functionality of the various DUTs may determine the measurements taken by the tester 12. For example, some DUTs may contain radio-frequency (RF) functionality and therefore the tester 12 may measure the spectral content of signals generated by the DUTs. Furthermore, the measurements taken by the tester 12 may include sampling signals associated with the DUTs 14A-C at discrete instants of time.
FIG. 2 illustrates an exemplary signal 20 generated by any one of the DUTs 14A-C as well as a timing signal 22 generated by any one of the oscillators 16A-C. Timing signal 22 is shown as a digital signal having a high state and a low state. Signal 20 is shown as an analog signal having an active portion that corresponds with the high state of timing signal 22, and an inactive portion that corresponds with the low state of timing signal 22. Oscillator 18 provides tester 12 with a tester timing signal 24. In order to accurately measure signal 20, tester 12 samples signal 20 on the low-to-high transitions of the tester timing signal 24 as indicated by the upward facing arrows on timing signal 24. Measurement problems may arise if the sampling performed by tester 12 is not performed consistently during each sampling interval. For example during the high state φ1, signal 24 has one low-to-high transition, indicating one sampling of signal 20 during φ1. However during the high state φ2, signal 24 has no high-to-low transitions indicating that no sampling of signal 20 occurs during φ2. As a result, signal 20 may be sampled unevenly during successive sampling intervals causing measurement problems. Thus, a method and apparatus for synchronizing timing signals in a testing system is desirable.
USPTO Backgrounds
USPTO Backgrounds