X-ray computed tomography (CT) is one of the major diagnostic imaging modalities. A multi-slice CT apparatus obtains projection data of an object by irradiating cone X-ray beams and measures the X-rays which have passed through the object by an X-ray detector. As shown in FIG. 1, an X-ray CT apparatus mainly includes an X-ray source 100, a 2-dimensional X-ray detector 101, and a control console 102. The projection data is acquired in discrete positions of the X-ray source in one rotation. The tomographic images of the object can be reconstructed by performing back projection on the projection data.
X-ray CT detectors are mainly based on indirect conversion. FIG. 2 shows the impinging X-ray photons are converted into visible photons by a phosphor or scintillating screen 104, such as cesine iodine (CsI), which is followed by a visible light digital imaging sensor 105 to acquire the X-ray projection data. Two major types of visible light imaging sensors are used in existing CT apparatus. One type is flat-panels based on thin-film transistors (TFT). Another type of CT detector is based on charge coupled devices (CCD). Both types of CT detectors require external CMOS (complementary metal-oxide-semiconductor) integrated circuits including high-resolution analog-to-digital converters (ADC) to process the photo charge. The CCD imaging sensor also has limited dynamic range.
CMOS-based CT detectors have been demonstrated with read-out noise lower than the incident X-ray photon shot noise, which is sufficient for the CT application. Nonetheless, the linearity of the CMOS-based detectors is low, which causes artifacts to appear after the image reconstruction. Another disadvantage is that CMOS-based CT detectors also require external high-resolution ADC to quantize the integrated photo charge.
Wide dynamic range (WDR) CMOS image sensors (CIS) can be designed to quantize the WDR with only low-resolution ADCs at the column level, which can be integrated on the same CMOS chip as the sensing pixel array in asynchronous partial quantization schemes, as depicted by FIGS. 3A and 3B. When photo voltage Vn exceeds some potential Vref, the pixel resets. The voltage change is generally referred as the potential well Vw. At the end of a frame, the residual voltage Vr is quantized by a low resolution ADC to Dr. The photo current Iph can be calculated by Eq. (1) below:Iph=Cint/Tint·Vn=Cint/Tint·(Dw·Vw+Dr·LSB0)  (1)where Tint is the integration duration, Dw is the self-reset number of the frame, LSB0 is the ADC least significant bit size, and Cint is the integration capacitance. This scheme can improve the dynamic range of a 3T active pixel sensor (APS) by Dw times. Eq. (1) shows the linearity of the scheme depends on the uniformity of the potential well Vw. Vw has variations due to the signal-dependent comparator offset and delay time. Nonlinearity of the CIS with the asynchronous partial quantization architecture is a problem that exists with many WDR CIS schemes (e.g. self-resetting and time-to-saturation schemes). Nonlinearity can be compensated well through calibration because the nonlinearity is mainly caused by the potential well size variation, but calibration is not desirable for real-time applications, such as CT.
In summary, existing flat panel-based, CCD-based and CMOS-based CT detectors generally have high packaging and system design complexity, which adds to the high CT equipment cost. Existing CMOS CT scanners also have low linearity, which leads to artifacts after image reconstruction, or require calibration, which is undesirable for real-time applications.
Accordingly, it is an object in part of the present invention to provide a novel CMOS CT detector design to overcome weaknesses and drawbacks of prior art CT scanners, which is to provide CT scanners with high linearity, quantum-limited noise, good scalability, high fill factor with a single CMOS chip, and without requiring calibration. However, while this is an object underlying certain implementations of the invention, it will be appreciated that the invention is not limited to systems that solve the problems noted herein. Moreover, the inventors have created the above body of information merely for the convenience of the reader; the foregoing is a discussion of problems discovered and/or appreciated by the inventors, and is not an attempt to review or catalog the prior art.
USPTO Backgrounds
USPTO Backgrounds