The current mirror circuit configuration has found widespread use as an integrated circuit design technique and its operation is well known to practitioners in the art. In a canonical form as depicted in FIG. 1, the current mirror includes a current drive transistor, shown as Q1 in FIG. 1, whose current I1 is externally fixed or forced in some manner, for example, through the use of a constant current source. The base of Q1 is then attached to a string of controlled current sources Q2, . . . , Qn. If transistors Q1, . . . , Qn are fabricated from a monolithic piece of semiconductor material, then their Vbe and emitter-current characteristics will match. And, if R1=R2=. . .=Rn and if the current source base-emitter areas are of the same size, then I1=I2=. . .=In. It is also understood that the emitter resistors and emitter areas may be "ratioed" so that the controlled currents, I2, . . . , In, may be set at a predetermined fixed multiple or fixed fraction of I1.
However, in any event it may be seen that the base current of Q1 and, therefore, I1 contain a current component attributable to the sum of the base currents of I2, . . . , In. If the string of controlled current sources is long (n large) or if the beta's of the transistors are low, as would likely be the case were these devices laterally diffused transistors, then the base drive component of I1 will become large. In this case the assumption I1=I2=. . .=In is no longer valid, and the current delivered by the controlled current sources will deviate from the predetermined predicted current.
The thrust of the subject invention is a technique for eliminating this error. With reference to FIG. 1, the technique can be understood as a departure according to which I2, or some other controlled current source, is compared in a feedback loop to the predetermined intended current. Deviations in the value of I2 from the intended value cause an error signal to be developed. The error signal is then used to adjust the drive to the current drive transistor Q1 so that the value of I2, as well as the values of the other controlled current sources in the string, are forced back toward the intended value.
A similar technique appears in U.S. Pat. No. 4,435,678, "Low Voltage Precision Current Source" to Joseph, et al. ("Joseph"), which discloses a current source that utilizes feedback techniques in order to mitigate the effects of power supply ripple. However, the feedback mechanism disclosed in Joseph differs markedly from the Current Reference disclosed herein in that Joseph relies on two complementary current mirror circuits (14 and 16) to establish the quiescent operating point of the current source and to provide ripple rejection to variations in the power supply voltage. Specifically, the current provided by Joseph's current source is replicated by both matched transistors in Joseph's current mirror 14. The collector currents of the two transistors are coupled to the respective collectors of a second current mirror 16. However, the current densities of those transistors are caused to have a ratio of 1:N. In addition, because a resistor 32 is connected in series with the emitter of one of the transistors, the current flowing from collector to emitter of that transistor will determine the base-to-emitter voltage applied to the other current mirror transistor 28. As the base-to-emitter voltage of Joseph' s transistor 28 varies, so will its collector-to-emitter current and, therefore, the current drawn by a current sink 36 coupled to the current driver 22. As will be made clear below, the subject invention provides a distinctly different mechanism that consequently operates in a distinctly different manner.
USPTO Backgrounds
USPTO Backgrounds