1. Field of the Invention
The present invention generally relates to measurement of the electrical characteristics of circuit elements and, more particularly, to the measurement of change of electrical characteristics during manufacturing processes and other environments having high levels of electrical noise.
2. Description of the Prior Art
Virtually all techniques for the measurement of electrical characteristics of materials, particularly when formed into electrical devices such as resistors, capacitors, inductors, transformers, transistors and the like rely on measurement of a response voltage or current to a known input current or voltage applied to two terminals of the device. The voltage can be monitored directly across the terminals of the device using well-known devices such as so-called multi-meters, oscilloscopes or other devices. The current through the device is usually monitored by measuring voltage across a known calibration or test resistance placed in series with the device. Such a test resistance is often built into the measurement instrument and is commonly referred to as a shunt. This shunt typically has a low resistance of a small fraction of an ohm and provides consistency of measurements made with the instrument.
The current or voltage applied during the test may be invariant at one or each of a sequence of levels for the measurement of resistance. Such an invariant voltage or current is often collectively referred to as direct current or DC and is typically used in resistance measurements. Measurements of capacitance and inductance values however requires the application of time-varying voltages and currents, often in the form of a sine wave, and collectively referred to as alternating current or AC.
It should be noted that the very basic arrangement, described above, of a series circuit containing the element or device under test (DUT) and a test resistance theoretically relies of the fact that no additional currents or voltages are added to the circuit. That is, that no voltages or currents will be induced in the DUT other than those caused by the applied current and that all current passing through the test resistor or shunt will also pass through the DUT. However, all electrical circuits are subject to electrical noise generated by the environment. In some cases, shielding of the test leads or the instrument provide .sufficient immunity from such noise. In other cases, elaborate shielding may be required to obtain useful results depending on the accuracy desired.
In the fabrication of electrical components however, it is also often useful to monitor the fabrication process by monitoring changes in electrical characteristics of elements. These tests usually require relatively high accuracy and connection of test instruments to the device being manufactured is often difficult. Therefore, in the past, it has been the practice to provide test structure on the edge of a wafer or substrate and to measure changes in electrical characteristics of the test structure; merely inferring the electrical characteristics of the elements being manufactured. Further, due to the high levels of electrical noise present in many manufacturing processes, it was usually necessary to halt the process and remove the wafer or substrate from the process in order to make the measurement. Therefore the process was interrupted and throughput was diminished. Further, the accuracy of inferences from the measurement was compromised by the need to re-start the process.
At the very large scale of circuit integration in modern devices, it is no longer considered sufficient, in many cases, to infer device fabrication from test structures. Further, in two particular instances, at least, it has been found mandatory to not only directly measure the elements being formed but to do so during the fabrication process, itself. Specifically, in large scale integrated circuits, it is a common practice for the increase of manufacturing yield to provide redundant circuits on the integrated circuit chip or in a module, such as a so-called multi-layer module (MLM) which contains many layers of interconnection patterns for the interconnection of many chips. These redundant elements may be then tested and defective elements disconnected or shunted while functionally substituting ones of the redundant circuits. Disconnection is usually done by the use of fuses which can be electrically, mechanically or optically destroyed without damage, in theory, to the remainder of the integrated circuit. So-called antifuses which are initially of high impedance and are made into low impedance connections by destruction of a dielectric and/or reflow of conductive material are also known for making programmable connections in much the same manner as fusible links are destroyed.
Electrical destruction of fuses is generally preferred at the present time since better operational margins are provided when the fusible element is subjected to a brief pulse of a voltage on the order of 50% greater than the intended operating voltage. Since the fusible elements have a low volume, heating occurs differentially and higher temperatures are developed in the fusible elements than in the other electrical components of the integrated circuit even if those other electrical components cannot be isolated from the pulse. Nevertheless operating margins are not excessive and it is, in any case, necessary to determine that destruction of a fuse has been carried out.
Antifuses and more modern fuses, such as so-called capacitive fuses in which the capacitive change is large and somewhat independent of the resistive change (and which function by causing phase shift to disable a circuit) require monitoring during the programming process since, at the small size of these devices the impedance change may only be a few orders of magnitude during a standard programming pulse. This change of impedance may or may not be sufficient for programming within a particular circuit and further programming pulses may be required. Thus, the need for determining the adequacy of programming requires monitoring of each programmable element.
The large scale of integrated circuits and modules currently possible with current technology also makes testing and repair desirable during fabrication. Many devices currently require several hundred process steps and repairs, while time-consuming and difficult, often become economically preferable after only the first few steps of manufacture. The repair of wiring, particularly on integrated circuits is preferably done through deposition of further metal. In this case, charged species of the deposited material are generally present and may represent injection of current into the DUT which does not also pass through the test resistance. Further, strong, high frequency electrical fields are generally present during material deposition processes and present an unavoidable source of noise of a magnitude which completely masks the desired measurement, or so nearly so that accurate control of the manufacturing process cannot be reliably based thereon.
USPTO Backgrounds
USPTO Backgrounds