1. Field Of The Invention
This invention relates to memory arrays and, more particularly, to an architecture for transferring a plurality of different types of information from a memory array.
2. History Of The Prior Art
Memory arrays are made up of a large plurality of memory devices each capable of storing some form of representation of a one or a zero. Typically the memory devices are arranged in rows and columns so that the state of any devices may be selected to be read or written by control circuitry for selecting a row and a column. In the case of a read operation, the binary condition of the memory device which is being read is presented at the input of a sense amplifier. The sense amplifier is essentially an operational amplifier which amplifies an analog signal presented at its input and converts that signal so that it is presented at the output in a useful digital form.
In a typical prior art memory array, there are often other signals than the data being read from the memory devices at the row and column intersections of the memory array which must be transferred to external circuitry. For example, the name of the manufacturer of the memory array and the particular array identification (the part signature) are typically available through the control circuitry of the array. The results of tests conducted using test registers are other data which are available. Most often, these signals are digital in form. The prior art method of transferring these other signals (referred to hereinafter as extra signals) out of the memory device provided for presenting the extra signals to the sense amplifiers which transfer the data signals from the columns of the memory array so that the extra signals traversed the same path as the data stored in the array.
This handling of the extra signals from the array created at least three problems. First, it required that the digital control signals be first converted into analog signals in order to pass through the sense amplifiers at the array output and then be changed back into digital signals by the sense amplifiers for transmission to the outside world. This, in itself, is a waste where the signal is initially digital in form. Second, the circuitry for transferring the extra signals to the sense amplifiers was often incidental to the purpose of the memory array and was designed as an after thought. Without the planning used in designing the remainder of the array and control circuitry, the circuitry for furnishing these extra signals often generated unexpected parasitic capacitance at a point least able to cope with such capacitance. The overall result was to slow the operation of the memory array.
Third, it prevents any other array access from occurring while these extra signal are being read. In prior art circuits, this was not an issue. However, as the control circuitry for memory arrays has become capable of handling more functions, it has become necessary to be able to read or program the array while furnishing output information containing status information at the pin level. It is not possible for the sensing circuits to do both of these operations at the same time.
USPTO Backgrounds
USPTO Backgrounds