As a cross-point memory, a NAND flash memory, and the like, a laminated memory attracts attention to attain an increase in a degree of integration without being restricted by a limit in resolution of a lithography technology. In such a laminated memory, in some case, a sense amplifier and a decoder are arranged below a memory cell array to reduce a chip size.
However, in the laminated memory in the past, a driver that drives memory cells is arranged in a peripheral section of the memory cell array. Therefore, when a load on the driver is large, an area of the driver increases to cause an increase in the chip size.
USPTO Backgrounds
USPTO Backgrounds