1. Field of the Invention
The present invention relates to a current direction detection circuit that, when reverse direction current flows in a ground side output transistor, is capable of detecting the flow of current, and relates to a switching regulator including the current direction detection circuit.
2. Description of the Related Art
A switching regulator is provided with a power source side output transistor, that defines a main switching element, between a terminal that inputs power and a terminal that is connected with the load and outputs a predetermined DC voltage, and maintains a predetermined DC voltage by turning on/off (conductive/non-conductive) the power source side output transistor. Such regulators are of small size and are capable of achieving high power efficiency and thus are widely used. In recent years, synchronous rectifying switching regulators have been used (see, for example, Japanese Patent Application Laid-open No. 2000-92824), in which a ground side output transistor is additionally provided, defining a synchronous rectifying switching element. Such synchronous rectifying switching regulators make it possible to further improve power efficiency.
FIG. 3 shows the layout of a conventional synchronous rectifying switching regulator. The switching regulator 101 includes a power source side output transistor 111 defined by a P type MOS transistor and a ground side output transistor 112 defined by an N type MOS transistor connected in series between the input power source VCC and ground potential; a smoothing circuit 113 whose input terminal is connected to a point between the two transistors 111, 112 and whose output terminal is connected with the output terminal OUT, respectively; a regulator control circuit 115 that outputs a control signal A and control signal B that perform on/off control of the power source side output transistor 111 and ground side output transistor 112 so as to maintain a predetermined DC voltage in response to feedback input of the voltage of the output terminal OUT; a current direction detection circuit 116 that, when reverse direction current flows in the ground side output transistor 112, detects the reverse direction current and outputs a control signal F; and a ground side output transistor control circuit 117 that outputs an output signal C for controlling the ground side output transistor 112 in accordance with the control signal B and control signal F. In this case, a load 114 is connected at the outside to the output terminal OUT. Also, the smoothing circuit 113 includes a smoothing coil 140 having one terminal connected with the connection point (node D) of the power source side output transistor 111 and the ground side output transistor 112 and the other terminal connected with the output terminal OUT, and a smoothing capacitor 141 having one terminal connected with the output terminal OUT and the other terminal grounded. Also, the control signal A and the control signal B that are output by the regulator control circuit 115 have substantially the same waveform.
The current direction detection circuit 116 includes a comparator 120 that performs a comparison by respectively inputting the voltage of the node D at its inversion input terminal and ground potential at its non-inversion input terminal. Also, the ground side output transistor control circuit 117 includes an AND circuit 130 that inputs the control signal B of the regulator control circuit 115 and the control signal F of the current direction detection circuit 116, and a buffer 131 that delivers an output with an increased current capability.
Next, the operation of the switching regulator 101 will be described with reference to FIG. 4. In FIG. 4, VB is the voltage of the control signal B of the regulator control circuit 115, VC is the voltage of the output signal C of the ground side output transistor control circuit 117, IO is the current flowing in the ground side output transistor 112, and VD is the voltage at the node D. It should be noted that FIG. 4 shows the waveform when the load 114 is light, the case where the load 114 is large is not shown.
In the period in which control signal B is low level, the output signal C is low level, and the ground side output transistor 112 is turned off. The control signal A is also low level, so the power source side output transistor 111 is turned on. Consequently, the current IO flowing in the ground side output transistor 112 is zero, and the voltage VD at the node D is high level.
Since, when the control signal B is high level, the control signal A is also high level, the power source side output transistor 111 is turned off. When the voltage VD at the node D drops, becoming lower than the ground potential, the control signal F becomes high level, with the result that the ground side output transistor 112 is turned on. In this way, first of all, current IO in the positive direction flows from ground potential to the node D. When this happens, the voltage VD at the node D drops from ground potential by an amount of the voltage that is acquired by multiplying this current IO and the on resistance of the ground side output transistor 12.
After this, the current IO gradually decreases linearly, and, in response thereto, the negative voltage VD at the node D gradually rises in linear fashion. If the load 114 is large (not shown), the initial current value is large prior to the commencement of decrease of the current IO. Therefore, before the current IO will become a current in the reverse direction, the control signal B returns to low level after the lapse of a period in which the control signal B is high level. In contrast, if the load 114 is light, the current IO becomes a current in the reverse direction before the high level period of the control signal B has lapsed. This reverse direction current is a current that flows out towards the ground potential, so it represents a power loss and the power efficiency of the switching regulator 101 is lowered to that extent. Accordingly, when the current becomes a reverse direction current, this is detected by the current direction detection circuit 116, which outputs low level control signal F. As a result, the voltage VC of the output signal C becomes low level and the ground side output transistor 112 is thereby forcibly turned off, so that the flow of this current in the reverse direction is minimized.
Thus, when the load is light, the ground side output transistor 112 is forcibly turned off when the current IO flows in the reverse direction, thereby making it possible to increase the power efficiency. The inventor of the present application, as a result of studies directed at achieving further improvements in power efficiency, discovered that there is a certain delay (period to in FIG. 4) from detection of the reverse direction current of the ground side output transistor 112 by the current direction detection circuit 116, before ground side output transistor 112 is turned off, and this delay allows a reverse direction current to flow for a certain period of time, which therefore results in power loss. Also, since the voltage VD at the node D has a wide range of variations from the power source voltage to below ground potential, the comparator 120 of the current direction detection circuit 116, which has as its input voltage a voltage of such a wide range of variations, must be larger in terms of the size of its circuitry compared with an ordinary comparator, whose input voltage is a voltage having a narrow range of variations.
Also, with the switching regulator 101, as shown in FIG. 4, there is a risk that a swing, i.e., ringing of the gradually decaying voltage generated after the forcible turning off of the ground side output transistor 112 will cause the voltage VD at the node D to drop below ground potential, resulting in instantaneous activation of the current direction detection circuit 116, with consequent wasted power consumption or generation of noise.
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