The present invention generally relates to electrochemical etching of a substrate having a surface layer of conductive material.
Electrochemical etching is an established technique for pattern generation on substrates, e.g. in production of so-called PCB (Printed Circuit Board) or PWB (Printed Wire Board) as well as semiconductor wafers. In both cases, the substrate comprises a metal film adhered to a non-conductive base. Generally, a photosensitive resist coating is applied to the metal film, whereupon a lithographic process is used to transfer a desired pattern is from a mask or master to the resist coating, thereby uncovering selected parts thereof. The electrochemical etching step is effected by imposing an electrical current in a conductive etchant between the substrate and an opposite counter electrode, the substrate and the counter electrode being connected to a common power supply as anode and cathode, respectively. During this etching step, the uncovered parts of the metal film are dissolved and the pattern is transferred to the metal film. This type of electrochemical etching is for example known from EP-A1-0 392 738, EP-A2-0 563 744, and WO98/10121.
One major challenge in electrochemical etching is to achieve a uniform etching process over the surface of the substrate, while maintaining a high production yield. This is especially difficult to achieve when etching large substrates. Typical dimensions of substrates or panels used for production of PCB/PWB are 610xc3x97457 mm, although other dimensions are also commonly used. The combination of such a large area to be etched and thin metal films, typically 1-35 xcexcm thick, makes the resistance distribution over the substrate of importance for the resulting etching process. Normally, the electrical current is supplied to the substrate at one or more contact areas at the periphery of the substrate. As a consequence, the resistance will increase towards the center of the substrate. The correspondingly decreasing current density towards the center will lead to a faster etching process at the periphery than at the center part of the substrate. This results in a non-uniformity of the etched pattern. In principle the same problem applies to thicker metal films. As the metal film becomes thinner during the process, the resistance from edge to center of the substrate will increase and lead to the above-described non-uniformity.
The achievement of a high degree of uniformity in the etched pattern also calls for careful optimization of the geometry and dimension of the counter electrode, the alignment of the counter electrode with the substrate, and the distance between the counter electrode and the substrate. Further, a uniform current distribution around the periphery of the substrate should be ascertained, necessitating many and/or large contact areas. Such optimization is difficult to combine with mass production at high throughput.
The uniformity of the etched pattern is also affected by the pattern layout, i.e. if the degree of exposed metal differs over the surface of the substrate, since areas with a high degree of exposed metal will exhibit a slower etching process than areas with a small degree of exposed metal.
The above problems are also evident in the production of semiconductors. Although the substrate in general has a smaller surface area, the number of individual circuits is very large and the metal film is very thin, typically 300 nm-3 xcexcm. Therefore, the resistance distribution from edge to center of the substrate can influence the uniformity of the electrochemical etching process.
The object of the invention is to solve or alleviate some or all of the problems described above. More specifically, the invention should allow for production of etched items at an industrial scale with high quality, also based on substrates that have large surface areas and/or are provided with thin metal films.
This object is achieved, at least partially, by the method, frame element, mask and prefabricated substrate element as set forth in the appended claims.
By providing the frame adjacent to the central surface area portion to be etched, in accordance with the invention, it is possible to reduce or eliminate edge effects, i.e. prevent high current densities from forming at the periphery of central surface area portion, by the frame attracting any excess electrical field formed thereat. Such excess electrical field can be formed when the cathode is larger than the surface area portion to be etched or when the cathode is misaligned therewith. Thus, the frame provides for the use of one and the same counter electrode with different pattern layouts and substrate dimensions.
When properly designed, the frame is also capable of protecting the underlying surface layer such that an electrical current led into the surface layer during the etching step is evenly distributed around the periphery of the substrate. Thus, such a frame is capable of forming a shielded xe2x80x9cdistribution zonexe2x80x9d in the underlying surface layer, in which the electrical current is allowed to distribute evenly around the central surface area portion that is to be etched electrochemically. Hence, by providing the frame at the periphery of the substrate, a uniform current distribution over the circumference of the central surface area portion can be ascertained. Consequently, a more uniform etching process than heretofore can be effected. The provision of the frame also allows for simplified contacting of the substrate, i.e. the use of fewer and/or smaller contact areas than in prior art methods, which is of importance for mass production.
According to a first aspect of the invention, the frame is included in a separate, electrically conductive frame element that is placed over the substrate during the etching step. Thus, the frame element has a conductive surface facing away from the substrate, i.e. towards the cathode. Such a frame element will prevent high current densities from forming at the periphery of central surface area portion, by the conductive surface of the frame element attracting electrical field. The frame element will also form a shielded xe2x80x9cdistribution zonexe2x80x9d in the underlying surface layer.
According to a second aspect of the invention, the frame is formed in the resist coating. Compared to the first aspect of the invention, the inventive method is simplified, in that the step of applying a separate frame is eliminated, while retaining the above-identified benefits of the frame. Further, compared to the first aspect, the amount of electrical power required for the etching can be reduced since the area of bare metal generally is smaller.
According to the second aspect of the invention the frame comprises part of the resist coating as well as the underlying metal layer.
According to the second aspect, the frame can be provided in the resist coating simultaneously with the circuit pattern. In the case of photolithography, the resist coating can be exposed through a mask containing a frame pattern, as well as the circuit pattern to be etched in the central surface area portion. Alternatively, the circuit pattern can be included in a separate mask. It is also conceivable to provide, for patterning and subsequent etching, prefabricated substrates with a resist coating incorporating the frame pattern. In another conceivable alternative, a laminate structure including a resist coating defining at least the frame is attached to the substrate before the etching step.
According to a preferred embodiment of the second aspect, the frame includes a field distribution portion, which is arranged adjacent to the central surface area portion and which has a field distribution pattern uncovering the underlying surface layer to a given degree of exposure, so as to prevent excessive current densities from forming at the periphery of the central surface area portion during electrochemical etching thereof. More specifically, the field distribution portion minimizes the formation of high current densities at the peripheral edge of the central surface area portion by attracting electrical field. Thus, the influence of any misalignment between the cathode and the central surface area portion is reduced, as well as the influence of the geometry of the cathode. By optimizing the degree of exposure of the underlying surface layer in the field distribution pattern, it is possible to control the etching rate at the peripheral edge of the central surface area portion. Preferably, the degree of exposure in the field distribution portion is in the range of about 30-90%, preferably about 50-90%. This has been found to yield a suitably uniform current distribution, i.e. a suitably uniform etching rate, over the surface of the substrate. With a degree of exposure exceeding about 90%, there is a risk that the underlying conductive surface layer is fully removed during the etching step, leading to an undesired loss of electrical contact at the peripheral edge of the central surface area portion. If the degree of exposure is too low, the electrical field might be concentrated to the edges of the central surface area portion, yielding excessive current densities thereat. For the purpose of providing a distribution zone, i.e. to protect the underlying surface layer such that an electrical current led into the surface layer during the etching step is evenly distributed around the periphery of the substrate, the frame preferably has a circumferential periphery portion which uncovers the underlying surface layer to a degree of exposure in the range of about 0-60%, preferably about 0-50%. Normally, the periphery portion will have a degree of exposure near 0%, since there is little need for exposure in this part of the substrate. Any excess electrical field is primarily attracted to the exposed areas of the field distribution portion. However, for reasons of simplicity, the periphery region can have the same degree of exposure as the field distribution portion.
According to a further preferred embodiment of the invention, an internal frame structure is provided between individual circuits of the circuit pattern. In this internal frame structure the underlying surface layer is protected such that an electrical current led into said surface layer during said etching step is uniformly distributed around the periphery of the individual circuits as well. Thus, the internal frame structure provides conductors in the central surface area portion to reduce any differences in electrical current within the circuit pattern during the etching step, and also to prevent any uncontrolled disconnection of individual circuits during the etching step. By proper design of the internal frame structure it is thus possible to distribute the current uniformly between individual circuits, and balance the etching rate over the whole central surface area portion. The internal frame structure can be included in a separate, electrically conductive frame element that is placed over the substrate during the etching step, or be formed by forming a pattern in the resist coating. In the latter case, the internal frame structure extends from the field distribution portion of the frame and has a field distribution pattern uncovering the underlying surface layer to a given degree of exposure. By optimizing the degree of exposure, it is possible to balance the etching rate within the central surface area portion. It has been found that the degree of exposure of the underlying surface layer in the internal frame structure preferably is in the range of about 30-90%, preferably about 50-90%. With a degree of exposure exceeding about 90%, there is a risk that the underlying conductive surface layer is fully removed during the etching step, leading to an undesired loss of electrical contact within the central surface area portion. If the degree of exposure is too low, the electrical field might be concentrated to the edges of the internal frame structure, yielding excessive current densities thereat. Such uncontrolled excessive current densities could lead to undesired and uncontrolled disconnection of individual circuits during the etching step.
It has been found that, for optimum performance, the uncovered portions of the field distribution pattern in the frame, as well as in the internal frame structure, should be essentially uniformly distributed. It has also been found that the uncovered portions of the field distribution pattern should have lateral dimensions of at least about 100 xcexcm, for the electrical field to adequately reach the underlying conductive surface layer through the uncovered portions. In one viable design of the field distribution pattern the uncovered portions are essentially circular, although other shapes could be used as well. The uncovered portions may have any geometrical form as, e.g., the form of any polygon or ellipse.
In one simple embodiment, the field distribution pattern is a screen pattern. Such a pattern can easily be generated by e.g. a laser printer to produce a mask used in a lithographic process for transfer of a pattern to the resist coating on the substrate.
In a preferred embodiment, the inventive method includes the step of forming, in the field distribution pattern of the field distribution portion and/or the internal frame structure, covered portions having such a shape and lateral dimension that individual circuits adjacent to one end of these covered portions automatically are electrically disconnected after a given time during the etching step. In this embodiment, the conductive material underneath each such covered portion will form an electrical connector which will be dissolved by the undercut inherent in electrochemical etching, at a certain stage of the etching process. Such undercut occurs at least towards the end of the etching step, when the electrical field is concentrated to the remaining portions of the uncovered surface layer. Thus, xe2x80x9celectrical fusesxe2x80x9d are integrated in the resist coating. By proper design of the field distribution pattern, selected parts of the central surface area portion can be automatically disconnected from the etching process after a certain etching time. Adequate fuse function in the production of PCB/PWB has been ascertained with covered portions in the form of elongate structures having a lateral dimension of about 50-100 xcexcm to 1-2 mm. For production of semiconductors, the covered portions could have a smaller lateral dimension.
Preferably the elongate structures have the form of triangles, such that the uncovered portions of the metal layer becomes wider towards the central surface area portion.
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