The semiconductor integrated circuit (IC) industry has experienced exponential growth. In semiconductor IC design, standard cell methodologies can be used for the design of semiconductor devices on a chip. Standard cell methodologies use standard cells as abstract representations of certain functions to integrate, for example, millions devices on a single chip. Accordingly, a large number of standard cells are used in the semiconductor IC design.
Input and output pins of the standard cell can be connected to other pins or parts of the IC design to receive or transmit signals. Due to the large number of standard cells used in the IC design, non-ideal connection patterns or unacceptable pin connection patterns may not be detected by IC design tools. As a result, the IC can be susceptible to malfunction or device failure.
USPTO Backgrounds
USPTO Backgrounds