1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, particularly a semiconductor device having a trench isolation structure filled with a CVD oxide film, and to a semiconductor device manufactured thereby. More particularly, the present invention relates to a semiconductor-device manufacturing method for preventing an increase in the thickness of an oxide film formed on a wafer, which would otherwise be caused when a semiconductor device is annealed.
2. Background Art
With reference to FIGS. 1 through 6 and FIGS. 11 through 13, there will be described a conventional method of manufacturing a semiconductor device having a trench isolation structure filled with a CVD oxide film, such as an HDP oxide film or a TEOS oxide film.
As shown in FIG. 1, a dielectric film 2a and another dielectric film 2b are formed on a silicon substrate 1 of one of conductivity types; for example, p-type. Usually, the dielectric film 2a is formed of a SiO2 film, and the dielectric film 2b is formed of a Si3N4 film. In order to form, on the silicon substrate 1, a plurality of active regions and a trench structure for isolating the active regions from one another, the dielectric film 2a, 2b are removed from the position of the surface of the silicon substrate 1 where a trench structure is to be formed. A trench structure 3 is formed to a desired depth in the uncovered area of the silicon substrate 1 through use of the appropriate etching technique, such as the dry etching technique. The silicon substrate 1 having the trench isolation structure 3 formed thereby is shown in FIG. 2.
The wafer is oxidized to an appropriate extent in order to remove an etching-damaged layer or to round the upper corner of the trench structure 3. As shown in FIG. 3, an oxide film 4 is formed along the interior wall surface of the trench structure 3.
As shown in FIG. 4, a CVD oxide film 5, such as a TEOS oxide film or an HDP oxide film, is deposited on the wafer, thereby filling the trench structure 3 with the CVD oxide film 5. As shown in FIG. 5, the surface of the thus-deposited oxide film 5 is removed and smoothed by a method such as a chemical-and-mechanical polishing (CMP) technique. As shown in FIG. 6, the dielectric film 2b is removed from the active regions of the silicon substrate 1, thereby forming a semiconductor device having a trench isolation structure.
In order to impart a desired conductivity to the active regions of the silicon substrate 1, the wafer is subjected to known ion implantation with the dielectric film 2a working as a damage protective film 6.
However, such a method cannot completely protect the silicon substrate 1 from damage stemming from ion implantation. In order to make the silicon substrate 1 recover from damage, after ion implantation the wafer is annealed at a high temperature of 1000xc2x0 C. or more in an atmosphere of inactive gas (for example, nitrogen gas or argon gas) supplied at a flow rate of about 17 cm/min.
As mentioned previously, according to the conventional method, the wafer is annealed at a high temperature, which in turn induces evolution of gas from the CVD oxide film 5 embedded in the trench structure 3 during the course of annealing operation. In a case where wafers are stacked in layers within an annealing chamber, the resultant gas induces formation of an oxide film in a wafer provided below the wafer from which the gas has erupted, resulting in a problem of an increase in the thickness of the oxide films of the wafer.
As shown in FIG. 11, the thus-formed oxide film has a concentric thickness profile within the surface of the wafer, and the thickness of the oxide film gradually increases from the center to the outer periphery of the wafer. Therefore, in a case where the wafer is subjected to ion implantation by way of the thin thermal oxide film 6 after annealing operation, as indicated by arrows shown in FIG. 12, ions penetrate into the silicon substrate 1, as indicated by broken lines shown in FIG. 12; specifically, ions penetrate deep into the substrate at areas where there is formed the oxide film of smaller thickness and penetrate less deep into the substrate at areas where there is formed the oxide film of greater thickness. Thus, a variation arises in the profile of ion implantation.
The thermal oxide film 6 is usually removed before formation of a gate oxide film. However, if an attempt is made to remove the thickened oxide film, the amount to be etched must be increased accordingly. As a result, as shown in FIG. 13, an indentation 7 arises along an angular portion of the CVD oxide film deposited within the trench isolation structure 3, which in turn induces an increase in the standby current of a transistor.
The present invention has been conceived to solve such a drawback of the background art and is aimed at providing a method of manufacturing a semiconductor device capable of preventing an increase in the oxide-film thickness of another wafer, which would otherwise be caused by evolution of gas from the CVD oxide film when a wafer is subjected to high-temperature annealing. The present invention is also aimed at providing a semiconductor device manufactured by the method.
According to one aspect of the present invention, in a method of manufacturing a semiconductor device, which has a trench isolation structures on a silicon substrate, a dielectric film is formed on the silicon substrate of one of the conductivity types. The dielectric film is removed from the areas of the silicon substrate where the trench structures are to be formed. The trench structure is formed in the uncovered areas of the silicon substrate to a predetermined depth. An oxide film is deposited on the interior surface of the respective trench structure. An oxide film is deposited into the respective trench structure by means of CVD. The surface of the deposited oxide film is smoothed by removing the deposited oxide film on the silicon substrate through use of chemical-and-mechanical polishing. A thin oxide film is formed over the areas of the silicon substrate which are to become active regions. Further, the silicon substrate is annealed in inactive gas either at a temperature of 900xc2x0 C. or less, or the silicon substrate is annealed in inactive gas which is supplied at a flow rate of about 35 cm/min.
According to another aspect of the present invention, in a method of manufacturing a semiconductor device, which has a trench isolation structure on a silicon substrate, the process is the same as described above until an annealing step after ion implantation. Further, the silicon substrate is annealed one by one in inactive gas, or the processed silicon substrate is annealed with dummy wafers, which do not erupt any gas, arranged in alternating layers.
According to another aspect of the present invention, in a method of manufacturing a semiconductor device, which has a trench isolation structures on a silicon substrate, the process is the same as described above until an annealing step after ion implantation. Further, the silicon substrate is either thermally oxidized after formation of the thin thermal oxidation film, or an SiN or SiON film is formed on the surface of the thin thermal oxidation film. Thereafter, the silicon substrate is annealed in inactive gas.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
USPTO Backgrounds
USPTO Backgrounds