A flip chip package includes a direct electrical connection of face down (“flipped”) semiconductor components onto substrates or carriers, such as ceramic substrates, or circuit boards. The flip chip semiconductor components are predominantly semiconductor devices, however, components such as passive filters, detector arrays, and MEM devices are also being used in flip chip form. The use of flip chip packaging has dramatically grown as a result of the flip chips advantages in size, performance, flexibility, reliability, and cost over other packaging methods and from the widening availability of flip chip materials, equipment and services.
Flip chips are advantageous because of their high-speed electrical performance, when compared to other assembly methods. For example, eliminating bond wires reduces the delay in inductance and capacitance of the connection, and substantially shortens the current path resulting in a high speed off-chip interconnection. Flip chips also provide the greatest input/output connection flexibility. Wire bond connections are generally limited to the perimeter of the chip or die, driving the die sizes up as a number of connections have increased over the years. Flip chip connections can use the whole area of the die, accommodating many more connections on a smaller die. Further, flip chips are amenable to 3-D integration by stacking over other flip chips or other components.
For almost 25 years, the semiconductor industry has rolled out a new generation of technology that has delivered improved performance at lower costs. One of the challenges faced in semiconductor manufacturing relates to reduction in process costs with each subsequent technology generation. Consequently, packaging processes also need to reduce fabrication costs with each technology generation. Hence, what are needed in the art are improved structures and methods for producing flip chip packages at lower costs.
USPTO Backgrounds
USPTO Backgrounds