1. Related Applications
The present application is related to my copending U.S. application 07/439,133, filed 20 Nov. 1989, and entitled "Improved Detection and Tracking Circuit for PN Code".
2. Field of the Invention
The present invention is related to coherent code tracking loops of the type employed to produce a synchronized pseudonoise (PN) clock signal from a received PN signal. More particularly, the present invention relates to a novel code tracking loop having means for injecting frequency error compensation information into the tracking loop for enhancing the acquisition time of the received PN code.
3. Description of the Prior Art
Heretofore, coherent code tracking loops have been employed to produce PN clock signals which are synchronized to the received PN code sequence signal. Since the received PN code frequency may be affected by doppler frequency shift and/or transmitter offset frequencies, the received PN code frequency differs from the frequency of the VCO in the code tracking loop. Any frequency offset requires longer acquisition time for the received frequency shifted or frequency offset PN code signal.
Heretofore, it was known that a carrier steering correction voltage could be produced by scaling the output phase error signal, or VCO frequency error signal, produced by the carrier tracking loop. The VCO error signal results from frequency deviations between the received carrier signal and the nominal frequency of the VCO in the carrier tracking loop, thus, may be employed to steer or direct the code tracking loop frequency in the direction of the shifted or shifting received code sequence signals.
It would be extremely desirable to provide an improved code tracking loop whose acquisition time is aided by the carrier tracking loop.
USPTO Backgrounds
USPTO Backgrounds