Microelectronic device features continue to shrink to accommodate more transistors and to improve device performance. Shrinking dimensions, however, can result in an increased capacitance and resistance between conductive interconnect lines. Such line resistance and hence RC delay increases may be due to increased surface scattering relative to bulk conduction. In addition electromigration performance may be degraded due to increased current density in smaller conductive lines.
USPTO Backgrounds
USPTO Backgrounds