1. Field of the Invention
The present invention relates to power electronics and power management, and more particularly to a voltage regulator with synchronized and linear clock phase shift for use in multiphase and multi-channel applications.
2. Description of the Related Art
Many current-based multiphase or multi-channel regulators are implemented on an integrated circuit (IC) or chip and employ an internal phase locked loop (PLL) or delay locked loop (DLL) to lock up with a master clock. A DLL is a first-order system which is preferred when the master clock has little or no frequency variation since it is somewhat easier to design and stabilize. A PLL is a second-order system which requires significant design effort. The PLL and DLL configurations must each be stabilized and compensated since they are both feedback loop systems. The PLL/DLL configuration only operates within a limited clock frequency range. Multiple pins are typically required to set the decoding logic to tap the correct phase shift angle position of the PLL/DLL line for each channel. A PLL/DLL configuration has relatively slow response time during start-up or frequency transition in order to synchronize with the master clock. The PLL/DLL configuration requires a significant amount of die and bias current. The number of channels is limited to the number of available taps of the PLL/DLL line.
It is desired to provide a voltage regulator which may operate within a relatively wide frequency range and which may be used in multiphase and multi-channel applications. It is desired that the multiphase or multi-channel voltage converter be relatively inexpensive to design and to implement using the voltage regulator for any suitable number of channels. It is desired to reduce the number of pins used for setting the phase shift angle for each slave device and to provide a linear phase shift angle adjustment. It is desired to reduce or otherwise eliminate stability and design issues and to achieve relatively fast response during start-up or frequency transition.
USPTO Backgrounds
USPTO Backgrounds