1. Field of the Invention
The present invention relates to a manufacturing method of a liquid crystal display device (LCD), in particular, an active matrix liquid crystal display device (hereinafter abbreviated as AM-LCD) that uses a semiconductor thin film. The invention can be applied to an electro-optical device having such a display device.
2. Description of the Related Art
In this specification, the term "semiconductor device" means every device that functions by using a semiconductor. Therefore, each of the above-mentioned display device and electro-optical device is included in the scope of the semiconductor device. However, in this specification, the terms "display device" and "electro-optical device" are used for the sake of discrimination.
In recent years, projectors or the like that use an AM-LCD as a projection-type display have been developed extensively. Further, the demand for AM-LCDs as direct-view displays for mobile computers and video cameras is now increasing.
FIGS. 2A and 2B schematically show the configuration of a pixel matrix circuit in a conventional AM-LCD. The pixel matrix circuit, which constitutes an image display area of the AM-LCD, is a circuit in which thin-film transistors (TFTs) for controlling electric fields applied to a liquid crystal are arranged in matrix form.
FIG. 2A is a top view of the pixel matrix circuit. The regions that are enclosed by a plurality of gate lines 201 extending in the horizontal direction and a plurality of source lines 202 extending in the vertical direction are pixel regions. TFTs 203 are formed at the respective intersections of the gate lines 201 and the source lines 202. Pixel electrodes 204 are connected to the respective TFTs.
Thus, the pixel matrix circuit consists of a plurality of pixel regions that are enclosed by the gate lines 201 and the source lines 202 and are thereby arranged in matrix form, and each pixel region is provided with a TFT 203 and a pixel electrode 204.
FIG. 2B shows a sectional structure of the pixel matrix circuit. In FIG. 2B, reference numeral 205 denotes a substrate having an insulating surface and numerals 206 and 207 denote pixel TFTs formed on the substrate 205. The pixel TFTs 206 and 207 correspond to the TFTs 203 in FIG. 2A.
Pixel electrodes 208 and 209, which correspond to the pixel electrodes 204 in FIG. 2A, are connected to the respective pixel TFTs 206 and 207. Usually, the pixel electrodes 208 and 209 are obtained by patterning a single metal thin film.
Therefore, the pixel matrix circuit having the conventional structure necessarily includes electrode boundary portions (hereinafter referred to simply as boundary portions) 210 and 211 between the pixel electrodes 208, 209, etc.; there necessarily occur steps corresponding to the film thickness of the pixel electrodes 208 and 209. The steps of this type may cause alignment failures of a liquid crystal material, leading to a disordered display image. Further, diffused reflection at the step portions of incident light may deteriorate the contrast or reduce the efficiency of light utilization.
As seen from FIG. 2B, above the semiconductor elements and the intersections of the wiring lines, the pixel electrodes 208 and 209 are formed so as to reflect their shapes. The steps of this type may also cause the above-mentioned problems.
In particular, the above problems appear more remarkably in projection-type displays for projectors and the like, because an image of a small (about 1 to 2 inches), very-high-resolution display is projected in an enlarged manner.
Conventionally, to deal with the above problems, the contrast ratio is increased by shielding regions where an image may be disordered with a black mask (or a black matrix). In recent years, because the device miniaturization has advanced and hence a high degree of controllability of shield regions is required to provide a large aperture ratio, a configuration in which a black mask is formed on a TFT-side substrate is the mainstream.
However, forming a black mask on a TFT-side substrate causes various problems such as an increased number of patterning steps, an increase in parasitic capacitance, and a decrease in aperture ratio. Therefore, a technique for securing a high contrast ratio without causing above-mentioned problems is now desired.
USPTO Backgrounds
USPTO Backgrounds