1. Field of the Invention
The present invention relates, in general, to integrated circuits and, more particularly, to integrated circuits having voltage generator circuits generating an internal power supply voltage from an external power supply voltage.
2. Relevant Background
Integrated circuits are manufactured with increasingly small devices spaced increasingly close together to provide greater functionality for a given chip area. Also, there is a demand for faster integrated circuits (i.e., circuits that provide the specified functionality in smaller amounts of time). These trends results in disparate demands on power supplies that power the integrated circuit. Smaller devices with small inter-device spacing require lower power supply voltages to prevent device damage and to provide adequate isolation between devices.
Typical integrated circuits are coupled to an external power supply voltage (VCC) that is, for example, 5.0 volts or 3.3 volts, although any voltage may be used. On-chip circuitry uses VCC to generate higher and lower voltages for use by internal circuitry. Dynamic random access memory (DRAM) circuits, for example, often require at least one internal voltage that is higher than the externally supplied VCC. DRAM devices store a logic signal as a voltage on a capacitor. A capacitor is accessed during reading and writing by an access transistor. A plurality of access transistors have their gates coupled to a word line. If the capacitor is storing a logic signal at the external power supply voltage, the access transistor gate must be driven to a voltage at least one threshold voltage higher than the external power supply voltage in order to turn on the access transistor. Hence, a need exists for voltage generating circuitry that generates an internal voltage higher than the externally supplied power supply voltage.
A typical solution to these problems is to provide voltage shifting circuitry on an integrated circuit to generate internal voltage supply levels (i.e., voltage supplies available on the integrated circuit) from an externally supplied voltage. An example of this is on-chip circuitry that generates a voltage higher than the externally supplied voltage for powering, for example, the word lines in a DRAM. One way to accomplish this is to generate an internal supply voltage that is above the external supply voltage VCC using a charge pump, a regulator circuit, and a filter capacitor. This higher voltage is referred to as VCCP.
A typical pump circuit turns on and off in response to a regulator signal. The comparator receives inputs to compare the pumped supply voltage VCCP to a reference voltage. One way to regulate V.sub.CCP is to compare a ratio of VCCP to VCC so that the VCCP is VCC multiplied by a constant. For example, by setting the comparator's reference voltage to VCC and comparing to 2/3 VCCP, the charge pump comparator will cause VCCP to regulate to 150% of VCC under all conditions.
One problem with this approach is that VCC can change in magnitude significantly over a variety of operating conditions. During device burn in, for example, VCC is increased to accelerate failure mechanisms. This increase in VCC is multiplied in the generation of VCCP and can result in unacceptably high VCCP levels. Such high VCCP levels can result in reliability problems, permanent threshold voltage shifts, and gate oxide breakdown, among other failure modes.
Another approach is to regulate VCCP to a fixed voltage above VCC (i.e., adding a fixed amount to VCC rather than multiplying VCC by a fixed amount). For example, VCCP can be set equal to VCC+VTN, where VTN is the threshold voltage drop across a typical gate access transistor. This avoids the multiplier effect at high temperatures described above, but results in a somewhat unpredictable VCCP because the threshold voltage of a gate access transistor is dependent on many parameters such as channel doping, gate oxide thickness, channel length, and temperature. VTN is also dependent on the source-to-body bias.
Hence, a need exists for a reference voltage shifter particularly for use in a charge pump circuit that is predictable and yet does not risk generating excessive voltages over an expected range of operating conditions.
USPTO Backgrounds
USPTO Backgrounds