An active matrix substrate used in a liquid crystal display device, etc., typically has a display region including a plurality of pixels, and a region (peripheral region) other than the display region. Each pixel in the display region is provided with a source bus line extending in a pixel column direction, a gate bus line extending in a pixel row direction, a pixel electrode, and a thin-film transistor (hereinafter referred to as a “TFT”) as a switching element. A portion of a TFT substrate that corresponds to a pixel of a display device is also herein referred to as a “pixel”. A TFT disposed as a switching element in each pixel, is referred to as a pixel TFT.
As the pixel TFT, a TFT that includes an amorphous silicon film as an active layer and a TFT that includes a polycrystalline silicon film as an active layer have been widely used in the conventional art.
It has in recent years been proposed that an oxide semiconductor may be used as the active layer of a TFT instead of amorphous silicon and polycrystalline silicon. Such a TFT is called an “oxide semiconductor TFT.” Oxide semiconductors have higher mobility than that of amorphous silicon. Therefore, an oxide semiconductor TFT can operate at a higher speed than that of an amorphous silicon TFT (hereinafter referred to as an “a-Si TFT”).
FIG. 21 is a graph showing an example of the drain current (Id)-gate voltage (Vg) characteristics of an a-Si TFT and an oxide semiconductor TFT. As can be seen from FIG. 21, the oxide semiconductor TFT has higher mobility than that of the a-Si TFT. The oxide semiconductor TFT has a sharper rise in the Id-Vg characteristics than that of the a-Si TFT, and has a smaller off-current than that of the a-Si TFT. Thus, the oxide semiconductor TFT is more excellent in off-characteristics as well as on-characteristics.
Meanwhile, there is a known technology in which a gate driver for driving gate bus lines is monolithically (integrally) formed on a substrate. Such a gate driver is called a “monolithic gate driver.” The monolithic gate driver typically includes TFTs (circuit TFTs) that are formed using the same semiconductor film of which the pixel TFTs are formed. Oxide semiconductors have high mobility, and therefore, are also suitably used in the circuit TFT.
Incidentally, in an active matrix liquid crystal display device including an active matrix substrate, when the display device is turned off by the user, the displayed image may not immediately disappear completely, leaving a white blurred image. This is because when the device is turned off, a path for discharging electronic discharge stored in pixel capacitances is cut off, and therefore, residual charge remains in pixel regions. When the device is turned on with the residual charge remaining in the pixel regions, flicker, etc., occurs due to the residual charge, resulting in a decrease in display quality. Therefore, there is, for example, a known technique of, when the device is turned off, driving all the gate bus lines into the selected state (on-state) and connecting all the source bus lines to the ground (GND), and thereby discharging electric charge from the panel.
In the case of a panel having a gate driver which is not monolithically formed, the TFTs of the panel are only pixel. TFTs, and therefore, when the device is turned off, it is necessary to discharge electric charge from the display region and the gate bus lines. Therefore, by employing the above-mentioned technique, the decrease in display quality due to the residual charge can be reduced.
In contrast to this, in the case of the gate driver monolithic panel, it is necessary to discharge electric charge from floating nodes in the monolithic gate driver (electric charge on two floating nodes indicated by reference signs netA and netB described below) in addition to the display region and the gate bus lines.
In the case of a liquid crystal panel having a gate driver including a-Si TFTs (hereinafter referred to as an “a-Si gate driver monolithic panel”), the a-Si TFT has a relatively large off-leakage current, and therefore, electric charge on floating nodes (hereinafter also referred to as “floating electric charge”) in the region other than the display region (including floating nodes in the monolithic gate driver) is discharged in about 3 msec. However, in the case of a liquid crystal panel including oxide semiconductor TFTs, which have a small off-leakage current (hereinafter referred to as an “oxide-semiconductor gate driver monolithic panel”), it is difficult to quickly discharge floating electric charge from the circuit other than the display region, and therefore, uneven charge caused by floating electric charge may not be sufficiently reduced only by the above-mentioned technique. As shown in FIG. 21, the off-characteristics of the oxide semiconductor TFT are significantly excellent, particularly when a bias voltage applied to the gate is 0 V (no bias), compared to the a-Si TFT, and the off-leakage current is smaller than that of the a-Si TFT by two or more orders of magnitude. Therefore, when the gate is off, floating electric charge is not easily discharged from a node connected to the oxide semiconductor TFT through that TFT. As a result, electric charge remains in the monolithic gate driver over a long period of time, which may cause uneven charge.
With the above in mind, Patent Document No. 1 by the present applicant discloses a turn-off sequence suitable for an oxide-semiconductor gate driver monolithic panel. The term “turn-off sequence” refers to a series of operations that is performed in a liquid crystal display device when an external voltage supply is shut off.
The turn-off sequence disclosed in Patent Document No. 1 will be described with reference to FIGS. 22 and 23. As shown in FIG. 22(a), the turn-off sequence includes an initialization step, a first discharge step, and a second discharge step. In the initialization step, the states of bistable circuits that constitute a shift register are initialized. In the first discharge step, only a clear signal H_CLR is set to a low level, so that all the gate bus lines are driven into the selected state, and electric charge is thereby discharged from the pixel regions. In the second discharge step, the clear signal H_CLR is set to a high level, so that electric charge is discharged from floating nodes in the bistable circuits. In the turn-off sequence, a first gate on-potential VGH1 is used as the high-level potentials of a clock signal H_CK and a negative power supply voltage H_VSS, and a second gate on-potential VGH2 that has a lower fall rate that that of the first gate on-potential VGH1, i.e., whose potential level decreases relatively slowly when the power is turned off is used as the clear signal H_CLR. The gate on-potentials VGH1 and VGH2 are shown in FIG. 22(b). Enlarged waveforms of the clear signal H_CLR, the clock signal H_GCK, and the VSS signal H_VSS that occur when the power is turned off (forced termination) are shown in FIGS. 23(a) and 23(b). Because the second gate on-potential VGH2 having a lower rise rate is used as the clear signal H_CLR, only the clear signal H_CLR can be maintained at the high level in the second discharge step. This can increase the amount of a leakage current of a transistor to the gate of which the clear signal is applied (hereinafter referred to as a “clear transistor”), and therefore, residual charge can be quickly removed from the circuit.
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