Semiconductor process technology has been making many advancements over the recent years. As a result, device sizes and dimensions have been dramatically reduced. Some developments enable electronic circuits such as computer and instrumentation circuits to become extremely fast and powerful. But as the device features continue to shrink, the distance between conductive lines also decreases, creating the need for a dielectric with a lower dielectric constant (k). Presently, chemical vapor deposition (CVD) types of dielectrics such as Carbon Doped Oxide (CDO) that has a dielectric constant of greater than 3.0 are being used. Similarly, current interconnect interlayer dielectric (ILD) schemes use either SiO2 based films (e.g., OSG “CDO” or SiOF formulations) or so called low k organic or inorganic polymer films (e.g. SILK™, FLARE™t, GX3™, MSQ, and HSQ). These ILD films are formulated to be either solid or porous filled. The porous films can have a lower k based on the higher ‘air’ content. The range of k for these films can range from 4.2 to 2.2. Thus, the current generation of ILD films would not meet the less than 2.0 k requirements of newer semiconductor devices.
Certain low k (dielectric constant) materials have been proposed, including various carbon containing materials, e.g., organic polymers and carbon doped oxides. Although such materials may serve to lower the dielectric constant, they may offer inferior mechanical properties, such as poor mechanical strength or susceptibility to cracking. Accordingly, there is a need for a semiconductor device that includes a air gap dielectric that can insulate adjacent conductive lines. In addition, there is a need for a process for making such a device.
USPTO Backgrounds
USPTO Backgrounds