The present invention relates to an analog-to-digital converter latch circuit, and particularly to such a circuit as characterized by rapid operation.
Attempts are continually being made to advance the state of the art in the development of faster means of conversion from an analog signal to a digital value. In a typical analog-to-digital converter, one or more comparators receive an analog signal and produce an output relative to one or more fixed analog levels. At a given sampling time the comparison result may be applied to a bistable circuit or latch for temporarily representing the level of the analog signal. The state of the latch is then read out in generating the digital result.
The most basic factor limiting high speed performance in an analog-to-digital converter circuit is the capacitance in the circuit layout and in the active devices employed. Unavoidable stray circuit capacitance in parallel with the load resistors needed to produce the requisite voltage gain in the comparator stage causes the signal to be delayed by an amount of time that nonlinearily depends on the amount of signal overdrive applied to the comparator stage, and on the rate of change of that signal. RC time constants predict the delay and signal slewing as the comparator output signal propagates into the latch. The input signal may be changing rapidly just prior to operation of the latch and the capacitances associated with the load resistors can be charged at their extreme value an instant before sampling. The initial states of circuit capacitances can therefore cause very large offsets in the time of final response of a comparator.
One solution to the problem might involve retaining the comparator output at a given level prior to sampling, i.e. maintaining the comparator's mid-state level corresponding to the meta-stable level for the following latch. Holding the output of the comparator at the mid-state value could be accomplished by means of analog switches. However, besides being inherently slow, stray capacitances are also associated with this method.
USPTO Backgrounds
USPTO Backgrounds