1. Field of the Invention
The present invention relates to plasma display panels and a method of manufacturing them, and in particular relates to the dielectric layer covering the transparent electrodes.
2. Description of the Related Art
Plasma display panels (hereinbelow abbreviated to PDP) have attracted attention as large-screen full color display devices. In particular, in a three-electrode surface discharge type AC type PDP, a plurality of display electrode pairs that generate surface discharges are formed on a display side substrate. Address electrodes orthogonal to these display electrodes and a phosphor layer covering these are formed on a rear face substrate. The fundamental basis of driving a PDP is that a large voltage is supplied to the display electrode pairs to effect resetting. A discharge is generated between one electrode of an electrode pair and an address electrode, and a sustaining discharge is generated by applying a sustaining voltage across the display electrode pair utilizing the wall charge generated by this discharge.
A full colour display is achieved by emission of fluorescence colours, for example RGB (red, green, blue) by the phosphor layer provoked by the plasma generated by this sustaining discharge. A transparent electrode material is therefore employed for the display electrode pairs formed on the display side substrate.
This transparent electrode material is for example a semiconductor, typically consisting of ITO (a mixture of indium oxide In2O3 and tin oxide SnO2). The conductivity of this is lower than that of a metal. In order to raise the conductivity, a thin metallic conducting layer is therefore added on top of the transparent electrodes.
However, the dielectric layer covering the transparent electrodes is normally formed by forming a layer of dielectric paste on the substrate and firing at high temperature. In this high-temperature firing step, or due to high temperature in subsequent operation, there is the problem that the resistance of the transparent electrodes rises. Such rise in the resistance of the transparent electrodes causes in particular a rise in the sustaining discharge voltage between transparent electrode pairs, making drive of the PDP difficult.
The cause of the rise of resistance of transparent electrode pairs is not absolutely certain but is inferred to be that the transparent electrodes and the dielectric layer that is in contact with and covers these react with each other under high temperature conditions. The result of such reaction is that the chief constituents that contribute to the conductivity of the transparent electrodes become included in the dielectric layer.
In view of the foregoing, it is an object of the present invention to provide a plasma display panel and method of manufacturing it whereby the rise of resistance of the transparent electrodes can be prevented.
A further object of the present invention is to provide a plasma display panel and method of manufacturing it whereby the sustaining discharge voltage can be kept low by lowering the resistance of the transparent electrodes.
In order to achieve the above object, according to the present invention, in a plasma display panel comprising transparent electrodes and a dielectric layer covering said transparent electrodes on at least one substrate of a pair of substrates facing each other with a discharge space therebetween, the main constituent of the transparent electrodes is included in the dielectric layer.
Further, in another invention, the main constituent of the transparent electrode is indium oxide and indium oxide is included in the dielectric layer. By including the main constituent of the transparent electrodes in the dielectric layer, it is believed that the drop in conductivity caused by diffusion of the dielectric substance in the transparent electrodes during high-temperature processing is prevented.
USPTO Backgrounds
USPTO Backgrounds