1. Field of the Invention
The present invention relates to semiconductor devices and methods for driving the semiconductor devices.
Note that in this specification, a semiconductor device means a device including a semiconductor element or a circuit including a semiconductor element.
2. Description of the Related Art
Techniques for reducing the power consumption of semiconductor devices have been developed. In order to reduce power consumption, transistors each including a channel formation region in a silicon layer are used for a complementary metal oxide semiconductor (CMOS) circuit.
In a CMOS circuit, direct-path current between power supply lines is reduced by turning on one of an n-channel transistor and a p-channel transistor provided between the power supply lines and turning off the other of the n-channel transistor and the p-channel transistor. However, when gates of the n-channel transistor and the p-channel transistor are increased in size and the amplitude of voltage is changed slowly, the n-channel transistor and the p-channel transistor are concurrently turned on in a period during which voltage applied to the gates of the n-channel transistor and the p-channel transistor is changed. Thus, the CMOS circuit has a problem of insufficient reduction in direct-path current (for example, Patent Document 1).
USPTO Backgrounds
USPTO Backgrounds