The present invention is directed toward computer memory, and more particularly to a non-volatile phase change memory device.
There are two major groups of computer memory: non-volatile memory and volatile memory. Frequent input of energy to retain information is not necessary in non-volatile memory but is required in the volatile memory. Examples of non-volatile memory devices are Read Only Memory, Flash Electrical Erasable Read Only Memory, Ferroelectric Random Access Memory, Magnetic Random Access Memory, and Phase Change Memory. Examples of volatile memory devices include Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM). The present invention is directed to phase change memory (also known as PCM, PRAM, PCRAM, Ovonic Unified Memory, Chalcogenide RAM and C-RAM).
In phase change memory, information is stored in materials that can be manipulated into different phases. Each of these phases exhibits different electrical properties which can be used for storing information. The amorphous and crystalline phases are typically two phases used for bit storage (1's and 0's) since they have detectable differences in electrical resistance. Specifically, the amorphous phase has a higher resistance than the crystalline phase. Furthermore, the amorphous and crystalline phases in phase change material are reversible.
Glass chalcogenides are a group of materials commonly utilized as phase change material. This group of materials contain a chalcogen (Periodic Table Group 16/VIA) and a more electropositive element. Selenium (Se) and tellurium (Te) are the two most common semiconductors in the group used to produce a glass chalcogenide when creating a phase change memory cell. An example of this would be Ge2Sb2Te5 (GST), SbTe, and In2Se3. However, some phase change materials do not utilize chalcogen, such as GeSb. Thus, a variety of materials can be used in a phase change material cell as long as they can retain separate amorphous and crystalline states.
A phase change memory cell is programmed by applying a pulse of sufficient strength to alter the phase of the phase change material inside. This is typically achieved by applying an electrical pulse through the phase change material. Due to ohmic heating, the phase change material changes its phase. A relatively high intensity, short duration current pulse with a quick transition at the trailing edge results in the phase change material melting and cooling quickly. The phase change material does not have the time to form organized crystals, thereby creating an amorphous solid phase. A relatively low intensity, long duration pulse allows the phase change material to heat and slowly cool, thus crystallizing into the crystalline phase. It is possible to adjust the intensity and duration of the pulses to produce a varying degree of resistance for multi-bit storage in a memory cell.
A phase change memory cell is read by applying a pulse of insufficient strength to program, i.e. to alter the phase of, the material. The resistance of this pulse can then be read as a “1” or “0”. The amorphous phase, which carries a greater resistance, is generally used to represent a binary 0. The crystalline phase, which carries a lower resistance, can be used to represent a binary 1. In cells where there are varying degrees of resistance, the phases can be used to represent, for example, “00”, “01”, “10”, and “11”.
USPTO Backgrounds
USPTO Backgrounds