Memories used in data processing systems are accessed for both read and write operations. Every data element stored in memory has a unique address associated therewith. The size or length of the addressable data element may vary from a single bit (bit addressable) to multiple bytes. In bit addressable memories, any single bit may be read from and/or written into the memory. However, for most memory systems one or more bytes are stored at each address and are accessed for each read/write operation.
Data elements accessed are not always of a length which is consistent with the performance of various other devices and operations within the data processing system. For example, data variables and data instructions may encompass several adjacent memory locations or, alternatively, may require fewer bits than in a full data element. Another example involves the accessing of a memory where the number of bits on a bus is less than the data element length. A data bus might be one byte (eight bits) wide, whereas the data element in the memory might be four bytes (thirty-two bits) wide.
For data memory systems where a word is to be overwritten into a memory having addressable data elements of more than a word, a read/modify/write operation is typically performed. Since the data word cannot be written directly into the memory, the data element having the proper address is first read into a register. The data element is then modified by overwriting the new word into the correct location within the data element. The modified data element is then written back into memory to complete the operation. The conventional read/modify/write operation has a problem which tends to slow down the operation and can have a negative impact on the overall performance of the data processing system. A read/modify/write operation requires three clock cycles, one cycle each to read, modify and write the data element into the memory. In contrast, a standard write operation to a memory, where the word to be written is the same, size as stored data elements within the memory, can be accomplished in one clock cycle.
USPTO Backgrounds
USPTO Backgrounds