1. Field of the Invention
Embodiments of the present invention generally relate to integrated circuit (IC) devices, and more particularly, to an input circuit configuration for reducing noise in receiver circuits caused by simultaneous switching of multiple inputs.
2. Description of the Related Art
In integrated circuit (IC) devices, input signals are applied to device pins and carried to input nodes of receivers on input signal lines. As an example, FIG. 1 illustrates a conventional IC device 100, in which input signals (IN1-N) are carried from device pins 102 to input nodes 112 of receiver circuits 110 via input signal lines 105. Several sources of capacitance (e.g., package capacitance caused by various silicon and metal junctions on the device), shown as capacitors 104, are typically coupled to the input signal lines 105 between the device pins 102 and the input nodes 112 of the receiver circuits 110.
While one node of a capacitor 104 is coupled to the input signal line 105, the other node is typically coupled to a supply voltage line of the device, such as a VDD supply voltage line 106 or a ground (e.g., Vss) line 108. Electro-static discharge (ESD) circuits 120 may also be coupled to the input signal lines 105, to prevent the receiver circuits 110 from damage due to high voltages applied to the input signal lines 105. As illustrated, the ESD circuits 120 may also be coupled between to VDD and Vss lines 106–108.
The supply voltage lines 106–108 are typically coupled externally to a device pin 102 through some parasitic elements 114, thus serving as a return path for the input signal (e.g., a path back to the signal source external to the device 100). For example, as illustrated, the VDD supply voltage line 106 and a parasitic element 114D may provide a return path for an input signal during a low to high transition (‘0–1’), while the GND line 108 and parasitic element 114S may provide a return path for the input signal during a high to low transition (‘1–0’).
As is well known, an input switching from high to low is actually discharging a capacitor that loads the input signal line. The resulting rapid change in current (di/dt) due to multiple input signals transitioning is cumulative and can momentarily raise the ground voltage level (VSS) or lower the supply voltage level (VDD). Depending on the polarity of input signal's transition, the quantity of current in the return path changes, which results in different common ground noise, commonly referred to as simultaneous switching noise (SSN), which can cause jitter at the input node 112 of the receiver circuits 110.
As operating frequencies continue to increase, input signals switch more and more rapidly, which typically increases input jitter caused by SSN. Furthermore, the noisy power supply lines affect operation of the receivers, as at least one of VSS or VDD is typically used to generate the output signal (depending on the polarity of the input signal).
Accordingly, what is needed is an input circuit that reduces jitter of an input signal due to a common input signal return path.
USPTO Backgrounds
USPTO Backgrounds