1. Field of the Invention
The present invention relates to an electrode structure of a TCP (Tape Carrier Package) semiconductor chip.
2. Description of the Related Art
As an electronic apparatus improves in function, the number of pins of an LSI package mounted on the electronic apparatus increases, and the pitch between adjacent pins is narrowed, whereas the LSI package is required to be thinned in accordance with miniaturization of the electronic apparatus. In order to meet the requirement under the conditions that the pins are increased and the pitch is narrowed, a TCP using a TAB (Tape Automated Bonding) system is widely used.
FIG. 1 is a view of a conventional TCP, and FIG. 2 is a cross-sectional view taken along the line II--II of FIG. 1.
An insulation tape 11 includes a device hole 12, outer lead holes 13, and perforation holes 14. The outer lead holes 13 are arranged so as to surround the device hole 12. The perforation holes 14 are arranged along the two opposed sides of the insulation tape 11. Leads 15 are formed on the insulation tape 11, and each have one end extending into the device hole 12 and the other end extending outside the outer lead holes 13. A semiconductor chip 16 is located within the device hole 12. One end of each lead 15 is connected to its corresponding one of bumps 17 on the chip 16. The semiconductor chip 16 and its periphery are covered with resin 18. The insulation tape 11 is formed by resin such as polyimide and polyester. While the leads 15 are formed by, e.g., copper (Cu), the bumps 17 are formed by, e.g., gold (Au).
FIG. 3 is an enlarged view of the circled area A shown in FIG. 1, and FIG. 4 is also an enlarged view of the semiconductor chip 16 and its peripheral portion.
The bumps 17 are arranged in a staggered fashion on the periphery of the semiconductor chip 16 and, in other words, the bumps 17 are arranged on the periphery of the chip 16 so as to form a double ring. All the bumps 17 forming the inner and outer rings of the double ring have the same size and the same shape, such as a square shape.
There are two distances between the edge of the device hole 12 and one end of each of the leads 15 since the long and short leads 15 are alternated with each other. While the short leads 15 are connected to the bumps 17 forming the outer ring, the long ones are connected to the bumps 17 forming the inner ring. This arrangement of the leads 15 and bumps 17 is effective in providing a semiconductor device capable of resolving the problem that the pins are increased in number and the pin pitch is narrowed.
However, when the leads 15 are bent on the insulation tape 11, or when the tape 11 and chip 16 are not aligned exactly, there occurs a drawback in which the bonding strength of leads 15 and bumps 17 is lowered, and adjacent leads 15 are short-circuited with each other.
FIG. 5 shows a case where the bonding strength of leads 15 and bumps 17 is decreased because of a bend of the leads 15. The more bent the leads 15, the smaller the area of regions overlapping the leads 15 and bumps 17, indicated by hatching in FIG. 5. Inevitably the small overlapping regions decrease the bonding strength of leads 15 and bumps 17.
FIGS. 6 and 7 show a case where the bonding strength of leads 15 and bumps 17 is lowered because of inexact alignment of the insulation tape 11 and semiconductor chip 16. More specifically, when the chip 16 is displaced in parallel with the edge of the device hole 12 (FIG. 6) or when it is rotated within the device hole 12 (FIG. 7), the area of regions overlapping the leads 15 and bumps 17, also indicated by hatching, is decreased as the displacement or rotation becomes greater. Inevitably the decrease in the overlapping regions decreases the bonding strength of the leads 15 and bumps 17.
FIG. 8 shows another example of arrangement of the bumps 17 on the semiconductor chip 16. Each of the bumps 17 has a rectangle one side of which is parallel to the edge of the chip 16 and longer than the other side perpendicular to the edge thereof. All the bumps 17 have the same shape and the same size. This shape allows the bonding strength of leads 15 and bumps 17 to be secured sufficiently even though the leads 15 are bent or the tape 11 and chip 16 are not aligned accurately.
If, however, the leads 15 are bent as shown in FIG. 9, or the tape 11 and chip 16 are displaced as shown in FIGS. 10 and 11, there occurs a drawback in which a short circuit is caused between adjacent leads 15.
As described above, conventionally, the bumps of the semiconductor chip are arranged in a staggered fashion in order to resolve the problem that the pins are increased in number and the pin pitch is narrowed. However, this arrangement lowers the bonding strength of leads and bumps and causes adjacent leads to be short-circuited when the leads are bent or the insulation tape and chip are not aligned exactly.
USPTO Backgrounds
USPTO Backgrounds