Many devices use low-dropout voltage regulators (LDO) to supply regulated power for highly integrated digital circuits. Generally, it is desirable to provide a stable regulated voltage in view of a wide variety of loads, operating supplies, etc.
LDO are often used to supply the highly integrated digital circuit through an external battery supply. Such highly integrated digital circuits normally operate synchronous to a system clock. In each clock cycle fast current spikes are induced causing a serve voltage change of an LDO output voltage. This may cause a malfunctioning of the highly integrated digital circuit. In general, a feasible on-chip output capacitor and an error amplifier with high bandwidth and slewing are used to provide a required load transient response. However, such an error amplifier with high bandwidth and slewing demands a corresponding current budget.
USPTO Backgrounds
USPTO Backgrounds