RF TAG chips have a transponder and a digital memory, which serve for labeling or identifying objects. Such known TAG chips can be incorporated in labels, banknotes, smart cards and the like. The TAG chip transponder has an antenna for reading out and writing in identification or label information, wherein this information is available upon RF remote retrieval or can be written to the digital memory by means of RF transmission.
The RF TAG chips have a typical chip size whose area is less than 0.5 mm2 and whose thickness is less than 100 μm.
These small semiconductor chips have hitherto been taken from a sawing film and transferred to a liner with the aid of a semiconductor chip bonder in a “PICK and PLACE method”. An adhesive for fixing the semiconductor chip on the liner is either applied by dispensing or may already be offered on the liner or is already situated on the semiconductor chip rear side.
This method requires at least 200 ms per semiconductor chip even when high-speed semiconductor chip bonders are used, such that an appreciable increase for manufacturing throughput is no longer possible. In this case, the liner has to be coordinated with the end product, which results in a corresponding diversity of types for the handling mechanism of the liner. This means that the device has to operate extremely flexibly in terms of the positioning and populating of liners.
The demand for smart cards or banknote labels and similar liners equipped with such semiconductor chips is constantly rising, however, such that singulating semiconductor chips of a semiconductor wafer and applying them to a liner by means of single bond wiring technology do not suffice to achieve an increased manufacturing rate corresponding to requirements.
USPTO Backgrounds
USPTO Backgrounds