Fin-based field effect transistors (FINFETs) are vertical transistor devices in which a semiconductor fin is located on a substrate and is used to define the source, drain, and channel regions of the device. The gate structure overlies the fin in the channel area, and in some configurations multiple fins may be used to provide a multi-gate transistor architecture. The multiple gates may be controlled by a single gate electrode, where the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes.
In some implementations, different types of semiconductor materials may be used for different device types, such as silicon for NFET devices and silicon germanium (SiGe) for PFET devices, to provide desired electron or hole conductivity, respectively. With ever-increasing device integration densities, (e.g., 10 nm and beyond), for semiconductor on insulator (SOI) implementations, FINFETS with different types of fin materials may be challenging to implement.
As such, further enhancements in semiconductor devices may be desirable in some applications, such as next generation FINFET devices with relatively small dimensions, for example.
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