1. Field of the Invention
The present invention relates to an electrode mounting structure, and more specifically to an electrode mounting structure for a flat panel display.
2. Description of the Related Art
Flat panel displays (FPD), such as liquid crystal displays (LCD), organic light emitting diodes (OLED) and plasma display panels (PDP), are rapidly replacing cathode ray tubes (CRT). Plasma display panels are self-emitting, highly luminous, wider viewing angle, and simpler fabrication process, making them a frequent choice in display industry.
In the manufacturing process of a plasma display panel, a front substrate is fixed to a rear substrate with discharge cells formed therebetween. A plurality of circuit board electrodes are then connected with corresponding bonding electrodes on bonding areas of the front and rear substrates for control of the discharge cells. The circuit board electrodes connect with other electrical devices, thereby quality of the PDP is affected by bonding strength and reliability of the mounting structure between the circuit board electrodes and bonding electrodes.
FIG. 1 is a top view of a bonding area in a front substrate in a conventional PDP. PDP 10 comprises a front substrate 12 and a rear substrate 14 aligned therewith. A plurality of bonding electrodes 16 are formed between the substrates and extend to an edge 13 of the front substrate 12. A dielectric layer 18 is formed on the front substrate 12 to expose a bonding area 20 with bonding electrodes 16 exposed by the rear substrate 14 and the dielectric layer 18. The bonding area 20 comprising a predetermined circuit board electrode area 22 electrically connects a circuit board.
FIG. 2 is a top view of a circuit board 40 bonded with the front substrate 12 by a conductive layer 30 formed on the predetermined board electrode area 22, and FIGS. 3a and 3b are sectional diagrams of FIG. 2 along line 3a–3a′ illustrating the mounting process. As shown in FIGS. 2 and 3a, the circuit board 40 is positioned on the predetermined board electrode area 22, wherein each circuit board electrode 42 of the circuit board 42 corresponds to a bonding electrode 16 of the front substrate 12. After thermal compression bonding, circuit board electrodes 42 are bonded and electrically connected to the corresponding bonding electrodes 16 by the conductive layer 30. However, since the conductive layer 30 is only formed on the predetermined board electrode area 22 between the two electrodes, a bonding electrode exposure area 28 is exposed on the bonding area 22 beyond the conductive layer 30 and a spill area 32 of the conductive layer 30 formed by the thermal compression process. Thus, referring to FIG. 3b, a silicon paste 34 covers the bonding electrode exposure area 28 in order to protect bonding electrodes 16 from moisture and air. However, due to the essential silicon paste and the mean bonding strength between the substrate and the circuit broad, this method increases processing time and reduces reliability.
USPTO Backgrounds
USPTO Backgrounds