The present invention is directed to data communication systems and methods. More specifically, various embodiments of the present invention provide a computer network system configured for disaggregated I/O (input/output). A PCIe (Peripheral Component Interconnect Express) interface can be used, but can be others as well.
There is a growing trend in data centers to disaggregate I/O components and memory. I/O components such as NIC cards and HBA (host bus adapters) typically have a different cadence than CPU. Hence moving these I/O components out of the server box and into a central I/O appliance leads to better serviceability and reduced TCO (total cost of ownership). Further centralizing I/O resources coupled with virtualization can lead to better utilization of resources in a data center based on bandwidth requirements further leading to reduced costs. Disaggregating system memory is very beneficial for data center design as it allows for scaling memory capacity independent of the number of servers.
All of this however requires the need to cable buses such as PCI-Express or QPI (Quick Path Interconnect) over long distances. Such cabling leads to a lot of wires. An ×16 PCI Express for example has 64 wires. Further copper cabling has distance limitations. Hence a mechanism is needed to a) aggregate many serial lanes into few high speed lanes and b) transport the high speed bit stream reliably over long distances.
Over the past, there have been many types of communication systems and methods. Unfortunately, they have been inadequate for various applications. Therefore, improved communication systems and methods are desired.
USPTO Backgrounds
USPTO Backgrounds