1. Field of the Invention
The present invention relates generally to integrated circuit packaging and, more particularly, to a method and apparatus for attaching an integrated circuit die to a leadframe or substrate.
2. Background of the Related Art
This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
The packaging of electrical circuits is a key element in the technological development of any device containing electrical components. A single integrated circuit die is typically encapsulated within a sealed package to be mounted on a printed circuit board (PCB) or a similar apparatus for incorporation into a system. The integrated circuit die is generally encapsulated within a molding compound to protect the die from external contamination or physical damage. Because the integrated circuit die is generally encapsulated, the encapsulated integrated circuit package also provides a system of interconnects for electrically coupling the integrated circuit die to a (PCB) or other external circuitry.
Two common surface mount techniques include using lead-on-chip (LOC) and board-on-chip (BOC) packaging. For LOC packages, an integrated circuit die is typically attached to a leadframe. A leadframe is a metal frame comprised of a plurality of lead fingers. The integrated circuit die is physically attached to the lead fingers by an adhesive, such as tape or epoxy, and electrically coupled to the lead fingers by bond wires. Prior to the encapsulation process, the die is typically mounted to the lower surfaces of the lead fingers. The lead fingers are electrically coupled to the integrated circuit die by bond wires which extend from the lead finger to pads along the center of the integrated circuit die. The leadframe package is then encapsulated such that the lead fingers extending from the integrated circuit die protrude from the edges of the molding compound used to encapsulate the module. A molded package is then excised from the leadframe resulting in an encapsulated integrated circuit die with lead fingers extending outside of the molding compound to electrically couple the integrated circuit die to a PCB or other electrical device.
For BOC packages, the integrated circuit die is attached to a substrate. The integrated circuit die is mounted on the substrate xe2x80x9cface-down.xe2x80x9d In this instance, the substrate contains a slot. Since the integrated circuit die is mounted face-down, the bond pads on the surface of the integrated circuit die are arranged to correlate with the slot opening in the substrate. Bond wires are attached from the bond pads on the integrated circuit die to the backside of the substrate. The substrate contains conductive traces to distribute electrical signals to pads along the backside of the substrate which will eventually be attached to a PCB or other external device.
Alternately, the integrated circuit die may be attached to the substrate xe2x80x9cface-upxe2x80x9d. That is to say that the side of the integrated circuit die containing the bond pads for wire bonding the integrated circuit die to the substrate is left exposed on the top surface. This is known as chip-on-board or COB packaging. The backside of the integrated circuit die, i.e., the side not containing the bond pads, is adhered to the substrate. In a COB package, bond wires are attached from the surface of the integrated circuit die down to pads on the surface of the substrate. The substrate contains conductive traces which route signals from the top side of the substrate to the backside of the substrate.
Regardless of whether the integrated circuit die is mounted to the substrate face-up (COB) or face-down (BOC), either the die or the substrate is generally disposed with an adhesive, such as tape or epoxy, in order to attach the die to the substrate. Finally, the entire package is generally encapsulated in a molding compound. Various techniques such as pin grid array (PGA) or ball grid array (BGA), may be incorporated to provide a means of connecting the integrated circuit package to the PCB or other external device.
Furthermore, regardless of whether LOC or BOC/COB packaging technology is incorporated, a key component in the packaging process is the attachment of the integrated circuit die to the leadframe (LOC) or substrate (BOC/COB). One method of attaching the integrated circuit die to the leadframe or substrate is to attach an adhesive directly to the lead fingers or the substrate. However, this method may be an expensive and complicated process. Another means of attaching the integrated circuit die to the leadframe or the substrate is to apply tape or to screen print the entire wafer with an adhesive epoxy before the integrated circuit dies are singulated and attached to the leadframe or substrate. However, this method will result in a waste of material since all of the integrated circuit dies, including those which may be electrically faulty, are covered with the adhesive or tape. Since the faulty dies will be discarded, this method disadvantageously wastes the adhesive material. What is needed is a simple method for attaching the integrated circuit die to a leadframe or substrate which may be easily implemented in current manufacturing systems and which mitigates the waste of production material.
According to the current process, the tape decal or adhesive is applied to the leadframe or substrate first, either in-house or at the leadframe or substrate supplier. Next, the integrated circuit chip is attached to the tape on the frame or the substrate. One problem with this method is that most integrated circuit chip assemblers do not have the capability to apply tape decals or adhesive to an LOC leadframe or BOC/COB substrate. Therefore, the tape or adhesive is generally attached by the supplier of the leadframe or substrate. This lack of ability increases the leadframe and unit costs.
The present invention may address one or more of the problems set forth above.
Certain aspects commensurate in scope with the disclosed embodiments are set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of certain forms the invention might take and that these aspects are not intended to limit the scope of the invention. Indeed, the invention may encompass a variety of aspects that may not be set forth below.
In accordance with one aspect of the present invention, there is provided a method for attaching an integrated circuit die to a leadframe, comprising the steps of: fabricating a plurality of Integrated circuit die on a wafer; testing the integrated circuit die on the wafer to determine electrically good integrated circuit die; providing a wafer map depicting the electrically good integrated circuit die; disposing an adhesive material onto the electrically good circuit die in accordance with the wafer map; singulating the integrated circuit die; adhering the good integrated circuit die to a leadframe; electrically coupling the good integrated circuit die to a plurality of fingers on the leadframe to form an integrated circuit package; and excising the integrated circuit package from the leadframe.
In accordance with another aspect of the present invention, there is provided a method of attaching an integrated circuit die to a substrate comprising: fabricating a plurality of integrated circuit die on a wafer; testing the integrated circuit die on the wafer to determine electrically good integrated circuit die; producing a wafer map depicting the electrically good integrated circuit die; grinding the wafer to a desired thickness; disposing an adhesive material onto the electrically good integrated circuit die in accordance with the wafer map; singulating the integrated circuit die; adhering the good integrated circuit die to a substrate; and electrically coupling the good integrated circuit die to a plurality of bonding pads on the substrate to form an integrated circuit package.
In accordance with still another aspect of the present invention, there is provided a method for disposing an adhesive material onto an integrated circuit die comprising: fabricating a plurality of integrated circuit die on a wafer; testing the integrated circuit die on the wafer to determine electrically good integrated circuit die; producing a wafer map depicting the electrically good integrated circuit die; and disposing an adhesive material onto the electrically good integrated circuit die in accordance with the wafer map.
In accordance with still another aspect of the present invention, there is provided a wafer having an adhesive material disposed on only the electrically good integrated circuit die.
One advantage of the present invention is that it can be easily implemented in-house where the integrated circuit chip assembly takes place. It can easily be incorporated into the present assembly process. Further, by using the wafer map from probe and only applying tape or adhesive to the electrically good die, the amount of wasted tape or adhesive is reduced. Advantageously, this will cut down on overall component cost.
USPTO Backgrounds
USPTO Backgrounds