1. Field of the Invention
One or more embodiments of the invention relate generally to the field of memory sub-systems and more particularly, to techniques for controlling slew rate performance of an output driver across various output impedances.
2. Description of the Related Art
Processing speeds, system flexibility, and size constraints are typically considered by design engineers tasked with developing computer systems and system components. Computer systems generally include a plurality of memory devices which may be used to store programs and data and which may be accessible to other system components such as processors or peripheral devices. The memory devices, typically, are grouped together to form memory modules such as dual-inline memory modules (DIMMs). Further, computer systems may incorporate numerous memory modules to increase the storage capacity of the system.
Generally, each memory device of a memory module includes one or more output drivers configured to adjust on-die termination and to adjust the output impedance of the memory device. For example, the output impedance of the output driver may be varied based on the output coupled to a data pin of the memory device. In the case of certain memory types, the output impedance may be configured to one of various impedances. Unfortunately, the slew rate (e.g., the maximum rate of change) of signals output by the output driver at one impedance may not be maintained at another output impedance. In other words, the slew rate may fall within an acceptable range when the output driver is configured to one impedance, but the slew rate may undesirably change and even fall out of the acceptable range when the output driver is configured to another impedance.
Embodiments of the present invention may be directed to one or more of the problems set forth above.
USPTO Backgrounds
USPTO Backgrounds