As dimensions and feature sizes shrink in the world of devices and MEMS, lithography becomes a critical part of the fabrication of the device. One of the critical limiting factors in lithography is the limited depth of field of many optical systems. Patterns need to be imaged onto as flat a surface as possible. Further, when crystal layers or other layered structures are grown on top of one another, it is critical that the starting material be nearly perfectly flat at the atomic level.
Chemical-mechanical polishing exists as the only predominant method for flattening a substrate surface. However, such process is a rather crude, dirty process that requires grinding in the presence of a slurry. Another method used to flatten a substrate surface involves the filling in of the valleys by spinning on a liquid material that has similar etch characteristics to the substrate and then etching the combination of the two. A major drawback of this process is that it fails badly when features with a long wavelength period are involved.
A need exists for a system and method that may be used, among other applications, to flatten a substrate surface.
USPTO Backgrounds
USPTO Backgrounds