It is well known that operation of a processor system is dependent on significant design considerations relating to, for example, processor core design, instruction set implementations and hardware compatibilities. Although many design considerations are generally related to the hardware components of a processor system, some of the design considerations are related to the performance of those hardware components during a runtime phase of the processor system.
Generating precise delay times or timings is a hardware-related design consideration that is of particular importance during the runtime phase of a processor system. Delay times are generally associated with the various parts of a processor system, including hardware, firmware, software, and combinations thereof. For example, initializing certain peripherals during a hardware initialization process often requires the generation of precise delay times. In particular, initializing a peripheral may require register bits within the peripheral to be set in a consecutive manner according to a precisely controlled time sequence. Often, the controlled time sequence is implemented using firmware that, when executed, generates predetermined delay times and/or timing interrupts.
Another example of the importance of timings or delay times includes peripheral communications in which a processor system communicates with an external peripheral having specific timing requirements. Such timing requirements may include, for example, polling a device at specific time intervals.
Delay times or timings are often implemented using interrupts such as, for example, timer interrupts and clock interrupts. In general, interrupts are reliable and effective resources that are often used to generate appropriate timings or delay times. However, interrupts are not always available during a runtime phase of a processor system, thereby making it difficult to generate appropriate timings or delay times without these resources.
One example scenario in which interrupts are not available may occur in a pre-boot environment of a processor system when the processor and peripherals are initialized in preparation for booting an operating system. In particular, interrupts are not available in the pre-boot environment during the execution of an extensible firmware interface (EFI) conformant to the Extensible Firmware Interface Specification, version 1.02, published Dec. 12, 2000 by Intel Corporation, Santa Clara. As a result, generating precise timings or delay times within the pre-boot environment without the use of interrupts is often not feasible.
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