1. Field
Example embodiments relate to a storage device, for example, to a device and a method for manufacturing a non-volatile and electrically erasable semiconductor memory device, for example, a flash memory.
2. Description of the Related Art
Non-volatile memory retains information stored in its memory cells even when no power is supplied. Examples include mask ROM, EPROM, and EEPROM.
Non-volatile memory is widely used in various kind of electronic products, for example, personal computers, personal digital assistants (PDAs), cellular phones, digital still cameras, digital video cameras, video game players, memory cards, and other electronic devices.
Memory cards types may include multimedia cards (MMC), secure digital (SD) cards, compact flash cards, memory sticks, smart media cards, and extreme digital (xD) picture cards.
Among non-volatile memory devices, a flash memory is widely used. Flash memory may be divided into a Not-OR (NOR) type and a Not-AND (NAND) type based on a connection structure of cells and bit lines. Because a read speed is faster and a write operation is slower, a NOR-type flash memory may be used as a code memory. Because a write speed is faster and a price per unit area is lower, a NAND-type flash memory may be used as a mass storage device.
NOR-type flash memory may be used in BIOS/networking in a PC, a router, or a hub or in a telecommunications switcher. NOR-type flash memory may also be used to store code or data for cellular phones, personal digital assistants (PDAs), POS, or PCA.
NAND-type flash memory may be used in memory cards for mobile computers, digital cameras, both still and moving, near-CD quality voice and audio recorders, rugged and reliable storage, for example, solid-state disks.
The programming method for NOR-type flash memory is hot carrier injection and the programming method for NAND-type flash memory is Fowler-Nordheim (FN) tunneling.
Advances in consumer electronics cause demand for higher density memory devices. Efforts to manufacture devices meeting this demand often involve scaling down the sizes of gate structures and reducing or minimizing the space between adjacent gate structures.
With the reduction in channel length of transistors, the influence of a source and drain upon an electric field or potential in the channel region may increase. This is referred to as the ‘short channel effect’. Other related problems include punch-through, and drain induced barrier lowering (DIBL).
Also, as channel width decreases with scaling down of the active size of a transistor, a threshold voltage may be increased. This is referred to as the ‘narrow width effect’. Other related problems include reduced drain current.
The reduction of cell current may have a negative effect on endurance of the cell. Repetitive programming and erasing the cell may increase the number of electrons captured by a tunneling oxide layer. As the number of electron captured by tunneling oxide layer is increased, the threshold voltage may be increased and the cell current may be decreased.
USPTO Backgrounds
USPTO Backgrounds