An electrostatic discharge (ESD) event can occur in a semiconductor chip when a charged conductor (including the human body) discharges through the semiconductor chip. An electrostatic charge may accumulate on a human body, for example, when one walks on a carpet. Contact of a body part, e.g., a finger, to a device containing a semiconductor chip causes the body to discharge, possibly causing damage to the semiconductor device. A similar discharge may occur from a charged conductive object, such as a metallic tool. Static charge may also accumulate on a semiconductor chip through handling or contact with packaging materials or work surfaces.
Such an ESD event can cause failure of components in a semiconductor chip through current overloading or reverse biasing. For example, the propagation of electrical charges through a bipolar transistor may cause an emitter-base junction to become heavily reverse biased, triggering a functional failure of the bipolar transistor in an ESD event. The voltage required for failure is linearly proportional to the area of the emitter of the bipolar transistor. Consequently, the potential for failure increases as circuitry, and therefore the area of the emitter, becomes smaller.
Radio frequency (RF) power amplifiers employing silicon germanium heterojunction bipolar transistors have a large swing in the signal both for positive voltages and negative voltages, typically up to positive 5V and negative 5V. Such RF power amplifiers typically employ dual well bipolar complementary metal oxide semiconductor (BiCMOS) technology. However, electrostatic discharge circuits currently known in the art in the BiCMOS technology are inadequate for providing sufficient protection against ESD events for such RF power amplifiers.
While multi-emitter silicon germanium bipolar transistors having multiple emitter-base regions in parallel connection have been proposed to provided enhanced protection against ESD events, such a device tends to occupy a large area, while improvement in the protection is not substantial. Employing separate devices to form an ESD protection circuit introduces parasitic interaction between collectors as well as increase in the ESD circuit area.
In view of the above, there exists a need for a design structure for a compact and efficient circuit for protection against electrostatic discharge events employing bipolar transistors, which may be employed in radio frequency (RF) power amplifiers employing BiCMOS technology for designing, manufacturing, or testing a design of a semiconductor circuit.
USPTO Backgrounds
USPTO Backgrounds