The present invention relates to integrated circuit (IC) device assembly and, more particularly, to a wafer level semiconductor device with wettable flanks.
Wafer level packages (WLPs) are becoming increasingly important for applications that require a small footprint with improved electrical performance. Wafer level packages are commonly used, for instance, in mobile communications devices such as mobile telephones.
FIG. 1 is a cross-sectional side view of a conventional WLP 100. The WLP 100 includes a plurality of active pads 102 exposed on a bottom surface of the WLP 100. The active pads 102 are mounted to contact elements 104, such as pads on a printed circuit board (PCB) with solder 106.
FIG. 2 is an enlarged schematic bottom plan view of a part 108 of the WLP 100 along line A-A of FIG. 1. The bottom surface of the WLP 100 includes the active pad 102, which is a metal area, a saw scribe lane area 110 located at a peripheral area of the bottom surface of the WLP 100, which is a non-passivated area, and a passivation overlap area 112 located between the active pad 102 and the saw scribe lane area 110. However, as shown in FIG. 2, improper cleaning of the WLP 100, or excessive solder, together with a very narrow separation between the active pad 102 and the saw scribe lane area 110 can result in a flux residue or solder flake 114 may bridge the active pad 102 and the saw scribed lane area 110, which raises the possibility of an IR leakage issue. In addition, since the active pad 102 does not extend all the way to the side of the WLP 100, once the WLP 100 is mounted to the PCB and the active pads 102 are soldered to the corresponding contact elements 104, it is difficult to inspect the solder joints to determine if there are any potential solder joint defects. Accordingly, it would be advantageous to have a WLP with inspectable solder joints.
USPTO Backgrounds
USPTO Backgrounds