1. Field of the Invention
The present invention relates to the field of integrated circuits, and more specifically, integrated circuits with passive elements which include inductors.
2. Prior Art
Integrated circuits normally comprise not just a combination of active devices (transistors), but also the interconnection of the active devices with passive devices such as resistors, capacitors and inductors. Resistors are relatively easily formed as part of the integrated circuit, with physical sizes being generally comparable to the physical sizes of the active devices. Similarly, techniques are known for forming relatively small capacitors of relatively low capacitance as part of an integrated circuit. Historically capacitors of a larger capacitance and inductors have generally not been part of the integrated circuit, but instead have been incorporated in passive circuitry off the integrated circuit chip and coupled to the chip as necessary. In many such circuits, the integrated circuit is by far the smallest part of the overall circuit, and is relatively dwarfed by the size of the off-chip passive devices. Further, the required connections to the passive devices usually require a substantial increase in the number of input and output pins on the integrated circuit, which in turn increases the size of the required chip.
More recently some inductors have been formed on chip as part of the integrated circuit, though at the expense of substantial chip area. In particular, whether formed on the integrated circuit or as part of separate passive circuitry, inductors are normally formed in what will be referred to herein as a two-dimensional structure, namely, as spiral windings insulated from and in a plane parallel to the face of the chip. In at least some instances second and third layers of the windings are also provided, each insulated from the other and interconnected by vias through the insulative layers.
FIG. 1 is a face view of an RF transceiver circuit comprising a flip chip assembly of an integrated circuit 20 on a passive circuit 22, each of which includes such two-dimensional inductors. In particular, the integrated circuit 20 includes two two-dimensional inductors 24 and the passive circuit 22 also includes two two-dimensional inductors 26. It is apparent that the two-dimensional inductors 24 on the integrated circuit occupy a significant fraction of the chip area, not only because of their size but because the magnetic fields generated thereby can adversely affect linear circuitry that is too close to the inductors. Similarly, inductors 26 utilize an area as large as, or perhaps even larger than, the entire integrated circuit itself. The net result of this assembly is that an integrated circuit chip of 1.91 millimeters by 1.91 millimeters is mounted on a substrate with passive circuitry having dimensions of 4.99 millimeters by 4.99 millimeters, or approximately 6.8 times the area of the integrated circuit itself, with the final package having dimensions of 6 by 6 by 0.85 millimeters, over 9 times the area of the integrated circuit itself.
USPTO Backgrounds
USPTO Backgrounds