(1) Field of the Invention
The present invention relates to receivers and reception processing methods. The present invention may be used in a receiver system in a CDMA wireless terminal, for example.
(2) Description of the Related Art
In recent years, many studies on high-speed and high capacity mobile communication method have been done. As a part of this trend, developments of high-speed wireless communication method using CDMA scheme, including HSDPA (High Speed Downlink Packet Access), have been increasing.
HSDPA provides near-highest transmission speed in a given radio propagation environment by adaptively changing the transmission format depending on the given environment.
Therefore, in an environment in which the radio propagation path is one-path or near one-path (hereinafter collectively referred to as “one-path environment”), a transmission format that allows fast transmission is used, but if such a format is used, the performance may be significantly degraded by the mixing of small noise.
On the other hand, in the CDMA scheme, a RAKE receiver may be used. The RAKE receiver improves receiving performance by combining multiple delayed waves, but in one-path environment, it often causes false detection of delayed waves, and as a result, it combines noise components, which may degrade the receiving performance.
For example, as illustratively shown in FIG. 10, the receiving performance may be improved by uniformly determining a delayed wave whose amplitude (power) is lower than a predetermined reference value (power of path timing shown as x) as noise and excluding it from the combining. This process is referred to as limit process.
Related known arts are disclosed in the following Patent References 1-3, for example.
Patent Reference 1 discloses that, in order to allow the reception condition (receiver sensitivity) and received power measuring performance to be improved in a multi-path environment, delay profile which is the distribution of signal correlation value power of spread spectrum signals incoming via multiple paths versus delay time, is periodically measured, the predetermined number of path delays with higher signal correlation value power in each of multiple measurement results of the delay profile are compared to each other; and a path whose path delay is within a predetermined error is selected as an effective path.
Patent Reference 2 discloses that, in order to provide a wireless communication apparatus equipped with an array antenna and having a simple and reliable path detection function, delay profile is generated by despreading for certain codes of output from an array antenna device; any path whose element of the delay profile is equal to or lower than a threshold is assumed to be zero; the delay profile is summed or averaged in beams; and a path whose power after summing or averaging is equal to or more than a threshold is selected as a path detection result.
Patent Reference 3 discloses that, in order to allow channel estimation to be successful even if received power of a delayed wave is higher than that of a direct wave, a channel estimate is determined from the result of FFT operation of known data included in the received signal; a delay profile of the multi-path is determined by performing IFFT operation on the channel estimate; and a starting position of FFT operation is determined according to the position of a path whose power is the highest within the delay profile.    [Patent Reference 1] JP 2005-354263    [Patent Reference 2] WO 2003/032541    [Patent Reference 3] JP 2002-280943
The inventor of the present invention has found that the above described limit process can improve performance in one-path environment, but in multi-path environment, it degrades performance instead of improving, particularly when moving fast. This is probably because, for example, as illustratively shown in FIG. 11, a delayed wave determined to be noise component in limit determination may become larger by fading in demodulation, or a delayed wave determined to be signal component in the limit determination may become smaller in demodulation. Furthermore, the limit process does not work well since there is a certain limit to the improvement in accuracy of path power estimation. This may also be a cause of the performance degradation.
FIG. 12 shows a performance (throughput) versus threshold of limit determination (hereinafter referred to as “limit threshold”) in one-path and multi-path environments (PB3 and VA120, respectively). In FIG. 12, a curve 100 indicates the performance versus limit threshold in one-path environment, and curves 200 and 300 each indicate the performance versus limit threshold in multi-path environment.
As seen from the curves 100, 200, and 300, in one-path environment, higher limit threshold provides better performance, but in multi-path environment such as PB3 (moving environment at 3 km/h) and VA120 (moving environment at 120 km/h), higher limit threshold provides degraded performance because of poor accuracy of the limit process performing determination. This means that there is a trade-off between the limit threshold and the performance.
In above mentioned Patent References 1-3, there is no disclosure or suggestion regarding a limit process in which such a trade-off is considered.
USPTO Backgrounds
USPTO Backgrounds