IDDQ testing is a method for testing CMOS integrated circuits (ICs) for manufacturing defects. In IDDQ testing, the supply current, Idd, of the IC is measured in a quiescent state, hence the acronym IDDQ for Idd (quiescent). It is commonly used in end-of-line testing during manufacturing, as depicted in FIG. 1, such that devices that have been overstressed in manufacturing or have other defects can be identified before implementation and reduced reliability or failure in use.
ICs are typically part of larger devices, and these devices can be subjected to harsh and damaging conditions during normal use. For example, IC sensor devices are often mounted in automobiles in positions in which they are exposed to high temperatures, mechanical stresses, and/or high electrostatic discharge (ESD) or electromagnetic compatibility (EMC) risks. These devices, however, still must be accurate and reliable over an expected operating lifetime of ten years or more. If consistently stressed, IC sensor devices may experience an unknown reduced operating lifetime or performance even if they do not immediately fail.
USPTO Backgrounds
USPTO Backgrounds