With the development of integrated circuits, the characteristic size of electronic circuit is being significantly reduced, and the circuit performance is vastly improved.
However, the process development reaching nanometer scales also brings many challenges, especially the problems of process volatility. The smaller feature size requires a smaller margin of process volatility during the manufacturing process. This can lead to greater instability of process parameters, such as random fluctuations of temperatures, doping concentrations, etc. Lithography, chemical mechanical polishing (CMP), etc. can all cause fluctuations in device sizes, and these fluctuations can lead to large fluctuations in device threshold voltages and current leakage.
Not only do these fluctuations affect the yield of the circuits, but also the performance and reliability of the circuits are adversely affected. Therefore, on one hand, it is desirable to detect and diagnose various adverse effects of devices to improve the level of technology, and reduce the impact of process fluctuations; on the other hand, these effects and variability data are used for statistical modeling, to provide IC designers the mode, therefore, in the early stages of design process, the designers will be able to forecast the process fluctuation and the mismatch behavior of IC performance precisely. Transistor is one of the most widely used semiconductor devices in integrated circuit, in the process of fabricating integrated circuit, it is very important for improving integrated circuit technology and the yield of product to test the key parameters of transistors accurately.
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USPTO Backgrounds