Integrated circuits are used in numerous electronic devices for the controlling of various elements of these. One example of such a device is a hearing aid. The invention is especially relevant in connection with hearing aids, due to the desired and often required small size of these. The small size requirement is especially pronounced in connection with the so-called ITE or CIC hearing aids, which are mounted partly or entirely in the ear canal of the hearing aid user. The integrated circuits typically perform the signal processing and the amplification in the hearing aids.
There is a tendency towards making at least some of the hearing aids smaller and/or towards applying more functionality to these. In both cases the integrated circuits become a limiting factor as the dimensions of this has to fit into the available physical dimensions of the hearing aid.
The integrated circuits are becoming smaller due to development of the production techniques for these. However the increase in the need for applying more functionality does often exceed the speed of developing the production methods, which means that the field of developing the production cannot entirely fulfill the needs of limiting the size of the integrated circuits.
U.S. Pat. No. 4,783,815 discloses the manufacturing of miniature hearing aids having a multi-layer circuit arrangement. This prior art publication describes a multi-layer pcb having plated through holes. The pcb may be arranged in several layers. The pcb may comprise one or more IC""s arranged on and connected to the pcb.
EP 0820099 discloses a packaged semiconductor device and a method of manufacturing this device. The document describes a board being electrically and mechanically connected to an IC by means of laser cut holes in the IC and the board.
Common for these prior art publications are that the IC""s described do not provide for the positioning and connection of any components on the rear side of the IC itself. The provision of a board is necessary for holding the IC and the possible further components
The state of the art in packaging is chip scale packaging (CSP) in various versions. A chip scale packaging is defined as a package, which has a size less than 1.2 times the size of the chip. CSP""s are typically made with solder balls distributed in an area array over the active side of the IC. The CSP is soldered to a circuit board with the active side of the IC facing the circuit board.
The design of the integrated circuit as such is not described in further detail here. The art of designing and manufacturing integrated circuits is disclosed more detailed in the technical literature on this area.
Due to the requirement for the above mentioned connection sites for either discrete component mounting or external connection to the remaining electrical system the CSP has to have a certain size in order to make this mounting possible.
There exists for the above mentioned reasons a need of reducing the physical dimensions of the integrated circuits, while at the same time maintaining a certain space for various connection purposes.
In one aspect an objective of the present invention is to provide a hearing aid, which with an identical physical size makes it possible to provide an increase in functionality, and which is less cumbersome to handle in a manufacturing process, or which by reduced size of the integrated circuit can be handled with essentially the same production tolerances as it is the case by the prior art.
In another aspect an objective is to provide an integrated circuit for a hearing aid which with the same outer dimensions can make it possible to provide an increased functionality and which is easier to handle in a manufacturing process, or which by reduced size of the integrated handle in a manufacturing process, or which by reduced size in the integrated circuit can be handled with essentially the same production tolerance as it is the case by the prior art.
According to the invention the objectives of the hearing aid is achieved by a hearing aid which includes a housing, a microphone, an integrated circuit and a receiver for outputting a signal, and wherein the integrated circuit includes a semiconductor layer having electric circuitry on a first side, a through electrical connection which extends from the first side to an opposite second side at a location within an outer circumference of the semiconductor layer, and a redistribution layer on the second side. In another embodiment, the hearing aid includes a housing, a microphone, an integrated circuit not connected to a base plate, and a receiver for outputting a signal, and wherein the integrated circuit includes a semiconductor layer with electric circuitry on a first side and a second side opposite the first side, the integrated circuit being mounted within the housing such that the second side faces an interior surface of the housing.
Hereby the dimensions of the integrated circuit circumference are maintained allowing a possibility of increasing the circuitry area, this again allowing the providing of an increased functionality to the hearing aid while maintaining the size of the hearing aid. Due to the placement of solder balls on a rear side of the circuit, more space is available for these, meaning that the handling of such circuitry in a manufacturing process in widely facilitated. By reduced size a considerable area is still left on both sides of the integrated circuit for being provided with solder balls. The mounting of the integrated circuit on a base plate having a larger circumference in order hereby to provide a sufficiently large area for solder balls is no longer necessary, as a sufficient area is available on the two sides of the integrated circuit.
Since the second side of the integrated circuit is facing the interior surface of the housing, it is obvious that the substrate, which is normally provided, has been omitted in this invention. Omitting the substrate leads to a thinner integrated circuit, and hence facilitates the manufacturing of smaller and cosmetically attractive hearing aids. A coating may be provided on the second side without hereby differing from the definition of facing the interior surface of the housing.
In an advantageous embodiment a redistribution layer is provided on at least one side of the integrated circuit, preferably on both sides of the integrated circuit, in order hereby to establish connection sites in distance from the through electrical connections. Hereby the total surface area of both sides of the integrated circuit may be made available for connection sites in the form of solder balls.
In an advantageous embodiment discrete electrical components are mounted on one side of this by means of solder balls in connection with the through electrical connections.
In a further advantageous embodiment at least one connection pad is provided on one side of the integrated circuit.
In a still further advantageous embodiment at least one connection pad is provided on one side and discrete electrical components on the other side.
Advantageously an EEPROM component is mounted on one side and solder balls are provided on the other side. Further possibilities comprise the mounting of a micro-mechanical device or a second integrated circuit on one side of the integrated circuit.
According to the invention the objectives of the integrated circuit manufacturing aspect is achieved by an integrated circuit which includes a semiconductor layer that has electric circuitry on a first side, a through electrical connecting from the first side to an opposite second side at a location within an outer circumference thereof, and a redistribution layer on the second side.
It should be appreciated that when defining the semiconductor layer comprising electric circuitry, this is the raw semi-conducting material, e.g. silicon, which has been subjected to a process where the semi-conducting elements of the electric circuit have been manufactured in one of the surfaces of the semi-conducting material layer. The further elements which most are often present, e.g. metal layers for establishing electrical contacts to the semi-conducting elements and the insulation layers between the respective metal layers, are not described in this connection as they are implicitly comprised by the definition of an integrated circuit as this is normally interpreted.
USPTO Backgrounds
USPTO Backgrounds