1. Field of the Invention
The present invention relates to a memory device, and more particularly, to a nonvolatile memory device having multi-bit storage and a method of manufacturing the same.
2. Description of the Related Art
There is great demand for increasing memory density of nonvolatile memory devices and flash memory devices. Memory density increases by reducing the size of a memory cell or by allowing the memory device to store a greater number of states, i.e., multi-bit.
Research is being conducted into the implementation of a memory transistor capable of storing multiple bits in a single memory transistor. For example, a silicon-oxide-nitride-oxide-silicon (SONOS) transistor was introduced to implement a 2-bit operation of a memory device. The SONOS includes a silicon nitride layer as a charge storage layer between a gate and a semiconductor substrate. The 2-bit operation of the transistor can be achieved through a forward reading and a reverse reading of a threshold voltage Vth because the SONOS transistor stores charges in different locations.
As the integrity of nonvolatile memory devices increases, a line width of the charge storage layer and a channel width becomes narrow. Therefore, it is important to secure a wider valid channel width in nonvolatile memory devices. Also, the reduction of the channel width causes a short channel effect. In order to overcome this drawback, a method of securing a wider valid channel width is required.
The reduction of the channel width may also cause a cross-talking problem. That is, charge distributions stored in a charge storage layer are overlapped due to a narrow line width of the charge storage layer. For example, tail portions of charge distributions stored in both end regions of a charge storage layer may be overlapped. Accordingly, independent signals may interfere with each other and operations of the memory device cannot be distinguished. That is, interference between signals degrades the memory device's capability to store multiple bits.
Therefore, there is a demand to develop a memory device capable of independently storing charges in a charge storage layer in order to allow a nonvolatile memory device to perform a multi-bit operation or to store multiple bits.
USPTO Backgrounds
USPTO Backgrounds