The present invention relates to a method and apparatus for processing a substrate such as a semiconductor wafer or a substrate of a liquid crystal display (LCD) device, particularly, to a method and apparatus for processing a substrate, which includes an adhesion treatment for bringing a substrate surface into contact with a gas for modifying the substrate surface.
Employed in a photolithography process is a resist processing system in which semiconductor wafers are successively coated with a resist solution, followed by developing the resist coating. Such a resist processing system is disclosed in, for example, U.S. patent application Ser. No. 08/667,712, now U.S. Pat No. 5,700,127. It is disclosed that many processing units are arranged on both sides of a horizontal transfer path, and a wafer is transferred by a main arm mechanism along the horizontal transfer path into each of these processing units. In the resist processing system of the horizontal transfer type, however, the system is expanded in a horizontal direction with increase in the number of processing units arranged along the horizontal transfer path, leading to an increased total floor area. Naturally, the resist processing system occupies a large floor area within a clean room, leading to a high manufacturing cost and operating cost of the clean room. Particularly, since a down flow of a clean air is employed in the system as a measure against particles, the initial cost and maintenance cost of the air conditioner, filter, etc. are increased if the cleanliness within the system is to be improved.
Another resist processing system is disclosed in, for example, U.S. Pat. No. 5,664,254 and Japanese Patent Disclosure (Kokai) No. 4-85812. It is disclosed that many processing units are arranged on both sides of a vertical transfer path, and a wafer is transferred by a main arm mechanism along the vertical transfer path into each of these processing units. The resist processing system of the vertical transfer type certainly permits diminishing the floor area of the system occupied in a clean room, making it possible to lower the manufacturing cost and operating cost of the clean room. Also, since the main arm mechanism can obtain access to the processing units promptly and can transfer the wafer at a higher speed, the through-put is increased. In the resist processing system of the vertical transfer type, however, a plurality of processing units are stacked one upon the other. In addition, a heating unit, a cooling unit, a transfer unit, an adhesion unit, etc. included in the system are of open type. It follows that these processing units mutually affect each other, resulting in failure for each processing unit to perform its function appropriately. Particularly, in the case of using a hexamethyldisilazane (HMDS) gas as in an adhesion processing, the HMDS gas leaking from the adhesion processing unit tends to enter another processing unit so as to adversely affect the processing in said processing unit.
In the conventional adhesion processing, a silicon wafer is introduced into a process chamber, followed by exhausting the process chamber and subsequently introducing an HMDS gas into the process chamber so as to bring the HMDS gas component into contact with the silicon wafer surface for modifying the wafer surface. After completion of the processing, the HMDS gas is forcedly discharged from within the process chamber so as to prevent the HMDS gas from leaking to the outside of the process chamber. At the same time, a purging gas such as a nitrogen gas is introduced into the process chamber so as to purge the supply piping and process chamber. In the adhesion processing of this type, however, a purging gas is supplied at a relatively high flow rate, with the result that particles tend to be generated so as to be attached to the wafer dependent on the manner of supplying the purging gas. Also, the members in the vicinity of the wafer table disturb the HMDS gas stream within the process chamber so as to prevent the HMDS gas component from being brought into contact uniformly with the surface of the wafer. It follows that the processing is rendered nonuniform, giving rise to a possibility that the wafer surface is not modified sufficiently in some regions.
USPTO Backgrounds
USPTO Backgrounds