A solid-state drive (SSD) includes a non-volatile memory such as NAND flash. An SSD controller in the SSD provides a block access interface (for example, a 512 byte block) to a host controller coupled to the SSD. The SSD controller is typically implemented with a processor configured to carry out NAND/memory management functions, such as reading/writing of data, encryption, error correction, wear leveling, and garbage collection. A typical NAND controller operates in block mode (e.g., 512 byte) multiples for reads and writes.) As newer and cheaper generations of NAND SSDs are built based on smaller lithography, more cells per area are achieved. In addition, and regardless of the lithography, more information can be ‘stored’ in a single cell by using multiple level programming, such as the case with SSDs that use multilevel cells (MLC) or three level cells (TLC), as compared to single-level cells (SLC). In SLC NAND flash technology, each cell can exist in one of two states, storing one bit of information per cell. Most MLC NAND flash memory has four possible states per cell, so such memories can store two bits of information per cell. A TLC NAND flash memory has eight possible states per cell, so such memories can store three bits of information per cell. The more levels programmed into a single cell (based on the stored voltage level that decodes to a number of bits), the greater the precision at which the threshold voltage (Vt) is adjusted. This results in lower endurance and longer read times. Endurance generally refers to the lifespan of a non-volatile memory, and more particularly, to the ability of a non-volatile memory to endure through a specified number of write cycles before becoming unreliable.
USPTO Backgrounds
USPTO Backgrounds