Generally, a semiconductor die may be bonded to another substrate, such as an organic printed circuit board, using such technologies as ball grid arrays or controlled collapse chip connection (C4) solder bumps. In one such process, a solder bump may be formed on either the semiconductor die or the substrate or on both using methods such as plating, paste screening or ball mount and then reflowing the solder into a desired bump shape. Once the solder bump has been formed, the contacts on the semiconductor die are aligned with their corresponding contacts on the substrate, with the solder bump located between the contacts. Once aligned, the solder bump is again reflowed and liquefied, wherein the liquefied solder flows and wets onto the contact pads, providing an electrical and physical connection between the semiconductor die and the substrate.
However, a semiconductor die may have a much different coefficient of thermal expansion than the substrate. As such, when the semiconductor die is bonded to the substrate and they are both going through the thermo-mechanical cycling which may be used to simulate the system power on and off cycles to meet the JEDEC reliability test requirements, the semiconductor die and the substrate will expand during heating up cycles and contract during cooling down cycles to different lengths. Such an expansion causes stresses to form at the solder joints interconnecting the semiconductor die and the substrate. This problem is especially prevalent at connections between the semiconductor die and the substrate. In particular, the stresses caused by the mismatch of coefficients of thermal expansion between the semiconductor die and the substrate are so intense that cracks may actually develop in the solder joints interconnecting the semiconductor die and the substrates. These cracks could then propagate through the whole joint and degrade or even destroy the electrical continuity and/or physical connections between the semiconductor die and the substrates. Such destruction may render the parts useless and require a complete refabrication.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.
USPTO Backgrounds
USPTO Backgrounds