1. Technical Field
The present teaching is related to analog circuit design. More specifically, the present teaching is related to a method of and system for low noise bandgap reference circuit and systems incorporating the same.
2. Discussion of Technical Background
Bandgap voltage references are generally produced by summing a Proportional To Absolute Temperature (PTAT) voltage and a Complementary To Absolute Temperature (CTAT) voltage together to generate a temperature independent voltage. A CTAT voltage can be produced using a diode or diode connected Bipolar Junction Transistor (BJT). A PTAT voltage can be produced by developing a voltage across a resistor with a PTAT current.
A ΔVBE circuit may be employed to generate a PTAT current using two BJTs with different current densities. The PTAT current used is usually proportional to the logarithm of the current density ratio of the two BJTs and can be mathematically described as IPTAT=ΔVBE/R=(VT/R)*ln(J1/J2). The logarithm function attenuates the ratio, making it necessary to use a large number of transistors in order to achieve a higher performance bandgap voltage reference.
A different approach of producing a large ΔVBE is to employ a “cross-connected quad”, illustrated in FIG. 1. In this illustrated cross-connected quad circuit 100, transistors 120 and 150 have multiple emitters, each having a ratio of N and M, respectively. Transistor 120 is coupled to a power source at the collector via a resistor 110 and the multiple emitters of 120 are coupled to the ground via a transistor 130. Specifically, the emitters of transistor 120 are connected in series to the collector of transistor 130, whose emitter is connected to the ground. In addition, the collector of transistor 120 is connected to its base.
On the other side, transistor 150 is coupled to a source of PTAT at the emitter terminal via a transistor 140. The collector of transistor 150 is connected to the single emitter of transistor 140 and the collector of transistor 140 is connected to the source of PTAT. The base of transistor 140 is directly connected to the base of transistor 120, which is connected to its own collector. Transistor 150 is coupled to the ground at its emitter via a serially connected resistor 160. The collector of transistor 150 is connected to the base of transistor 130.
In this illustrated circuit, a ΔVBE is developed that is proportional to the logarithm of the product of the ratio of emitter current densities. Specifically, the ΔVBE can be characterized to be ΔVBE=VT*ln[(J2*J3)/(J1*J4)] or ΔVBE=VT*ln[(N*M)], where N and M are the current density ratios of transistor 120 to transistor 140 and transistor 150 to transistor 130, respectively. It is clear that to achieve a larger ΔVBE, it is more efficient to use a method that incorporates a product of current density ratios.
There are other conventional approaches to bandgap cell design, including the Widlar cell, Brokaw cell, and Dobkin cell. A Dobkin cell is described in detail in U.S. Pat. No. 4,447,784 and depicted in FIG. 2. Circuit 200 in FIG. 2 comprises an error amplifier 250 having its output coupled to a serially connected circuit, having two resistors R3 255 and R4 260 and a diode connected transistor Q3 265. The inputs of the error amplifier 250 are connected to the collectors of a pair of transistors Q1 230 and Q2 245. The bases of transistors 230 and 245 are connected to the two ends of resistor R3 255, where the ΔVBE is developed. The collectors of transistors Q1 and Q2 are coupled to a power source via, respectively, two resistors R1 225 and R2 240. The emitters of transistors Q1 and Q2 are coupled together and connected to the collector of transistor Q5 235, whose emitter is connected to the ground. Between the power source and the ground, there is a serially connected sub-circuit, comprising a current source 215 and a serially connected diode connected transistor 220 having its collector connected to the current source 215 and its emitter connected to the ground.
As can be seen in FIG. 2, unlike Widlar and Brokaw cells which develop the ΔVBE between the emitters of a BJT, the Dobkin cell develops the ΔVBE between the bases of Q1 and Q2. A voltage loop is formed around R3 and the emitter-base junctions of Q1 and Q2.
Mathematically, the ΔVBE produced by the Dobkin cell is described as ΔVBE=VT*ln(J2/J1). In this expression, VT=kT/q is the thermal voltage with k being the Boltzman's constant (1.38*10−23 Joules/Kelvin), T an absolute temperature in Kelvin, and q an electronic charge (1.602*10−19 Coulomb). J1 and J2 are the current densities of transistors Q1 and Q2, respectively. Such a current density is dependent on transistor area A and the magnitude of current I going through the collector of the transistor. Accordingly, the ΔVBE is proportional to J2/J1=(I2*A1)/(I1*A2). Based on this observation, it can be seen that a design of a ΔVBE generator can include appropriate ratios of either current or the area. When the current flowing through both transistors is identical, the emitter areas become the only factor that will determine the value of ΔVBE=Vt*ln(A1/A2).
In some prior art solutions, the error amplifier 250 is implemented based on a circuit shown in FIG. 3 (PRIOR ART). In this illustration, the error amplifier 250 comprises 6 transistors, 350, 355, 360, 365, 370, and 375, connected as shown in FIG. 3. With this circuit 300, when there are N emitters in Q1 creating a N:1 ratio, ΔVBE can be characterized to be ΔVBE=Vt*ln(N). The output voltage of a Dobkin cell as shown in FIG. 3 is:VOUT=(1+R4/R3)*VT*ln(N)+VBE3 This voltage loop forces the error amplifier to drive a PTAT current into resistor R3, R4, and transistor 265 whose sum of voltage drops develops the bandgap output voltage. Note that the above circuit is a series voltage reference and Dobkin's original circuit is a shunt voltage reference.
It can be seen that to achieve a larger ΔVBE, a large ratio N of transistors is needed and, hence, a larger die area. In general, the higher the ratio N, the larger the die area. A larger die area costs more. When a ΔVBE for a high performance bandgap voltage reference is needed, the cost may become a serious concern. For example, a reasonable ΔVBE for a high performance bandgap voltage reference is about 108 mV at 25° C. Without stacking as in FIG. 1, this would require a ratio of about 64:1 or 65 transistors. Although conventional stacking solutions exist with a “cross-connected quad” approach as shown in FIG. 1, there are other issues that hinder the successful application of conventional stacking solutions. For instance, for each BJT stacked upon another, an additional 0.8V input voltage needs to be added and, thus, introduces the need for a higher input voltage. In addition, there are other negative effects, including a higher level of noise and sometimes unstable circuit behavior.
USPTO Backgrounds
USPTO Backgrounds