In recent years, high integration of semiconductor devices (hereinafter, referred to as “devices”) has been promoted. Meanwhile, when a plurality of highly-integrated devices is connected by wires for production, a problem occurs because of an increase in wire length and hence increase in wire resistance and wire delay.
To overcome this problem, a three dimensional integration technique has been proposed which stacks semiconductor devices in three dimensions. In the three dimensional integration technique, for example, a bonding apparatus is used to bond two semiconductor wafers (hereinafter, referred to as “wafers”) together. The boding apparatus includes, for example, a fixed table on which the wafers are mounted, and a movable table which faces the fixed table and can be elevated with a wafer absorbed on its bottom side. The fixed table and the movable table contain respective heaters. In the bonding apparatus, the two wafers are overlapped with each other and then are bonded together by being pressurized by weight of the fixed table and the movable table while being heated by the heaters.
However, when two wafers are bonded together, there may be a case where bonding portions of metal formed on surfaces of the wafers are bonded together. In this case, there is a need to pressurize the metal bonding portions while heating them to a predetermined high temperature. In other words, there is a need to sequentially perform a pre-heating step of heating the wafers to a predetermined temperature, a bonding step of pressurizing them with the predetermined temperature maintained, and a post-heating step of cooling them.
However, the use of a conventional bonding apparatus in this case requires a vast amount of time in bonding the two wafers together.
Above all, it is time-consuming to heat the wafers to the specified temperature in the pre-heating step because the specified temperature is high. Moreover, since the predetermined temperature is high, it takes time to cool the hot wafers in the post-heating step. Further, when the metal bonding portions are alloyed and bonded together, if the wafers are rapidly cooled, there is a need to cool the wafers below a predetermined rate of cooling since the strength and physical property of the metal bonding portions may be changed. Moreover, the time taken for the bonding step cannot be shortened since it depends on the material or the like used in the metal bonding portions.
The vast amount of time required in bonding the wafers having metal bonding portions leads to a reduction in the throughput of wafer bonding processing.
The present disclosure is to address the problem above. The object of the present disclosure is to bond the wafers to each other more efficiently and to improve the output of the wafer bonding processing.
USPTO Backgrounds
USPTO Backgrounds