1. Field of the Invention
This invention relates to a high-frequency amplification circuit amplifying a high-frequency signal and, more particularly, a bias circuit supplying a bias current to a high-frequency amplification transistor.
2. Description of the Related Art
In a high-power amplifier using a bipolar transistor, as a collector current is greatly influenced by the variation in temperature, a bias current of the high-power amplifier is supplied by, for example, a current mirror circuit in which transistors are diode-connected. On the other hand, an amplifier which is linear and highly efficient at an output level of a wide dynamic range, is implemented by setting the bias condition to the B class (a scheme of supplying the bias current until the collector current stops flowing when the input of the high-power amplifier is zero) and reducing the bias current. Actually, however, as distortion caused by variation in gain becomes great due to non-linearity of an element, linearity of gain is maintained at the output level of the wide dynamic range in a manner such as the AB class that allows the bias current to flow to some extent.
In an AB-class amplifier using a bipolar transistor, as the collector current increases in accordance with the output level, the bias circuit must also sufficiently supply an increased amount of the base current in accordance with the increase in the collector current. For this reason, to lower output impedance of the bias circuit, a bias circuit composed of a current mirror circuit supplying the base current via an emitter follower or the like is used.
FIG. 6 shows an example of the bias circuit using an emitter follower. A power supply voltage Vcc is supplied to a collector of a transistor Q8. A reference voltage Vref is supplied to a base of the transistor Q8 through a resistor R6. An emitter of the transistor Q8 is connected to a ground potential through a resistor R7. Diode-connected transistors Q6 and Q7 are connected in series between the base of the transistor Q8 and the ground potential.
In a high-frequency amplification circuit using such a bias circuit, however, the transistors are stacked at two stages. Thus, it is impossible to sufficiently compensate for the variation in the bias current to the influence of the variation in temperature unless the reference voltage Vref is increased to be much higher than the double of an ON-state voltage of the transistors. On the other hand, the increase in the reference voltage Vref is a serious problem in a system such as a cellular phone having a low control voltage. Especially, in a system which must be operated linearly with the output level of a wide dynamic range such as the CDMA (Code Division Multiple Access), the variation in an idle current caused by the influence of the variation in temperature at the low-power output time becomes a problem.
FIGS. 7 and 8 show another example of the bias circuit. The bias circuit shown in FIG. 7 is configured such that a transistor Q10 is turned on at one stage through a resistor R8. The bias circuit shown in FIG. 8 is configured such that transistors Q11 and Q12 are added in order to compensate for the temperature of the transistor Q8.
However, as the output impedance of these bias circuits is low, the high-frequency signal leaks to the bias circuits. In addition, a bias point is moved due to the influence of the high-frequency signal leaking to the bias circuit. For this reason, a choke inductor L1 to block the high-frequency signal and a capacitor C2 for decoupling need to be provided between the bias circuit and the transistor Q10 serving as a high-frequency amplifier, as shown in FIGS. 7 and 8. As the inductor L1 has a large circuit scale and the capacitor C2 needs to have a large capacitance, the bias circuit can hardly be downsized.
Various bias circuits stabilizing the bias supply amount have been disclosed as this kind of the related technique (see Jpn. Pat. Appln. KOKAI Publication No. 2003-58262).
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