1. Field of the Invention
The present invention relates to overvoltage protection, and more particularly to preventing charge leakage in output and input/output buffers when the voltage on the buffer output exceeds in magnitude the buffer internal power supply voltage or when the buffer is powered down.
2. Description of Related Art
Electronic systems sometimes combine modules powered by different supply voltages. For example, in battery powered laptop, notebook and hand-held computers, some modules are powered by a 3.0 V or 3.3 V voltage while other modules are powered by a 5.0 V voltage. The use of the lower power supply voltage such as 3.3 V reduces power consumption and thus allows extending the system operation time before the battery must be recharged or replaced. However, modules such as disk drives are powered by 5.0 V because they perform better when powered by the higher voltage.
If a 3.3 V module and a 5.0 V module are connected to a common bus and the bus is driven by the 5.0 V module with a 5.0 V signal, a charge leakage path may form between the bus and the 3.3 V power supply. For example, suppose that the output driver of an input/output buffer of the 3.3 V module includes a pull-up PMOS transistor connected between the 3.3 V voltage and the bus. When bus is driven by the 5.0 V module, the 3.3 V module drives the PMOS transistor gate with 3.3 V to turn the transistor off to tri-state the bus. When the bus voltage rises to 5.0 V, the PMOS transistor turns on providing a conductive channel between the bus and the 3.3 V power supply. Moreover, because the transistor backgate is typically held at 3.3 V, the drain/backgate diode turns on providing another conductive path between the bus and the 3.3 V power supply. The undesirable results include loading the bus and causing "bus contention", degrading the bus signals, and causing possible false signals on the bus.
Similar problems occur when a selected module is powered down while other modules are powered up, whether or not different power supply voltages are used in the system. When the module is powered down in order, for example, to save power or replace the module, a leakage path can form between the bus and the module internal power supply.
Thus, it is desirable to provide output drivers which do not provide a leakage path between the bus and the module internal power supply.
USPTO Backgrounds
USPTO Backgrounds