Inverters/rectifiers and DC/DC converters critical for supporting high-power, high-voltage systems, such as hybrid-electric ground vehicle propulsion systems, typically operate between two high voltage busses with bi-directional power flow of up to hundreds of kilowatts. To prevent system damage during fault conditions, bi-directional fault isolation, or power conditioning, is needed. Because mechanical contactors do not provide adequate actuation times and suffer severe degradation during repeated fault isolation, a solid-state circuit breaker (SSCB) is desirable.
To provide such a SSCB, and to enable such bi-directional power flow in a semiconductor device, the device should provide symmetric current flow in forward and reverse directions and blocking of a specified voltage in forward and reverse directions. In addition, the gate-drive of the bi-directional circuit should operate at high current-gain and high bandwidth with low conduction losses, should allow for fast switching, and should have small physical size, all of which contribute to the bi-directional circuit's efficiency.
For the circuit of FIG. 6 in no fault efficient circuit-breaker operation, current flows with all the vertical-channel junction gate field-effect transistor (JFET) pn-junctions turned off based on Eqs. (3) and (4) (see below). In a fault event, abrupt rise in drain current and voltage will occur. The gate-source JFET junctions are always off by default gate-drive biasing. For the JFET conducting in the drain-source direction, no bipolar current due to “fault condition” is generated as the increase in drain current/voltage biases the gate-drain pn-junction more negatively. For the JFET conducting in the source-drain (reverse) direction, however, bipolar current due to “fault condition” is generated as the increase in drain current/voltage biases the gate-drain pn-junction more positively. Once the built-in potential of the gate-drain junction is exceeded (Eq. (3) and (4) are no longer satisfied), bipolar gate current starts to flow and a rise in the gate-drive current is observed.
In addition to abrupt rise in current/voltage, a fault condition will also lead to higher JFET temperatures. JFETs have positive temperature coefficients and therefore the gate-drain pn-junction built-in potential is reduced with temperature; bipolar current will flow at lower voltages. For example, a SiC pn-junction with doping levels relevant to power applications turns on at ˜2.7 V at room temperature. At 150° C., the junction will turn on at ˜2.4 V. Typically, in no-fault conduction of 1000 A, the gate drive current is below 1 nA. Should a fault occur, the turned on gate-drain junction will conduct Amps if the circuit does not abruptly go into blocking mode.
Thus, a need exists to provide a system and method to detect a fault condition and bias the JFETs so that they operate as a solid state circuit breaker.
Therefore, it is desirable to provide a system and method for providing an optically triggered circuit breaker.
Advantages of the present invention will become more fully apparent from the detailed description of the invention hereinbelow.
USPTO Backgrounds
USPTO Backgrounds