1. Field of the Invention
The invention relates to a current amplifier and, in particular, to a programmable gain current amplifier with a fixed bias current.
2. Description of the Related Art
In a wireless communication system, the programmable gain amplifier is used to adjust the magnitude of the output signal and thus satisfy the system requirements. Therefore, the programmable gain amplifier is an extremely important element in wireless communications.
A typical programmable gain amplifier in integrated circuit is realized using an operational amplifier with the programmable resistive feedback. However, to obtain different and accurate gains, they have to be implemented using several sets of accurate resistors. As a result, the structure occupies large chip area. Moreover, the operational amplifier in broadband communication systems consumes more power. Such a structure is not suitable for broadband communication systems, such as the WLAN system.
The current amplifier is a good topology to save the chip area and meet the wide bandwidth requirement. However, the bias current would be different with different gain setting in the current amplifier, which may affect the performance of the next stage circuit. Some work has been done to solve this problem. As disclosed in the U.S. Pat. No. 4,361,815, a differential input signal is amplified by two current amplifiers with predetermined gains and uses a current mirror to convert the signal into a single-ended output. The common mode signal will thus be cancelled. However, process variations may let the gains of the two current amplifiers different. In this case, the common mode signal cannot be completely cancelled. Moreover, since the amplifier has a single-ended output, it is more sensitive to noise.
The current amplifier, as disclosed in the U.S. Pat. No. 5,565,815, amplifies the differential input signals using NMOS and PMOS current mirrors with the same gain, the connection of each other is in such way to cancel the common mode signal. Similar with the previous work, if the gains of the NMOS and PMOS current mirrors are different, the common mode signal cannot be completely cancelled.
The current amplifier provided in the U.S. Pat. No. 6,121,830 converts differential voltage input signal into differential current signal, extracts and removes their common mode signal, adds on a bias current proportional to the inverse of the current amplifier gain, amplifies with a current amplifier, and finally converts the current signal into a voltage signal output. The structure obtains a more stable bias current output using the inverse operations of the bias current and the current amplifier. However, the circuit structure is more complicated.
The current amplifier provided in the U.S. Pat. No. 6,175,278 B1 first converts the voltage input signal into current signal. After that, a current amplifier amplifies the signal, which is then converted into a voltage output signal using a resistive loading. In this structure, a voltage adjusting circuit is used to compare the bias voltage of the output terminal with a reference voltage. The output of the voltage adjusting circuit is then used to control the bias current of the current amplifier. Thus, the output terminal has a stable bias voltage close to the reference voltage. In this design, the convergent time, stability, and accuracy of the voltage adjusting mechanism have to be carefully considered. Besides, the circuit has to adjust the voltage when the gain of the amplifier changes.
USPTO Backgrounds
USPTO Backgrounds