For semiconductor memory devices, cost reduction by fine processing has accelerated with an advance in semiconductor manufacturing processes and decreasing parasitic capacitance due to shrinkage in dimensions has further led to a reduction in consumption current.
However, as miniaturization in semiconductor manufacturing processes advances channel length of a transistor shortens, causing an increase in an off-state current of the transistor.
Semiconductor memory devices such as a DRAM (Dynamic Random Access Memory) and FeRAM (Ferroelectric Random Access Memory: FRAM (a registered trademark)) of recent years, for example, are configured to access a predetermined memory cell by boosting the level of a word line in a plurality of steps.
In this way, semiconductor memory devices such as an FeRAM of recent years, for example, access a predetermined memory cell by boosting the level of a word line in a plurality of steps. Moreover, as miniaturization in semiconductor manufacturing processes advances, channel length of a transistor shortens, leading an increase in an off-state current.
Therefore, when the level of a word line is boosted, for example, because a leakage current through a transistor controlling the boost increases, it becomes difficult to boost the level of the word line sufficiently. There is a possibility that this phenomenon takes place when, for example, a period from a time at which a CPU controlling a semiconductor memory device outputs a read command to the semiconductor memory device to a time at which the CPU outputs a succeeding write command is long.
In the past, various semiconductor memory devices which carry out a memory access by boosting the level of a word line have been proposed.
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