1. Technical Field
The present invention relates to a method for partitioning the columns of a matrix.
2. Related Art
Critical dimensions in microelectronic designs have been rapidly scaling to smaller and smaller values leading to increased parametric variability in digital integrated circuit performance. The resulting increase in the number of significant and independent sources of variation leads to exponential complexity for traditional static timing methodologies. One solution to this problem is path-based statistical timing analysis, in which the probability distribution of the performance of a chip is computed in a single analysis, simultaneously taking into account all sources of variation. Such probabilistic methods are often dependent on restricting the sources of variation to a small number, and several algorithms proposed in the literature have exponential complexity in the dimensionality of the process space. Thus, there is a need for a method that facilitates an efficient and simple use of statistical timing analysis in a way that takes into account the effect of all pertinent sources of variation.
USPTO Backgrounds
USPTO Backgrounds