As the semiconductor devices keep scaling down in size, three-dimensional multi-gate structures, such as the fin-type field effect transistor (FinFET), have been developed to replace planar Complementary Metal Oxide Semiconductor (CMOS) devices. A structural feature of the FinFET is the silicon-based fin that extends upright from the surface of the substrate, and the gate wrapping around the conducting channel that is formed by the fin further provides a better electrical control over the channel.
During fabrication of the FinFET, the fin profile is very critical for process window. The current FinFET fabricating process may suffer from a loading effect and a fin-bending issue.
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USPTO Backgrounds