A slot line is greatly used in a high-frequency circuit device because, for example, the slot line facilitates connection of an electrical element, such as a semiconductor element, or makes it easier to increase characteristic impedance. In particular, in recent years, from the viewpoint of reducing transmission loss, lines of a both-side slot structure type in which slot lines are symmetrically formed on respective front and back surfaces of a dielectric substrate (such a type is called PDTL (Planer Dielectric Transmission Line)) are being used in a high-frequency circuit device (refer to, for example, Patent Documents 1 and 2).
Patent Document 1: Japanese Unexamined Patent Application Publication No. 08-265007
Patent Document 2: Japanese Unexamined Patent Application Publication No. 2004-007349
However, the related high-frequency circuit device using lines of the aforementioned PDTL type has the following problems.
FIG. 22 is a schematic sectional view for illustrating the problems of the related high-frequency circuit device.
As shown in FIG. 22(a), for lines of the PDTL type, slot lines 111 and 112 having substantially the same shape are formed in respective surfaces of a dielectric substrate 100, and the same high-frequency signals are transmitted to the respective slot lines 111 and 112.
Therefore, when a phase difference does not occur between the high-frequency signal that propagates along the slot line 111 and the high-frequency signal that propagates along the slot line 112, since, as shown in FIG. 22(a), electrical fields E1 and E2 that are generated by both high-frequency signals face the same direction, a potential difference does not occur between the upper and lower sides of the dielectric substrate 100. That is, in such a case, an undesired wave is not generated in the dielectric substrate 100, so that unnecessary electrical power loss and undesired coupling with a peripheral device do not occur.
However, in the high-frequency circuit device, as shown in FIG. 22(b), since an electrical element 110, such as an FET, is mounted to the slot line 111, the symmetry between the slot lines 111 and 112 is destroyed. Therefore, a phase difference occurs between the high-frequency signal that propagates along the slot line 111 and the high-frequency signal that propagates along the slot line 112. As a result, as shown in FIG. 22(b), the electrical fields E1 and E2 that are generated by both high-frequency signals face opposite directions, thereby causing a potential difference to occur between the upper and lower sides of the dielectric substrate 100. That is, in such a case, undesired electrical fields E are generated in the dielectric substrate 100, causing unnecessary electrical power loss to occur or undesired coupling to occur between an undesired wave, caused by the electrical fields E, and a peripheral device, as a result of which operating characteristics of the peripheral device may become deteriorated.
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USPTO Backgrounds