Metal films are conventionally utilized in semiconductor manufacturing technology to form electrically conductive contacts to active as well as passive device regions or components formed in or on a semiconductor wafer substrate, as well as for filling via holes, interlevel metallization, and interconnection routing patterns for wiring together the components and/or regions. Because many large scale integration (LSI), very large scale integration (VLSI), and ultra large scale integration (ULSI) devices presently manufactured are very complex and require multiple levels of metallization for interconnections, etc., as described above, it has been common to repeat metallization processing multiple times, e.g., to form five or more levels of metallization interconnected by conductive vias. Thus, in the course of manufacturing such devices, each wafer requires passage through one or more metallization systems arranged along a device production path.
Metals commonly employed for "back-end" metallization purposes include nickel, titanium, tantalum, aluminum, chromium, gold, silver, copper, and alloys thereof, which metals may be applied to the semiconductor wafers by a variety of techniques, including electroplating, electroless plating, dipping, pasting, spraying, physical vapor deposition (e.g., evaporation, sputtering, ion plating, etc.), and chemical vapor deposition (including plasma enhanced chemical vapor deposition). Of the enumerated metals and deposition techniques, metallization by electroplated copper or copper-based alloys is particularly attractive for use in LSI, VLSI, and ULSI multilevel metallization systems used in "back-end" processing of semiconductor wafers. Copper and copper-based alloy metallization systems have very low resistivities, i.e., even lower than that of previously preferred systems utilizing aluminum and aluminum alloys, as well as significantly higher resistance to electromigration. Moreover, copper and its alloys enjoy a considerable cost advantage over a number of the above-enumerated metals, notably silver and gold, and in contrast to aluminum and refractory-type metals, can be readily deposited in good quality, bright layer form by well-known electroplating techniques, at deposition rates compatible with the requirements of device manufacturing throughput.
However, a significant drawback associated with electroplated metallization which has resulted from the recent trend toward use of very large diameter semiconductor wafers, e.g., eight (8) inch wafers, is the difficulty in obtaining uniform electrodeposited layer thicknesses across the maximum lateral dimension or extent of the wafer, e.g., across the 8 inch diameter. A conventional arrangement for alleviating this drawback is schematically illustrated with reference to FIGS. 1-3.
Referring to FIG. 1, very schematically shown therein is a "fountain" type electroplating system 1 for metallizing planar-surfaced workpieces such as semiconductor wafer substrates, and is conceptually similar to commercially available systems, e.g., from Semitool, Inc., Kalistell, Mont. As illustrated, system 1 comprises an electroplating vessel or chamber 2 enclosing therein a cathode electrode 3, typically circularly shaped and affixed to rotatable shaft 4, and an anode electrode 5, also typically circularly shaped and in parallel spaced opposition thereto. Anode 5 is affixed to a hollow, optionally rotatable shaft 6 forming part of an electrolyte recirculation circuit 7, one end of which terminates at centrally positioned opening 8 formed in the anode and acts as an orifice 9 for circulating liquid electrolyte 10 therethrough. Inlet 11 of the electrolyte recirculation circuit 7 is positioned at an upper portion of electroplating chamber 2, preferably at a location above the cathode electrode 3. Recirculation circuit 7 further includes conduit 12 connected to inlet 11, an electrolyte pump or equivalent recirculation device 13, and conduit 14 connected to hollow, rotatable anode shaft 8. Electroplating power supply 15 is electrically connected, in conventional manner, to the cathode and anode electrodes, via respective leads 16, 17.
Cathode 3 includes means, not shown for illustrative simplicity, for mounting a workpiece 18, typically a semiconductor wafer, on and in electrical contact with the lower surface thereof. As illustrated, the maximum lateral dimension of the wafer corresponds to its diameter, shown in the figure by reference to opposing radii +r and -r. Positioned within the space between the cathode and anode electrodes and parallel thereto, is a diffuser member 19 (shown in top plan view in FIG. 2). Diffluser member 19, typically disk-shaped and optionally rotatable around its central axis, is made of a non-conductive material (e.g., a rigid polymeric material) or a conductive material (e.g., a metal) coated with a non-conductive material, and comprises a plurality of circularly-shaped openings 20 formed therethrough. In the illustrated conventional diffuser member 19, openings 20 are distributed in a pattern of concentric circles with generally similar spacings 21 between adjacent circles. The diameter of the diffuser member 19 is generally selected to correspond with that of the workpiece 18. For example, the diameter of the diffuser member is about 8 inches when employing standard 8 inch semiconductor wafer substrates. The diameter, number of concentric circles, inter-circle spacing, and inter-hole spacing of the openings 20 are determined based upon the diffuser member diameter and workpiece requirements, and typically are about 2-6 mm, 4-10, 5-10 mm, and 5-11 mm, respectively, for an 8 inch diameter diffuser member.
In a typical plating operation, e.g., electroplating copper onto a semiconductor wafer workpiece 18, cathode 3, anode 5, and diffuser member 19 are coaxially aligned in the electroplating chamber 2 along a common central axis c-c', with cathode-diffuser member spacing 22 and anode-diffuser member spacing 23 each in the range from about 10 to about 15 mm. At least one of the anode, cathode, and diffuser member is rotated about central axis c-c', typically at from about 5 to about 50 rpm. Since conventional copper electroplating baths and conditions such as voltages, current densities, and electrolyte temperatures are employed, the details of such will not be described. Rates of electrolyte 10 recirculation through recirculation circuit 7 are typically from about 1 to about 6 gpm (gal./min.). As indicated by the arrows in the drawing, electrolyte 10, under the influence of the electric field applied between the cathode 3 and anode 5 (and for kinetic and diffusion reasons), flows from the orifice 9 in anode 5 along paths 24, is channeled through openings 20 in diffuser member 19 along paths 25, from the diffusion member to the workpiece 18 via paths 26, and thence to outlet 11 for recirculation.
While the above-described fountain-type electroplating system 1, when provided with a conventionally configured diffuser member 19, as illustrated, provides an improvement in plating uniformity over the lateral extent of relatively small-dimensioned workpieces, such as 3-4 inch diameter semiconductor wafers, unsatisfactory plating uniformity is frequently encountered when metallizing the very large diameter (i.e., 8 inches) semiconductor wafers in common use at present. In addition, the problem of poor plating uniformity is exacerbated when, as is common practice in the art, multiple levels of metallization are formed, due to additive effects arising from unevenness of successive, overlying plated layers.
Referring now to FIG. 3, shown therein is a graph indicating plating thickness variation (in arbitrary units) as a function of position along the lateral (i.e., radial) dimension of a plated workpiece (e.g., an 8 inch diameter semiconductor wafer) obtained with the use of such conventional fountain-type electroplating apparatus as is illustrated in FIG. 1. As is evident from a comparison of the graph of FIG. 3 with the pattern of openings of the diffuser member of FIG. 2, the pattern of thickness variation is substantially correlated to the pattern of concentric, radially spaced apart circles formed by the openings 20 in the diffuser member 19. Such result suggests that the diffuser member 19 channels the electrolyte into a pattern of streams having a higher concentration of platable species than the bulk electrolyte, and/or selectively directs a greater amount of electrolyte, and thus a greater amount of platable species, to specific areas of the workpiece surface, as determined by the concentric pattern of openings formed in the diffuser member. The result is an undesirably enhanced rate of electroplating at corresponding locations along the workpiece surface, with consequent plating thickness variation.
Thus there exists a need for an improved system and method for electroplating workpieces which substantially reduces or eliminates the above-described drawback of poor plating thickness uniformity associated with use of conventional diffuser members in fountain-type electroplating systems. Further, there exists a need for an improved system and method for electroplating metallization processing of large diameter semiconductor wafer workpieces employed in the manufacture of LSI, VLSI, and ULSI semiconductor devices.
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USPTO Backgrounds