FIG. 1 illustrates a simplified block diagram of a part of a conventional radio frequency (RF) transmitter 100, such as may be used within a radar application requiring beamforming of the transmitted RF signals. The RF transmitter 100 includes a phase shifter 110 arranged to receive a complex (I/Q) RF signal consisting of a first (I) signal component cos(ω(t)) 120 and a second (Q) signal component sin(ω(t)) 125. The phase shifter 110 is further arranged to receive a complex (I/Q) control signal consisting of a first (I) phase shift control signal component A·cos(θ) 130 and a second (Q) phase shift control signal component A·sin(θ) 135. The phase shifter 110 is arranged to perform the operation a. ej(ω(t)+θ) on the received complex signals to generate an output signal fout of:fout=cos(ω(t))·A·cos(θ)+sin(ω(t))·A·sin(θ)  Equation 1
However, in practice mismatch errors are introduced between the I and Q paths by the phase shifter 110, for example as a result of mismatched components, path layouts, etc. Consequently, the output signal fout is more accurately defined as:fout=cos(ω(t))·A1·cos(θ1)+sin(ω(t))·A2·sin(θ2)  Equation 2
The mismatch errors in the output signal fout degrade beamforming performance RF transmitter 100, and it is therefore desirable to compensate for such mismatch errors in order to optimize the beamforming performance of the RF transmitter 100.
In the conventional RF transmitter 100 architecture illustrated in FIG. 1, the phase shift control signal is generated by a direct digital synthesizer (DDS) 140. The DDS 140 receives a phase value θ 142, which is applied to a 32-value lookup table 145 to obtain corresponding sinusoidal values cos(θ) and sin(θ). The DDS 140 also receives an amplitude value A 144, which is multiplied by the sinusoidal values cos(θ) and sin(θ) to generate digital phase shift control values A·cos(θ) and A·sin(θ). The digital phase shift control values are then provided to digital to analogue converters (DACs) 150, 155 which generate the first (I) phase shift control signal component A·cos(θ) 130 and second (Q) phase shift control signal component A·sin(θ) 135 respectively based on the received digital phase shift control values.
A problem with the conventional architecture illustrated in FIG. 1 is that the 32-LUT limits the precision of the phase value θ to 11.25° (360°/32), preventing fine precision compensation of the phase shift control signals 130, 135. Another problem with the conventional architecture illustrated in FIG. 1 is that the same phase θ and amplitude A values 142, 144 are applied to both phase shift control signal components, making mismatch error compensation difficult.
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