1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuit manufacturing, and more specifically, to improved slurries for the chemical mechanical polishing (CMP) of thin films used in semiconductor integrated circuit manufacturing.
2. Description of Relevant Art
Today, integrated circuits are made up of literally millions of active devices formed in or on a silicon substrate or well. The active devices which are initially isolated from one another are later connected together to form functional circuits and components. The devices are interconnected together through the use of well-known multilevel interconnections. A cross-sectional illustration of a typical multilevel interconnection structure 100 is shown in FIG. 1. Interconnection structures normally have a first layer of metallization, an interconnection layer 102 (typically aluminum alloys with up to 3% copper), a second level of metallization 104, and sometimes a third or even fourth level of metallization. Interlevel dielectrics 106 (ILDs), such as doped and undoped silicon dioxide (SiO.sub.2), are used to electrically isolate the different levels of metallization in silicon substrate or well 108. The electrical connections between different interconnection levels are made through the use of metallized vias 110 formed in ILD 106. In a similar manner, metal contacts 112 are used to form electrical connections between interconnection levels and devices formed in well 108. The metal vias 110 and contacts 112, hereinafter being collectively referred to as "vias" or "plugs", are generally filled with tungsten 114 and generally employ an adhesion layer 116 such as TiN. Adhesion layer 116 acts as an adhesion layer for the tungsten metal layer 114 which is known to adhere poorly to SiO.sub.2. At the contact level, the adhesion layer acts as a diffusion barrier to prevent W and Si from reacting.
In one process which has presently gained wide interest, metallized vias or contacts are formed by a blanket tungsten deposition and a chemical mechanical polish (CMP) process. In a typical process, via holes 202 are etched through an ILD 204 to interconnection lines or a semiconductor substrate 206 formed below. Next, a thin adhesion layer 208, such as TiN, is generally formed over ILD 204 and into via hole 202, as shown in FIG. 2b. Next, a conformal tungsten film 210 is blanket deposited over the adhesion layer and into the via 202. The deposition is continued until the via hole 202 is completely filled with tungsten. Next, the metal films formed on the top surface of ILD 204 are removed by chemical mechanical polishing, thereby forming metal vias or plugs 220.
In a typical chemical mechanical polishing process, as shown in FIG. 2c, the substrate or wafer 200 is placed face-down on a polishing pad 212 which is fixedly attached to a rotatable table 214. In this way, the thin film to be polished (i.e., tungsten film 210) is placed in direct contact with pad 212. A carrier 216 is used to apply a downward pressure F.sub.1 against the backside of substrate 200. During the polishing process, pad 212 and table 214 are rotated while a downward force is placed on substrate 200 by carrier 216. An abrasive and chemically reactive solution, commonly referred to as "slurry" 222 is deposited onto pad 212 during polishing. The slurry initiates the polishing process by chemically reacting with the film being polished. The polishing process is facilitated by the rotational movement of pad 212 relative to wafer 200 as slurry is provided to the wafer/pad interface. Polishing is continued in this manner until all of the film on the insulator is removed.
Slurry composition is an important factor in providing a manufacturable chemical mechanical polishing process. Several different tungsten slurries have been described in literature. One slurry described in "Chemical Mechanical Polishing for Fabricating Patterned W Metal Features as Chip Interconnects" [F. B. Kaufman, et al., Journal of the Electrochemical Society, Vol. 138, No. 11, November 1991], describes a slurry comprising potassium ferricyanide having a pH adjusted to greater than 5. It has been found that slurries with a pH greater than five form plugs 220 which are recessed below the insulating layer, as shown in FIG. 2d. Such recessing causes a non-planar via layer to be formed which impairs the ability to print high resolution lines during subsequent photolithography steps and can cause the formation of voids or open circuits in the metal interconnections formed above. Additionally, the recessing of plug 220 increases when overpolishing is used to ensure complete removal of the tungsten film across the surface of a wafer. The recessing is further compounded when soft polishing pads are used during polishing (soft polishing pads are thought to help provide high and uniform polishing rates). As such, high pH slurries have been found inadequate to manufacturably polish tungsten layers in an integrated circuit.
On the other hand, slurries with low pH's (i.e., pH's &lt;2) have been found to provide high removal rates, good uniformity, and small recessing of the plugs. Unfortunately, however, slurries with pH's less than two are considered hazardous materials and therefore require special handling procedures which substantially increase manufacturing costs. Additionally, low pH slurries readily react and cause corrosion of the polishing apparatus. As such, low pH slurries have been found inadequate to manufacturably chemically mechanically polish films in an integrated circuit process.
As such, what is desired are slurries for chemical mechanical polishing of thin films used in integrated circuit manufacturing which do not form recessed plugs and which are not hazardous or corrosive.
USPTO Backgrounds
USPTO Backgrounds