In general, the present invention relates to the preparation of a single crystal silicon ingot according to the Czochralski method. In particular, the invention relates to a high throughput process for preparing single crystal silicon wafers having improved gate oxide integrity, wherein the growth conditions of a single crystal silicon ingot, from which the wafers are derived, are controlled. More specifically, the growth conditions of a single crystal silicon ingot, including the growth velocity, the average axial temperature gradient and the cooling rate, are controlled in order to limit the size, and in some cases the density, of vacancy-related agglomerated defects, and optionally the residual vacancy concentration, in single crystal silicon wafers derived therefrom. Additionally, the present invention relates to a more accurate and reliable method by which to evaluate the gate oxide integrity of such wafers.
Single crystal silicon, which is the starting material in most processes for the fabrication of semiconductor electronic components, is commonly prepared by the so-called Czochralski (“Cz”) method. In this method, polycrystalline silicon (“polysilicon”) is charged to a crucible and melted, a seed crystal is brought into contact with the molten silicon, and then a single crystal is grown by slow extraction. After formation of a neck is complete, the diameter of the crystal is enlarged by, for example, decreasing the pulling rate and/or the melt temperature until the desired or target diameter is reached. The cylindrical main body of the crystal which has an approximately constant diameter is then grown by controlling the pull rate and the melt temperature while compensating for the decreasing melt level. Near the end of the growth process but before the crucible is emptied of molten silicon, the crystal diameter is typically reduced gradually to form a tail end in the form of an end-cone. The end-cone usually is formed by increasing the crystal pull rate and heat supplied to the crucible. When the diameter becomes small enough, the crystal is then separated from the melt.
In recent years, it has been recognized that a number of defects in single crystal silicon form in the growth chamber as the ingot cools from the temperature of solidification. More specifically, as the ingot cools intrinsic point defects, such as crystal lattice vacancies or silicon self-interstitials, remain soluble in the silicon lattice until some threshold temperature is reached, below which the given concentration of intrinsic point defects becomes critically supersaturated. Upon cooling to below this threshold temperature, a reaction or agglomeration event occurs, resulting in the formation of agglomerated intrinsic point defects.
The type and initial concentration of these intrinsic point defects in the silicon are determined as the ingot cools from the temperature of solidification (i.e., about 1410° C.) to a temperature greater than about 1300° C. (i.e., about 1325° C., 1350° C. or more); that is, the type and initial concentration of these defects are controlled by the ratio v/G0, where v is the growth velocity and G0 is the average axial temperature gradient over this temperature range. In general, a transition from self-interstitial dominated growth to vacancy dominated growth occurs near a critical value of v/G0 which, based upon currently available information, appears to be about 2.1×10−5 cm2/sK, where G0 is determined under conditions in which the axial temperature gradient is constant within the temperature range defined above. Accordingly, process conditions, such as growth rate (which affect v), as well as hot zone configurations (which affect G0), can be controlled to determine whether the intrinsic point defects within the silicon single crystal will be predominantly vacancies (where v/G0 is generally greater than the critical value) or self-interstitials (where v/G0 is generally less than the critical value).
Defects associated with the agglomeration of crystal lattice vacancies, or vacancy intrinsic point defects, include such observable crystal defects as D-defects, Flow Pattern Defects (FPDs), Gate Oxide Integrity (GOI) Defects, Crystal Originated Particle (COP) Defects, and crystal originated Light Point Defects (LPDs), as well as certain classes of bulk defects observed by infrared light scattering techniques (such as Scanning Infrared Microscopy and Laser Scanning Tomography). Also present in regions of excess vacancies are defects which act as the nuclei for the formation of oxidation induced stacking faults (OISF). It is speculated that this particular defect is a high temperature nucleated oxygen precipitate catalyzed by the presence of excess vacancies.
Agglomerated defect formation generally occurs in two steps; first, defect “nucleation” occurs, which is the result of the intrinsic point defects, such as vacancies, being supersaturated at a given temperature. Once this “nucleation threshold” temperature is reached, intrinsic point defects, such as vacancies, start to agglomerate (i.e., void formation begins). The intrinsic point defects will continue to diffuse through the silicon lattice as long as the temperature of the portion of the ingot in which they are present remains above a second threshold temperature (i.e., a “diffusivity threshold”), below which intrinsic point defects are no longer mobile within commercially practical periods of time. While the ingot remains above this temperature, vacancy intrinsic point defects, for example, diffuse through the crystal lattice to sites where agglomerated vacancy defects, or voids, are already present, effectively causing a given agglomerated defect to grow in size. This is because these agglomerated defect sites essentially act as “sinks,” attracting and collecting vacancy intrinsic point defects because of the more favorable energy state of the agglomeration. Accordingly, the formation and size of such agglomerated defects are dependent upon the growth conditions, including v/G0 (which impacts the initial concentration of such point defects) and the cooling rate or residence time of the main body of the ingot over the range of temperatures bound by the “nucleation threshold” at the upper end and the “diffusivity threshold” (which impacts the size and density of such defects) at the lower end.
Maximizing throughput is a primary concern in the cost-effective production of single crystal silicon wafers. As a result, growing single crystal silicon ingots at the highest possible growth rates is the goal for all silicon manufacturers. However, until now, there has generally been no clear way to produce single crystal silicon of an acceptable quality using such growth conditions. For example, high pull rates/cooling rates typically mean a high vacancy concentration, which leads to a high concentration of small, agglomerated defects. Such conditions are favorable, for example, with respect to light point defects (LPDs) because integrated circuit manufacturers typically require that the number of such defects in excess of about 0.2 microns in size not exceed about 20 for a 200 mm diameter wafer. However, such conditions are also unfavorable because they have traditionally been considered to yield wafers having poor gate oxide integrity. In contrast, when slower pull rates/cooling rates are employed as a means by which to improve GOI (slow cooling typically resulting in a few, very large agglomerated vacancy defects being formed), the resulting size of LPDs is unacceptable.
An additional area of concern, with respect to high pull rates/cooling rates, is the residual vacancy concentration. More specifically, high pull rates typically lead to high vacancy concentrations in the silicon that is formed, and well as high cooling rates. High cooling rates, in turn, typically lead to a high residual vacancy concentration (i.e., the concentration of silicon lattice vacancies present in the silicon, once it has cooled to a temperature at which vacancies are essentially no longer mobile). High residual vacancy concentrations are problematic because, upon subsequent heating, they can lead to uncontrolled oxygen precipitation.
Accordingly, a need continues to exist for a method by which single crystal silicon ingots may be grown by the Czochralski process under conditions which maximize not only throughput, but also the yield of the silicon wafers obtained therefrom. Such a process would optimize growth conditions such that the fastest possible pull rate of a given crystal puller could be employed, in view of the need to limit the size, and in some cases the density, of agglomerated vacancy defects, as well as the residual vacancy concentration.
USPTO Backgrounds
USPTO Backgrounds