Together with recent development of semiconductor manufacturing technology, demand of memory device had been increased rapidly. Therefore, high capacitance within small dimension of device is required. Capacitance of a capacitor is in proportion to dielectric constant of a dielectric and is reverse proportion thickness of the dielectric. As the device is highly integrated, in order to optimize the capacitance, there have been suggested various methods such as a method using an insulator having high dielectric constant as a capacitor insulating layer; a method enlarging dimension of electrode and a method reducing thickness of the dielectric. To provide such high capacitance, SiO.sub.2 /Si.sub.3 N.sub.4 or Ta.sub.2 O.sub.5 has been used as dielectrics. To enlarge dimension of electrode, a three dimensional structure such as a stack type or a trench type in a planar capacitor cell has been suggested.
However, conventional dielectrics such as SiO.sub.2 /Si.sub.3 N.sub.4 or Ta.sub.2 O.sub.5 can not be applied any more as a capacitor insulating layer to highly integrated memory devices over 1 Gbit. Then, recently BST having high dielectric constant is suggested as noticeable dielectrics, and studies thereof have also been in progress.
One of ferroelectric layers, the BST layer is deposited under oxygen atmosphere at temperature of over 400.degree. C., therefore a native oxide layer having lower dielectric constant may be formed at an interface between a polysilicon, i.e. a storage node and the BST layer. To prevent formation of the native oxide layer, instead using the polysilicon, materials having excellent antioxidation property such as noble metals for example platinum(Pt), iridium(Ir), ruthenium(Pu) or oxide electrodes for example RuO.sub.2, IrO.sub.2 can be used as a storage node electrode.
Platinum, iridium and ruthenium used as the storage node electrode are chemically stabilized materials. However, an angle made by an etching plane and a substrate plane is below 75 degrees, therefore the etching plane is inclined with respect to the substrate plane since the steam pressure of by-products made in the etching process. Thus, it is difficult to form the storage node electrode having distance below 0.18 .mu.m by the material comprising platinum(Pt), iridium(Ir), ruthenium(Ru) or oxide electrodes for example RuO.sub.2, IrO.sub.2.
On the other hand, general metals such as tungsten (W), tungsten nitride(WN), tantalum(Ta), tantalum nitride(TaN), titanium(Ti) and titanium nitride(TiN) are easy to etch compared to the noble metals, however their antioxidation property is not very good. Accordingly, there is formed an oxide layer on the general metal layer after a ferroelectric layer is formed, thereby increasing thickness of a dielectric and also increasing leakage current.
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USPTO Backgrounds