The present invention relates to a semiconductor device and a manufacturing method for the same, and for example, to a semiconductor device including an electrode pad and a manufacturing method for the same.
A semiconductor device includes an electrode pad for connecting to an external electrode terminal. This electrode pad is also used to examine electrical properties of the semiconductor device. Specifically, a probe of an inspection device is brought into contact with the electrode pad, and the semiconductor device is energized via the probe, so as to examine the electrical properties of the semiconductor device. In this way, as the probe of the inspection apparatus is brought into contact with the electrode pad at the time of examining the electrical properties of the semiconductor device, large stress is imposed on the electrode pad, thereby possibly damaging the electrode pad and the semiconductor device.
Japanese Unexamined Patent Application Publication No. 2002-76075 discloses a technique concerning a semiconductor device that is capable of reducing the chip size by forming test electrode pads utilizing the top wiring layer on a vacant I/O area. Japanese Unexamined Patent Application Publication No. 2006-351588 discloses a technique concerning a semiconductor device that is capable of preventing damage to an electrode pad caused by bonding. Japanese Unexamined Patent Application Publication No. 2009-170763 discloses a technique concerning a semiconductor device that is capable of preventing generation of cracks in an insulating film below an electrode pad due to external force applied to the electrode pad of the semiconductor device.
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USPTO Backgrounds