1. Field of the Invention
The present invention relates to the power supply capability for an information processing apparatus and in particular to a power consumption control system for reducing the power consumption in an information processing apparatus under actual working conditions.
2. Description of the Related Art
Electronic equipment such as word processors and personal computers, which have been miniaturized, are supplied with their necessary power from a built-in battery to provide the equipment with portability and mobility. However, the amount of power stored in the built-in battery is limited. Accordingly, it is necessary to suppress the power consumption of the electronic equipment to assure a practical period of operation time. For this purpose, some electronic devices have the capability to suppress the power consumption by turning off the power to the disk drive apparatus if a new access is not made within a predetermined time period from the last access.
The predetermined monitor time can be preset by the user.
Specifically, the power consumption control systems are disclosed in Japanese Patent Application Laid-Open (KOKAI) Sho 64-66719 and OA Personal Computer, August 1990, pages 45 to 47.
In these systems, reduction of power consumption is achieved by constantly monitoring the entry from a keyboard and sequentially turning off power sources for devices which are not used in an apparatus.
For example, if there has been no key entry for a given period of time (several seconds to several tens of minutes), processing is stopped by firstly stopping the supply of clock to a CPU (micro processor). If there has been no key entry for a further given period of time (several minutes to several tens of minutes), a backlight of a liquid crystal display is turned off. If there has been no key entry for and a further given period of time, the display itself is also turned off.
Reduction of power consumed by the floppy disk drive or the hard disc drive is achieved by monitoring the use of the disk drive by means of an exclusive CPU and automatically stopping a motor for the drive if there has been no access thereto for a given period of time (several seconds).
Many of the CPUs or peripheral devices which are to be controlled use all internal registers including static CMOS transistors.
The reason for this will now be described.
Although the power consumption of the LSI increases in proportion to the frequency of clock supplied to the LSI, there is a lower limit of the frequency of the operative clock even if the clock frequency is lowered to reduce the power consumption in the case of dynamic LSI. If dynamic LSI is operated at a frequency lower than the minimum frequency, the contents in the internal registers are lost so that normal operation cannot be performed. On the other hand, in case of static LSI, the contents of the internal registers are not lost, if the supply of clock is stopped. Accordingly, power consumption of the static LSI can be remarkably reduced by appropriately stopping the clock supply when the clock supply is deemed unnecessary.
The CMOS type LSI has characteristics whereby little current flows therethrough if a clock is not supplied to the LSI even when power is supplied to the LSI. The reduction in power consumption is remarkable when the clock supply is stopped.
In order to easily achieve control of the clock supply to the CPU, many CPUs are provided with a command for stopping the supply of the clock (referred to as a "sleep" command) and with a capability to resume the supply of the clock to the CPU in response to an externally provided interrupt signal.
Since a period of time until the supply of power is turned off is constant irrespective of the operating conditions of the equipment in the prior art, the power consumption is increased due to resuming operation in response to an access immediately after the supply of power is turned off if an inappropriate monitor time is set. This problem is serious particularly in equipment requiring a lot of power for activation such as a disc drive apparatus.
In order to avoid such a problem, it is necessary for the user to change the setting of the monitor time depending upon the condition of use of the disk apparatus. This places too high a burden on the users. Appropriate setting is not easy and optimum reduction in power consumption cannot be achieved.
The above mentioned prior art power saving techniques can achieve a remarkable power saving if the user does not use an information processing apparatus, for example, if there has been not key entry for a given period of time or the disk has not been accessed for a given period of time.
However, presence or absence of a key entry is not inherently related to the conditions of use of the peripheral devices or the CPU. These power saving techniques assume that the whole information processing apparatus is not used if there has been no key entry for a while and merely sequentially restrict the supply of power.
The prior art product assumes that a usual application program will not last for several tens of minutes since the termination of the supply of clock to a CPU is stopped if there has been no key entry for several tens of seconds. This may interrupt the processing of some application programs which use the CPU for a long period of time.
The prior art power saving technique is rarely invoked when application programs such as word processing, communication and table calculation are actually executed while the user carries out key entry. Accordingly, power saving is less when in actual use by the user.
USPTO Backgrounds
USPTO Backgrounds