High density pin grid arrays, requiring uniform impedance through terminating resistors have been built using a buried resistor configuration. This means that the circuit elements, such as emitter coupled logic circuit elements, are connected to a circuit board by means of a pin connection from the circuit element to a conductive element on the board. The circuit element is connected to the interior of the board where the terminating resistor is located. This resistor then terminates the circuit element on the plane of the board. As the densities of the circuit elements increased, decreasing the interpin distance, the room available for the terminating resistors decreased, forcing some resistors to be located outside the array and to be connected by a stub. However, as the terminating resistor was located outside the array, the length of the stub introduced an imbalance, and where the stubs to the various terminating resistors were of different lengths, the electrical imbalances introduced by the stub of various lengths were compounded.
USPTO Backgrounds
USPTO Backgrounds