An error correction code is an algorithm for expressing a sequence of numbers such that any errors which are introduced may be detected and corrected (within certain limitations) based on the remaining numbers. The study of error correction codes and the associated mathematics is known as coding theory. The commonly used error correction codes in digital communications and data storage may include BCH (Bose-Chaudhuri-Hochquenghem) codes, Reed-Solomon codes (which are a subset of BCH codes), turbo codes, and the like.
Error correction codes are often defined in terms of Galois or finite field arithmetic. A Galois field is commonly identified by the number of elements which the field contains. The elements of a Galois field may be represented as polynomials in a particular primitive field element, with coefficients in the prime subfield. Since the number of elements contained in a Galois field is always equal to a prime number, q, raised to a positive integer power, m, the notation GF(qm) is commonly used to refer to the finite field containing qm elements. In such a field all operations between elements comprising the field yield results which are each elements of the field.
Finite fields of characteristic 2 are important because these fields have data structures suitable for computers and may be utilized in error correction coding and cryptography. Conventionally, inverse calculation over a finite field with characteristic 2 may require an enormous amount of calculations compared with multiplication. For example, a well-known method for calculating inverses in a finite field follows directly from the cyclic structure of such a field that the inverse of a field element may be obtained directly from exponentiation. To be more precise:a−1=a−2+2nA person skilled in the art will recognize that this operation may be accomplished with 2n−3 multiplications. Logic circuits for inverse operation based on such a method may thus have large depth and- complexity. The depth of a logic circuit is the maximal number of logic elements in a path from a circuit input to a circuit output. The depth may determine the delay of the circuit. The complexity of a logic circuit is the number of logic elements in the circuit. The logic elements may have two inputs and one output.
Therefore, it would be desirable to provide a method for constructing logic circuits of small depth and complexity for operation of inversion in finite fields of characteristic 2.
USPTO Backgrounds
USPTO Backgrounds