High resistance at an electrode-chalcogenide interface in chalcogenide-based phase-change memories requires that either a higher operating voltage be used or that a reduced drive voltage be available for chalcogenide phase changing. Additionally, the high local temperatures that are associated with the operation of phase-change memory (in excess of 600 C) make probable an electrode-chalcogenide reaction that adversely affects device performance.
It will be appreciated that for simplicity and/or clarity of illustration, elements depicted in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. The scaling of the figures does not represent precise dimensions and/or dimensional ratios of the various elements depicted herein. Further, if considered appropriate, reference numerals have been repeated among the figures to indicate corresponding and/or analogous elements.
USPTO Backgrounds
USPTO Backgrounds