1. Field of the Invention
The present invention relates to a microcomputer and more particularly, to a microcomputer operable to be synchronized with an internal clock signal generated in the microcomputer itself when an external oscillator element is connected and with an external clock signal provided from the outside of the microcomputer.
2. Description of the Related Art
Conventionally, microcomputers of this type, which have been extensively used as control computers for controlling various instruments, are provided with oscillation circuits for generating an internal clock signal. An example of the oscillation circuits of the conventional microcomputers of this type is shown in FIG. 1, which is disclosed in the Japanese Non-Examined Patent Publication No. 11-7333 published in January 1999.
The conventional oscillation circuit shown in FIG. 1 comprises three external terminals X1, X2, and IN, an inverting amplifier circuit 111, an inverted 107, and a buffer amplifier 108.
The terminal X1 is used for connection of an external oscillation element (not shown) such as a quartz or crystal oscillator provided outside. The terminal X2 is used for connection of an external oscillator element (not shown) such as a quartz or crystal oscillator provided outside or for receiving an external clock signal. The terminal IN is used for receiving an external selection signal for selecting whether an external oscillator element is connected across the terminals X1 and X2 or an external clock signal is directly supplied to the terminal X2.
The inverting amplifier circuit 111 comprises two p-channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) 101 and 102 connected in series, two n-channel MOSFETs 103 and 104 connected in series, an n-channel MOSFET 105, and an inverter 106. The source of the MOSFET 102 is connected to the power supply line supplied with a supply voltage VDD by way of the MOSFET 101. The drain of the MOSFET 102 is connected to the drain of the MOSFET 103. The source of the MOSFET 103 is connected to the ground by way of the MOSFET 104. The gazes of the MOSFETs 102 and 103 are coupled together to form the input terminal of the circuit 111, which is connected to the terminal X1. The drain of the MOSFETs 102 and 103 are coupled together to form the output terminal of the circuit 111, which is connected to the terminal X2 and the input terminal of the buffer amplifier 108.
The gate of the MOSFET 101 is connected to the output terminal of the inverter 106. The gaze of the MOSFET 104 is connected to the gate of the MOSFET 105 and the input terminal of the inverter 106. The source and drain of the MOSFET 105 are respectively connected to the terminals X1 and X2.
The input terminal of the inverter 107 is connected to the terminal IN. The output terminal of the inverter 107 is connected to the gates of the MOSFETs 104 and 105 and the input terminal of the inverter 106
The output terminal or the buffer amplifier 108 emits an internal clock signal xcfx86 for inner circuits (not shown) of the conventional microcomputer.
With the conventional oscillator circuit shown in FIG. 1, when the selection signal applied to the terminal IN is in the logic-low (L) level, both the MOSFETs 101 and 104 are turned on and at the same time, the MOSFET 105 is turned on. Thus, the inverting amplifier circuit 111 is activated, thereby conducting its self-biasing and inverting-amplification operations. On the other hand, when the selection signal applied to the terminal IN is in the logic-high (H) level, both the MOSFETs 101 and 104 are turned off and at the same time, the MOSFET 105 is turned off. Thus, the circuit 111 is inactivated and kept in the high impedance (Hi-Z) state.
When an external oscillator element is connected across the terminals X1 and X2, the selection signal in the L level is applied to the terminal IN to activate the inverting amplifier circuit 111. Thus, the terminal X1 is self-biased and the signal fed back through the oscillator element is inverting-amplified. This means that the external oscillator element and the amplifier circuit 111 constitute an xe2x80x9coscillation circuitxe2x80x9d for generating the internal clock signal xcfx86. The internal clock signal xcfx86 thus generated is outputted by way of the buffer amplifier 108 and then, it is supplied to the internal circuit of the microcomputer for its normal operation.
Also, an external reset signal (not shown) is applied to the internal circuit. In this case, the internal circuit is initialized and then, it starts the specific operations according to the signal xcfx86.
On the other hand, when no external oscillator element is connected across the terminals X1 and X2, the selection signal in the H level is applied to the terminal IN, inactivating the inverting amplifier circuit 111. Thus, the circuit 111 is brought to the Hi-Z state, where an external clock signal can be applied to the terminal X2. In this case, an external clock signal applied to the terminal X2 is sent to the internal circuit of the microcomputer as the internal clock signal xcfx86 by way of the buffer amplifier 108.
The internal circuit is initialized by an external reset signal (not shown) and then, it starts the specific operations according to the signal xcfx86.
As explained above, with the conventional oscillator circuit of the conventional microcomputer shown in FIG. 1, the selection signal needs to be applied to the terminal IN in order to select whether an external oscillator element is connected across the terminals X1 and X2 or an external clock signal is directly applied to the terminal X2. As a result, one of the external terminals of the conventional microcomputer has to be assigned to the input of the selection signal in spite of the count (i.e., the total number) of the external terminals being limited. This fact causes a problem that the count of the external terminals applicable to signal input or output (i.e., the count of the programmable input/output terminals for a user) is decreased.
Accordingly, an object of the present invention is to provide a microcomputer that eliminates the need of input of a selection signal to select whether an external oscillator element is connected to generate an internal clock signal or an external clock signal is inputted to generate an internal clock signal.
Another object of the present invention is to provide a microcomputer that increases the count of programmable or usable input/output terminals for a user.
Still another object of the present invention is to provide a microcomputer that ensures its stable operation.
The above objects together with others not specifically mentioned will become clear to those skilled in the art from the following description.
According to a first aspect of the present invention, a microcomputer is provided. This microcomputer comprises:
(a) a first terminal and a second terminal which are connectable to an external oscillation element;
the second terminal being able to receive an external clock signal when the external oscillation element is not connected;
(b) a third terminal for receiving an external reset signal;
(c) an amplifier circuit for constituting an oscillation circuit along with an external oscillation element when the external oscillation element is connected across the first terminal and the second terminal;
the oscillation circuit being used for generating an oscillation signal;
(d) an internal clock signal output circuit for outputting an internal clock signal corresponding to the oscillation signal generated by the oscillation circuit or the external clock signal;
the internal clock signal being used for operating an internal circuit of the microcomputer;
(e) an internal reset signal generation circuit for generating an internal reset signal corresponding to the external reset signal;
the internal reset signal being used for resetting the inner circuit for initialization;
(f) a delay circuit for generating a delayed reset signal brow the external reset signal;
the delayed reset signal having a specific delay period with respect to the external reset signal;
(g) an external clock signal detection circuit for detecting the external clock signal at the second terminal;
the external clock signal detection circuit outputting a detection signal; and
(h) an oscillation control signal generation circuit for generating an oscillation control signal for the amplifier circuit;
the oscillation control signal being generated corresponding to the detection signal outputted from the external clock signal detection circuit;
the oscillation control signal being used to activate the amplifier when the external clock signal does not exist at the second terminal and to inactivate the amplifier when the external clock signal exists at the second terminal.
With the microcomputer according to the first aspect of the invention, the delay circuit generates the delayed reset signal from the external reset signal to have the specific delay period. The external clock signal detection circuit detects the external clock signal at the second terminal, outputting a detection signal. The oscillation control signal generation circuit generates the oscillation control signal for the amplifier circuit, where the oscillation control signal is generated corresponding to the detection signal outputted from the external clock signal detection circuit. The oscillation control signal is used to activate the amplifier when the external clock signal does not exist at the second terminal and to inactivate the amplifier when the external clock signal exists at the second terminal. These operations are conducted in the specific delay period of the delayed reset signal.
Accordingly, when the external clock signal does not exist at the second terminal (i.e., the internal clock signal is generated from the oscillation circuit), the external clock signal detection circuit detects this fact, activating the amplifier by way of the oscillation control signal. In this case, the internal clock signal output circuit outputs the internal clock signal corresponding to the oscillation signal generated by the oscillation circuit.
On the other hand, when the external clock signal exists at the second terminal (i.e., the internal clock signal is generated from the external clock signal), the external clock signal detection circuit detects this fact, inactivating the amplifier by way of the oscillation control signal. In this case, the internal clock signal output circuit outputs the internal clock signal corresponding to the external clock signal.
As explained above, with the microcomputer according to the first aspect of the invention, whether the external oscillator element is connected across the first and second terminals or the second terminal receives the external clock signal to generate the internal clock signal is detected automatically. This means that the need of input of a selection signal is eliminated for this purpose.
Also, when the second terminal receives the external clock signal to generate the internal clock signal, the amplifier is inactivated. Thus, the first terminal can be used as an input/output terminal. In other words, the count of programmable or usable input/output terminals for a user is increased by one.
Moreover, if the internal reset signal generation circuit generates the internal reset signal corresponding to the external reset signal using the delayed reset signal, the oscillation signal generated by the oscillation circuit can be stabilized in the delay period of the delayed reset signal. Thus, the stable operation of the microcomputer is ensured.
In a preferred embodiment of the microcomputer according to the first aspect, an input port control circuit is additionally provided. The input port control circuit controls supply or block of the signal at the first terminal to the internal circuit according to an input port control signal. The input port control signal is generated in the oscillation control signal generation circuit.
In another preferred embodiment of the microcomputer according to the first aspect, the oscillation control signal generation circuit includes an AND gate and an OR gate. The AND gate receives the delayed reset signal and the detection signal, outputting the oscillation control signal. The OR gate receives the inverted, delayed reset signal and the detection signal, outputting the input port control signal.
In still another preferred embodiment of the microcomputer according to the first aspect, the internal reset signal generation circuit outputs the internal reset signal in a period until the oscillation signal generated by the oscillation circuit is stabilized.
In a further preferred embodiment of the microcomputer according to the first aspect, the internal reset signal generation circuit outputs the internal reset signal to the internal circuit in a specific period after the internal circuit is reset by the internal reset signal.
In a still further preferred embodiment of the microcomputer according to the first aspect, a pull-down or pull-up circuit is additionally provided to lower or raise a level of the second terminal according to the delayed reset signal.
According to a second aspect of the present invention, another microcomputer is provided. This microcomputer comprises:
(a) a first terminal and a second terminal which are connectable to an external oscillation element;
the second terminal being able to receive an external clock signal when the external oscillation element is not connected;
(b) a third terminal for receiving an external reset signal;
(c) an amplifier circuit for constituting an oscillation circuit along with an external oscillation element when the external oscillation element is connected across the first terminal and the second terminal;
the oscillation circuit being used or generating an oscillation signal;
(d) an internal clock signal output circuit for outputting an internal clock signal corresponding to the oscillation signal generated by the oscillation circuit or the external clock signal;
the internal clock signal being used for operating an internal circuit of the microcomputer;
(e) an internal reset signal generation circuit for generating an internal reset signal corresponding to the external reset signal;
the internal reset signal being used for resetting the inner circuit for initialization;
(f) a latch circuit for latching a signal at the first terminal and for outputting a detection signal according to the signal thus latched; and
(g) an oscillation control signal generation circuit for generating an oscillation control signal for the amplifier circuit;
the oscillation control signal being generated corresponding to the detection signal outputted from the latch circuit;
the oscillation control signal being used to activate the amplifier when the external clock signal does not exist at the second terminal and to inactivate the amplifier when the external clock signal exists at the second terminal.
With the microcomputer according to the second aspect of the invention, the latch circuit latches the signal at the first terminal and outputs the detection signal according to the signal thus latched. The oscillation control signal generation circuit generates the oscillation control signal for the amplifier circuit corresponding to the detection signal outputted from the latch circuit. The oscillation control signal is used to activate the amplifier when the external clock signal does not exist at the second terminal and to inactivate the amplifier when the external clock signal exists at the second terminal.
Accordingly, when some signal exists at the first terminal (i.e., the internal clock signal is generated from the oscillation circuit) the latch circuit latches the signal at the first terminal, activating the amplifier by way of the oscillation control signal. In this case, the internal clock signal output circuit outputs the internal clock signal corresponding to the oscillation signal generated by the oscillation circuit.
On the other hand, when no signal exists at the first terminal (i.e., the internal clock signal is generated from the external clock signal), the latch circuit latches no signal, inactivating the amplifier by way of the oscillation control signal. In this case, the internal clock signal output circuit outputs the internal clock signal corresponding to the external clock signal.
As explained above, with the microcomputer according to the second aspect of the invention, whether the external oscillator element is connected across the first and second terminals or the second terminal receives the external clock signal to generate the internal clock signal is detected automatically. This means that the need of input of a selection signal is eliminated for this purpose.
Also, when the second terminal receives the external clock signal to generate the internal clock signal, the amplifier is inactivated. Thus, the first terminal can be used as an input/output terminal. In other words, the count of programmable or usable input/output terminals for a user is increased by one.
Moreover, if the internal reset signal generation circuit generates the internal reset signal corresponding to the external reset signal after a specific delay period, the oscillation signal generated by the oscillation circuit can be stabilized in the delay period. Thus, the stable operation of the microcomputer is ensured.
In a preferred embodiment of the microcomputer according to the second aspect, an input port control circuit is additionally provided. The input port control circuit controls supply or block of the signal at the first terminal to the internal circuit according to an input port control signal. The input port control signal is generated in the oscillation control signal generation circuit.
In another preferred embodiment of the microcomputer according to the second aspect, the oscillation control signal generation circuit includes an AND gate and an OR gate. The AND gate receives the external reset signal and the detection signal, outputting the oscillation control signal. The OR gate receives the external reset signal and the detection signal, outputting the input port control signal.
In still another preferred embodiment of the microcomputer according to the second aspect, the internal reset signal generation circuit outputs the internal reset signal in a period until the oscillation signal generated by the oscillation circuit is stabilized.
In a further preferred embodiment of the microcomputer according to the second aspect, the internal reset signal generation circuit outputs the internal reset signal to the internal circuit in a specific period aster the internal circuit is reset by the internal reset signal.
In a still further preferred embodiment of the microcomputer according to the second aspect, a pull-down or pull-up circuit is additionally provided to lower or raise a level of the first terminal according to the external reset signal.
USPTO Backgrounds
USPTO Backgrounds