In the publication “Fractional-Frequency Generators Utilizing Regenerative Modulation” and published in the Journal: Proceedings of The Institute of Radio Engineers, vol. 27, no. 7, pp. 446-457, 1939, Ronald Lindsay Miller proposed the regenerative frequency divider whereby the output signal y(t) is mixed with the input signal x(t) and the result applied to a low-pass filter, as illustrated in FIG. 1. Under proper conditions, mixing the input and output signals produces sum and difference frequencies of ωin/2 and 3ωin/2 at the output of the mixer. The low-pass filter filters out the signal component at 3ωin/2, whilst the signal component at ωin/2 survives and circulates around the loop. Advantageously, because the device capacitances may be absorbed within the low-pass filter, this topology is able to achieve high-speed frequency division.
FIG. 2 illustrates an idealized model of an example of a regenerative frequency divider in which the low-pass filter is implemented by way of an RC filter, and a delay ΔT=π/ωin is inserted into the loop to permit correct division. FIG. 3 illustrates a simplified circuit diagram of a bipolar realization of the regenerative frequency divider of FIG. 2, employing a double-balanced mixer arrangement whereby the delay ΔT is introduced at nodes X and Y through the emitter follower transistors Q7 and Q8, and at the collectors of transistors Q1 and Q2. Such double balanced mixers advantageously have symmetrical paths, with equally sized switching devices, for both inputs, so that only the product signal, and neither of the input signals, appears at the output.
In the publication “A 40-GHz Frequency Divider in 0.18-μm CMOS Technology”, published in Solid-State Circuits, IEEE Journal (Volume: 39, Issue: 4), April 2004, pages 594-601, the authors Lee and Razavi noted that the topology of FIG. 2 is difficult to realize in CMOS technology due to:                (i) the low transconductance of MOS devices requiring a large voltage drop across the load resistors so as to provide sufficient loop gain;        (ii) source followers consuming substantial voltage headroom and attenuating the signal; and        (iii) the limited bandwidth of the source followers preventing the divider from high-speed operation.        
In order to overcome these difficulties with realizing the regenerative frequency divider in CMOS technology, and thus to enable the implementation of regenerative frequency dividers within integrated circuit devices, Lee and Razavi proposed employing an LC tank as the load of the regenerative frequency divider, effectively replacing the low-pass filter with a band-pass filter. FIG. 4 illustrates an idealized model of an example of a regenerative frequency divider employing an LC tank as the load. FIG. 5 illustrates a simplified circuit diagram of a simple double-balanced mixer implementation of the regenerative frequency divider of FIG. 4.
The double-balanced mixer configuration of the regenerative frequency divider illustrated in FIG. 5 is widely used in present day RFIC (Radio Frequency Integrated Circuit) applications due to its compact layout and high performance. However, for all resonant frequency dividers, there is typically a trade-off between power efficiency and locking range (the frequency range around the natural resonant frequency of the LC tank for which the divider works as intended). The double-balanced mixer implementation of the regenerative frequency divider illustrated in FIG. 5 provides a wide locking range, but has relatively low power efficiency.
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