1. Field of the Invention
The present invention relates to non-volatile memory devices and particularly to an error detection method and apparatus using Reed Solomon coding and decoding techniques for error detection and correction in the non-volatile memory devices.
2. Description of the Prior Art
Currently, confidential data files are stored in Floppy disks or are delivered via networks that require passwords or that use encryption coding for security.
Confidential documents can be sent by adding safety seals and impressions during delivery. Nevertheless, confidential documents are exposed to the risks of undesirable intrusions, such as breaking of the passwords, encryption codes, safety seals and impressions, thereby resulting in unsecured transfer of information. Thus, the need arises for supplemental security measures.
With the advent of the popularity of flash memory, density of flash memory devices (or chips, integrated circuits or semiconductor) is increasing thereby increasing the rate of defect spots. Even more noteworthy is the increase in the rate of defect spots in Multi-Level Cell (MLC), which is a certain type of non-volatile memory, during the flash manufacturing process. Compared with a SLC process, random error bits in MLC processes occur more often due to multi-level threshold voltages (less noise margin) needed to detect logic levels.
While flash memory is becoming more popular each day, as the density of flash chips are increasing, defect rates are also increasing, especially with Multi-Level Cell (MLC) technology being introduced in flash manufacturing processes. An effective error detection and correction method is needed for operations using flash or non-volatile memory to ensure data correctness particularly with in light of a higher flash chip defect density. The need therefore arises for the use of hardware as well as software solutions for detecting errors and for even correcting errors so that the error(s) remain invisible to the end users. Additionally, manufacturing costs can be lowered.
An effective error detection results when using Reed Solomon coding techniques for detection and correction of errors in systems using flash or non-volatile memory. Therefore, an apparatus and method are needed for flash operations to improve the accuracy of information.
Normally, four procedures are involved in the Reed Solomon decoding process as follows:    (1). Syndrome calculation: Each syndrome will be calculated based on read out string of data from flash memory, a non-zero value determines the error numbers.    (2). Error location polynomial calculation: it will find out the polynomial coefficient.    (3). Root finding based on Error Location Polynomial.    (4). Reciprocal of root will determine the error location of read out strings.    (5). Use Syndrome value and Error location polynomial coefficient to find out error values associated with each error location.    (6). Recover original strings of value and return the 512 bytes sector data to request unit.
The foregoing procedure (2) normally uses Berlekamp-Messay recursive method or Euclidian's matrix method, the complexity of these two methods are depend on code length, and independent of error numbers.
The foregoing procedure (3) is used to find roots of error polynomial normally adopts Chien's searching method, the calculation time also depends on code length. The above two methods do not fully utilize the characteristic of low error counts of flash memory, and require sophisticated hardware and longer calculation time.
What is needed is electronic medium or card having non-volatile (or flash) memory and Reed Solomon coding and decoding apparatus and method using advantageously reduced complexity of circuitry to reduce costs of manufacturing of the electronic medium.
USPTO Backgrounds
USPTO Backgrounds