Such an SeOI substrate comprises a thin layer of semiconductor material separated from a base substrate by means of a buried insulating layer.
A semiconductor device produced on such a substrate generally has a conducting region produced in the thin layer above the insulating layer, for example a drain region or a source region of an FET transistor, or else an emitter region of a bipolar transistor associated with an FET transistor in order to inject charge into the channel of the FET transistor.
A semiconductor device on an SeOI substrate may also include a conducting region produced in the base substrate beneath the insulating layer, for example a buried back control gate region facing the channel of an FET transistor.
Connections have to be made in order to supply these various types of conducting region. In general, these connections are produced on the front face side of the semiconductor substrate. Thus, there would typically be, for an FET transistor, a word line WL, a bit line BL and a source line SL which are connected to the front control gate region, the drain region and the source region respectively by means of metal connections produced on the front face side.
In general it is desirable to limit the number of metal connections so as to simplify the fabrication of the semiconductor device, especially as regards the lithography operations.
Moreover, it is in general desirable to limit the footprint of the semiconductor device (i.e. the area occupied by the latter). Now, making a connection via the front face inevitably increases the footprint.
Even more generally, it is desirable to simplify as far as possible the production of these connections.
The present invention now satisfies these requirements, by providing a semiconductor device and a process of producing the same.
USPTO Backgrounds
USPTO Backgrounds