1. Field of the Invention
This invention relates generally to semiconductor devices and fabrication methods and, more particularly, to methods for fabricating contacts for use in phase change memory devices.
2. Description of Related Art
Solid-state memory devices are used throughout the field of electronics. Typical memory applications include dynamic random access memory (DRAM), static random access memory (SRAM), read only memory (ROM), erasable programmable read only memory (EPROM), electrically erasable programmable read only memory (EEPROM), and flash memory. These can be divided into volatile and non-volatile memories. The primary element of the non-volatile devices, such as an EEPROM, typically employs a floating gate field effect transistor. A charge is stored on the gate of the field effect transistor to program each memory bit and has limited reprogrammability. These classes of memories may also be relatively slow to program. Although the memory cells of SRAMs, ROMs, EPROMs, EEPROMs, and flash memories do not require refreshing, they may suffer from disadvantages such as lower storage densities, larger size, and greater cost to manufacture compared to volatile DRAM devices.
The prior art has endeavored to create memory devices that are both random access and non-volatile using phase changing memory elements, as opposed to the charge storage memory elements used in many commercial memory devices. The term memory material will be used herein to refer to a material exhibiting structure phase changes in response to external stimuli. An example of a memory material is a phase-change material such as chalcogenide. The use of phase change memory materials that can be electrically switched between a generally amorphous first structural state and a generally crystalline second structural state for electronic memory applications is thus known in the art. Phase change materials may also be electrically switched between different detectable states of local order across an entire spectrum between the completely amorphous and the completely crystalline states. These materials are also truly non-volatile in that, when set in either a crystalline, semi-crystalline, amorphous, or semi-amorphous state, they possess a fixed resistance value. That resistance value is retained until reset as it represents a physical state of the material (e.g., crystalline or amorphous).
The large dynamic range of resistance values offered by phase change memory materials theoretically provides for the storage of multiple bits of binary information in a single cell. This could possibly be achieved by encoding binary information in analog form and, thereby, storing multiple bits of binary encoded information as multiple resistance values in a single cell. Thus, phase change memories may be able to be operated as traditional binary memories or as memories with numerical bases greater than two.
Typical materials suitable for phase change memory material applications include those utilizing various chalcogenide-including materials. Typical chalcogenide-including materials used for phase change memory applications may contain, for example, at least one of Te, Se, Ge, Sb, Bi, Pb, Sn, As, S, Si, P, and/or O. These non-volatile memory devices may use for example a monolithic body of chalcogenide material. A resulting memory structure, at least in theory, may require very little chip real estate to store a bit of information, thereby providing for inherently high-density memory chips.
One characteristic common among solid state memory devices including phase change memory devices is significant power consumption, particularly in setting or resetting memory elements. Even as downscaling of component sizes continues, power consumption continues to be a significant consideration, particularly in portable devices that rely on power cells (e.g., batteries). The reduction in power consumption of a memory device continues to be a priority.
The operation of chalcogenide memory cells requires that a region of the chalcogenide memory material, referred to as the active region, be subjected to a current pulse to set or reset the value retained by the cell. The switching voltages, currents, and powers of chalcogenide memory elements are believed to be scalable with device size and contact area, so that smaller contacts may produce smaller active regions with correspondingly lower power consumptions. With conventional semiconductor processing technology, the minimum achievable dimensions of a contact for a chalcogenide memory device may be limited by photolithography tools. Such dimensions may cause switching currents, voltages, and switching times to be too large and cycle life to be too small for integration with many leading-edge semiconductor technologies. Additionally, conventional chalcogenide memory fabrication methods may not be able to efficiently and reliably produce the uniform memory elements needed for large-scale memory devices.
A need thus exists in the prior art to provide memory contacts having a reduced size and a method for reliably manufacturing the contacts for phase-change memory devices so that, among other benefits, power requirements to program the memory devices may be reduced.
USPTO Backgrounds
USPTO Backgrounds