This invention relates, in general, to logic latching circuits and more particularly, to a self latching circuit useful as a buffer.
In many applications in digital circuitry it is necessary to provide a certain degree of isolation from one circuit to another. It is customary in such a situation to use a circuit that is called a buffer to provide the desired isolation. Furthermore, besides providing the buffering the circuit is also sometimes required to temporarily hold the data. While the circuit is holding the data it is often desired to prevent further input data from disrupting the data within the buffer. Therefore buffers have been provided with a latching feature which allows the buffer to latch in the data that is within the buffer and to latch out any subsequent data appearing at the input of the buffer until the receiving circuit has had an opportunity to receive the data from the buffer.
Such a latching buffer is particularly useful as an input to a computer memory to provide buffering between the computer memory and other circuitry. In addition, a latching buffer is also useful in providing buffering between a computer memory and addressing circuitry which carries an input address to the memory. In the past, such latching buffers required an external generated signal to control an internal portion of the latching buffer thereby preventing subsequent input data from disturbing a preset state of the latching buffer. Of course, the generation of the external signal requires additional hardware to generate this signal and additional wiring within the system to carry the signal up to the latching buffer. By now, it should be appreciated that it would be desirable to provide a latching buffer which does not require an external input signal to provide the latching function.
Accordingly, it is an object of the present invention to provide an improved latching buffer which is self latching.
Another object of the present invention is to provide a self latching buffer which uses feedback from the buffer itself to latch the buffer in a predetermined state and to latch out any further data from coming into the buffer.
USPTO Backgrounds
USPTO Backgrounds