The present invention relates to a semiconductor chip used for an IC card or the like and a method of manufacturing the same.
A semiconductor chip intensively incorporates intellectual property information such as original ideas associated with circuit patterns and manufacturing techniques and program information stored in a nonvolatile memory (e.g., an EEPROM).
In consideration of information management, some proper measures must be taken to prevent such information from leaking by a fraudulent means.
Most of such information associated with a circuit pattern and manufacturing techniques and stored information can be decoded from the major surface of the substrate with an optical observation means such as a microscope as long as the circuit pattern is exposed.
In a popular plastic-molded semiconductor chip, a circuit pattern is encapsulated with an opaque molding resin to be kept invisible. In addition to the sealing compound, a soft error protective film is formed on the circuit surface. Furthermore, in flip chip bonding, a mount substrate opposes a circuit pattern. For these reasons, it is not very easy to expose the surface of the circuit pattern.
There is, however, a possibility that the molding resin is removed by some proper method, and the circuit pattern is exposed by mechanically separating the semiconductor chip bonded to the lead frame therefrom.
In consideration of such a conventional problem, therefore, a semiconductor chip may be made fragile by making the semiconductor substrate thinner than usual, thereby preventing fraudulent decoding of circuit pattern information and the like.
If, however, the entire semiconductor substrate is thinned, the resultant structure lacks in strength for wafer dicing or bonding.
In addition, when the entire semiconductor substrate is thinned, the strength of the substrate uniformly decreases. A part to be crushed is unknown, and a nonvolatile memory or the like which must be destroyed may be left intact.
USPTO Backgrounds
USPTO Backgrounds