1. Field of Invention
The present invention is related to MOS output driver circuit having linear I/V characteristics.
2. Description of the Related Art
Semiconductor chips containing MOS circuit are well known and widely deployed because of their high speed, low power, and high integration characteristics. For example, a MOS output driver circuit is usually implemented to drive a pad to the required voltage level for conveying the desired logic values.
Please refer to FIG. 1 which illustrates a conventional MOS output driver circuit. A source node of PMOSFET 140 is connected to a voltage reference, Vss. The voltage reference provides a relatively stable voltage source of design magnitude, such as 3 or 5 volt bias commonly used in MOS device. As the initial voltage level of input node 110 and input node 120 are low, the initial voltage level of output node 130 is high. When input node 120 and input node 140 respectively receive high-voltage-level signals from outputs of a predriver (not shown), the source node and the gate node of PMOSFET 140 are both pulled high, such that PMOSFET 140 is turned off. Meanwhile, the gate node of NMOSFET 150 is pulled high and the source node of NMOSFET 150 is grounded, such that the NMOSFET 150 is turned on. At the instance, the drain node and the gate node of NMOSFET 150 are both pulled high, so NMOSFET 150 operates in saturation region. Since NMOSFET 150 is on, the voltage level of output node 130 starts decreasing. When the voltage level of output node 130 gets lower, NMOSFET 150 enters triode region eventually. The above operation is called a pull-down transition of the output signal.
Similarly, the conventional MOS output driver circuit experiences a pull-up transition of the output signal when the PMOSFET 140 is turned on and NMOSFET 150 is off.
When NMOSFET 150 operates from saturation region to triode region, the value of output impedance, viewed from the output node 130, is decreasing. Therefore, the conventional MOS output driver circuit sees impedance fluctuation when a pull-up or pull-down transition occurred. It is difficult for the conventional MOS output driver circuit to provide constant output impedance when a pull-up or pull-down transition occurred.
The present invention overcomes the impedance fluctuation problem by introducing a compensation circuit within the output driver circuit.
It is therefore the main objective of the present invention to provide an output driver circuit with good signaling performance.
It is yet another objective of the present invention to provide an output driver circuit having linear I/V characteristics, i.e. constant output impedance.
It is yet another objective of the present invention to provide an output driver circuit having invariant output impedance and being easy to be implemented by today""s standard CMOS IC technology.
The output driver circuit includes a first input transistor, a second input transistor, a first pair of transistors, a second pair of transistors, a first output transistor and a second output transistor. The first input transistor inputs a first input signal and has an output node coupled to the output node of the output driver circuit. The second input transistor inputs a second input signal and has an output node coupled to the output node of the output driver circuit. The first pair of transistors is responsive to a first control signal and the output signal for generating a second control signal. The second pair of transistors is responsive to a third control signal and the output signal for generating a fourth control signal. The first output transistor is operative to receive the second control signal and has an output node coupled to the output node of the output driver circuit. The second output transistor is operative to receive the fourth control signal and has an output node coupled to the output node of the output driver circuit.
USPTO Backgrounds
USPTO Backgrounds