The present disclosure relates to a chemical composition for semiconductor cleaning processes, and more particularly, for a post chemical mechanical planarization (CMP) cleaning, which can be used in advanced semiconductor fabrication and packaging.
Post CMP cleaning is perhaps one of the most critical steps in reliability improvement for semiconductor fabrication and packaging. For semiconductor substrate with copper interconnects architecture, Cu corrosion and surface residuals associated with post chemical-mechanical planarization cleaning are quite often the major reliability detractor to such an extent that its cleanness improvement becomes the most pivotal step in the successful qualification and implementation of the technology.
With the ever shrinking ground rule, new challenges emerge and new types of post-CMP cleaning related corrosion and residuals are observed in advanced technology nodes such as 22 nm and beyond. Ultra-low K dielectric with even higher porosity is adopted as interline dielectric materials. However, such type dielectrics become more affinitive to the post-CMP cleaning residue which leads to dielectric constant increase. Meanwhile, to meet demanding scale own feature size as well as electric performance, Cu barrier switches from traditional TaN/Ta to TiN, Ru, RuN, RuTa, RuTaN, W, WN, Co, TaRu, CuMn, CuAl, or CuFO, etc. Their electrochemistry associated potential corrosion needs to be taken care of along with Cu corrosion inhibition. Furthermore, in fine pitch Cu interconnects, the electric potential becomes greater while the diffusion path becomes shorter, creating an environment that will expedite the formation of corrosion-related defects such as hollow metal and dendrites. As a result, interline dielectric constant instability, Cu and Cu barrier corrosion becomes increasing critical in that such defects are generated during cleaning and the queue time which ultimately leads to reliability failure in the cause of time delayed dielectric breakdown (TDDB) and/or electric migration (EM) tests.
Since CMP is the final and enabling process before one level of Cu interconnect is fully defined, not only can it generate residuals during the process per se (e. g. polish residues), but it will also reveal defects generated from prior processing steps, such as post-RIE cleaning, Cu barrier deposition, and Cu plating. Therefore, not only must the post Cu CMP cleaning process clean up the residuals generated by CMP, but it must also render sufficient compatibility with prior processes to prevent exacerbating pre-existing defects incoming to CMP.
In general, CMP slurries frequently include one or more corrosion inhibitors which selectively form a temporary protective coating on the copper interconnect surface. However, if an organic coating should remain on the copper interconnect surface after the cleaning process, the presence of such a coating can interfere with subsequent steps, e.g., chemical vapor deposition (CVD), and with the ultimate performance of the copper interconnect. In post CMP cleaning processes, therefore, it is an imperative to minimize organic(s) remaining or no-detectable coating on the copper surfaces, but with sufficient protection to copper (including Cu barrier) interconnect.
Furthermore, corrosion inhibitors in post-CMP composition have the tendency of breakdown or oxidized while exposed to the air or oxygen saturated solution. Antioxidant or reduction agent often included in post-CMP solution to eliminate or reduce the level of oxidant. At the same time to minimize Cu oxidation introduced Cu loss and line surface roughness.
Accordingly, there remains a critical need for a unique post-CMP cleaning composition capable of providing synergistic functions as of residual removal, post-CMP temporary organic coating minimization, as well as Cu (including Cu barrier) corrosion inhibition without compromising performances of nano devices.
In the present disclosure, a cleaning composition, which is applied to the post chemical-mechanical planarization process of a semiconductor substrate containing a damascene metal structure, is provided. A cleaning composition may contain various chemicals that perform different functions during the cleaning process. A cleaning composition must contain a cleaning agent that removes polish residuals, such as CMP slurry particles, polish pad debris, polished metals and low-K dielectrics, from the surface of semiconductor substrate with damascene Cu interconnects. A cleaning composition may contain chelating agent, a combination of chelating agents, corrosion-inhibitor, and/or antioxidant. The cleaning agent of the current disclosure efficiently clean the surface of the planarized substrate by removing CMP slurry particles, cleaning residual metal and dielectrics, as well as minimizing temporary organic protective coating from surfaces of semiconductor substrate. A chelating agent or combined chelating agents form multi chemical bonds with transition metal ions to prevent re-deposition. Corrosion inhibitor together with antioxidant function by either deposit a few molecular thick layer of film on upmost metal surface or reduce oxygen to prevent oxidation or electrochemical reaction without adversely affecting the physical properties of contact interfaces of back-end-of-line buildups. To prevent foreign materials redeposit back onto low-k (or ultra low-k) dielectric surfaces, inhibitor and/or antioxidant also function as a wetting agent to lower the surface tension of dielectrics.
USPTO Backgrounds
USPTO Backgrounds