1. Field of the Invention
The invention relates to a resistor structure, and more particularly, to an integrated structure of a metal gate transistor and a resistor.
2. Description of the Prior Art
In the field of semiconductor fabrication, the use of polysilicon material is diverse. Having a strong resistance for heat, polysilicon materials are commonly used to fabricate gate electrodes for metal-oxide semiconductor transistors. Devices fabricated by polysilicon however still have many drawbacks. In contrast to most metal, polysilicon gates are fabricated by semiconductor materials having high resistance, which causes the polysilicon gate to work under a much lower rate than other metal wires. In order to compensate for slightly lowered rate of performance, a significant amount of silicides is applied during the fabrication of polysilicon processes, such that the performance of the device could be increased to an acceptable level.
Gate electrodes fabricated by polysilicon also causes a depletion effect. In most circumstances, the optimum doping concentration for polysilicon is between about 2×1020/cm3 and 3×1020/cm3. As most gate electrodes have a doping concentration of at least 5×1021/cm3, the limited doping concentration of polysilicon gates often results in a depletion region at the interface between the gate and the gate dielectric layer. This depletion region not only thickens the gate dielectric layer, but also lowers the capacitance of the gate, and ultimately reduces the driving ability of the device. In order to solve this problem, work function metal gates are used to replace conventional polysilicon to fabricate gate electrodes for MOS transistors.
However, it is well known in the art that the degree of difficulty for fabricating a MOS transistor with work function metal gate is immense as the process often involves strict control for the thickness of material and balance of the ingredients, as well as complicated integration with other devices. Current approach of integrating a MOS transistor and a resistor typically involves the steps of forming a dummy polysilicon gate electrode on both resistor and transistor region of the substrate, removing at least a portion of the dummy polysilicon gate from the designated region, and filling a conductive material into the region where the dummy polysilicon gate was removed. Unfortunately, integrated structure fabricated from this approach usually results in poor control of temperature coefficient and voltage coefficient. Hence, how to successfully integrate the fabrication of a conventional work function metal gate transistor with other passive devices such as a resistor while resolving aforementioned issues has become an important study in the field.
USPTO Backgrounds
USPTO Backgrounds