1. Technical Field
The present document relates to low drop-out (LDO) voltage regulators, all type of converters, buffers, and amplifiers. In particular, the present document relates to methods and systems for maintaining current consumption in case the supply voltage equals or comes close to the required output voltage.
2. Background
Prior art implementations of circuits as e.g. low-dropout (LDO) voltage regulators, buffers, or amplifiers are losing control over power consumption in case the supply voltage equals or comes close to the output voltage.
This leads to following disadvantages of prior art:                Unnecessary power consumption.        Adverse load transient behavior under dropout conditions.        Bypass mode can only be implemented with high power consumption        Drop in voltage of the voltage (brown out).        No monitoring of dropout condition.        
It is a challenge for engineers to design circuits as e.g. LDOs, buffers, or amplifiers enabled to control power consumption while the supply voltage is coming close or equal to required output voltage.
USPTO Backgrounds
USPTO Backgrounds