Through silicon via (TSV) is one of the techniques for implementing three-dimensional (3D) package structure. For high-density package application, the dimension of TSV has shrank to micron or sub-micron level, and the aspect ratio of the through via is accordingly increased. The high aspect ratio of via hole, however, deteriorates step coverage of a sidewall insulation layer, thereby causing copper out-diffusing issue.
USPTO Backgrounds
USPTO Backgrounds