Semiconductor devices can be manufactured by selectively and repeatedly performing various processes on a wafer, such as photography, etching, chemical vapor deposition, ion injection, and metal deposition processes. A photography process for forming a desired integrated circuit pattern on a wafer using a photo-mask is a key technique in the field of semiconductor fabrication.
With a gradual increase in the integration degree of a semiconductor device, there is a need for enhancing the resolution power to a range of approximately one-half wavelength or less during a photolithographic process of a micro-pattern processing technique. Accordingly, it can be important to optimize a photographic process for increasing a process margin. In the case of a 130 nm device, a critical dimension (CD) of contact holes can be approximately 160 nm. On the other hand, in the case of a 90 nm logic device, the CD of contact holes can be approximately 115 nm. Since such CD values exceed the resolution limit of a krypton fluoride (KrF) optical source, an argon fluoride (ArF) optical source may be used. This may result in a change in a photo-resist (PR) material. The ArF optical source has a short wavelength of approximately 193 nm, and must use a PR having a low physical etching resistance chemical structure. This is due to the fact that a PR for the KrF optical source, having a benzene ring-shaped chemical structure, has light-absorption characteristics.
Example FIG. 1A illustrates PR pattern holes after a photographic process used to form contact holes for the connection of a first metal wiring in a 90 nm device. Example FIG. 1B illustrates contact holes after an etching process for etching a lower layer using a PR pattern formed via a photographic process.
In relation to the resolution problem of the PR pattern due to a gradual reduction in the CD of contact holes, the contact holes illustrated in example FIG. 1B have a substantially abnormal shape. Contact holes having such an abnormal shape are undesirable. The abnormal shape of contact holes deteriorates the uniformity of a CD, causing a “bridge phenomenon.” When contact holes for connecting a first metal wiring of multilayer metal wirings are inaccurately etched, it may become difficult for the contact holes to reach an active region to be contacted. This may result in unstable contact resistance and low productivity. The CD of contact holes shows a great variation, and may deteriorate the operational rate of a semiconductor device requiring high-frequency operation. Particularly, the spacing between contact holes are effecting in that neighboring contact holes may be unintentionally connected to each other. This may result in a poor process margin. It may also become difficult to achieve a desired CD of an uppermost layer of a semiconductor device after etching. A PR pattern sidewall may also have an irregular etching rate, and consequently, have a different etching bias variation from that of substantially circular holes. Due to a different shape from the more accurately circular holes, a large-seam problem may develop upon deposition of tungsten (W). For instance, a void in the center of a contact hole increases up to approximately 50 nm or more, thereby making it impossible to normally fill the contact hole and aggravating a “floating phenomenon” whereby the contact hole may not reach a target point. The abnormal shape of contact holes may deteriorate the strength of an overlay that includes a plurality of metal wiring layers. It may be important to prevent an increase in contact resistance due to the misalignment of the overlay of the plurality of metal wiring layers. Otherwise, the increased contact resistance results in a change in source resistance, and consequently, a change in threshold voltage. This disadvantageously may cause an “electric short-circuit phenomenon.”
USPTO Backgrounds
USPTO Backgrounds