This invention relates to integrated-circuit devices and, more particularly, to a method for fabricating trenches in such devices.
It is known to utilize microminiature trenches in integrated-circuit devices for various purposes. In dynamic random-access memory (DRAM) devices, trenches having a thin dielectric layer formed on the walls and bottoms thereof serve as the basis for making high-capacitance memory cell capacitors in a relatively small area. In complementary metal-oxide-semiconductor (CMOS) devices, dielectric-filled trenches are utilized to achieve isolation between adjacent n-channel and p-channel transistor regions thereby to achieve latchup-free operation of the devices. Such isolation trenches include, for example, a composite filling including a thin high-quality dielectric formed directly on the trench walls.
In practice, the bottoms of typical trenches formed in integrated-circuit devices often exhibit imperfections such as surface roughness and/or sharp or irregular corners. In turn, these imperfections can lead to undesirable current leakage and/or voltage breakdown problems in the devices.
One solution to the problems that such imperfections cause is to form a thicker dielectric layer on the bottoms than on the sides of the trenches. But, heretofore, no satisfactory practical technique for forming such a thick dielectric has been available.
Accordingly, efforts have been directed by workers in the art aimed at trying to devise a simple and effective method of forming a relatively thick dielectric layer only on the bottom surfaces of trenches included in integrated-circuit devices. It was realized that such efforts, if successful, had the potential for significantly improving the electrical characteristics of devices that include trenches having less-than-ideal bottom contours.
Additionally, it has been recognized that the ability to form a thick dielectric layer only at the bottom of a trench is the basis for achieving an advantageous new DRAM device in which electrically isolated capacitors are fabricated on the respective facing sidewalls of an elongated trench. A specific illustrative trench structure that is thereby made feasible is described in a commonly owned application designated Ser. No. 758,885 which is being filed concurrently herewith.
USPTO Backgrounds
USPTO Backgrounds