1. Field of the Invention
The present invention relates to the fabrication of III-V microwave monolithic integrated circuit (MMIC) flip chips, and, more particularly, to forming a passivation layer for protection of the surface of GaAs flip chips during assembly.
2. Description of Related Art
During the fabrication of GaAs MMIC flip chips, which are generally not fully passivated, several concerns arise. First, during chip assembly and handling, the gold-plated air bridges are susceptible to damage. Second, gold leaching (scavenging) and shorting of the gold interconnection circuitry occur as a result of contact with solder (lead-tin) on the chip surface during flip chip mounting onto a metallized ceramic substrate (LTCC - low temperature co-fired ceramic). Third, gold leaching occurs as a result of metallurgical interaction between lead-tin solder and gold-based, silver-plated flip chip bump. Fourth, chemical and mechanical effects to the circuit element occur as a result of the reflowed solder defluxing process.
In the reflowed solder defluxing process, chemical solvents are used to remove the flux material. If the MMIC flip chip is not fully passivated, some of the flux material may easily get trapped on some tight and small open areas, especially at locations under and around plated bridges, making removal of the flux material difficult.
An additional problem relates to the desire to facilitate a more compatible reflow solder silk-screening process with GaAs MMIC flip chips. The silk-screening process refers to the solder squeegee process across a metallized substrate onto a masked layer. Excess of solder is removed when the masking material is removed. The same technique may be applied to solder bump flip chip, in which case the bumps are formed by solder squeegee instead of plating, excess solder is removed when the bump photoresist is removed. The problem with this process is that a tight bump geometry tolerance cannot be utilized because of the nature of the process.
The prior art has not adequately addressed these concerns, particularly for GaAs-based devices, nor has the prior art adequately addressed flip chip assembly reliability.
Thus, a need remains to eliminate the several concerns mentioned above and provide a process that fully passivates GaAs MMIC flip chip surfaces.
USPTO Backgrounds
USPTO Backgrounds