A programmable logic switch is used in a reconfigurable logic circuit including a field programmable gate array (FPGA) and has a function to switch ON/OFF of a logic switch based on data stored in a configuration memory to realize predetermined logic (circuit configuration).
A volatile memory such as an SRAM (Static Random Access Memory) has generally been used as a configuration memory, but in such a case, data disappears after power-off and it is thereafter necessary to write context into the configuration memory again during power-on.
The context is data to realize one piece of logic.
Moreover, in recent years, with an expansion of system variety, a multi-context reconfigurable logic circuit capable of selectively realizing one of multiple pieces of logic based on multiple pieces of logic is proposed. It is necessary for the multi-context reconfigurable logic circuit to configure a configuration memory from SRAMs to store contexts.
Unfortunately, the SRAM has a large area size and, with an increasing number of contexts, generates a problem of increasing a chip size.
Thus, in recent years, a mode of using a nonvolatile memory device used in a nonvolatile memory such as a flash memory is examined as a configuration memory. The nonvolatile memory device has, when compared with the SRAM, a small area size and is nonvolatile and so is suitable for use in a multi-context reconfigurable logic circuit.
However, the device structure that stores contexts in a nonvolatile memory device to selectively realize one of multiple pieces of logic based on the contexts has not yet been adequately examined.
USPTO Backgrounds
USPTO Backgrounds