Many computer systems provide what is known as "hot insertion" capability, which allows peripheral devices to be connected to the system while power to the system is on. One design concern associated with hot insertion capability is the potential for certain circuitry resident on a peripheral bus to be damaged by electrical transients when connecting a peripheral device with power on. In the past, this problem has been addressed by the addition of buffer circuitry "between" (electrically) the memory devices and the point at which peripheral devices are connected to the system. One problem with this technique, however, is that the buffer circuitry adds to the cost of the system. Therefore, it is desirable to provide a means by which peripheral devices can be connected to a processing system with the convenience to the user that is often associated with hot insertion capability, but without the need for buffer circuitry to protect against damage due to electrical transients.
USPTO Backgrounds
USPTO Backgrounds