1. Field of the Invention
The present invention relates generally to audio signal processing, and in particular, relates to a system that includes a Class D amplifier for audio signal amplification and other audio signal processing.
2. Background Information
Class D amplifiers are often used for audio amplification because of their power efficiency. They provide substantially full output power, while minimizing internal power consumption. Typically, a Class D amplifier is operated in switch mode, where its output stage produces a rectangular wave that is filtered before delivery to a load, such as a loudspeaker. The rectangular wave varies according to an input analog signal, and when the rectangular wave is filtered at the output, the resulting waveform is an amplified version of the input analog signal.
Two main techniques dominate the implementation of Class D audio power amplifiers. A first technique, pulse width modulation (PWM), drives the output stage at a constant carrier frequency and modulates the duty cycle of its pulses. In an analog approach, a differential analog comparator has the input analog signal at one input and a triangle waveform at another input. The triangle waveform oscillates at the carrier frequency, and the output stage is switched every time the triangle waveform crosses the instantaneous value of the input analog signal. This switching results in output pulses having pulse widths that correspond to the value of the input analog signal.
A second technique, pulse density modulation (PDM), sometimes referred to as xe2x80x9cdelta-sigma modulation,xe2x80x9d uses a decision block that is clocked at a constant frequency. On every clock edge, the block decides whether the output stage should remain in the present state or change to the opposite state. The idea is that the output of the Class D amplifier is a stream of pulses whose widths vary by quantum increments in time. The time quantum is determined by the frequency of the clock driving the decision block.
There are several problems and drawbacks to Class D amplifier implementations that use PWM, PDM, or other techniques. First, the non-ideal nature of components of Class D amplifiers introduces distortion at the switch output e node (e.g., at the output of the Class D amplifier""s output stage). Existing methods that attempt to account for this distortion are often unreliable or cumbersome.
Next, signal processing blocks for both PWM and PDM implementations are very complex and costly compared to the output stage or compared to Class AB or Class B analog power amplifiers. For example, a PWM implementation has to generate/use a triangle waveform, and a PDM implementation has to use a clocking mechanism.
Furthermore, because a delta-sigma PDM amplifier is implemented with a sampled (clocked) comparator, the clock rate limits the response time of a feedback loop. That is, once the comparator makes a comparison, another comparison cannot be made until the next clock edge. Similarly, the PWM amplifier makes decisions only when the input signal and the triangular waveform coincide.
Accordingly, improvements are needed in Class D audio amplifiers.
USPTO Backgrounds
USPTO Backgrounds