In a microprocessor, “state” may be defined as the value, at a given point in time, of one or more parameters used by the microprocessor in performing its functions. For example, microprocessors designed according to the Intel Architecture typically maintain a set of hardware registers, known as the “segment register file”, which typically are located in the memory execution unit (MEU) of the microprocessor. Two of these registers, the code segment register and the stack segment register, have particular importance regarding processor “state”. The purpose of the code segment register is to provide protection information and basic operating parameters as applied to instruction fetch (e.g., location in memory from which an instruction can be fetched, privilege levels). The purpose of the stack segment register is to indicate areas in memory where programs can read and/or write stack information, privilege levels, etc. Each of these two registers (and other registers) contains multiple bits, collectively representing the values of several different processor parameters. The term “state” commonly refers to the values of any one or more of these parameters.
A typical microprocessor includes a number of different functional units, each of which requires current state (i.e., the value of one or more of the aforementioned parameters) to perform its functions during the processing of microinstructions. Examples of such functional units in the Intel Architecture are the microinstruction checker retirement unit (CRU), instruction translation lookaside buffer (ITLB), trace cache (TC), and segment and address translation unit (SAAT). Consequently, such microprocessors commonly use a process known as state “broadcasting”, in which the current state is distributed, via one or more internal buses, to the various functional units which require it. State frequently changes during operation of the microprocessor, and it must be rebroadcast to the various functional units when that occurs. State tends to change frequently in a microprocessor, such as in response to any branch in the macrocode (a “far transfer”) and, when in protected mode, in response to any architectural event.
Broadcasting of state consumes microinstructions and therefore tends to have a negative performance impact on the processor, i.e., it slows down the processor. Broadcasting of state can have a more significant negative impact when used in conjunction with certain performance-enhancing technologies, such as out-of-order execution. Out-of-order execution is a well-known technique used in pipelined microprocessors to improve instruction throughput. Out-of-order execution involves selectively executing certain instructions out of order, i.e., before other instructions that occur “earlier” in the program code flow. A technique called register renaming is often used to facilitate out-of-order execution. Register renaming allows multiple execution paths without conflicts between different execution units trying to use the same registers. Rather than just one set of registers being used, multiple sets of registers are provided in the processor. This allows different execution units to work simultaneously without unnecessary pipeline stalls.
A problem associated with register renaming, however, is that it tends to increase the frequency with which state must be rebroadcast, degrading processor performance. In current microprocessors using the Intel Architecture, each functional unit stores a single copy of the state it requires (i.e., a portion or all of the code segment and/or stack segment registers). Consequently, whenever the code segment or stack segment register is renamed, state must be rebroadcast to the various functional units that require it. However, the rebroadcast cannot take place until all of the microinstructions which are based on the old state have finished executing. As a result, the microinstruction pipeline must stall until that happens, which slows down the processor. Thus, the requirement of having to frequently rebroadcast state tends to degrade performance of a microprocessor.
What is needed, therefore, is a technique which addresses the performance problems associated with rebroadcasting of state, particularly in an out-of-order microprocessor that uses register renaming.
USPTO Backgrounds
USPTO Backgrounds