Not Applicable
Not Applicable
This application claims the benefit of U.S. Provisional Application 60/167,485 filed Dec. 1, 1999.
This invention relates generally to the field of power supplies and specifically to an uninterruptible power supply (UPS) having an inverter.
Uninterruptible power supplies are used in many electrical and electronic systems to protect against loss or degradation of operation in the event of a utility power outage. Generally, a UPS system provides backup power for the protected system from a battery source that is charged by the utility power. It is desirable to utilize an efficient connection from the battery to the load when the utility power is not available. Power management is often part of the UPS system operation.
UPSs are used in many different applications, some of which demand particular output power waveforms from the UPS. Therefore, it is advantageous for a UPS to have a configurable output waveform. It is also advantageous for the UPS to operate from a wide variety of input voltages and frequencies.
One application of a UPS is for supplying power to cable telecommunications amplifiers. The UPS should also be able to interface with appropriate transponder monitoring systems. In addition, diagnostic information should be available to the user.
The present invention provides a power supply including an inverter having a DC input and an AC output. First and second DC voltage sources are connected to the DC input. A rectifier and a switch are connected in parallel, wherein the rectifier and the switch are connected between the second voltage source and the DC input.
The invention also provides a power supply including an inverter having a DC input and an AC output, wherein the inverter includes an amplitude circuit connected to control amplitude of the voltage at the AC output and a polarity circuit connected to control polarity of the voltage at the AC output. A controller is connected to operate the amplitude circuit and the polarity circuit so as to obtain a desired waveform at the AC output.
The amplitude circuit includes controlled switches connected and operable to generate a pulse width modulated signal. The polarity circuit is connected to receive the pulse width modulated signal and control the polarity of the AC output. A transformer is connected to transfer energy from the amplitude circuit to the polarity circuit. First and second DC voltage sources are connected to the DC input. A rectifier and a switch are connected in parallel, wherein the rectifier and the switch are connected between the second voltage source and the DC input. The switch is controlled so as to close when the second DC voltage source supplies power to the inverter and to open when the first DC voltage source supplies power to the inverter. The switch has a control input and also includes a switch control circuit having a capacitor having a first terminal connected to the switch control input and a second terminal connected to the second voltage source; a voltage applied to the first capacitor terminal; a second controlled switch connected between the second capacitor terminal and ground; and an oscillator connected to operate the second controlled switch when the first controlled switch is to be closed. The switch is a FET and the rectifier is a body diode of the FET. The first DC voltage source is a full bridge DC-DC converter and the second DC voltage source is a battery. The battery is charged by the first DC voltage source.
The amplitude circuit provides a voltage across first and second amplitude circuit terminals and the polarity circuit includes a first pair of rectifiers connected in parallel and in opposition between the first amplitude circuit terminal and the power supply output, a second pair of rectifiers connected in parallel and in opposition between the second amplitude circuit terminal and the power supply output, and a respective controlled polarity switch connected in series with each of the rectifiers, the polarity switches being controlled so that only one of the polarity switches corresponding to each diode pair is closed at any time. The polarity circuit includes a controller for operating the controlled polarity switches such that one of the polarity switches corresponding with the first pair of rectifiers is operated coincidentally with one of the polarity switches corresponding with the second pair of rectifiers. The switches operated coincidentally correspond with rectifiers connected to permit current flow to a single node. The polarity circuit controller includes two transformers, wherein one of the transformers is connected to control two of the polarity switches corresponding with rectifiers connected to permit current flow to a single node and the other of the transformers is connected to control two other of the polarity switches. The polarity circuit controller includes an oscillator connected to control current through the transformer and a polarity signal connected to control current through the transformer, wherein the polarity signal is connected to ensure that only one of the two transformers is on at the same time. The polarity circuit controller includes a respective rectifier and filter connected between each polarity switch and the corresponding transformer. The polarity circuit controller includes a shut down circuit connected to selectively block current flow through the transformers. The amplitude circuit includes controlled switches connected and operable to generate a pulse width modulated signal at the amplitude circuit terminals. The polarity circuit is connected to receive the pulse width modulated signal and control the polarity of the AC output by operation of the polarity switches. The terminals are output terminals of a transformer. The transformer includes a center tap connected to ground. The inverter includes an energy dissipator selectively connected across the output of the power supply.
The inverter includes a bleeder resistor selectively connected across the output of the power supply. A switch is provided for selectively connecting the bleeder resistor across the output of the power supply and a bleeder control circuit for operating the switch wherein the bleeder control circuit is connected to permit current flow through the bleeder resistor when voltage at the AC output exceeds a desired amplitude. A switch is provided for selectively connecting the bleeder resistor across the output of the power supply and a bleeder control circuit for operating the switch wherein the bleeder control circuit is connected to permit current flow through the bleeder resistor when voltage at the AC output is ramping toward zero volts.
A resistor is connected across the power supply output and a controlled switch is connected in series with the resistor and operated responsive to a voltage across the power supply output to close the switch when the output voltage amplitude exceeds a specified value.
A resistor is connected across the power supply output and a controlled switch is connected in series with the resistor and operated responsive to a voltage across the power supply output to close the switch when the output voltage amplitude is ramping toward zero volts.
The amplitude circuit includes controlled switches for controlling current determining the output of the amplitude circuit and a gate driver for each controlled switch. The gate driver includes a controller connected to provide a voltage to a control terminal of the controlled switch and an energy storage device connected to apply a voltage to a control terminal of the switch when the controlled switch is to be closed and to discharge a voltage from the control terminal switch when the controlled switch is to be opened. A transformer is connected between the controller and the controlled switch wherein the controller is a pulse width modulator. The energy storage device comprises a first capacitor connected to apply the voltage to the control terminal of the controlled switch and a second capacitor connected to discharge the voltage from the control terminal of the controlled switch. The controlled switch is a FET and the first capacitor is connected between a gate and a source of the FET by a second controlled switch that is closed when the controller applies a positive voltage to the gate and the second capacitor is connected between the gate and the source of the FET by a third controlled switch that is closed when the controller applies a negative voltage to the gate.
The amplitude circuit includes a FET having a gate and a source for controlling output voltage. A gate driving circuit for controlling the FET includes a first capacitor connected between the gate and the source; a first switch connected in series with the first capacitor;
a second capacitor connected between the gate and the source; and a second switch connected in series with the second capacitor, wherein the first and second switches are turned on alternately so that when the first switch is closed, a charge on the first capacitor applies a voltage to the gate and when the second switch is closed, the second capacitor discharges a voltage from the gate.
Another aspect of the invention provides a battery discharge circuit for connecting a battery to a load including a diode connected between the battery and the load and a controlled switch connected in parallel with the diode.
Another aspect of the invention provides a voltage bleeder including two terminals; a resistor connected across the two terminals; and a controlled switch connected in series with the resistor and operated responsive to a voltage across the terminals to close the switch when the voltage amplitude exceeds a specified value.
Another aspect of the invention provides a gate driver including a FET having a gate and a source; a first capacitor connected between the gate and the source; a first switch connected in series with the first capacitor; a second capacitor connected between the gate and the source; and a second switch connected in series with the second capacitor, wherein the first and second switches are turned on alternately so that when the first switch is closed a charge on the first capacitor applies a voltage to the gate and when the second switch is closed the second capacitor discharges a voltage from the gate.
USPTO Backgrounds
USPTO Backgrounds