1. Field of the Invention
The present invention relates to the protection against overcurrents in transistors carrying a load supply current and, for example, to the protection of transistors connected in parallel to control an at least partially inductive load, and more specifically the forming of individual circuits for protecting these transistors on demagnetization of the inductive load.
2. Description of the Related Art
FIG. 1 shows a conventional example of an assembly of several MOS power transistors M (M1, . . . Mn) connected in parallel between a terminal 1 of application of a supply voltage Vbat (for example, the voltage of a battery) and a terminal 2 of connection to a load Q to be powered, the other end of the load being for example connected to ground 3. In the example of FIG. 1, only two transistors M1 and Mn have been shown. In practice, the number n of parallel-connected transistors M depends on the power required by the load and on the current that each transistor can individually conduct.
All transistors M1 to Mn are controlled from a same signal CTRL that they respectively receive via logic and level-adapting blocks B1 to Bn (LOG) (for example, charge pump, set-up circuits, etc.) on their respective control terminals (gate) G (G1 to Gn). The respective conduction terminals (drain and source) of transistors M are directly connected to terminals 1 and 2.
Each transistor M is associated with a protection circuit formed of a zener diode DZ (DZ1, . . . DZn) in anti-series with a respective diode D (D1, . . . Dn) between terminal 1 and gate G of the concerned transistor.
When transistors M1 to Mn are controlled to be turned on by signal CTRL, load Q is supplied with voltage Vbat. Diodes DZ1 to DZn are reverse-biased. Diodes DZ have no function in the conduction phase since their threshold voltages are greater than the supply voltage, so that the voltage difference between control signal CTRL and voltage Vbat does not place them in avalanche when signal CTRL is active to turn on transistors M.
When transistors M1 to Mn are controlled to be turned on by a state switching of signal CTRL, a problem of current distribution is traditionally posed in power transistors. This problem is particularly present in the case of an at least partially inductive load due to the demagnetization phenomenon. This demagnetization results in the voltage at terminal 2 becoming lower than the voltage at terminal 3 (the ground), which considerably increases the voltage difference between terminals 1 and 2. To carry off the demagnetization current, transistors M1 and Mn must be turned on until this current disappears. This is the function of diodes DZ1 to DZn which set the demagnetization voltage, that is, the voltage across inductive load Q in the carrying off in the power supply of the demagnetization current. In fact, when the voltage of terminal 2 is lowered by the demagnetization to a value such that the voltage difference between terminals 1 and 2 exceeds the threshold voltage of diodes DZ, (neglecting gate-source voltage Vgs of transistors M and voltage drop VD in each forward-biased diode D), these diodes start an avalanche and impose a positive voltage between the gate and source of the corresponding transistors M to turn them on.
When control signal CTRL is inactive, demagnetization voltage Vdemag (the voltage across load Q) can be written, for each transistor M, as:Vdemag=Vbat−(VDZ+VD+Vgs),where VDZ represents the threshold voltage of zener diode DZ.
Forward voltage drops VD of diodes D are all fixed (on the order of 0.6 V), just as voltages Vgs of the different MOS transistors are approximately fixed, as well as battery voltage Vbat. Accordingly, in the above relation, it can be seen that the single parameter which conditions demagnetization voltage Vdemag of the load is the threshold voltage of zener diodes DZ.
Zener diodes DZ1 to DZn are thus all selected to have the same nominal values, to set the same demagnetization voltage, for the entire assembly, and distribute the current in all branches.
A disadvantage of the circuit of FIG. 1 is that manufacturing tolerances and technological dispersions make the respective threshold voltages of the different zener diodes DZ1 to DZn of the protection circuits of transistors M1 to Mn vary from one branch to another. This problem is particularly present in the case where each power transistor M is integrated with its protection circuit and its logic block in a circuit separate from the other transistors which are then associated in parallel in an assembly such as shown in FIG. 1. The presence of blocks B prevents a direct interconnection of all the gates of transistors M, which imposes providing one protection circuit (diodes DZ and D) per branch.
In fact, the zener diode DZ which has the smallest threshold voltage conducts first and thus imposes on its transistor a positive voltage Vgs to turn it on to carry off the demagnetization current. Since the other transistors M are not on yet because the protection zener diodes DZ associated therewith have greater thresholds, all the current flows through a single transistor M and said transistor is thus damaged since it is not designed to stand all of the current.
USPTO Backgrounds
USPTO Backgrounds