The present invention relates to the field of solid state photo-sensors and imagers, specifically to imagers referred to as Active and Passive Pixel Sensors, and more particularly, to a structure and process for efficiently controlling the silicidation of the photodetector within such sensors.
Active Pixel Sensors (APS) are solid state imagers wherein each pixel contains a photodetector and some other active devices that perform control functions on the pixel. Passive pixel sensors (PPS) are imagers having photosensing means and address transistors, but no active components. Recent and prior art devices have focused on using commercially available CMOS foundry processes to manufacture APS and PPS devices. To overcome the limitations of CCD-based imaging circuits, more recent imaging circuits use complementary metal oxide semiconductors (CMOS) active pixel sensor (APS) cells to convert light energy into an electrical signal. With active pixel sensor cells, a conventional photodiode is typically combined with a number of active transistors which, in addition to forming an electrical signal, provide amplification, readout control, and reset control.
The use of CMOS to manufacture APS and PPS devices has a resulting advantage of easily integrating signal processing and control circuits on the same chip as the imager, thus making it easier to fabricate a camera on a single semiconductor device, and providing a low cost integrated digital imaging device. In APS and PPS devices typically fabricated using standard CMOS processes, the photodetector within the pixel has been either a photocapacitor, (also referred to as a photogate), or a photodiode. In order to provide low resistivity and low resistance CMOS transistors and contact regions, CMOS processes have employed refractory metal silicides over all active area and polysilicon regions. This is typically done in a self-aligned process so that all active area and polysilicon regions form refractory metal silicides selectively without the need for a photolithographic patterning step. The refractory metal silicides are undesirable in an image sensor photodetector since they are opaque to part of the visible spectrum of light. As a result, in order to build a CMOS APS or PPS device, extra process steps such as photolithographic patterning must be used to remove the silicide or to prevent the silicide formation over the photodetector. This adds cost and complexity to the APS or PPS fabrication process.
It is, therefore, an object of the present invention to provide a complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) having a plurality of pixels which includes a photodetector, a transistor adjacent the photodetector having a silicide surface, and an insulator over the photodetector. The insulator has a thickness sufficient to prevent the silicide surface from forming over the photodetector.
The photodetector could be a pinned photodiode where a pinning layer is between the photodetector and the insulator. The photodetector is a doped region in the silicon substrate. The transistor could be a reset transistor having a silicided source region adjacent the photodetector, a silicided gate adjacent the source region and a silicided drain region on an opposite side of the gate from the source. Alternatively, the transistor could be a transfer transistor having a silicided source region adjacent the photodetector, a silicided gate adjacent the source region and a silicided drain region on an opposite side of the gate from the photodetector. The transistor could also be a row select transistor having a silicided gate adjacent the photodetector and a silicided drain region on an opposite side of the gate from the photodetector.
The inventive method of forming a complementary metal oxide semiconductor pixel sensor includes supplying a substrate, doping of the first region of the substrate to form a photodetector and forming a transistor adjacent the photodetector. The formation of the transistor includes forming an insulator which covers the photodetector and siliciding conductive regions of the transistor and an insulator field oxide. If the photodetector were pinned photodiode, the invention would form a pinning layer over the photodetector. Doping of the first region can be performed either before or after the insulator has been formed. A reset transistor could be utilized by forming a silicided source region adjacent the photodetector, a silicided gate adjacent the source region and a silicided drain region on an opposite side of the gate from the source. A transfer transistor could be utilized by forming a silicided gate adjacent the photodetector region and a silicided drain region on an opposite side of the gate from the photodetector. The utilization of a row select transistor entails forming a silicided gate adjacent the photodetector and a silicided drain region on an opposite side of the gate from the photodetector.
USPTO Backgrounds
USPTO Backgrounds