1. Field
Example, non-limiting embodiments relate generally to a semiconductor module and a method for manufacturing the semiconductor module, for example, to a wafer level semiconductor module implementing an integrated circuit (IC) chip set and a method for manufacturing the wafer level semiconductor module.
2. Description of the Related Art
The electronic industry seeks methods, techniques and designs that provide electronic products which may be smaller, lighter, faster, more efficient, provide multiple functions and/or result in improved performance, at an effective cost. One such development has been in the area of semiconductor packaging techniques, such as chip scale packages (CSP's), wafer level packages, or wafer level chip scale packages (WLCSP's), for example. Another such development has been in the area of board fabrication techniques, for example embedded printed circuit boards (PCB's) that may include passive devices, for example capacitors or inductors. However, it is rare to develop techniques for mounting semiconductor packages at the module level.
FIG. 1 is a plan view of a conventional semiconductor module 500. FIG. 2 is a cross-sectional view of the conventional semiconductor module 500.
Referring to FIGS. 1 and 2, the semiconductor module 500 may include a module board 535, and semiconductor packages 510 and passive devices 531 that are mounted on the module board 535 using solder balls 529. The semiconductor package 510 may be implemented for interconnections by a wire bonding method, a TAB bonding method or a flip chip bonding method. The semiconductor package 510 may have a semiconductor chip 511 that may be formed of various structures.
The conventional semiconductor module 500 may implement the semiconductor package 510 that may be completed through a series of processes including a wafer fabrication process, an electric die sorting test process and a package assembly process. Thereby, the semiconductor module 500 may be manufactured by a complicated, time-consuming and cost-ineffective process. Further, there may be limitations in reducing the size of the semiconductor module 500.
USPTO Backgrounds
USPTO Backgrounds