1. Technical Field
Various embodiments of the present invention relate to semiconductor apparatuses and related methods. In particular, certain embodiments relate to a semiconductor memory, a memory system, and a method of controlling the same.
2. Related Art
A memory system may be configured in such a manner that a memory controller, such as a central processing unit (CPU) or a graphic processing unit (GPU), can control a plurality of memories. To control a plurality of memories, according to one method, the memory system allocates a channel for each memory and provides an independent command and an address signal to each memory through the corresponding allocated channel. However, allocating a channel to each memory has a disadvantage of increasing the number of channels and may be difficult to apply to an actual memory system.
USPTO Backgrounds
USPTO Backgrounds