1. Field of the Invention
The present invention relates to a display apparatus in which a pixel portion includes a light-emitting device such as an LED (Light Emitting Diode).
2. Description of the Related Art
There is a heretofore known backlight-free display apparatus of self-emitting type comprising a plurality of pixel portions each including a light-emitting device such as an LED. FIG. 5 shows a block circuit diagram of the basic structure of such a display apparatus. The display apparatus comprises a substrate 51 composed of, for example, a glass substrate, on which are arranged many light-emitting portions (also referred to as pixel portions) 74 (P11, P12, P13, P21, P22, P23, P31, P32, P33 . . . ) each including a TFT (Thin Film Transistor) 71 which serves as a switching device for inputting light emission signals to each of light-emitting devices 73 (LD11, LD12, LD13, LD21, LD22, LD23, LD31, LD32, LD33 . . . ) and a TFT 72 which serves as a driving device for effecting current drive to the light-emitting device 73 on the basis of a potential difference between positive voltage (anode voltage of about 3 to 5 V) and negative voltage (cathode voltage of about −3 to 0 V) (light emission signal) responsive to the level (voltage) of a light-emission control signal (a signal which is transmitted through an image signal line SL).
The TFT 71 and the TFT 72 are each a p-channel TFT. Inputting of a low (L) signal to their gate electrodes effects source-to-drain conduction, thus switching the TFT to the ON state for the passage of electric current. In the TFT 72, its gate electrode receives input of a light-emission control signal, and, a potential difference (light emission signal) responsive to the level of the light-emission control signal is applied across the positive electrode (anode electrode) and the negative electrode (cathode electrode) of the light-emitting device 73. A positive voltage is inputted via a positive-voltage input line 75 to the positive electrode of the light-emitting device 73, and, a negative voltage is inputted via a negative-voltage input line 76 to the negative electrode of the light-emitting device 73. At the input end of the positive-voltage input line 75, there is provided a through conductor 78 comprising a through hole, etc. via which the positive-voltage input line 75 is electrically connected to a driving device 60 or a power supply section, etc. disposed on the back side of the substrate 51. At the input end of the negative-voltage input line 76, there is provided a through conductor 79 comprising a through hole, etc. via which the negative-voltage input line 76 is electrically connected to a driving device 60 or a power supply section, etc. disposed on the back side of the substrate 51. The TFT 72 is maintained in the ON state during the time the L signal is inputted to the gate electrode to allow the passage of electric current through the light-emitting device 73. Moreover, on a connection line for providing connection between the gate electrode and the source electrode of the TFT 72, there is provided a capacitive element which serves as a retention capacity for retaining the voltage of the light-emission control signal inputted to the gate electrode of the TFT 72 over a certain period of time until initiation of succeeding rewriting operation (one-frame period).
Moreover, on the substrate 51, there are provided a plurality of gate signal lines 52 (GL1, GL2, GL3, . . . ) each extending in a first direction (row direction, for example), a plurality of image signal lines (source signal lines) 53 (SL1, SL2, SL3, . . . ) each extending in a second direction (column direction, for example) perpendicular to the first direction so as to intersect with the gate signal lines 52, and the pixel portions 74 each assigned to a part of intersection of the gate signal line 52 and the image signal line 53. In FIG. 5, reference numeral 70 denotes a display section, and reference numeral 60 denotes an image signal line-driving device for driving the image signal line 53 via a through conductor 64 comprising a through hole, etc. Moreover, reference numeral 61 denotes a gate signal line-driving device comprising a gate signal line-driving circuit for successively inputting gate signals to the gate signal lines 52. Reference numeral 61s denotes a through conductor comprising a through hole, etc. for transmission of a gate signal from the driving device 61 disposed on the back side of the substrate 51 via a connection line 61a. Reference numeral 66 denotes a connection line for electrically connecting an image signal input terminal TS1, TS2, TS3, . . . of the driving device 60 and the through conductor 64. For example, the driving device 60 and the driving device 61 are each mounted on the back side of the substrate 51 by means of COG (Chip On Glass) or otherwise. Moreover, there may be a case where the back side of the substrate 51 is provided with a circuit board FPC (Flexible Printed Circuit) for the inputting and outputting of a driving signal, a control signal, etc. between the substrate and the driving devices 60 and 61 via a lead wire.
For example, the TFT 71, 72 comprises a semiconductor film formed of amorphous silicon (a-Si), LIPS (Low-Temperature Poly Silicon), etc., and has three terminals, namely a gate electrode, a source electrode, and a drain electrode. The TFT serves as a switching device (transfer gate device) in which electric current is passed through the semiconductor film (channel) between the source electrode and the drain electrode under application of a voltage of predetermined potential to the gate electrode. In cases where the substrate 51 is composed of a glass substrate, and the driving devices 60 and 61 are configured as a driving circuit comprising of a TFT comprising a semiconductor film formed of LIPS, the TFT can be formed directly on the substrate 51 by a thin-film forming process such as CVD (Chemical Vapor Deposition).
There may be a case where the pixel portions 74 serving also as light-emitting portions include a subpixel for red light emission, a subpixel for green light emission, and a subpixel for blue light emission, respectively. The subpixel for red light emission comprises a red light-emitting device composed of a red LED, etc., the subpixel for green light emission comprises a green light-emitting device composed of a green LED, etc., and the subpixel for blue light emission comprises a blue light-emitting device composed of a blue LED, etc. For example, these subpixels are aligned in a column.
From the through conductor 64, a light-emission control signal is inputted, via the image signal line (also referred to as a light-emission control signal line) 53, to each light-emitting portion 74. The image signal lines 53 and the through conductors 64 are provided on a single-through conductor-per-image signal line basis. Thus, from a single through conductor 64, a light-emission control signal is inputted to corresponding one of the light-emitting portions 74 of a single selected (activated) gate signal line 52. Moreover, the driving device 60 has image signal input terminals (TS1, TS2, TS3, . . . ) corresponding to the through conductors 64, respectively.
Moreover, FIGS. 6A and 6B are views showing the display apparatus of FIG. 5, and more specifically FIG. 6A is a sectional view of the display apparatus taken along the image signal line 53 (SL1), as viewed in a direction A (indicated by an open arrow) shown in FIG. 5, and FIG. 6B is a side view of the display apparatus, as viewed in a direction B (indicated by an open arrow) shown in FIG. 6A. As shown in FIG. 6, there are provided connection portions 65, each in the form of, for example, a connection terminal (connection pad), in corresponding relation to the plurality of image signal lines 53 (SL1, SL2, SL3, . . . ), respectively. Each connection portion 65 is electrically connected, via the through conductor 64 comprising a through hole, etc., to corresponding one of the image signal input terminals (TS1, TS2, TS3, . . . ) of the driving device 60 disposed on a surface of the substrate 51 opposite the light-emitting device mounting surface thereof (back side).
As another example of the related art, there is an already known EL device comprising light-emitting portions and through holes which are provided on a single-through hole-per-light-emitting portion basis (refer to Japanese Unexamined Patent Publication JP-A 11-224774 (1999), for example). In this construction, with reference to the display apparatus shown in FIG. 5, the through conductor 64 is provided in each pixel portion corresponding to the plurality of light-emitting devices 73, respectively. That is, the light-emitting devices 73 and the through conductors 64 are equal in number.
However, the display apparatus of conventional design as disclosed in JP-A 11-224774 (1999) poses the following problem. That is, in the case of providing light-emitting portions and through holes on a single-through hole-per-light-emitting portion basis, the placement of many light-emitting portions for high-resolution displays entails a considerable increase in the number of through holes and thus in the number of wiring lines to be connected to the through holes, which results in an undesirable increase in complexity in wiring arrangement.
Furthermore, in the conventional display apparatus shown in FIGS. 5, 6A and 6B, the through hole for forming the through conductor 64, which can be formed in the glass substrate by application of laser light, is required to have a diameter of about 50 μm at the minimum. This makes it difficult to create a single through hole within the range of a width of as narrow as about 130 μm of each pixel portion 74. That is, with the arrangement of the TFT 71 and the TFT 72 in each pixel portion 74, it is very difficult to form the TFTs 71 and 72 and the through conductor 64 in proper alignment in a single pixel portion 74. This is because, in abutting the substrate 51 against a jig, etc. for positioning, a positioning error of about 50 μm or above is introduced. By the same token, it is difficult to form the through conductor 64 and the image signal line 53 in highly accurate alignment.
USPTO Backgrounds
USPTO Backgrounds