The present invention relates to integrated circuit verification, and more specifically, to a programmable counter to control the memory built in self-test.
A variety of tests are implemented on integrated circuits or chips in order to verify that different aspects of the chips function properly for use by the ultimate customers. One aspect of chip functionality that is tested is the memory. Generally, a built in self-test (BIST) architecture is used and includes a BIST controller and a BIST engine to generate instructions that are implemented on the chip. A functional clock is used to clock the applied BIST instructions to be as close to the memory clock speed as possible.
USPTO Backgrounds
USPTO Backgrounds