The present invention relates to a data processing system of the type having at least one host processor which is connected through plural channel units and plural storage control units to a plurality of disk drive devices and a cache memory.
In copending application Ser. No. 207,152, a host processor desiring to read from, or write to disk space, issues a command which specifies the operation to be performed and the disk space at which the operation is to take place. The storage control unit first checks to see if a copy of the data from the specified disk space is available in the cache store and if it is a data transfer between the hose processor and the cache store is initiated. If a copy of the data is not in the cache store then it must be obtained from a disk device. If the disk device is not busy, the storage control unit issues a seek instruction to the disk device and then proceeds to do other work while the disk device is locating the desired disk space. If the disk device is busy then the storage control unit adds the command to a command queue so that it may be executed later when the disk device is not busy.
In the absence of the present invention, the load on the two storage control units might become highly unequal with one storage control unit having a backlog of work to do while the other storage control unit is idle because it has no work to do. For example, a host processor may issue a request to an idle storage control unit without the necessity of calculating the number of cache misses at that control unit which may be waiting for disk availability. Under these conditions, one storage control unit, following a series of cache misses, may have issued all seeks that are currently outstanding to the disk devices in the subsystem. A number of milliseconds later, when the disk devices have completed their access and are ready to transfer data, only one of them may utilize the storage control unit. Meanwhile the other disk devices must wait even though the other storage control unit may be idle.
The loading of the storage control units could be equalized if the host processor were programmed to calculate the number of cache misses at each storage control unit. However, this would add additional housekeeping tasks to the work load on the host processor.
In accordance with the principles of the present invention the queue of commands waiting to be executed is shared by both storage control units. When either storage control unit is not required to service a disk interrupt a new command from a host processor, it may take a command from the queue and issue a seek instruction to a disk device. The seek is issued untagged if there is a path back to the host processor from either storage control unit but is tagged if the storage control unit issuing the seek is the only one having a path back to the host processor which issued the command.
USPTO Backgrounds
USPTO Backgrounds