1. Field of the Invention
The present invention relates to a semiconductor device having a semiconductor chip, an FPC tape for mounting the semiconductor chip thereto, a mold resin for protecting the semiconductor chip, and metal balls provided on the FPC tape for connecting the semiconductor chip to a circuit board. Further, the present invention relates to a method of manufacturing a semiconductor package.
2. Description of the Related Art
In recent years, user's demands for high-density packaging have resulted in the size reduction of semiconductor packages. There has been known a semiconductor package adapted so that semiconductor chips are mounted to an FPC tape such as a TAB tape and protected by a mold resin so as to meet such demands. Further, there has been developed a semiconductor package called "tape BGA", in which metal balls such as solder balls are provided on a FPC tape. The semiconductor package can be mechanically and electrically connected to a circuit board by the metal balls.
In the case where a warped semiconductor package is mounted to a printed circuit board, the space between the semiconductor package and the printed circuit board is nonuniform, with the result that some of the metal balls may not have sufficient contact with the printed circuit board. This decreases the reliability of connection between the semiconductor package and the printed circuit board. The cause of an occurrence of warpage in the semiconductor package is the difference in coefficient of linear expansion between the mold resin and the semiconductor chip. Thus, to prevent warpage from occurring in the semiconductor package, an attempt has been made to make the coefficient of linear expansion of the mold resin close to that of linear expansion of the semiconductor chip by reducing the linear expansion of the mold resin. For example, the coefficient of linear expansion of the semiconductor chip is about 4 ppm/.degree. C. Thus, the coefficient of linear expansion of the mold resin is set at, for instance, 8 ppm/.degree. C. so as to bring the linear expansion of the mold resin close to that of linear expansion of the semiconductor chip.
Moreover, an attempt has been made to prevent an occurrence of warpage in the semiconductor package by increasing the glass transition temperature of the mold resin. Japanese Unexamined Patent Publication (Kokai) No. 5-67705 discloses that the glass transition temperature of the mold resin should be not lower than 180.degree. C., which is the forming temperature thereof, and the coefficient of linear expansion thereof should be not more than 16 ppm/.degree. C. so as to prevent an occurrence of warpage in the semiconductor package. Japanese Unexamined Patent Publication (Kokai) No. 8-92352 discloses that the glass transition temperature of the mold resin should be not lower than 180.degree. C., that the coefficient of linear expansion thereof should be not more than 16 ppm/.degree. C. and that the coefficient of elasticity thereof should be 1400 kgf /mm.sup.2 so as to prevent an occurrence of warpage in the semiconductor package.
As a result of bringing the coefficient of linear expansion of the mold resin close to that of the semiconductor chip so as to prevent an occurrence of warpage of the semiconductor package, the warpage of the semiconductor package can be reduced, but the difference in coefficient of linear expansion between the mold resin and the printed circuit board to which the semiconductor package should be mounted increases. For instance, the coefficient of linear expansion of the mold resin is 8 ppm/.degree. C., and that of the printed circuit board is 16 ppm/.degree. C. In this case, when the semiconductor package is used by being mounted to the printed circuit board, the metal balls are subjected to stress generated owing to the relative deformation between the semiconductor package and the printed circuit board. Especially, the metal balls placed on the peripheral portion of the semiconductor package are stretched and become liable to break. Consequently, the reliability of connection between the semiconductor package and the printed circuit board is deteriorated.
It is preferable for solving this problem to bring the coefficient of linear expansion of the mold resin close to that of the printed circuit board by increasing the coefficient of linear expansion of the mold resin, in contrast with the case of preventing an occurrence of warpage of the semiconductor package.
According to the techniques described in the aforementioned publications, an occurrence of warpage of the semiconductor package can be prevented by increasing the glass transition temperature of the mold resin. However, even in the case of employing these conventional techniques, the glass transition temperature of the mold resin should be not lower than the molding temperature thereof so that the coefficient of linear expansion of the mold resin is prevented from having a large value. Thus, there is a difference in coefficient of linear expansion between the mold resin and the printed circuit board. Consequently, the techniques described in the aforementioned publications have the problem that, when the semiconductor package is mounted to the printed circuit board, the metal balls are subjected to stress generated owing to the relative deformation between the semiconductor package and the printed circuit board and become thin and liable to break.
Further, although the glass transition temperature is not lower than the molding temperature according to such conventional techniques, the actually obtained glass transition temperature is not higher than 200.degree. C. The aforementioned publications describe that, only in one example, the glass transition temperature of the mold resin is 203.degree. C., but the coefficient of linear expansion in this case is 13 ppm/.degree. C. There is no prior art in which the coefficient of linear expansion thereof is not less than 13 ppm/.degree. C. when the glass transition temperature of the mold resin is not lower than 200.degree. C.
Moreover, Japanese Unexamined Patent Publication (Kokai) No. 8-162499 and No. 9-181122 disclose that a semiconductor element and a semiconductor carrier are temporarily fixed by a reinforcing resin in the process of manufacturing the flip chip type semiconductor device, and that an underfill material is inserted between the semiconductor element and the semiconductor carrier after a test is carried out. A space between the semiconductor element and the semiconductor carrier is filled with this underfill material which covers the circumference of the semiconductor element but does not cover the top surface thereof.
As described above, in recent years, user's demands for high-density packaging have resulted in the size reduction of semiconductor packages. There has been known a semiconductor package adapted so that semiconductor chips are mounted to an FPC tape such as a TAB tape and protected by a mold resin so as to meet such demands. Further, there has been developed a semiconductor package called "tape BGA", in which metal balls such as solder balls are provided on a FPC tape. This semiconductor package can be mechanically and electrically connected to a circuit board by the metal balls. Tape BGA having a fine terminal pitch is called "FBGA".
Now, there are demands of the market for a semiconductor package called "CSP" (Chip Size Package). CSP is a semiconductor package in which a mold resin is formed in such a manner as to have almost the same size as that of a semiconductor chip. An FBGA of the CSP type is formed in such a way as to be very small and have high density. Thus, FBGAs have become necessary for manufacturing high-performance electronic devices.
A CSP is manufactured by first mounting semiconductor chips to an FPC tape, and then cutting the FPC tape into pieces each having a size which approximately equals to a package size, and subsequently, putting semiconductor chips mounted to each of the pieces into a molding die, and finally performing resin-molding. The molding die has an upper die and a lower die. A cavity is formed by the upper and lower dies. The internal shape of the cavity is identical with the external shape of the semiconductor package to be manufactured.
Therefore, a cutting device and a molding die, which are suitable for each semiconductor package, are needed for manufacturing a semiconductor package. Namely, there is the necessity for making a cutting device and a molding die suitable for each of different kinds of semiconductor packages. Thus, the CSP requires meeting lead time and costs of such cutting devices and molding dies. Consequently, user's demand that, even if the kind of a semiconductor package to be manufactured is changed, such a semiconductor package can be manufactured without changing the cutting device and the molding die.
Moreover, user's demand that such semiconductor packages are manufactured at low cost.
USPTO Backgrounds
USPTO Backgrounds