The invention relates to a receiver for receiving data from a differential data bus with two lines which can detect a positive and a negative level on the bus lines.
Such receivers usually have two resistive input branches, which are used to weaken the input signals from the data bus. According to solutions in the state of the art, two voltage sources in combination with two comparators are used for detecting the two levels. The exact detection levels are mainly defined by the voltage sources. If the voltage sources do not deliver exactly the same voltage, witch can easily occur in practice, the positive and negative detection levels are not equal, which should be avoided.
It is an object of the invention to provide a receiver for a differential data bus which ensures symmetrical detection levels of positive and negative signals.
This object is achieved by the receiver having the features according to claim 1:
Receiver for a differential data bus with two resistive branches, with a differential amplifier with two transistors, with a resistor, and with a control logic that controls a switch with which a current from a current source is switchable to either side of the resistor, which resistor couples the two transistors, and with two operational amplifiers which are coupled to the two transistors of the differential amplifier with opposite poles, in which receiver the control logic detects from the output signals of the two operational amplifiers whether a “0” or a “1” is expected on the bus and which receiver sets the switch accordingly so that a comparison with the received bus signal is made.
The receiver according to the invention uses only one voltage source instead of two in order to avoid level mismatches. This one voltage source is realized with one current source and one resistor. By switching the resistor between two branches of a differential amplifier this voltage source can be used for detecting a positive level on one line and a negative level on the other line, or vice versa. This ensures an absolutely symmetrical detection of levels of the two polarities, which has the consequence of a very low jitter.
The control logic puts the switch with which the current is switched on either side of the differential amplifier in accordance with the falling edge last received.
According to the advantageous measures of claim 2, two transistors can be used as the differential amplifier, thus providing a simple circuitry.
USPTO Backgrounds
USPTO Backgrounds