1. Field of the Invention
Aspects of the present invention relate to a lead frame, a semiconductor device and a fabricating method related thereto.
2. Description of the Related Art
In general, a lead frame for a semiconductor device is fabricated by performing a mechanical stamping or chemical etching process with respect to a metal strip. The lead frame for a semiconductor device simultaneously serves as a lead for connecting a semiconductor die to an external circuit and as a frame for fixing a semiconductor device to an external device.
Lead frames for semiconductor devices may be classified into a copper lead frame (copper:iron:phosphorus=99.8:0.01:0.025), a copper alloy lead frame (copper:chrome:tin:zinc=99:0.25:0.25:0.22), an alloy-42 lead frame (iron:nickel=58:42), and the like. Semiconductor devices using such lead frames are used for a dual inline package (DIP) using a through-hole mounting method, a quad flat package (QFP) and a small outline package (SOP) using a surface mounting method, and the like.
However, since leads with a predetermined length protrude to the outside through the side of an encapsulant, the size of a semiconductor device increases and the number of input/output pins is small. That is, as state of the art semiconductor dies have been highly integrated and multi-functional, a large number of input/output pins are required, but it is difficult to satisfy such requirements with the lead frame.
In order to solve this problem, there has been developed a semiconductor device used for a ball grid array (BGA) or pin grid array package using a laminate, tape or film type circuit board. Since, in these semiconductor devices, a plurality of solder balls or metal pins are not area-arrayed on the side of an encapsulant but rather are on a bottom of the encapsulant (i.e., a bottom of a circuit board), such semiconductor devices can provide a relatively large number of input/output pins.
However, such semiconductor devices have high-priced circuit boards and a lower dissipation and electrical performance than semiconductor devices using lead frames. That is, since a semiconductor die is directly mounted on a die pad formed of a copper material, the semiconductor devices using lead frames have an excellent dissipation performance. Also, since the die pad uses itself as a ground region for a signal lead, the semiconductor devices using lead frames can enhance electrical performance. However, semiconductor devices using circuit boards generally are incapable of providing the same advantages.
USPTO Backgrounds
USPTO Backgrounds