As shown in FIG. 1, a typical computer system 10 includes at least a microprocessor 12 and a main memory 14. The main memory 14 contains data for use by the microprocessor 12 to perform the operations of the computer system 10. However, because the speed of the microprocessor 12 is typically significantly faster than that of the main memory 14, memory of smaller size and faster speed (referred to and known as “cache” memory) is often implemented to allow the microprocessor 12 to access frequently and/or recently requested data faster than it would otherwise take to obtain such data from the main memory 14.
Still referring to FIG. 1, the microprocessor 12 has an “on-chip” (i.e., on the same semiconductor die as the microprocessor 12), or “L1,” cache memory 16 and an “off-chip,” or “L2,” cache memory 18. When the microprocessor 12 requests data, a cache controller 20 causes the L1 cache memory 16 to be searched for the requested data, and if that search does not “hit” (i.e., a cache “miss” occurs), the L2 cache memory 18 is searched for the requested data. If the requested data is not found in the cache memories 16, 18, the requested data is retrieved from the relatively slow main memory 14.
Those skilled in the art will recognize that a microprocessor may have any number of cache memory levels, which are typically referred to by number in order of decreasing proximity to the microprocessor. Further, those skilled in the art will recognize that any number of cache memories may be on-chip and any number of cache memories may be off-chip.
A computer system, like the one shown in FIG. 1, may be used as a system that services requests from and provides data to other computers connected over a network. Such a client-server network model 30 is shown in FIG. 2. In FIG. 2, a stand-alone server 32 is connected over a network 34 to several client computers 36, 38, 40, 42. The server 32 may be used to store data, programs, etc. for use by the client computers 36, 38, 40, 42. Those skilled in the art will recognize that the server 32 may also be used to manage and control the client computers 36, 38, 40, 42.
Although some computer systems, like the one shown in FIG. 1, have a single microprocessor 12 (such a computer system referred to and known as a “uniprocessor” computer system), other computer systems, like the server 32 shown in FIG. 2, may be formed of multiple microprocessors. FIG. 3 shows such a multiprocessing computer system 50.
The computer system 50 of FIG. 3 is shown as having multiple microprocessors 52, 54, 56, 58. The microprocessors 52, 54, 56, 58 communicate with one another and with a main memory 60 over a network (e.g., a bus) 62. The network 62 is implemented as a set of bits that propagate data in parallel from one location to another. The “bandwidth” of the network 62 (i.e., the number of bits propagated in parallel by the network 62) is an important factor in the overall performance of the computer system 50. FIG. 3 also shows an input/output interface 64 that is connected to the network 62 and serves to input and output data to other portions of the computer system 50 and/or components external to the computer system 50.
Those skilled in the art will recognize that the multiprocessing computer system 50 of FIG. 3 may represent a particular type of multiprocessing computer system used in networking and known and referred to as a symmetric multiprocessing (SMP) computer system. A SMP computer system is one in which multiple microprocessors share, for example, the same memory and input/output interface. Those skilled in the art will also recognize that a SMP computer system may share the same operating system. Although the multiple microprocessors in a SMP computer system share the same resources, each microprocessor may act independently. For example, while one microprocessor searches for data in memory, other microprocessors may update the memory and perform other tasks, thereby increasing the ability of the SMP computer system to handle intensive networking demands.
Those skilled in the art will recognize that SMP computer systems provide good scalability in that additional microprocessors may be added or removed with minimal changes to the system. Despite the benefits of SMP computer systems, bottlenecks may occur when several microprocessors on a board share a single memory bus. Rather than put too many microprocessors on the same SMP board, designers of network elements often distribute applications across a networked cluster of SMP boards, where each board has its own memory, I/O interface, and operating system.
USPTO Backgrounds
USPTO Backgrounds