Example embodiments relate to a storage device, for example, to a device and a method for managing a non-volatile and electrically erasable semiconductor memory device, for example, a flash memory.
Non-volatile memory devices may retain data stored in cells without a supply of drive power. Among non-volatile memory devices, a flash memory is widely used in various applications, for example, computers, memory cards, and the like because they have a function in which cells are electrically erased simultaneously. With increased usage of portable information devices, for example, cellular phones, PDAs, digital cameras, and the like, flash memory is widely used as a storage device, instead of a hard disk.
Flash memory may be divided into a NOR type and a NAND type based on a connection structure of cells and bit lines. Because a read speed is faster and a write operation is slower, a NOR-type flash memory may be used as a code memory. Because a write speed is faster and a price per unit area is lower, a NAND-type flash memory may be used as a mass storage device. In order to write data in a flash memory, an erase operation is performed first, and the flash memory may have such a characteristic that an erase unit is more than a write unit. This characteristic may make it more difficult to use a flash memory as a main memory. In the event that a flash memory is used as an auxiliary storage device, such a characteristic may interfere with a file system for hard disk. Accordingly, a flash translation layer (hereinafter, referred to as “FTL”) may be used between a file system and a flash memory in order to hide an erase operation of a flash memory.
Functions of the FTL may include logical address-physical address mapping information management, data preservation management due to unexpected power interruption, wear-out management, and the like. Example mapping functions are disclosed in U.S. Pat. No. 5,404,485 entitled “FLASH FILE SYSTEM”, U.S. Pat. No. 5,937,425 entitled “FLASH FILE SYSTEM OPTIMIZED FOR PAGE MODE FLASH TECHNOLOGIES”, AND U.S. Pat. No. 6,381,176 entitled “METHOD OF DRIVING REMAPPING IN FLASH MEMORY AND FLASH MEMORY ARCHITECTURE SUITABLE THEREFOR”, the entire contents of which are hereby incorporated by reference.
In the event that a flash memory is accessed by block unit, the flash memory is divided into a plurality of memory blocks. Numbers successively assigned to memory blocks are referred to as a physical block number, and virtual numbers of the divided blocks known to a user are referred to as logical block numbers. Techniques for providing mapping between logical block numbers and physical block numbers may include a block mapping technique, a sector mapping technique, and log mapping techniques. With mapping techniques of the FTL, data of logically successive addresses may be stored at physically different places.
In a case where a host issues a write command with respect to a logical block number where data was written previously, FTL may use a technique of writing data from the host at another place and invalidating previously written data. Due to this FTL characteristic, a block may be created which is filled with invalid data. Hereinafter, such a block is referred to as a “garbage block”. A garbage block may be erased for conversion into a writable state and may be reused, which is called “garbage collection” or “reclaiming”. Performance of a flash memory may be dependent upon how fast such an operation is performed. For example, in the event that the amount of stored data is increased due to a long usage time of a system and the number of usable reserved blocks is decreased, the performance of the garbage collection may become more important.
Together with the performance of a flash memory, its reliability is also relevant. A flash memory may be programmed and erased repeatedly, and a program-erase cycle of each block may be limited to a given number. For example, an erase operation may be performed ten thousand times until a block is considered to be unusable. If a block is worn out, performance lowering or use loss may arise at a partial region of a flash memory. A user of a flash memory system may suffer from a bad influence due to data loss or impossibility of data storage ability.
Wearing of a block (or a physical place) in a flash memory system is mainly determined by an erase cycle, and a flash memory may be worn out after about 105 erases.
USPTO Backgrounds
USPTO Backgrounds