Bandgap reference circuits are well known in the art and are used to provide a stable voltage output that is independent of temperature fluctuations. Bandgap reference circuits may be provided in a continuous and switched configuration, the two differing in that the continuous arrangements are circuits not including switching arrangements. An example of a switched arrangement is U.S. Pat. No. 5,059,820 assigned to Motorola which by time multiplexing two or more current sources to source current to a single bipolar transistor claims to achieve a more stable base emitter voltage as an input for a switched capacitor bandgap reference circuit. A further example of such known circuits is provided in U.S. Pat. No. 5,867,012 of Michael Tuthill, co-assigned to the assignees of the present invention, the content of which is incorporated herein by reference.
Referring to FIG. 1, which is equivalent to FIG. 4 of the '012 patent but explicitly details the inherent parasitic capacitances (Cp) present in the circuit, one of the key advantages of this circuit is that it reduces the value of the capacitance C1 by a factor of 2× by using a compounded switching scheme. This is achieved by using two bipolar devices, thereby doubling the difference in base emitter voltage, ΔVeb, generated. The switching scheme can be summarised as operating in two different phases (ph1 and ph2), and in each phase the current applied to the transistors Q1 and Q2 differs:    during a first phase, ph1: I(Q2)=I and I(Q1)=N*I and    during a second phase: ph2, I(Q2)=N*I and I(Q1)=I.
The effect of this switching is that the voltage at the negative input of the op-amp changes between the clock phases ph1 and ph2 by a value approximately equal to (kT/q)(ln(N)) where k is Boltzmann's constant, T is the absolute temperature in Kelvin, q is the charge on an electron and N is the current density ratio. This switching introduces a sensitivity to the parasitic capacitance (Cp) on the negative input node of the amplifier. The sensitivity introduces an error into the output of the circuit and makes the circuit less tolerant to manufacturing variations.
To understand the effect of the parasitic capacitance on the output of the circuit of FIG. 1, the following analysis can be used in both clock phases to determine the output voltage (Vout).ΔVeb1=Veb1(NI)−Veb1(I)=[(kT)/q]ln(N)  (1)andΔVeb2=Veb2(NI)−Veb2(I)=[(kT)/q]ln(N)  (2)Vout=Veb2(NI)+[C1/C2]*[ΔVeb1+ΔVeb2]+[Cp/C2]*ΔVeb2  (3)Assuming that ΔVeb1=ΔVeb2=ΔVeb then to a first order approximation,Vout=Veb2(NI)+ΔVeb*[2*C1+Cp]/C2  (4)
The last term in equation 4 is a parasitic induced error term arising from the capacitance associated with the parasitic capacitor Cp. While C1 can be reduced somewhat to account for Cp, the variation arising from manufacturing processes cannot easily be accounted for. There is, therefore, a need to provide a switched capacitor bandgap circuit that is adapted to compensate for the parasitic capacitance inherent in such circuits.
A further problem that arises in bandgap circuits arises from a curvature in the output voltage verses temperature. As can be seen from Equation 4, the output of a bandgap circuit is formed from the sum of two components: the first being a proportional to absolute temperature (PTAT) component arising from the difference in base emitter voltages of two bipolar transistors operating at different current densities and the second attributable to the base emitter voltage of a bipolar transistor. This latter component contributes the curvature and arises from the transistor q2 in FIG. 1. Although not shown in equation 4, as well as the linear relationship provided by the first term of equation 4, the base emitter voltage also exhibits a second order non-linear temperature relationship term, which is commonly called temperature curvature. This non-linear term is commonly represented by the term K1.TlnT, where K1 is a constant and T is the absolute temperature. In order to provide a voltage reference that is entirely temperature stable over the range, it is preferable that this TlnT term should be compensated. It is well known that by reducing the curvature that it is possible to improve the performance of the bandgap reference, and it is desirable to achieve this reduction in curvature contribution without significantly redesigning the circuit of FIG. 1. In addition it would be preferable to provide a solution that is both area efficient and has low power requirements. Typically, it is known to compensate for the curvature or bow effect by introducing a complementary term of opposite sign to the TlnT term so as to effectively cancel out the effect of the TlnT term. U.S. Pat. No. 5,352,973 of Audy details examples of known curvature correction schemes, as does “A new curvature-corrected bandgap reference” IEEE JSSC, vol. SC-17, No. 6, December 1982, the contents of both being incorporated by reference. Although these circuits are applicable and useful for the environments in which they are described it would be useful to have an implementation specifically suitable for the switched capacitor configuration of FIG. 1.
There is therefore a need for a circuit that is adapted to compensate for the inherent parasitic capacitance that is present in switched capacitor bandgap reference circuits. There is a further need to provide a curvature correction scheme that is both easy to implement has low power requirement and does not occupy much area on a die.
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