The invention relates to a method for manufacturing bipolar planar transistors.
The conventional method such as described in "Genschow, Technischer Informationsdienst, Sonderausgabe Halbleiter", (April 1972) has the disadvantage that the current gain values of the transistors which are manufactured in semiconductor wafers which are divided into the solid-state circuits, are subjected to variations from wafer to wafer.
The invention is based on the recognition that variations of the aforementioned current gain or Beta values may be lowered to a range of a few percent when the manufacturing processes are selected and conducted such that the total amount of charge carriers becomes precisely controllable in the intrinsic base zones, that is, in the area of the base zone below the emitter zone, and also if non-compensated emitter zones are used. A non-compensated emitter zone, according to the "1979 International Electronic Device Meeting, Technical Digest", pp. 514 l to 517 offers the advantage that relatively high current gain values and increased cutoff frequencies become possible. It was found that such emitter zones likewise contribute to low noise.
USPTO Backgrounds
USPTO Backgrounds