The use of configurable integrated circuits (“IC's”) has dramatically increased in recent years. One example of a configurable IC is a field programmable gate array (“FPGA”). An FPGA is a field programmable IC that usually has configurable logic and interconnect circuits that are surrounded by input/output (i/o) circuits.
The configurable logic circuits (also called logic blocks) are typically arranged as an internal array of circuits. A configurable logic circuit can be configured to perform a number of different functions. A configurable logic circuit typically receives a set of input data and a set of configuration data that is often stored close to the logic circuit. From the set of functions that the logic circuit can perform, the configuration data set specifies a particular function that this circuit is to perform on the input data set. Such a logic circuit is said to be configurable, as the configuration data set “configures” the logic circuit to perform a particular function.
These logic circuits are connected together through numerous configurable interconnect circuits (also called interconnects). A configurable interconnect circuit connects a set of input data to a set of output data based on a set of configuration data that it receives. The configuration bits specify how the interconnect circuit should connect the input data set to the output data set. The interconnect circuit is said to be configurable, as the configuration data set “configures” the interconnect circuit to use a particular connection scheme that connects the input data set to the output data set in a desired manner. In some FPGA's, the configuration data set of a configurable logic or interconnect set can be modified by writing new data in SRAM cells that store the configuration data set.
Most configurable IC's need to load configuration data in storage cells that store such data for use by configurable logic and/or interconnect circuits. Prior mechanisms for loading such data are a bit slow as they provide only low bandwidth architectures for loading configuration data. In addition, these prior mechanisms do not provide a random access way for loading the configuration data.
Therefore, there is a need in the art for a better mechanism for loading configuration data in storage cells used for storing configuration data for configurable logic and/or interconnect circuits. There is also a need for a better ways to monitor and debug operations of configurable IC's. Ideally, the mechanism for loading configuration data could also be partly used to monitor and debug the configurable IC.
USPTO Backgrounds
USPTO Backgrounds