1. Field of the Invention
The present invention relates to a data processing apparatus and method for performing voltage level shifting of a signal as that signal passes from a first voltage domain to a second voltage domain.
2. Description of the Prior Art
When designing a data processing system, consideration has to be given to the power consumed by the data processing system. Whilst it is generally desirable to increase the processing speed of the data processing system, a trade-off will generally need to be made between the speed at which the data processing system is to operate and the power consumed by the data processing system. This is particularly true for data processing systems which are intended to run from battery power rather than mains power, for example mobile phones, Personal Digital Assistants (PDAs), lap-top computers, etc.
More recently, it has been realised that energy consumption, rather than power consumption per se, is very significant in determining battery life. Accordingly, consideration in modern data processing system design is being given not only to enabling the operating frequency to be varied (so that it can be reduced during periods of relative inactivity), but also to allowing the voltage supply to those components to be varied (so as to allow the voltage levels to be reduced during times when the connected component(s) is/are not required to operate as quickly).
The management of voltage levels provided to components in such data processing system designs is often referred to as “dynamic voltage scaling”, and typically monitoring functionality is provided within the data processing system to determine for any particular component how fast that component needs to operate. Assuming a decrease in operating speed is determined to be possible, then rather than just reducing the operating speed by itself, it may be possible to also reduce the supply voltage. The reason for this is that if a component is designed to operate at a particular speed, and that operating speed is then reduced, it is often possible to reduce the voltage to the individual elements of the component, without affecting the ability of those elements to operate correctly at that lower speed. A reduction in supply voltage can have a quadractic reduction in energy consumed, and accordingly can significantly enhance battery life.
Although it is hence considered desirable in certain data processing system designs to allow the voltage to particular components to be varied, this leads to the requirement for additional circuitry in the form of level shifting logic in order to convert a signal issued in one voltage domain into a corresponding signal appropriate to another voltage domain, this shift being either an increase in voltage, a decrease in voltage, or indeed no shift (i.e. the signal remains at the same voltage level). Hence, as an example, if one component with a supply voltage of 0.8 volts issues a logic one value to another component with a supply voltage of 1.6 volts, then without any level shifting being performed, there is a possibility that the receiving component may interpret this signal as a logic zero level signal, and accordingly the level shifting logic is required in order to increase the voltage of the issued signal to the 1.6 voltage level appropriate to the receiving component.
USPTO Backgrounds
USPTO Backgrounds