1. Field of the Invention
This invention is in the field of analog transistor devices and methods therefor and, more particularly, is a number of different integrated electrically adjustable analog transistor devices, each having multiple device sub-structures, and methods therefor.
2. Description of the Related Art
U.S. Pat. No. 5,309,009, entitled "Integrated Electrically Adjustable Analog Transistor Device" and filed in the name of the inventor of the present invention shows an integrated electrically adjustable transistor device wherein the user sets the voltage on the insulated gate of the analog MOS transistor device by injection of energized electrical charge into the insulated gate. Thereafter, this charge is substantially retained on the insulated gate of the analog MOS transistor device for subsequent application where the user utilizes the analog MOS transistor device in an electrical circuit. For many applications, the structure of the analog MOS transistor device required for optimal use in an electrical circuit is vastly different from the structure of the analog MOS transistor device required for efficient charge injection into the insulated gate structure of the analog MOS transistor device. It would be highly advantageous to provide an analog MOS transistor device having a first device sub-structure for optimal use in charge injection into the insulated gate structure of the analog MOS transistor device, while having one or more separate device sub-structure(s), with dimensions and electrical characteristics different than the first device sub-structure, for optimal use in an external electrical circuit.
Therefore, there existed a need to provide such an improved integrated electrically adjustable analog MOS transistor device having such a plurality of device sub-structures to optimize both in the charging of the device's insulated gate and in incorporation of the device with an external electrical circuit.
USPTO Backgrounds
USPTO Backgrounds