Semiconductor transistors, in particular field-effect controlled switching devices such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or an Insulated Gate Bipolar Transistor (IGBT) have been used for various applications including but not limited to use as switches in power supplies and power converters, electric cars, air-conditioners, and even stereo systems. Particularly with regard to power devices capable of switching large currents and/or operating at higher voltages, low on-state resistance Ron and high breakdown voltages Ubd are often desired.
For this purpose charge compensation semiconductor devices were developed. The compensation principle is based on a mutual compensation of charges in n- and p-doped zones in the drift region of a MOSFET.
Typically, the charge compensation structure formed by p-type and n-type zones, for example p-type and n-type columns, is for vertical charge compensation MOSFETs arranged below the actual MOSFET-structure with source regions, body regions and gate regions, and also below the associated MOS-channels. The p-type and n-type zones are arranged next to one another in the semiconductor volume of the semiconductor device or interleaved in one another in such a way that, in the off-state, their charges can be mutually depleted and that, in the activated state or on-state, there results an uninterrupted, low-impedance conduction path from a source electrode near the surface to a drain electrode which may be arranged on the back side.
By virtue of the compensation of the p-type and n-type dopants, the doping of the current-carrying region can be significantly increased in the case of compensation components (compared to structures with the same breakdown voltage but without compensation structures) which results in a significant reduction of the on-state resistance Ron despite the loss of a current-carrying area. The reduction of the on-state resistance Ron of such semiconductor power devices is associated with a reduction of the heat loss, so that such semiconductor power devices with charge compensation structure remain “cool” compared with conventional semiconductor power devices.
The lowest on-state resistance Ron would be achieved if the charge compensation structures extend to a highly doped semiconductor substrate. However, a direct transition between highly doped semiconductor substrate and a conventional charge compensation region increases the risk of device failure for the following reasons. Due to an abrupt bending of the output capacitance, fast switching may in turn produce an extremely high change of voltage (dV/dt) resulting in destruction of the semiconductor device. During commutating the body diode, a very abrupt current break may occur when the charge carrier plasma is depleted (lack of “softness” of the body diode), which in turn may lead to oscillations and even to the destruction of the semiconductor device. Furthermore, in case of an avalanche event that may be triggered by cosmic radiation or an external inductive load, the electric field may highly be increased in a transition zone between the highly doped semiconductor substrate and the charge compensation region. This may result in generating even more charge carriers which, possibly in combination with the ignition of a parasitic bipolar transistor formed between the source region, the body region, and the drain region, may also damage the semiconductor device.
Accordingly, there is a need to improve the trade-off between on-state resistance Ron and of reliability of charge compensation structures.
USPTO Backgrounds
USPTO Backgrounds