1. Field of the Invention
The invention relates to a serial bus capable of communicating with many serial bus devices, and more particularly to a protocol and latency reduction circuit for communicating with low speed serial bus devices.
2. Description of the Related Art
Computer systems are becoming ever more powerful with each passing moment. Many new advanced bus structures such as the PCI or Peripheral Component Interchange bus have been developed to allow greater performance of the computer system. Additionally, new devices and uses are being developed for the computer systems. In the past the computer has been essentially a stand-alone device or networked with other computer systems. However, today the modern personal computer is becoming a much more connected and multimedia oriented system. For example, now high speed video and audio functions are becoming commonplace and the integration with the telephone system has already begun.
However, many of these new features are well below the ultimate bandwidth or capability of the advanced buses such as the PCI bus. Therefore, it is not efficient to connect each one of the new functions and devices to the PCI bus directly, as this would impact bus loading and greatly increase overall costs. Additionally, many of these new functions are essentially serial in nature, with the data transferred in a bit stream rather than over a parallel bus structure. This is provided for many reasons, such as reduced wiring costs, and can be done because of the lower data rates which are required.
Therefore, it has been proposed to develop a serial bus architecture to connect all of these various lower bandwidth devices. The serial bus is organized with a host controller having a series of ports, which can then be connected either directly to devices or functions or to further hubs which have below them further devices or functions. A hub or the host controller may in addition incorporate functions if desired. In this manner a tree structure can be developed to allow a reasonable number of functions or devices to be attached to the serial bus system. The host controller connects to a bus in the computer system, for example the PCI bus, through the host controller. By having the host controller act as a concentrator, only a single connection to the PCI bus is necessary. The connection is better able to utilize the performance of the PCI bus without requiring numerous connections.
The host controller, each hub, and each function or port contain particular control registers for doing set up and initialization operations. In addition, four basic types of data transfer are defined in the serial bus system. The first type is isochronous, which is effectively a continuous real time transfer, such as telephony information or audio information. The second type is asynchronous block transfers, such as printer operations and conventional serial port operations, while the third type is asynchronous interactive device transfers, such as keyboard, mouse, pointing device, pen interfaces, and the configuration and status information, generally referred to as the control information, of the various devices. The fourth type is a polling or interrupt type which is used to periodically access a device to determine if it has any status change to report back to the controlling software of the device.
Information is broadcast over the serial bus system from the host controller in a series of packets, with the host controller acting as the bus master and hubs and devices only responding upon request or polling access of the host controller. The packet types include data packets, token packets for use from host to device, a handshake packet and a special control packet. Data packets are the isochronous, asynchronous block, and asynchronous control types. Token packets allow transfer of data packets. Handshake packets are used to perform a ready handshake after transfer of a data or control packet to acknowledge successful receipt or indicate unsuccessful receipt. Special control packets are used for logical reset and status request transfers. Each function or device has a logical address.
Each device and port on a hub or the host controller includes the capabilities to handle the low level bus transfer protocol between the particular node of the appropriate hub and the device itself. Thus, a relatively simple transfer protocol, with a limited number of packet types is defined.
The hubs act as wiring concentrators and enable the attachment of multiple serial bus devices to the serial bus. A hub repeats incoming traffic from any enabled port by broadcasting the traffic transparently to all other enabled ports on the hub. As a result, the tree structured interconnect topology appears as a flat "virtual bus" with no store-and-forward type delays.
The functions connected to the hubs have various bus bandwidth requirements. While some devices, such as video and audio, may have relatively high bus bandwidth requirements, other devices, such as mice and keyboards, may have very low data bandwidth requirements. As a result, these low speed functions do not need the same interface requirements as a faster function, not only for performance reasons but also for cost reasons. Therefore, it would be desirable to have an interface compatible with the serial bus, but operating at a slower rate and costing much less to implement.
USPTO Backgrounds
USPTO Backgrounds