Modern electronic devices, and particularly, integrated circuits, are at risk of damage due to electrostatic discharge (ESD) events. During an ESD event, a voltage may be provided to one or more terminals of an electronic device that exceeds the design voltage of the device, which could impair subsequent operation of the device. For example, a voltage at a terminal of an electronic device during an ESD event may exceed the breakdown voltage of one or more components of the device, and thereby potentially damage those components. Accordingly, electronic devices include discharge protection circuitry that provides protection from excessive voltages across electrical components during ESD events.
Charged Device Model (CDM) testing is used to simulate an ESD event where the device carries an electrostatic charge and discharges due to contact with one of the terminals of the device. In some situations, the ESD protection circuitry may not adequately protect the core device circuitry from the relatively high peak current and/or voltage transients occurring during a CDM-type ESD event. When core device circuitry is damaged during ESD testing, substantial analysis and modifications to the core device circuitry are often required to adequately address the ESD event, which, in turn, increases development costs.
USPTO Backgrounds
USPTO Backgrounds