Time delay and integration (TDI) is an imaging technique that uses an area array image sensor to capture images from an imaging platform that is moving relative to the imaged object or scene. As the object or scene moves across the array, the image sensor takes multiple samples and sums these samples in order to improve the signal to noise ratio as compared to a single line capture of the image sensor. This improvement to signal to noise ratio makes TDI imaging techniques particularly well-suited to applications with low light levels or fast moving objects. Example applications can include medical imaging, machine vision, roll or conveyor belt inspection systems or terrestrial imaging from aircraft or satellites.
Conventionally, charge-coupled device (CCD) technology has been used for TDI applications because CCDs intrinsically operate by shifting charge from pixel to pixel across the image sensor. This shifting of charge allows the CCD image sensor to accomplish the integration (or adding) of the multiple samples without complex circuitry to perform the integration operation and the accompanying noise. However, CCD technology is relatively expensive to fabricate and CCD imaging devices consume much more power than comparably sized devices implemented using complementary metal-oxide semiconductor (CMOS) technology.
Implementing a TDI sensor using CMOS technology not only allows for a lower power designs but also allows for the integration of other electronics with the TDI image sensor. A disadvantage of CMOS TDI implementations is that additional circuitry is required to perform the addition or integration that is performed by shifting charges in a CCD. The signal is converted to voltage directly inside the CMOS pixels and requires adder circuitry outside the pixel array.
Some TDI CMOS techniques use a single analog-to-digital converter (ADC) per column of the pixel array to convert the pixel voltages to the digital domain and store the values to a digital memory. The TDI summing operation is then performed by processing the digital values stored in memory. These techniques require a fast ADC and complex processing/addition logic to perform the TDI summing. For a column having N rows, the ADC must process all N rows at the TDI line rate which limits the number of rows in the pixel array for performing TDI. Using faster ADCs is a trade-off between introducing more complexity (and circuit area) and more noise, which is undesirable for TDI applications.
To maximize fill rate, some CMOS area sensors use a 3-transistor pixel structure that is clocked using a “rolling shutter” technique. Using a rolling shutter can cause artifacts in the acquired image since not all pixels are integrating over the same time period. Using rolling shutter with TDI techniques can result in the loss of responsivity and/or modulation transfer function (MTF) degradation.
For example, U.S. Pat. No. 7,675,561 to Lepage describes using a 3 transistor CMOS pixel without snapshot capabilities that samples the pixel array using a rolling shutter technique. In addition, the total pixel integration time is less than the TDI line rate that further limits the sensitivity of the CMOS TDI architecture described by Lepage.
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