1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit, and more particularly, to a wordline test control circuit for inclusion in a semiconductor integrated circuit and a wordline testing method thereof.
2. Related Art
Referring to FIG. 1, a conventional wordline test control circuit 115 comprises a test control circuit 10 interfaced with a plurality of memory banks within a memory array 12. The test control circuit 10 receives as inputs a ¼ wordline test signal ‘T14WL’, an even wordline test signal ‘TEWL’ or an odd wordline test signal ‘TOWL’, and generates a test control signal ‘TALLWD’, which is enabled during a test mode. There are three test modes in this example, a ¼ wordline test, an even wordline test, or an odd wordline test, and therefore during each the test control signal ‘TALLWD’ is enabled.
Each of the memory banks 0, 1, . . . 7 can receive the test control signal ‘TALLWD’ and in response will activate the appropriate wordlines, in order to perform a ¼ wordline test, an even wordline test, or an odd wordline test.
In the ¼ wordline test, the control signal ‘TALLWD’ is sent to all the banks 0, 1, . . . 7. Accordingly, when a test control signal is enabled, ¼ of the wordlines of the respective banks 0, 1, . . . 7 are simultaneously enabled. This causes a noticeable increase in power consumption. Also, in the ¼ wordline test, because all mats in each bank 0, 1, . . . 7 perform the ¼ wordline test, power consumption is further increased.
Moreover, in a conventional wordline test control circuit 115, after ¼ of the wordlines of the banks 0, 1, . . . 7 are enabled, the next ¼ of the wordlines are enabled and so on until all wordlines have been tested. During this period, all previously enabled wordlines are maintained in the enabled state. In other words, only when the test mode is ended, are the wordlines disabled. This further increases power consumption and also generates noise. In fact, the memory banks 0, 1, . . . 7 can actually be damaged as a result, or even destroyed.
USPTO Backgrounds
USPTO Backgrounds