Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic apparatuses. There are many different types of memory, including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), resistive random access memory (RRAM), phase change random access memory (PCRAM), magnetic random access memory (MRAM), and flash memory, among others.
Uses for flash memory include memory for solid state drives (SSDs), personal computers, personal digital assistants (PDAs), digital cameras, cellular telephones, portable music players (e.g., MP3 players), and movie players, among various other electronic apparatuses. Flash memory cells can be organized in an array architecture (e.g., a NAND or NOR architecture) and can be programmed to a target (e.g., desired) data state. For instance, electric charge can be placed on or removed from a charge storage structure (e.g., a floating gate or a charge trap) of a memory cell to program the cell into one of two data states, such as to represent one of two binary digits (e.g., 1 or 0).
Flash memory cells can also be programmed to one of more than two data states, such as to represent one of, for example, 1111, 0111, 0011, 1011, 1001, 0001, 0101, 1101, 1100, 0100, 0000, 1000, 1010, 0010, 0110, and 1110. Such cells may be referred to as multi state memory cells, multiunit cells, or multilevel cells (MLCs). MLCs can allow the manufacture of higher density memories without increasing the number of memory cells since each cell can represent more than one digit (e.g., more than one bit). One of the data states can be an erased state. For example, a “lowermost” data state may not be programmed above the erased state. That is, if the cell is programmed to the lowermost data state, it remains in the erased state rather than having additional charge added to the charge storage structure of the cell during a programming operation. Data states other than the erased state can be referred to as “non-erased” states.
The programmed charge stored on charge storage structures (e.g., floating gates) of flash memory cells can shift due to coupling between charge storage structures of adjacent (e.g., neighboring) cells (e.g., cells coupled to adjacent data lines, which may be referred to as bit lines). For example, in instances in which a particular floating gate memory cell is programmed prior to one or both of the floating gate memory cells on neighboring bit lines, the subsequent programming of the cells on the neighboring bit lines can shift the threshold voltage (Vt) of a the particular cell due to such floating gate-to-floating gate (FG-FG) coupling. Such Vt shifts can affect the determined data state of the particular cell responsive to a sensing (e.g., read) operation and, in some cases, can lead to erroneous sensing of the data (e.g., a determined data state that is erroneous). Some programming techniques, such as shielded bit line (SBL) programming, can be used to reduce effects of FG-FG coupling. However, as the spacing between adjacent bit lines and access lines (e.g., word lines) is reduced, the effects of FG-FG coupling between adjacent cells, as well as the effects of capacitive coupling between the adjacent bit lines and word lines themselves, can increase.
USPTO Backgrounds
USPTO Backgrounds