1. Field of the Invention
The present invention relates to the field of integrated circuits and, more specifically, integrated circuits comprising, on the one hand, internal logic circuits and, on the other hand, a clock signal distribution circuit for driving these logic circuits.
2. Discussion of the Related Art
In conventional integrated circuits, it is generally attempted to decrease the power consumed. The power consumption of circuits sometimes becomes one of the main criteria in their definition, for example, in applications powered by a battery having a limited lifetime.
To achieve this object, a present tendency is to decrease the supply voltage of integrated circuits. In logic integrated circuits (or integrated circuits including logic circuits) driven by a clock signal, this tendency to decrease the supply voltage increases with the general desire to increase the frequency of the clock signal driving these circuits. Now, the power consumed by these circuits is also proportional to the clock signal frequency.
The decrease of the supply voltage generally raises problems in the definition of the integrated circuits. Indeed, new methods which minimize the sources of losses, such as, for example, the transistor threshold voltages, often have to be developed. Such new methods are generally more complex, and thus more difficult to implement and costly in terms of development and/or production. It can further be attempted to improve the circuits, to decrease their power consumption. In the same way as for the definition of new methods, this circuit optimization can be difficult and result in higher development and/or production costs.
USPTO Backgrounds
USPTO Backgrounds