The present invention relates generally to testing circuit simulations, and more particularly, to methods and systems for determining resistance, voltage drops and current loads in a simulation of a semiconductor circuit.
The density of semiconductor circuits (e.g., memory, processor, ASIC, etc.) is constantly increasing. As each generation of ever-smaller semiconductor devices (e.g., transistors, gates, interconnects, etc.) has ever-smaller physical sizes, the smaller semiconductor devices are then formed on the semiconductor circuit at ever greater densities. As a result, the power consumed by the semiconductor circuit is also increasing as is the density of the power consumption. The increasing power consumption density can also be referred to as an increasing current density (i.e., more current per unit of area) of the semiconductor circuit.
As the semiconductor device sizes become smaller, the interconnecting paths conducting the electrical power and signals to and between each of the semiconductor device also become smaller. As the interconnecting paths become smaller the electrical resistance in the interconnecting paths can also increase. The combination of the increased current density and the increased resistance of the interconnecting paths can result in variations in voltage in the electrical power provided to a portion of the semiconductor circuit as the current demand for that portion varies.
Each new semiconductor circuit is typically simulated in a circuit simulation system. Among the many tests performed on the circuit simulation is an IR test. The IR test determines if the voltage in the electrical power provided to each portion of the semiconductor circuit remains within an acceptable range as the current load of the respective portions varies.
Typically the IR (e.g., current and resistance) test assumes a worst case scenario where all devices in each portion of the semiconductor circuit simulation are activated in their respective maximum current states, at the same time. The maximum possible current demand for each portion of the semiconductor circuit simulation can then be calculated. A corresponding supply interconnecting path is provided between each respective portion of the semiconductor circuit simulation and the voltage supply (e.g., VDD). As the maximum possible current demand for each portion of the semiconductor circuit simulation has been determined then the corresponding voltage drop on the corresponding supply interconnecting path can similarly be calculated.
In most semiconductor circuits, all of the devices in any one portion are not simultaneously activated in their respective maximum current states. As a result, determining the maximum possible current demand for each portion of the semiconductor circuit in the above-described manner yields substantially inaccurate IR test results. In view of the foregoing, there is a need for an improved and more accurate system and method for determining an IR test for each portion of a semiconductor circuit.
USPTO Backgrounds
USPTO Backgrounds