There are several types of conventional semiconductor wafer conveyance devices and each of them has a big drawback. A conventional cluster-type wafer conveyance device has a structure in which a plurality of process modules is arranged radially around a robot chamber located in the center. Such a cluster-type wafer conveyance device requires a large footprint for installation. Further, each time processing in each process module is completed, a wafer is temporarily placed in a buffer part etc. and waits for the next processing, and therefore, the processing speed of the device as a whole is relatively slow. Further, in most cases, the maximum number of process modules in a cluster-type wafer conveyance device is normally limited to five or six for design reasons.
An inline-type wafer conveyance device has a higher processing speed compared to that of a cluster-type device. However, because of its rectilinear structure, it is hard to adapt the inline-type wafer conveyance device to the structure of a state of the art semiconductor manufacturing facility. Further, in a conventional inline-type wafer conveyance device, when a wafer is conveyed in a vacuum environment in a semiconductor manufacturing process, there may be a case where particles are generated at an unacceptable level due to the friction between the components of the wafer conveyance device.
A plan view of a conventional inline-type wafer conveyance device is shown in FIG. 1 (for example, refer to patent document 1). In a wafer conveyance device 10, each of process modules 13a to 13g is arranged adjacent to each other and connected in an inline manner. Each process module is separated by a gate valve (not shown schematically). A wafer is conveyed from a load chamber 14 to the first process module 13a by a robot 12 within a robot chamber 11 and is processed sequentially in each process module. The processed wafer is conveyed from the last process module 13g to an unload chamber 15 by the robot 12. Extra robots to convey a wafer or robot chambers are not necessary, and therefore, the footprint required in the wafer conveyance device 10 is comparatively small.
A partial section view of the inline-type wafer conveyance device 10 shown in FIG. 1 is shown in FIG. 2. A wafer 21 is mounted on a carrier 23 and conveyed from a certain process module to the next process module. In each process module, the wafer 21 is lifted from the carrier 23 by a lift base 26 and processed, and then is mounted on the carrier 23 again and conveyed to the next process module. The carrier 23 is moved by means of a transfer mechanism, such as a roller 25. When the wafer 21 is conveyed to the next neighboring process module, a gate valve 24 is opened and thus the neighboring process modules are brought into a state where they are not hermetically sealed from each other. The wafer 21 having been subjected to processing in a certain process module waits until the next process module becomes empty.
A plan view of another conventional inline-type wafer conveyance device 30 is shown in FIG. 3 (for example, refer to patent document 2). The wafer conveyance device 30 comprises two front opening unified pods (FOUP) 31a and 31b. For example, the FOUP 31a has two load chambers 32a and 32b each having a cassette for storing an unprocessed wafer and the FOUP 31b has two unload chambers 33a and 33b each having a cassette for storing processed wafers. The wafer conveyance device 30 further comprises buffer chambers 36a to 36d for temporarily holding a wafer during its conveyance. At the time of processing, a wafer is conveyed from a cassette within the load chamber 32a or 32b to the first buffer chamber 36a by a robot 35a within a robot chamber 34a. As shown schematically, the wafer conveyance device 30 comprises robot chambers 38a to 38c between the buffer chambers. Between each buffer chamber and its neighboring robot chamber, and between each robot chamber and its neighboring process module, a gate valve 39 is provided as shown schematically. A wafer once placed in the buffer chamber 36a is conveyed to a first process module 37a by a robot within the robot chamber 38a and processed therein. Subsequently, the wafer is conveyed to a second process module 37b again by the robot within the robot chamber 38a and processed therein. The wafer having been subjected to the processing in the second process module 37b is placed in the second buffer chamber 36b by the robot within the robot chamber 38a. Further, the wafer is conveyed from the buffer chamber 36b to a third process module 37c by the robot within the second robot chamber 38b. After that, the wafer is similarly moved from the process module 37c to a process module 37f sequentially and processed therein. The wafer having been subjected to the processing in all of the process modules is once placed in the buffer chamber 36d and then stored in the cassette within the unload chamber 33a or 33b of the FOUP 31b by a robot 35b within a robot chamber 34b. The wafer conveyance device 30 has an advantage that the number of the process modules can be increased flexibly as needed.
A plan view of a conventional cluster-type wafer conveyance device is shown in FIG. 4 (for example, refer to patent document 3). A wafer conveyance device 40 comprises an inlet module 45a and an outlet module 45b through which a wafer 46 is carried in from and carried out to outside, conveyance chambers 42a and 42b for conveying a wafer to process modules 41b, 41c, 41f and 41g, and conveyance robots 43a and 43b provided within the conveyance chambers 42a and 42b. A main controller 47 communicates with each process module controller P, the inlet module 45a and the outlet module 45b, and an operator control panel via a standard communication bus 48. The wafer 46 not processed yet within the inlet module 45a is once placed on an aligner 44 by the conveyance robot 43a within the conveyance chamber 42a and its orientation is adjusted on the aligner 44. Then, the wafer on the aligner 44 is transferred to, for example, the process module 41b or 41c by the conveyance robot 43a or 43b and processed therein, and then returned onto the aligner 44 again. After such a task is repeated, the wafer having been subjected to the processing in the process modules 41b, 41c, 41f and 41g is returned to the outlet module 45b by the conveyance robot 43a.     [Patent document 1] U.S. patent application Publication No. 2006/0102078 Specification    [Patent document 2] U.S. Pat. No. 7,210,246 Specification    [Patent document 3] Japanese Publication of patent application No. HEI 1-500072
USPTO Backgrounds
USPTO Backgrounds