Circuit micropatterning and an increase in density require a projection exposure apparatus for manufacturing a semiconductor device to project a circuit pattern formed on a reticle surface onto a wafer surface at a higher resolving power. The circuit pattern projection resolving power depends on the NA (Numerical Aperture) of a projection optical system and the exposure wavelength. The resolving power is increased by increasing the NA of the projection optical system or shortening the exposure wavelength. As for the latter method, the exposure light source is shifting from g-line to i-line, and further from i-line to an excimer laser. With the excimer laser, exposure apparatuses having oscillation wavelengths of 248 nm and 193 nm are available.
At present, a VUV (Vacuum Ultra Violet) exposure method with a shorter oscillation wavelength of 157 nm and an EUV (Extreme Ultra Violet) exposure method with a wavelength around 13 nm are examined as candidates for next-generation exposure systems.
Along with circuit micropatterning, demands have also arisen for aligning at a high precision a reticle on which a circuit pattern is formed and a wafer onto which the circuit pattern is projected. The necessary precision is ⅓ the circuit line width. For example, the necessary precision in a current 180-nm design rule is ⅓, i.e., 60 nm.
Various device structures have been proposed and examined for commercial use. With the spread of personal computers and the like, micropatterning has shifted from memories such as a DRAM to CPU chips. For further IT revolution, circuits will be further micropatterned by the development of MMIC (Millimeter-wave Monolithic Integrated Circuits) and the like used in communication system devices called a home wireless LAN and Bluetooth, highway traffic systems (ITS: Intelligent Transport Systems) represented by a car radar using a frequency of 77 GHz, and wireless access system LMDSs (Local Multipoint Distribution Services) using a frequency of 24 to 38 GHz.
There are also proposed various semiconductor device manufacturing processes. As a planarization technique which solves an insufficient depth of the exposure apparatus, the W-CMP (Tungsten Chemical Mechanical Polishing) process has already been known as a past technique. Instead, a Cu dual damascene process has received a great deal of attention.
Various semiconductor device structures and materials are used. For example, there are proposed a P-HEMT (Pseudomorphic High Electron Mobility Transistor) and M-HEMT (Metamorphe-HEMT) which are formed by combining compounds such as GaAs and InP, and an HBT (Heterojunction Bipolar Transistor) using SiGe, SiGeC, and the like.
Under the present circumstance of the semiconductor industry, many apparatus variables (=parameters) must be set in correspondence with each exposure method and each product in the use of a semiconductor manufacturing apparatus such as an exposure apparatus. The number of parameters to be optimized is very large, and these parameters are not independent of each other but are closely related to each other.
These parameter values have conventionally been decided by trial and error by the person in charge of a device manufacturer. A long time is taken to decide optimal parameters. If, e.g., a process error occurs after the parameter values are decided, the parameter values of the manufacturing apparatus must be changed again along with a corresponding change in the manufacturing process. Also in this case, a long time is taken to set parameters.
Parameter values are decided as offsets from the results of an overlay inspection apparatus that are obtained by exposing several send-ahead wafers. Parameter values are optimized without considering the sensitivity to process variations.
In the semiconductor device production, the time which can be taken until the start of volume production after the activation of a manufacturing apparatus is limited. The time which can be taken to decide each parameter value is also limited. In terms of CoO (Cost of Ownership), the operating time of the manufacturing apparatus must be prolonged. To change a parameter value which has already been decided, it must be quickly changed.
In this situation, it is very difficult to manufacture various semiconductor devices with optimal parameter values. Even a manufacturing apparatus which can originally achieve a high yield can only exhibit a low yield because the apparatus is used without optimizing parameter values, resulting in a potential decrease in yield. Such a decrease in yield leads to a high manufacturing cost, a small shipping amount, and weak competitiveness.
USPTO Backgrounds
USPTO Backgrounds