1. Field of the Invention
This invention relates to a semiconductor device and a method of writing data into the semiconductor device. More particularly, this invention relates to a nonvolatile semiconductor memory device with memory cells, each having, for example, an FG (floating gate) cell transistor and a select gate transistor connected to the source of the cell transistor, and a method of writing data into the nonvolatile semiconductor memory device.
2. Description of the Related Art
One known nonvolatile semiconductor memory device provided in a logic integrated circuit chip required to perform relatively high-speed reading is a flash memory as described in, for example, T. Ditewing, et al., “An Embedded 1.2 V-Read Flash Memory Module in a 0.18 μm Logic Process.” 2001 IEEE International Solid-State Circuit Conference, DIGEST OF TECHNICAL PAPERS, 2.4, February, 2001, pp. 34-35. The nonvolatile semiconductor memory device includes memory cells each of which has an FG cell transistor that stores data by accumulating charge in the floating gate and a select gate transistor connected to the source of the cell transistor. The nonvolatile semiconductor memory device writes data into and erases data from a memory cell, using FN (Fowler-Nordheim) tunneling current. In an erase operation, a positive voltage is applied to the well region and a negative voltage is applied to the control gates, thereby erasing the memory cell array at a time. In a write operation, a positive voltage is applied to the selected control gate, a negative voltage is applied to the well region, a negative voltage is applied to the bit line of the memory cell to be written into (or the selected bit line), and 0 V is applied to the bit lines of the memory cells not to be written into (or the unselected bit lines).
The nonvolatile semiconductor memory device configured as described above has been required to have a larger capacity and a higher reading speed because of the tendency to higher integration. Therefore, nonvolatile semiconductor memory devices have been manufactured using techniques close to the limits of the manufacturing processes or processing accuracy. As a result, the characteristics of the memory cells do not have a sufficient margin, which can be the factors that cause erroneous operations, a decrease in the operating speed (for example, an increase in the erase time or a decrease in the writing speed), a variation in the distribution of the threshold voltages of the cell transistors, and erroneous writing.
USPTO Backgrounds
USPTO Backgrounds