U.S. Pat. Nos. 4,513,313; 5,164,807; 5,841,554; and US Patent Publication 2005/0062868 describe a multiple output horizontal charge-coupled device (HCCD) that distributes m columns of charge to m HCCD registers. Such an output structure does not separate the charge from a Bayer color filter pattern into one color per register. They require a striped color filter arrangement that is undesirable for good image quality. They also do not allow for horizontal summing of pixels for increased frame rate.
The present invention will allow use of the Bayer color filter pattern and will allow for horizontal summing of pixels within the HCCD.
U.S. Pat. Nos. 4,807,037 and 5,189,498 describe a multiple output HCCD that has the undesirable feature of requiring the second HCCD to have a different channel doping level than the first HCCD. The extra doping requires more processing steps and mask levels.
The present invention will not require the extra doping in the second HCCD.
U.S. Pat. Nos. 5,216,489 and 6,002,146 describe a multiple output HCCD that requires the transfer gate between the two HCCDs to have more than two voltage levels. This is a more complex HCCD clock driver that requires more components. Horizontal summing of pixels within the HCCD is also not disclosed.
The present invention only requires two clock levels and those two levels will be used for all HCCD clocks.
U.S. Pat. No. 5,995,249 illustrates a multiple output HCCD but provides no information about its construction or timing signals. It also does not disclose horizontal summing of pixels within the HCCD for a faster frame rate.
U.S. Pat. No. 6,781,628 describes a multiple output HCCD but does not disclose horizontal summing of pixels within the HCCD for a faster frame rate. It also requires separate control gates between the HCCD and the pixel array for even and odd columns.
The present invention does not require even and odd columns to have separate control gates between the pixel array and HCCD.
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