There are several techniques for the testing of digital circuits based on compressing bit streams. These include, for example, apparatus for counting the number of logic state transitions of, and apparatus for analyzing the signature of, an unknown logic signal, each during a selected period of time. Logic state transition counting and the associated apparatus is well known in the art and signature analysis is fully described in U.S. Pat. No. 3,976,864 issued on Aug. 24, 1976, to Gary Gordon, et al, and now assigned to the same assignee as the present invention.
With many logic circuits, there is the possibility that the output signal will assume a third state. For example, TTL gates have a high state and a low state which are defined by the voltage level of the signal, i.e., typically 2.0 volts and above is a high state and 0.8 volts and below is a low state. The third state occurs when the gate output line is floating or is in a high impedance state, i.e., when neither of the output transistors of the signal generating gate are conducting. If the third state is encountered by the prior art test instruments, it is unpredictable whether the third state will be identified as a high or a low state. Additionally, repeatability of identification of this state as a high or a low state cannot be ensured, i.e., a valid bit stream cannot be characterized by a unique signature if third state data is present.
When the gate output line at the point of measurement is not clamped to either of the high or low state levels (output line is floating), attempts were made in the prior art to make the logical signature unique by pulling the point of measurement to the high state through a resistor connected to Vcc. Thus, the output signal could vary from the low state level to the high state level through the intermediate region at a rate which is determined by the RC time constant, where R is the value of the pull-up resistor and C is the value of the stray capacitance to ground of the gate output line where the signal measurement is being made. If transition counting is being used, the transition may be multiply detected if the charging time constant is sufficiently long so that system noise causes the high-low state threshold to be multiply traversed. With a position-sensitive bit stream characterizing system, such as signature analysis, the resulting signature will then vary undesirably.
To obtain an accurate measure of a logical signal, some means is therefore required to eliminate the effect of the floating gate output, and to identify the third state repeatably and uniquely as either the high or as the low state, or to determine when each state transition has occurred.
USPTO Backgrounds
USPTO Backgrounds