The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor devices and structure.
In the past, the semiconductor industry utilized various methods and structures for interfacing a high-speed transmitter and a high-speed receiver. Of particular interest was high-speed emitter coupled logic (ECL) transmitter and receiver devices. ECL transmitters and receivers typically were used in applications that desired signals with low jitter and low skew between signals. The trend to lower and lower power supply voltages made it difficult to for ECL transmitter and receiver devices to function properly. Because the ECL devices were referenced to the top rail of the power supply voltage, the decreased power supply voltages did not leave sufficient margins to allow for the internal voltage drops of the ECL circuits. As the power supply voltages approached an operating value of about two (2) volts, it became very difficult to produce ECL transmitter and receiver devices that functioned properly.
Accordingly, it is desirable to have a high speed transmitter and receiver that can interface at low power supply voltages.
For simplicity and clarity of illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of an MOS transistor or a base of a bipolar transistor.
USPTO Backgrounds
USPTO Backgrounds