The present invention relates to a current source circuit with complementary current mirrors In particular, the invention relates to a circuit comprising N- and P-channel MOS devices.
As is known, given a reference current I.sub.REF with a given polarity, in some applications (such as analog to digital conversion) the current with opposite polarity is also required. Naturally, for reasons of accuracy and precision, the opposite-polarity current must be as similar as possible in amplitude to the reference current.
In order to obtain two currents with opposite polarity the use of a circuit such as for example the one illustrated in FIG. 1 is known; said circuit comprises a current mirror formed by the diode-connected transistor Ml and by the transistor M2. In said circuit, given the current I.sub.1, said current is supplied at the output after being mirrored by the transistors M1 and M2 with an error which essentially depends on the offset or mismatching of the two transistors.
In order to obtain two output currents with identical amplitude and opposite polarity it is also possible to consider the use of a circuit such as the one illustrated in FIG. 2. Said circuit comprises, besides a current source 1 which supplies the current I.sub.REF, a current source stage constituted by the transistors M3, M4 and M5, whereof M3 is diode-connected. The drain electrode of M5 constitutes the first output, which feeds the current I.sub.OUT1, while the drain electrode of M4 is connected to an inverter stage, which comprises a pair of transistors M6 and M7 which are also connected so as to define a current mirror; a fixed resistor R and a variable resistor R.sub.T are respectively connected to the source electrodes of said transistors M6 and M7. The drain electrode of M7 defines the second output of the circuit, which feeds the current I.sub.OUT2 which has an amplitude approximately equal to that of I.sub.OUT1 and opposite polarity. In order to eliminate the differences in amplitude between the two output currents, in this circuit, during trimming, it is possible to measure said two output currents and modify the value of the resistor R.sub.T according to the difference between said two currents.
A solution of this kind, which eliminates the difference between the two output currents during trimming, does not ensure sufficient accuracy with regard to aging. If the circuit operates at a temperature which differs from the trimming temperature, differences may furthermore arise between the output currents. Finally, one should not neglect the fact that the circuit illustrated in FIG. 2 is disadvantageous due to the need to provide external devices or components capable of controlling the output currents and of modifying the value of the variable resistor (in particular, expensive laser trimming or pad trimming methods are required which entail considerable bulk). The additional cost of the trimming itself is also not negligible.
USPTO Backgrounds
USPTO Backgrounds