The present invention relates to controlling power consumption of an electronic component within an electronic system. Alternatively, the present invention relates to controlling operating frequency of an electronic component within an electronic system.
Power consumption increasingly has become a major obstacle to circuit and system designers. Advances in integrated circuit (IC) technology have resulted in millions of transistors being placed on single ICs. Additionally, IC technology advances also enable circuits to switch at increasingly faster speeds. As the physical sizes of ICs continue to shrink while at the same time performance (i.e. switching speed) increases, power density substantially increases. This substantial increase in power density causes power management problems for system designers. Power management problems take form in both heat dissipation and battery life issues. Greater power dissipated by ICs with ever decreasing area causes significant temperature control issues at the system level. The problem has become so pervasive that conventional forced air cooling systems are no longer able to dissipate the power generated by modern ICs. System designers are being forced to utilize liquid cooled solutions for dissipating ever increasing power requirements. Increased power consumption also creates battery life issues in portable systems and can significantly impact the usefulness of portable devices.
Power consumption in ICs comes from two components: Static and Dynamic power. Static power consumption (Pstatic) results from (1) leakage current and (2) sub-threshold conductance and is characterized by the following equation: Pstatic=Ileakage×VDD. Dynamic power consumption (Pdynamic) results from (1) capacitive power due to charging/discharging of capacitive loads and (2) short-circuit power due to direct path currents when there is a temporary connection between power and ground (e.g. when both p and n transistors are “on” in CMOS circuits) and is characterized by the following equation: Pdynamic=½×CL×VDD2×Foperating. Further complicating increases in IC power consumption is manufacturing test. Cost considerations limit the amount of test time that can be dedicated to each IC. Manufacturing test cost concerns often limit the amount of characterization testing that can be done on any one IC (testing the part across a range of temperature, voltage and frequency to ensure robust operation). ICs are often tested at worst-case system operating conditions and at some fixed frequency (e.g. “speed” sorting) to assure all ICs shipped will function properly in the end system.
For example, microprocessors may be tested at some fixed frequency (at which they are expected to function in a system), a maximum temperature and a minimum operating voltage. Although a few of these processors may operate marginally at those conditions (and some will fail), most that function at those minimum requirements will operate well beyond those limits. This is mainly due to variations within the semiconductor manufacturing process (e.g. threshold voltage, transistor channel length, and gate oxide variations). A normal distribution often describes how a sample of parts will behave beyond those limits. Except for that small number of parts that are marginal, most parts are capable of operating at frequencies above the minimum test frequency. However, because of time constraints, this maximum operating speed is not determined. It is well known in the art that a circuit's operating speed is proportional to its operating voltage. The lower the voltage, the lower the speed (and vice-versa). See FIG. 1 for an illustration of the frequency/voltage response 10 where the slope of the curve 12 (Delta V/Delta F) represents the amount of performance change (Delta F) expected for some change in operating voltage (Delta V). The extreme operating conditions of the IC are identified by the minimum operating voltage 14 (Vmin), minimum operating frequency 16 (Fmin), maximum operating voltage 18 (Vmax), and maximum operating frequency 20 (Fmax). Beyond these conditions, the IC no longer functions properly.
Therefore, for the majority of ICs that are capable of functioning beyond the minimum test frequency, their operating voltage may be lowered until the part functions just above the minimum system frequency.
Furthermore, it is well known in the art that a circuit's operating speed is inversely proportional to temperature. The lower the system temperature, the faster the speed (and vice-versa). See FIG. 2 for an illustration of the frequency/temperature response 30 where the slope of the curve 32 (Delta T/Delta F) represents the amount of performance change (Delta F) expected for some change in operating temperature (Delta T). The extreme operating conditions of the IC are identified by the minimum operating temperature 34 (Tmin), minimum operating frequency 36 (Fmin), maximum operating temperature 38 (Tmax), and maximum operating frequency 40 (Fmax). Beyond these conditions, the IC no longer functions properly.
By limiting manufacturing testing to pass/fail testing at worst-case system requirements, end system power consumption is adversely affected in two ways: (1) most ICs that function at the minimum system speed at test will function well beyond it in the end system and (2) most ICs do not operate at the maximum system temperatures at which they are typically tested; and thus, their operating voltage may be lowered. Additionally, variations in the tester environment may also add to measurement inaccuracies.
For example, an IC which has enough margin to function at the required system operating frequency at a voltage of 1.6V instead of a nominal voltage of 1.8V, the power savings realized by operating the IC at 1.6V instead of 1.8V would be: (1) 21% dynamic power reduction and (2) 11% static power reduction.
This problem is exasperated in portable devices because battery life is unnecessarily degraded when an IC is operated at worst-case system conditions although the system rarely (or never) actually operates at such worst-case conditions and the IC is capable of functioning properly below the worst-case conditions.
Finally, the problems associated with manufacturing test and end system operation previously described may be utilized to achieve more than reduced power consumption. Because system components are tested at worst-case conditions as previously described, many parts have additional performance margin. Instead of, or in addition to, adjusting operating voltage to reduce power consumption, the voltage may remain at nominal system conditions, or increased, so that an IC may function at increased frequencies, thus improving system performance. The same temperature/voltage relationships previously mentioned may be utilized to achieve such results.
(1) Clock Control: numerous techniques exist for managing power consumption by controlling clocking. Depending on processing demand, clock frequency may be increased or decreased to meet that demand. Thus, during low demand periods, clock frequency may be lowered, thereby saving power. Clock frequency is increased only to satisfy demand. Also, clock throttling is common.
(2) U.S. Pat. No. 6,496,729, entitled Power consumption reduction in medical devices employing multiple supply voltages and clock frequency control, by Thompson: Teaches a method for tailoring supply voltages to specific circuits. Thus, each circuit receives a tailored operating voltage as opposed to all circuits receiving the same voltage. For example, low performance circuits may be powered at a lower operating voltage because they do not need to operate at maximum speeds. Only those circuits requiring maximum performance receive higher operating voltages. Additionally, this patent teaches alternating between a lower operating voltage and a higher operating voltage depending on the expected workload for a given cycle. For example, if cycle one does not require peak performance, a lower operating voltage is supplied. If cycle two requires maximum performance, a higher operating voltage is supplied. This patent does not teach or suggest a means for adjusting operating voltage based upon tester-to-system variations, worst-case testing techniques, or process variations. Furthermore, this patent does not teach or suggest the use of a built-in-self-test engine for determining the minimum operating voltage of an integrated circuit throughout its useful life.
(3) U.S. Pat. No. 6,601,179, entitled Circuit and method for controlling power and performance based on operating environment, by Jackson et al.: Teaches a system and method for adjusting processor clock frequency and operating voltage based upon the operating environment. For example, if the processor is “docked” into a system that has cooling capabilities, the processor can be run at lower operating conditions, thereby lowering power. This patent does not teach or suggest a means for adjusting operating voltage based upon tester-to-system variations, worst-case testing techniques, or process variations. Furthermore, this patent does not teach or suggest the use of a built-in-self-test engine for determining the minimum operating voltage of an integrated circuit throughout its useful life.
(4) U.S. Pat. No. 6,425,086, entitled Method and apparatus for dynamic power control of a low power processor, by Clark et al.: Teaches a method and apparatus for dynamically controlling power of a microprocessor by adjusting the operating voltage of the microprocessor. The method and apparatus includes a variable voltage regulator, a memory element and a processor. The output of the regulator is adjusted according to the processing load of the processor. The memory contains processor instructions, that when executed by the processor, result in modifications to the operating frequency of the processor. The regulator is adjusted accordingly depending upon the dynamic changes in the processing load of the processor. This patent does not teach or suggest a means for adjusting operating voltage based upon tester-to-system variations, worst-case testing techniques, or process variations. Furthermore, this patent does not teach or suggest the use of a built-in-self-test engine for determining the minimum operating voltage of an integrated circuit through its useful life.
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USPTO Backgrounds