Implementing an integrated circuit involves interconnecting electronic devices which are formed on a substrate with other devices on the substrate or the outside world. Typically, such an interconnection is formed by depositing an insulating layer over the substrate and then conducting a contact etch through the insulating layer to a part of a device component thereunder. An example of a part of a device component is a diffusion region which forms a source/drain region in a MOS device.
Typically, when such a contact etch is to be performed, insulating material such as nitride sidewall spacers serve to protect certain device components, such as word lines, from a misalignment of the contact etch. This is commonly referred to as a self-aligned contact etch. Problems arise, however, when such a contact etch is to be conducted over a field isolation mass, such as a field oxide. Such problems are discussed directly below in connection with FIGS. 1-3.
FIG. 1 illustrates a semiconductor wafer fragment 10 comprised of a bulk silicon substrate region 12 and a field oxide region 13. A gate oxide layer 14 overlies silicon substrate 12. A conductive line 15 overlies gate oxide 14, and a conductive line 16 overlies field oxide region 13. Both lines 15 and 16 are provided with an etch resistant cap 17 and sidewall spacers 18 of nitride or some other etch resistant material. Diffusion regions 19 and 20 are provided on either side of line 15 and define source/drain regions to which electrical connection will be made.
Referring to FIG. 2, a planarized oxide insulating material 21 is provided over substrate region 12 and patterned with photomask 22 to define a contact opening 23 to diffusion region 20. As shown, photomask 22 is misaligned somewhat to the left, the effect of which 11 is to provide the contact opening etch directly over field oxide region 13.
Referring to FIG. 3, contact opening 23 has been etched through the oxide insulating material 21, and due to the photomask misalignment, a portion 24 of field oxide region 13 is also undesirably etched away. Etching away a portion of the field oxide region as shown is undesirable because such may cause shorts to the substrate and leakages which render a device inoperative.
One proposed solution is to provide a thin etch stop layer over the word line and the field oxide region. However, this solution fails when the space through which a contact opening is to be made is very narrow. This is because the thin etch stop layer tends to clog such space and is oftentimes non-uniformly distributed therethrough.
This invention arose out of concerns associated with forming a contact opening to a region adjacent a field isolation mass without the risk of etching the field isolation mass during provision of the contact opening.
USPTO Backgrounds
USPTO Backgrounds