Communication links generally require a driver to transmit information into the channel from transmitter to receiver. In wireline communications, line drivers typically must satisfy two requirements: first line drivers must generate a certain voltage swing across the transmission line, and second line drivers must have an output impedance that is matched to the line characteristic impedance to absorb signals arriving at the transmitter and avoid reflections back to the line. In digital data transmission, information is sent using different modulations. One of the most common types of data modulation is pulse amplitude modulation (PAM), where each group of data bits are presented by a voltage level that is transmitted into the channel. Data modems and 100Base-T/1000Base-T Ethernet transceivers are examples of links that use multi-level signaling or PAM to transmit information. Information typically needs to be transmitted over distant and lossy channels. To ensure a minimum signal level at the receive end, a line driver must generate a high enough signal power at the transmit end. As a result, the power efficiency of line drivers in most communication links is of great importance, since significant portion of transceiver power is typically burned in the line driver and in circuitry related to the line driver.
FIG. 1 shows an example of a conventional commonly-used differential line driver 10, also known as common-source or common-emitter stage. The line driver 10 comprises a tail current source 12 and a pair of switches 14a and 14b that steer current from one branch to the other. Each branch of the driver is respectively terminated to a voltage source 16 by fixed resistors 18a and 18b that are each matched to the line single-ended characteristic impedance (or half its differential impedance). The effective impedance at the output of the driver is fixed and equal to the parallel resistance of the termination impedance and line single-ended impedance (i.e., Zo/2∥Zo/2=Zo/4). The amplitude of the output signal is controlled by the amount of the current steered into either of the equivalent parallel resistors, being Zo/4. Accordingly, for the conventional driver to deliver a max swing of 1V (or 2V differential peak-to-peak) into the line, the driver current is high due to the high single-ended impedance.
FIG. 2 illustrates another example of a line driver 20 having an H-bridge topology 20. The line driver 20 differs from the conventional driver 10 of FIG. 1 in that the line driver 20 includes current steering branches 22a and 22b both at the bottom and top, respectively, and has a single termination resistor 24 equal to line impedance across outputs nodes of the line driver. Thus, the bottom current steering branches 22a respectively pulls the same current that the top current steering branches 22b push into the equivalent line and termination impedance (i.e., Zo∥Zo=Zo/2), theoretically resulting in twice the current efficiency of the conventional driver 10 of FIG. 1. However, in the H-bridge design to keep the current sources in saturation, such a design requires twice the headroom of a conventional source-coupled design for the current source devices, which typically requires a higher supply voltage.
A design that solves the headroom problem of an H-bridge topology is disclosed in U.S. Pat. No. 6,175,255, entitled “Line Driver Circuit for Low Voltage and Low Power Applications”, by Jidentra (shown in FIG. 3). In the line driver topology of FIG. 3, the top current sources are removed and only the top switches that do not have a headroom requirement are left in the top branches. As shown in the waveforms in FIG. 3, the top voltage level of the stage output is in fact a supply voltage, and thus leaving enough voltage headroom for the bottom current sources. However, during a rise period in which one of the top switches is shorted, a resistance at the rising output node VOP or Von becomes very low. Thus, the RC time constant of the rising node gets very low, resulting in a very fast transition. The falling node, where the switch is off, has an effective impedance of the termination resistor Rt parallel with line impedance Zo, thus experiencing a considerably larger time constant than the rising node. This difference in the time constants on the two output nodes results in a rather large output common-mode voltage. Common-mode voltage is not desirable in most wireline applications, especially Ethernet over unshielded twisted pair, as a large output common-mode voltage causes the wire to radiate electromagnetic waves and causes interference that may violate FCC regulations. To avoid this common-mode effect, a transformer must typically be used to cancel the common-mode component of the transmitted signal. The requirement for a transformer makes the solution more expensive and less desirable especially for very high speed applications as the transformer cost also goes up with the frequency of operation.
USPTO Backgrounds
USPTO Backgrounds