1. Field of the Invention
The present invention relates to an active matrix type display device. More particularly, the present invention relates to a display device performing gradation display by both voltage gradation and temporal gradation.
2. Description of the Related Art
Recently, techniques of manufacturing a semiconductor device such as a thin film transistor (TFT) in which semiconductor thin films are formed on a low cost glass substrate, have been rapidly progressing. The reason for this resides in that the demand for active matrix type liquid crystal display devices has risen.
An active matrix type liquid crystal display device is a device in which TFTs are placed in each pixel of a pixel section having from several hundreds of thousands to several millions of pixels arranged in a matrix shape, and in which an electric potential input and output to pixel electrodes connected to each pixel TFT is controlled by the pixel TFT switching function.
In recent years, active matrix type liquid crystal display devices have spread from being used as only displays of notebook type personal computers, often seen conventionally, to being used as the display of desktop type personal computers.
There is a demand for the display of a large amount of information (combining character information and image information) at once, and the image capabilities of personal computers are being made higher definition and with more gradation levels (preferably full colorization).
Accompanying the increase in personal computer display capabilities, improvements in active matrix type liquid crystal display devices as personal computer display devices are advancing.
Image data from devices such as personal computers is digital data, and this kind of digital data cannot be directly inputted into an active matrix type liquid crystal display device with an analog driver. Digital data from a personal computer, therefore, is converted into analog data by a D/A converter circuit, and then is inputted to the active matrix type liquid crystal display device.
In general, it is necessary to increase the number of digital data bits which the D/A converter circuit can process in order to realize a display with very many gradations. However, if the number of digital data bits increases, then the element layout surface area for the D/A converter circuit increases exponentially, and further, the circuit structure of the D/A converter circuit becomes complex. The element size and cost of the D/A converter circuit therefore becomes a problem.
However, as stated above, there is a demand for an active matrix type liquid crystal display device which can display many gradations (preferably full color), and a liquid crystal display device which realizes multiple gradation display using a D/A converter circuit, which processes digital data with a low number of bits, is preferable.
In view of the above stated problems, an object of the present invention is to provide a display device which can realize higher resolution and more gradations.
According to a first aspect of the present invention, a display device comprises:
a pixel section having a plural number of pixel TFTs arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTs;
a processing circuit for converting externally inputted m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into analog video data, and for outputting said analog video data to said source driver, wherein:
said processing circuit randomly outputs said 2mxe2x88x92n pieces of n-bit digital video data to said D/A converter circuit, and
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed by said n-bit digital video data.
According to a second aspect of the present invention, a display device comprises:
a pixel section having a plural number of pixel TFTs arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTS;
a processing circuit for converting externally inputted m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into analog video data, and for outputting said analog video data to said source driver, wherein:
said processing circuit randomly outputs said 2mxe2x88x92n pieces of n-bit digital video data to said D/A converter circuit,
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed by said n-bit digital video data, and
(2mxe2x88x92(2mxe2x88x92nxe2x88x921)) levels of display gradation can be obtained.
According to a third aspect of the present invention, a display device comprises:
a pixel section having a plural number of pixel TFTs arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTs;
a processing circuit for converting externally inputted m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into analog video data, and for outputting said analog video data to said source driver, wherein:
said 2mxe2x88x92n pieces of n-bit digital video data is outputted to said D/A converter circuit by a pattern selected randomly from a plural number of output patterns, and
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed by said n-bit digital video data.
According to a fourth aspect of the present invention, a display device comprises:
a pixel section having a plural number of pixel TFTs arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTs;
a processing circuit for converting externally inputted m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into analog video data, and for outputting said analog video data to said source driver, wherein:
said 2mxe2x88x92n pieces of n-bit digital video data is outputted to said D/A converter circuit by a pattern selected randomly from a plural number of output patterns,
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed by said n-bit digital video data, and
(2mxe2x88x92(2mxe2x88x92nxe2x88x921)) levels of display gradation can be obtained.
According to a fifth aspect of the present invention, a display device comprises:
a pixel section in which a plural number of pixel TFTs are arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTs;
an A/D converter circuit for converting externally inputted analog video data into m-bit digital video data;
a processing circuit for converting said m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into another analog video data, and for outputting said another analog video data to said source driver, wherein:
said processing circuit randomly outputs said 2mxe2x88x92n pieces of n-bit digital video data to said D/A converter circuit, and
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed from said n-bit digital video data.
According to a sixth aspect of the present invention, a display device comprises:
a pixel section in which a plural number of pixel TFTs are arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTs;
an A/D converter circuit for converting externally inputted analog video data into m-bit digital video data;
a processing circuit for converting said m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into another analog video data, and for outputting said another analog video data to said source driver, wherein:
said processing circuit randomly outputs said 2mxe2x88x92n pieces of n-bit digital video data to said D/A converter circuit,
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed from said n-bit digital video data; and
(2mxe2x88x92(2mxe2x88x92nxe2x88x921)) display gradations are obtained.
According to a seventh aspect of the present invention, a display device comprises:
a pixel section in which a plural number of pixel TFTs are arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTs;
an A/D converter circuit for converting externally inputted analog video data into m-bit digital video data;
a processing circuit for converting said m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into another analog video data, and for outputting said another analog video data to said source driver, wherein:
said 2mxe2x88x92n, n-bit digital video data is output to said D/A converter circuit by a pattern selected randomly from a plural number of output patterns, and
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed from said n-bit digital video data.
According to an eighth aspect of the present invention, a display device comprises:
a pixel section in which a plural number of pixel TFTs are arranged in a matrix shape;
a source driver and a gate driver for driving said plural number of pixel TFTs;
an A/D converter circuit for converting externally inputted analog video data into m-bit digital video data;
a processing circuit for converting said m-bit digital video data into 2mxe2x88x92n pieces of n-bit digital video data (where m and n are both positive integers greater than or equal to 2, and m greater than n); and
a D/A converter circuit for converting said n-bit digital video data into another analog video data, and for outputting said another analog video data to said source driver, wherein:
said 2mxe2x88x92n pieces of n-bit digital video data is outputted to said D/A converter circuit by a pattern selected randomly from a plural number of output patterns,
a one-frame image is formed by displaying 2mxe2x88x92n subframes formed from said n-bit digital video data; and
(2mxe2x88x92(2mxe2x88x92nxe2x88x921)) display gradations are obtained.
USPTO Backgrounds
USPTO Backgrounds