1. Field of the Invention
This invention relates to analog-to-digital converters, and in particular to analog-to-digital converters utilizing charge-coupled devices to perform the conversion.
2. Description of the Prior Art
Charge-coupled semiconductor devices were first invented by W. S. Boyle and G. E. Smith. See "Charge-Coupled Semiconductor Devices," Bell System Technical Journal, Vol. 49, pp. 587-593, by Boyle and Smith, and U.S. Pat. No. 3,858,232, issued to Boyle and Smith. Since their initial development charge-coupled devices (also referred to as CCD's) have been described in numerous publications. See, e.g., C. H. Sequin and M. F. Tompsett, Charge-Transfer Devices, Academic Press, 1975. It is now well known that CCD's may be used to form linear and area imaging sensing devices, digital memories, logic arrays, and various types of signal-processing devices. The application of CCD's to the conversion of analog signals to digital signals, however, is a relatively recent development.
One technique for converting analog signals to digital signals using charge-coupled devices has been developed at General Electric. See Electronics, Mar. 17, 1977, at pp. 74 and 76. According to this technique the analog signal is applied to the sense node of a sense amplifier or comparator. While the analog signal is held on the sense node, a fixed amount of charge is repeatedly added to the reference node. As long as the potential of the reference node is less than the sense node, a first signal will be supplied by the comparator. When the reference node reaches the same or a slightly higher potential compared to the sense node, however, a different signal will be emitted by the comparator. The number of times the fixed amount of charge is added to the reference node before the signal changes from the comparator provides a digital value corresponding to the potential of the analog signal.
Unfortunately this technique is undesirably slow in certain instances. For example, if the analog signal is being converted into four digital bits, then up to 16 cycles of addition of the fixed amount of charge will be necessary to generate the digital equivalent to the analog signal. Moreover, because the potential of the reference node is not perfectly proportional to the sum of the charges added to the node over a wide range of potentials, the conversion is not as accurate as desirable.
USPTO Backgrounds
USPTO Backgrounds