1. Field of the Invention
The present invention relates to a multilayer electronic component having internal circuit elements arranged therein, a method of manufacturing the same and a method of measuring characteristics thereof, and more particularly, it relates to an improvement in a mode of forming external electrodes in a multilayer electronic component.
2. Description of the Background Art
A multilayer electronic component, which is represented by a multilayer capacitor, a multilayer inductor, a multilayer circuit board or a multilayer composite electronic component, for example, comprises a laminate which is obtained by stacking a plurality of insulating sheets with interposition of internal circuit elements such as conductor films and/or resistor films. The insulating sheets are typically prepared from ceramic sheets.
FIG. 15 is a perspective view showing the appearance of a conventional multilayer electronic component 1. The multilayer electronic component 1 comprises a laminate 2 which is obtained by stacking a plurality of insulating sheets with interposition of internal circuit elements (not shown). The laminate 2 is provided on its four side surfaces, for example, with external electrodes 3 respectively. These external electrodes 3 are electrically connected with the internal circuit elements which are located in the interior of the laminate 2. The external electrodes 3 are formed by applying proper metal paste to specific positions of the respective side surfaces of the laminate 2, and parts of the external electrodes 3 necessarily extend circumferentially on upper and lower surfaces of the laminate 2 at this time.
FIG. 16 is a perspective view showing the appearance of another type of conventional multilayer electronic component 4. This multilayer electronic component 4 also comprises a laminate 5 which is obtained by stacking a plurality of insulating sheets with interposition of internal circuit elements (not shown). The laminate 5 is provided on its four side surfaces, for example, with external electrodes 6 which are electrically connected with the internal circuit elements. These external electrodes 6 are provided by dividing through holes 7, as shown by phantom lines in FIG. 16. Namely, a mother laminate is so prepared that a plurality of multilayer electronic components 4 can be obtained when the same is cut along prescribed cutting lines. The through holes 7 are formed in this mother laminate so that conductor films are formed on inner peripheral surfaces thereof for defining the external electrodes 6, and the mother laminate is thereafter cut to divide the through holes 7. Also in such a multilayer electronic component 4, parts of the external electrodes 6 extend circumferentially on upper and lower surfaces of the laminate 5, due to the method of forming the conductor films for defining the external electrodes 6.
These multilayer electronic components 1 and 4 are surface-mounted on proper circuit boards through the external electrodes 3 and 6, in the form of chips.
In both of the aforementioned multilayer electronic components 1 and 4, however, the external electrodes 3 and 6 are formed to extend toward the upper and lower surfaces of the laminates 2 and 5. When other components are mounted on the upper and/or lower surface(s) of such multilayer electronic components 1 and 4 to be composited with the same, therefore, areas capable of mounting such components are restricted.
Further, the parts of the external electrodes 3 and 6 extending toward the upper and lower surfaces of the laminates 2 and 5 inhibit reduction of arrangement pitches for the external electrodes 3 and 6. In addition, it is relatively difficult to form such parts of the external electrodes 3 and 5 in constant sizes and shapes, and this also inhibits reduction of the arrangement pitches for the external electrodes 3 and 6.
Particularly in the multilayer electronic component 4 shown in FIG. 16, it is difficult to reduce the diameters of the through holes 7, which are formed by a drill, below 0.3 mm, and this also restricts the arrangement pitches for the external electrodes 6. Further, the drill for forming the through holes 7 has a relatively short life, leading to increase in cost.
In the multilayer electronic component 1 shown in FIG. 15, on the other hand, the external electrodes 3 are formed on the four side surfaces of the laminate 2 respectively and hence it is necessary to carry out at least application of the metal paste onto the respective side surfaces independently of each other. As the result, the number of steps for forming the external electrodes 3 is increased.
On the other hand, it is necessary to measure characteristics of the multilayer electronic components 1 and 4 at least in advance of shipping. In both of the multilayer electronic components 1 and 4, however, the characteristics cannot be measured unless the same are brought into states of chips in principle. In the multilayer electronic component 1 shown in FIG. 15, measurement of the characteristics is enabled after formation of the external electrodes 3. Also in the case shown in FIG. 16, the characteristics of each multilayer electronic component 4 cannot be measured in the stage of the mother laminate. Such measurement of the characteristics is enabled only when the mother laminate is cut to divide the through holes 7.
USPTO Backgrounds
USPTO Backgrounds