Transfer printing processes typically rely on the use of kinetic or shear assisted control of adhesion of transfer stamps to transfer arrays of ultra-thin semiconductor dies onto target substrates, which are typically coated with polymeric adhesive layers. When the surface of the target substrate is relatively smooth, as with polished semiconductor wafers or ultra-flat glass substrates, high transfer printing yields can be achieved without an adhesive layer. However, when the roughness of the target substrate is too high to permit high transfer yields, or too high to provide for the formation of a reliable chemically bonded interface, polymeric adhesive layers can be used.
However, the typically low thermal transport and high coefficient of thermal expansion properties of polymeric adhesive layers can limit the performance or long term reliability of certain classes of semiconductor transfer-printable devices, such as solar cells, light emitting diodes, laser diodes, transistors, and/or integrated circuits. In addition, the electrical insulation properties of polymeric adhesive layers may not permit the formation of electrical contacts at the bonded interface. Thus, further processing steps are typically necessary to deposit and pattern metal interconnection lines over the surface of transfer printed semiconductor dies. Such further processing steps can require special engineering designs, special material logistics and further production setups, stringent quality controls, and/or additional costs.
USPTO Backgrounds
USPTO Backgrounds