1. Field of the Invention
This invention relates to an apparatus for encoding a binary code into channel code containing a fixed number of "1"s or "0"s for optical recording and an apparatus for decoding a reproduced channel code into its original binary code.
2. Description of the Prior Art
Optical recording/reading technology has long been studied. Recently, discussions on encoding/decoding (ENCDEC) technology especially suitable to optical record carriers are often reported. "Encoding" means a procedure to convert a binary code (generally composed of eight bits of data) into a channel code which will be recorded on a record carrier. "Decoding" means the reverse procedure of "encoding", i.e. to convert the channel code into the original binary code. The ENCDEC technology has been evolved for more than twenty years in the field of magnetic recording/reproducing technology. Most of all, the (2,7) ENCDEC scheme is well known to offer distinguished recording efficiency --high density and low error rate. In early stages of the development of optical recording/reading, the (2,7) ENCDEC scheme was considered the most suitable scheme.
But a recent study shows that there exist other ENCDEC schemes which will provide a greater record density and lower error rate than the (2,7) scheme, especially for the optical recording/reading in noisy conditions. One of them is well known as an i/N (i out of N) ENCDEC scheme. The "N" represents the word length of one channel code and the "i" the number of "1"s in the channel code. Every N-bit code produced by this scheme has the exact number, i, of "1"s and N-i "0"s. The i/N codes -- codes produced by the scheme -- are suitable for optical recording/reading especially in noisy conditions since bit-errors can be detected very easily. When an N-bit channel code read from an optical record carrier does not have exact by "1"s, the channel code is regarded as having bit-errors.
A typical encoding/decoding system for the i/N ENCDEC scheme is disclosed in U.S. Pat. No. 4,646,281, issued on Feb 24, 1987. This system aims at encoding an 8-bit binary code into a 14-bit channel code having exact by four "1"s in it and decoding the 14-bit channel code into the original 8-bit binary code. The encoding system comprises a first table encoder for converting the upper 4 bits of the 8-bit binary code into 7 bits of the 14-bit channel code and a second table encoder for converting the lower 4 bits of the 8-bit binary code into the 7 bits of the 14-bit channel code. The former 7 bits form the even bits form and the latter 7 bits the odd bits of the 14-bit channel code. Each of the first and second table encoders is designed to produce 16 patterns of 7-bit codes having exact by two "1"s in accordance with the 4-bit codes varying from 0000 to 1111 (from 0 to 15 in decimal). Therefore, 256 (=6.times.16) patterns of the 14-bit channel codes containing four "1"s are obtained.
Similarly, the decoding system comprises a first table decoder for converting the even-numbered 7 bits of the 14-bit channel code to the upper 4 bits of the 8-bit binary code and a second table decoder for converting the odd-numbered 7 bits of the 14-bit channel code into the lower 4 bit of the 8-bit binary code.
U.S. Pat. No. 4,646,281 discloses a technique to produce the 4/14 codes efficiently, i.e. with a small electrical circuit. As is well known, there exist 256 patterns in the set consisting of all of the 256 8-bit binary codes (from 00000000 to 11111111). Therefore, 256 independent 256 channel codes are necessary for all of the 8-bit binary codes. If the conversion from 8-bit codes to 4/14 codes were expressed by a simple logic equation, the ENCDEC circuit could be small. But there have not been found proper logic equations which can convert all of 8-bit codes to practical i/N codes (when N is large enough, it may be possible). Therefore, a 256 encoder circuits is imperative for converting 256 8-bit codes to appropriate 256 4/14 codes. A set of those circuits is known as a "table encoder". On the assumption that a circuit for converting an 8-bit binary code to a corresponding 4/14 channel code needs ten logic gates in are needed on the average, e.g. NAND or NOR gates, approximately 2500 for such a table encoder in the absence of the technology disclosed in U.S. Pat. No. 4,646,281. But according to U.S. Pat. No. 4,646,281, no more than 32 encoder circuits convert all of the 8-bit codes into corresponding 4/14 codes. As described before, each 8-bit binary code is split into upper and lower 4-bit codes. Then, these 4-bit codes are encoded into 2/7 (2 out of 7) codes located at even- and odd-bit positions of the 4/14 channel code. Therein, sixteen conversion circuits can form the table encoder for each of the upper and the lower 4 bits of the 8-bit binary codes. In total, thirty-two conversion circuits can produce 4/14 codes from 8-bit binary codes.
The 4/14 channel code can be decoded into the original 8-bit binary code in the same manner as described above. Also in this case, a table decoder comprising 32 decoder circuits can decode all of the 4/14 channel codes.
For more practical application, U.S. Pat. No. 4,646,281 shows a 4/15 codes set as an embodiment. Fourteen of the fifteen bits are produced by the dual-table encoders as explained before. Thereafter, a "0" as the fifteenth bit is added to the 4/14 codes in order to separate a current channel code from adjacent channel codes recorded before and after the current channel code .
In the above-described system, however, the word length N should be 14 or more. As described before, the i/N codes, being resistant to noise, need extra word length by N-8 (N&gt;8) in comparison with the original 8-bit binary code due to the redundancy of the i/N codes; i.e. in the case of 4/14 codes, 14 bits are necessary to express 8-bit information. Generally, the smaller the word length N is, the more recording density will be achieved. The total number of members expressed by 4/N codes is calculated at: N=10,11,12,13 and 14 as follows:
______________________________________ N = 10 4C10 = 210 N = 11 4C11 = 330 N = 12 4C12 = 495 N = 13 4C13 = 715 N = 14 4C14 = 1001 ______________________________________
These results show that only 4/N:N.gtoreq.11 codes can be employed as the channel codes for expressing 256 of 8-bit binary codes. When 4/11 codes are employed instead of the 4/14 codes, the recording density will increase by 27%.
But high density i/N codes like 4/11 codes cannot be produced using the technique disclosed in U.S. Pat. No. 4,646,281. In that patent, not only must the total number of the i/N codes (iCN) be 256 or more but also the total number of "half" channel codes (i/2CN/2) must be 16 or more (16: total number of 4-bit codes). As examples, in the case of 4/12 and 4/14 codes:
______________________________________ N = 12 2C6 = 15 (the number of 2/6 codes) N = 14 2C7 = 21 (the number of 2/7 codes) ______________________________________
Clearly, the ENCDEC system in U.S. Pat. No. 4,646,281 cannot be applied for the i/N codes in which the word length N is less than 14.
USPTO Backgrounds
USPTO Backgrounds