The present invention relates to a LSI (Large Scale Integrated Circuit) chip bonding method, and more particularly, to a method for bonding an LSI chip on a wiring base by using a heat sensitive adhesive having mixed therein electrically conductive particles.
FIG. 1 shows a sectional view of a LSI chip bonded on a base by using a conventional flip chip bonding method.
An LSI chip 1 is provided with Al (Aluminum) pads 2 as terminals of the LSI chip 1, and barrier metals 3 are formed on the positions corresponding to the Al pads 2. A base 6 is provided with wirings 5 having terminals. To connect the LSI chip 1 to the base 6, the Al pads 2 of the LSI chip 1 are bonded to the terminals of the wirings 5 on the base 6 through Au (Aurum) bumps 4.
In another flip chip bonding method, the LSI chip is bonded on the wiring base by using soldering bumps.
However, in the conventional soldering bump bonding method of the LSI chip, the LSI chip can not be bonded on a base impossible to solder, and also, a solderable wiring base must be heated to high temperature of about 250 degrees C. In the conventional Au bump bonding method, the terminals of the wirings on the base must be plated by Sn (Stannum) and the base must be heated at temperature of about 400 degrees C. Accordingly, the LSI chip may be destroyed by the high temperature.
Further, a bonding assembly using an electrically conductive adhesive is disclosed in U.S. Pat. No. 4,113,981, issued on Sept. 12, 1978, by Fujita et al., entitled "ELECTRICALLY CONDUCTIVE ADHESIVE CONNECTING ARRAYS OF CONDUCTORS". However, in U.S. Pat. No. 4,113,981, connecting terminals are additionally connected to terminals of the LSI chip and each of the LSI chips is separetely molded, and the molded LSI chip is bonded on the base. Therefore, this bonding assembly may not be suitable for mass production and compactness.
USPTO Backgrounds
USPTO Backgrounds