1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same. More particularly, the present invention relates to a semiconductor device having a junction extended by a selective epitaxial growth (SEG) layer and a method of fabricating the same.
2. Description of the Related Art
As semiconductor devices become more highly integrated, a channel length decreases. This decrease causes a short channel effect, requires fine patterns, and slows operating speed. Of these problems, the short channel effect is a particularly serious problem. For example, an increase in an electric field near a drain region leads to a punch-through, i.e., where a drain depletion region penetrates an electric potential barrier near a source region. Also, thermoelectrons cause avalanche, and vertical electric fields deteriorate the mobility of carriers. Further, the short channel effect increases an off current of a transistor, thereby degrading the refresh characteristic of a memory device.
To eliminate the short channel effect, a MOS transistor in which a channel extends vertically from a substrate has been proposed. Such a transistor having an extended channel is called a FinFET. The FinFET includes a greatly extended channel region so that the short channel effect can be notably suppressed.
Generally, as an area of a junction increases, the electric resistance of the junction decreases. With a reduction in the electric resistance, the refresh characteristic of a memory device improves. Also, by reducing a width of a channel interposed between junctions, a threshold voltage is lowered.
However, as the area of a junction increases, the leakage current of the junction also increases. An increase in leakage current deteriorates the refresh characteristic of a memory device. Also, because a conventional FinFET has a small interval between fins, when an insulating isolation layer is filled in the interval, voids are formed in the filled insulating layer. The voids have an adverse effect on the insulation characteristic of the isolation layer. Moreover, the small interval between fins narrows an interval between active regions and further deteriorates the insulation characteristic of the isolation layer.
USPTO Backgrounds
USPTO Backgrounds