In conventional processes for fabricating a circuit board such as substrate or printed circuit board (PCB), a core layer is prepared by fiber glass, epoxy resin, polyimide, FR4 resin or BT resin, etc. Then, at least a copper film is attached to the core layer, and patterned to form predetermined circuitry of conductive traces on the core layer. After that, solder mask is applied over the core layer to cover the conductive traces by conventional techniques such as halftone-printing, roller-coating etc. Then, after being oven-dried and cooled down, undesired part of solder mask is removed by exposure and development processes; remaining solder mask is baked under high temperature and becomes cured to form a protective coating that protects the conductive traces against oxidation or short circuit without affecting electricity thereof.
However, the above conventional circuit board has significant drawbacks. For example, during the process for applying solder mask over the core layer, halftone-printing or roller-coating processes are performed in multiple times for accumulating solder mask with desired thickness; this considerably increases process complexity in fabrication. And, accumulated thickness of solder mask is hardly controlled, which may adversely affect planarity of the circuit board, and electrical connection between electronic components or devices and the circuit board. Moreover, in the baking process under high temperature, due to mismatch in coefficient of thermal expansion (CTE) between solder mask and the core layer of the circuit board, thermal stress would be generated and causes warpage of the circuit board. Furthermore, during coating solder mask over the core layer, air would be possibly trapped in solder mask to form voids, which facilitates the occurrence of popcorn effect in subsequent fabrication processes. In addition, solder mask is poorly adhered with copper traces formed on the core layer; this would easily cause delamination at interface between solder mask and conductive traces, and undesirably affect quality and reliability of the circuit board.
Therefore, there is disclosed another method for fabricating a circuit board. This fabrication method for a circuit board 1 can be carried out by the steps illustrated in FIGS. 3A to 3E. Referring to FIG. 3A, the first step is to prepare a core layer 10 formed with a plurality of copper conductive traces 11 and a plurality of copper-plated vias 12 that penetrate through the core layer 10. The core layer 10 is made of a material same as that used for a conventional circuit board, such as epoxy resin, polyimide resin, FR4 resin, etc.
Referring to FIG. 3B, the next step is to apply a non-solderable material 14 in predetermined thickness over an aluminum film 13; then, the non-solderable material 14 is adapted to be attached to the core layer 10 in a manner as to cover the conductive traces 11. Under predetermined pressure and temperature, the non-solderable material 14 becomes cured and fully fills the vias 12 and other fine holes of the core layer 10, and forms a desirable protective layer for protecting the conductive traces 11 against oxidation or external impact. The non-solderable material 14 is preferably made of a material having coefficient of thermal expansion same as or similar to that of the core layer 10.
Referring to FIG. 3C, a layer of photo resist 15 is applied over an exposed surface of the aluminum film 13. The photo resist 15 is selectively removed by exposure and development processes as to expose predetermined part of the aluminum film 13.
Referring to FIG. 3D, remaining photo resist 15 and exposed part of the aluminum film 13 are etched away by using chemical solvents, so as to expose predetermined part of the non-solderable material 14 that covers bond pad or finger positions of the underneath conductive traces 11. Then, the exposed part of the non-solderable material 14 is removed by plasma etching technique, such that bond pads or bond fingers of the conductive traces 11 can be desirably exposed.
Finally referring to FIG. 3E, remaining aluminum film 13 is chemically etched to completely expose the non-solderable material 14.
The above-fabricated circuit board 1 would desirably eliminate those outlined drawbacks for the foregoing conventional circuit board. For example, one single step of applying non-solderable material 14 allows to desirably achieve predetermined thickness for the non-solderable material 14, thereby effectively reducing complexity and costs in fabrication. Moreover, since the non-solderable material 14 has coefficient of thermal expansion same as or similar to that of the core layer 10, the circuit board 11 can be assured with structural intactness without being warped by thermal stress, thus making production yield greatly improved. In addition, the non-solderable material 14 is firmly attached to the core layer 10 and conductive traces 11 under condition of certain temperature and pressure, and thus air is hardly trapped in the non-solderable material 14, so that popcorn effect or delamination would significantly reduce in occurrence, making quality and reliability of the circuit board 1 firmly assured.
However, the above fabrication method for the circuit board 1 still has considerable drawbacks. First, conductive traces 11 formed on the core layer 10 are covered by multiple-layered structure including the non-solderable material 14, aluminum film 13 and photo resist 15; then, it needs to in turn remove the photo resist 15, aluminum film 13 and non-solderable material 14, so as to expose predetermined part of the conductive traces 11, thereby making process complexity and costs in fabrication undesirably increased.
Moreover, as conductive traces 11 are covered thereon by the non-solderable material 14, aluminum film 13 and photo resist 15, it is difficult to visually recognize predetermined part of the conductive traces 11 to be exposed through such multi-layer structure. In order to precisely position corresponding part of the photo resist 15 aligned with the part of the conductive traces 11 to be exposed, X-ray fluoroscopy is usually adopted to determine fiducial marks on the photo resist 15. However, X-ray fluoroscopy still possibly causes positioning inaccuracy up to ±75 μm, making etched part of the aluminum film 13 and non-solderable material 14 not precisely positioned in correspondence with the predetermined exposed part of the conductive traces 11, which deteriorates production yield of fabrication circuit boards 1.
In addition, the non-solderable material 14 is selectively removed by the plasma-etching technique to form a plurality of openings where predetermined positions of the conductive traces 11 are exposed for use as bond pads or bond fingers, allowing solder balls, solder bumps or wires to be subsequently bonded to the exposed bond pads or fingers. These openings formed by the plasma-etching technique are SMD (solder mask define) openings; as shown in FIG. 3E, each SMD opening is dimensioned smaller in surface area than the underneath conductive trace 11, and thus, part of the conductive trace 11 is unexposed and covered under the non-solderable material 14. As such, adjacent openings are at least spaced apart from each other by the distance of unexposed part of adjacent conductive traces 11; this would hardly reduce the distance between adjacent openings and pitch spacing between neighboring bond pads or bond fingers, making the circuit board 1 not suitably used for accommodating fine-pitch or high-density arrangement of solder balls, bumps or wires.
Therefore, how to develop a novel fabrication method for a circuit board to eliminate the above drawbacks, is a critical problem to solve.
USPTO Backgrounds
USPTO Backgrounds