1. Field of the Invention
The present invention relates to a semiconductor device using a low dielectric constant film and a silicon-based composition used for the same, a low dielectric constant film, and a method for producing the low dielectric constant film.
2. Description of the Related Arts
It is important for integration and miniaturization of a semiconductor to reduce the parasitic capacitance that is generated between wirings in multilayer wiring processes of a semiconductor integrated circuit and to reduce the delay of the signal propagation speed (i.e., the wiring delay).
Although the reduction of the signal propagation speed by the parasitic capacitance of an insulating film has been recognized so far, the influence of the wiring delay on the entire device has not been so remarkable in the semiconductor devices of generations in which the wiring gap is larger than 1 μm.
In the case the wiring gap is 1 μm or less, however, the influence on the device speed becomes large. In particular, when a circuit is formed with the wiring gap being 0.5 μm or less as will be expected in near future, the parasitic capacitance between wirings will be affecting the device speed more. Accordingly this will be a big obstacle for the integration and miniaturization of a semiconductor.
In other words, while the reduction of the signal propagation speed depends largely on the wiring resistance and parasitic capacitance between wirings in the multilayer wiring of a semiconductor integrated circuit, higher integration of a device makes the width of a wiring and wiring gap narrower, resulting in increase in the wiring resistance and parasitic capacitance between wirings.
The capacitance of an insulating film can be reduced by making the wiring thickness thinner to reduce the cross-sectional area. However, making the wiring thinner results in larger wiring resistance, and therefore, a higher signal propagation speed cannot be achieved.
Accordingly, it is indispensable for achieving a higher signal propagation speed to make the resistance of a wiring and the dielectric constant of an insulating film lower, and it is expected that they will play very important roles in deciding properties of a device in future.
Wiring delay (T) is affected by wiring resistance (R) and capacitance (C) between wirings as shown in Eq. 1.T∝CR  (1)In eq. 1, the relation between ∈ (dielectric constant) and C is expressed by Eq. 1′.C=∈0∈r·S/d  (1′)wherein S is an electrode area; ∈0 is a dielectric constant of the vacuum; ∈r is a relative dielectric constant of an insulating film; and d is a wiring gap.
Therefore, the wiring delay is effectively diminished by making the dielectric constant of the insulating film lower.
Inorganic films such as silicon dioxide (SiO2), silicon nitride (SiN), and phosphate silicate glass (PSG) and organic polymers such as polyimide have been used as insulating materials so far.
However, the dielectric constant of CVD-SiO2 films, which are most frequently used for semiconductor devices, is about 4 or so. Although the dielectric constant of an SiOF film, which is now being calling attentions as a low dielectric constant CVD film, is about 3.3-3.5, it is hygroscopic, so that it has a problem in that the dielectric constant is increased by absorbing water.
In addition, as a low dielectric constant film, a porous film made of a siloxane resin having SiH bonds is known. However, when a semiconductor device is subjected to washing with an alkaline solution, there is a problem in that highly hygroscopic SiOH groups are formed as a result of hydrolysis, resulting in an increased dielectric constant, together with the problem of mechanical damages on the semiconductor part such as cracks caused by the washing. To solve these problems, a protecting film such as a SiO2 film has been formed conventionally. However, this will make relatively smaller the rate of the low dielectric constant film in a semiconductor device, and accordingly, the effective dielectric constant will be increased when multilayer wirings are formed.
To compare, organic polymer films can be used to have a lower dielectric constant. However, the glass transition temperatures are as low as 200-350° C. and the coefficients of thermal expansion are large, so that the damages to the wiring are problematic.
USPTO Backgrounds
USPTO Backgrounds