A frequency synthesizer having a PLL typically includes an input frequency divider for dividing a corresponding input signal and an output frequency divider for dividing a corresponding output signal. At phase-lock, a synthesized output frequency f.sub.o is proportional to an input frequency f.sub.i by the relationship shown in equation (1), where M and N denote the divisors of the input and output frequency dividers. EQU .function..sub.o =N/M .function..sub.i (1)
Although M and N have the relationship of divisor and a dividend, respectively, in equation 1, reference will be hereinafter made to both M and N as divisors. From equation (1) it can be seen that a desired output frequency, for example, twice a current output frequency, is obtained by adjusting variables such as input frequency f.sub.i, divisor M, and/or divisor N. If f.sub.i and M are constant, then divisor N is doubled to obtain the desired output frequency. Alternatively, if f.sub.i and N are normally held constant, the divisor M is halved to obtain the desired output frequency. A wide range of output frequencies may be calculated from equation (1) by varying the values of the divisors M and N.
However, the practical limit of the output frequency range of a PLL is often defined by dynamic loop characteristics underlying the PLL. The loop characteristics include loop variables such as loop bandwidth, natural frequency, damping factor, and so on. Values of the loop characteristics are typically based upon present parameters of components of the PLL. The present parameters typically prevent frequency synthesis outside a predefined range of the PLL.
When a frequency synthesizer having a PLL attempts to synthesize a frequency within a frequency range of the PLL, the frequency synthesis typically succeeds. However, when such a frequency synthesizer attempts to synthesize a frequency outside the predefined frequency range, the synthesis often fails.
There is currently a need for a frequency synthesizer having a PLL adapted for providing a larger range of synthesized frequencies. To meet this need, a digital-to-analog converters (DAC) have been used in frequency synthesizers to provide accurate frequency deviation. Such an approach is described in U.S. Pat. No. 5,631,587, entitled, "FREQUENCY SYNTHESIZER WITH ADAPTIVE LOOP BANDWIDTH", Roman S. Co et al., issued on May 20, 1997, the disclosure of which is incorporated by reference herein. Such a frequency synthesizer requires additional blocks and control pins for the DAC. Thus, a frequency synthesizer design employing a DAC is more difficult and complex. Accordingly, it would be desirable and highly advantageous to have a frequency synthesizer which has a large range of synthesized frequencies, but that does not require additional blocks and control pins.
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