In the past, a variable resistance nonvolatile memory storage element has been proposed.
In the variable resistance nonvolatile memory storage element, a memory storage layer for storing information according to resistance is formed using a material whose resistance changes (hereinafter referred to as variable resistive material).
For example, an insulative film (a high-resistance film) is used as the memory storage layer. The memory storage layer is held between a lower electrode and an upper electrode to form a memory storage element. A memory storage device operating at high speed (so-called ReRAM) is configured using the memory storage element.
As a type of the variable resistance nonvolatile memory storage element, there is proposed a memory storage element configured by laminating a memory storage layer that stores information according to a change in resistance of the memory storage layer and an ion source layer containing elements that are movable as ions.
The memory storage element having this configuration adopts, for example, a structure in which the memory storage layer and the ion source layer are held between a lower electrode and an upper electrode. The ion source layer contains elements such as Cu, Ag, Zn, and Al as elements that change to ions. In the memory storage layer, any one of a tantalum oxide, a niobium oxide, an aluminum oxide, a hafnium oxide, and a zirconium oxide or a mixed material of the oxides can be used.
For example, the memory storage layer is arranged on the lower electrode side and the ion source layer is arranged on the upper electrode side to form the memory storage element. If a plus voltage is applied to the upper electrode with respect to the lower electrode, the elements such as Cu in the ion source layer are ionized, intrude into the memory storage layer through an electric field, and form a filament in the memory storage layer. Consequently, the memory storage layer changes to a low-resistance state. If a minus voltage is applied to the upper electrode with respect to the lower electrode when the memory storage layer is in the low-resistance state, the filament formed in the memory storage layer is oxidized and the memory storage layer returns to an original insulated state (a high-resistance state).
In the variable resistance nonvolatile memory storage element, the lower electrode is an important element for determining a switching characteristic of the memory storage element.
The lower electrode alone does not determine the characteristic. Consistency with the memory storage layer (a switching layer) is important (see, for example, Z. Wei et al., “Highly Reliable TaOx ReRAM and Direct Evidence of Redox Reaction Mechanism”, 12-2, IEDM2008).
A relation between electrode potentials (standard electrode potentials) and work functions of various metal elements is shown in FIG. 15. In FIG. 15, metal elements surrounded by a dotted line have positive electrode potentials.
If a material that easily oxidized or reduced is used in the lower electrode, the characteristic of the memory storage layer is deteriorated.
In order to actually control, at high speed, the memory storage element containing the variable resistive material, it is necessary to add transistors for selecting a memory storage element to memory storage elements of memory cells to form a memory cell array.
When a 1T1R memory cell array is fabricated at high density from a transistor T and a memory storage element R, since the structure of the 1T1R memory cell array is similar to the structure of 1T1C of a so-called DRAM, high density can be most easily realized by replacing a capacitor C of the DRAM with the memory storage element R.
Therefore, when the variable resistance nonvolatile memory storage element is used, for example, a memory cell array only has to be formed as indicated by a circuit diagram shown in FIG. 16.
As shown in FIG. 16, memory cells include memory storage elements 101 and transistors 102.
In the figure, reference numeral 103 denotes wires for selecting rows of the memory cells and controlling on and off of the transistors 102, 104 denotes wires for selecting columns of the memory cells, and 105 denotes wires for supplying potentials (a ground potential, a power supply potential, etc.) to the memory storage elements 101.
In the structure of a general DRAM, in general, polysilicon (in general, doped in an N type) is used in a storage node contact (a connection hole that connects a capacitor and a substrate) (see, for example, Y. K. Park et al., “Fully Integrated 56 nm DRAM Technology for 1 Gb DRAM”, 10B-4, VLSI tech 2007).
On the other hand, as explained above, in the so-called ReRAM, the lower electrode is an extremely important element that determines a switching characteristic. An appropriate lower electrode has to be fabricated between the polysilicon (so-called polysilicon plug) of the connection hole and the memory storage layer.
For example, in the memory storage element formed by laminating the memory storage layer and the ion source layer, a material of the lower electrode is desirably a stable electrode material, which is less easily oxidized, because generation and elimination of a metal filament by a reversible electric field (voltage) are principles.
Candidates of such an electrode material include a metal nitride such as TiN, WN, TaN, and ZrN or a metal silicide film of TiSi, NiSi, TaSi, WSi, CoSi, or the like.
In a memory storage device (a memory) including the variable resistance nonvolatile memory storage element, in order to realize a reduction in size and an increase in a storage capacity of the memory storage device, it is demanded to reduce the size of memory cells included in the memory storage device and integrate a larger number of memory cells.
In the past, it has been proposed to separate the variable resistive material of the memory storage layer for each of the memory cells through etching or the like.
An example of a method of manufacturing the memory storage device in this case is explained with reference to FIGS. 17A to 17D.
First, as shown in FIG. 17A, plug layers 52 are formed of polysilicon in an insulating layer 51.
Thereafter, as shown in FIG. 17B, a lower electrode 53, a memory storage layer 54, and an upper electrode 55 are sequentially formed over the entire surface on the plug layers 52.
As shown in FIG. 17C, resist patterns are formed.
Patterning is performed by dry etching using the resist patterns as masks. Consequently, as shown in FIG. 17D, memory storage elements 60 including the lower electrode 53, the memory storage layer 54, and the upper electrode 55 are formed on the plug layers 52 in patterns separated for each of memory cells.
In the case of this structure, a new material or a material rarely used in a semiconductor device, which is used in the memory storage layer 54, needs to be etched and processed for each of bits or each of bit lines.
In general, it is difficult to micro-process a high-resistance film containing an etching resisting material such as Cu. As a result, processing is performed at a loose pitch and memory cells are increased in size. Therefore, it is difficult to realize an increase in the density of a memory.
On the other hand, the memory storage layer containing the variable resistive material such as an oxide has resistance sufficiently higher than other layers. Therefore, even if only the lower electrode or the upper electrode is separated for each of bits, short-circuit with adjacent memory cells does not occur in the memory storage layer.
Therefore, a structure in which only the lower electrode is separated for each of memory cells and the memory storage layer is formed on the lower electrode is examined.
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