1. Field of the Invention
The present invention is related generally to integrated circuit devices, and more specifically to programmable logic devices.
2. Description of the Prior Art
Programmable logic devices are becoming increasingly popular in the electronics industry because of their flexibility. These devices allow a user to configure an integrated circuit chip, having a standard design, to perform the user's desired logic functions. Use of a standard design to perform many different logic functions greatly decreases the cost per logic gate compared to custom designs, especially at smaller volumes. If changes or updates are needed to the programmed logic function, some types of devices can be reprogrammed.
One time programmable logic devices are very common. The user can program the devices, or have them programmed late in the production cycle at the semiconductor foundry. Such parts provide a low cost, but cannot be reprogrammed. Typical one time programmable logic devices are programmed using a final metal mask or fusible links.
Reprogrammable devices use non-volatile memory to retain configuration information. This information is used to define the logic functions performed by the device, and to configure input and output buffers. Technologies commonly used for fabrication of such devices use EPROMS and EEPROMS for storage of configuration information. Since EPROMS are typically erased by exposing them to ultraviolet light, they are difficult to reprogram without physically removing the integrated circuit from the system. EEPROMS are easier to reprogram, but still require the use of special programming voltages in external circuitry suitable for performing the reprogramming process. Reprogramming and testing of both EPROMS and EEPROMS is relatively slow.
A few integrated circuit designs utilize static random access memories (SRAMs) for storage of configuration information. Use of RAMs to perform logic functions is well known in the art. One technique for using SRAMs in programmable logic devices is to provide an array of SRAM blocks interconnected by switching matrices. The switching matrices are also programmable, and are used to switch signals to various portions of the device.
A significant problem with the use of SRAM based programmable logic devices is the fact that these devices must be reconfigured whenever a system containing them is powered up. This requires that the system incorporating SRAM-based programmable logic devices includes some form of external non-volatile memory for storing configuration information and a mechanism for reloading such configuration information from the non-volatile memory into the programmable logic device on power up. These devices cannot retain their programming for later ready to use installation in a system.
It would be desirable to provide a programmable logic device which provide the flexibility of SRAM-based logic with the configuration retention properties of non-volatile memory devices.
USPTO Backgrounds
USPTO Backgrounds