1. Field of the Invention
The present invention generally is related to the field of optical integrated circuits and, in particular, to enclosures for housing optical integrated circuits.
2. Description of the Related Art
Communication systems utilizing optical signals encounter problems that are unique to light wave signal manipulation. These problems generally are not present in communication systems utilizing lower frequency signals, such as those systems which include conductive wires for the transmission of the lower frequency signals. For example, optical switching, multiplexing, and demultiplexing are all operations that present problems. Heretofore, such operations typically have required numerous discrete optical components and, as a result, the systems incorporating these components suffer from increased bulkiness and reduced reliability. As a consequence, much effort has been directed at reducing the number of system components by combining their operations on a single, monolithic chip which generally comprises a thin film, compact planar optical circuit.
One example of such a monolithic device is a dense wave division multiplexer (DWDM) of the type shown, for example, in U.S. Pat. No. 5,136,671, issued to Dragone, the disclosure of which is herein incorporated by reference. Such a device is useful where a large number of transmission channels must be crowded into a narrow bandwidth window. Such narrow windows can result, for example, from the use of erbium doped optical amplifiers, which are widely used today, but which can severely limit the usable bandwidth. In order to accommodate many channels in the narrow window, the channels must be closely spaced in wavelength, such as, for example, successive wavelengths differing by 0.8 nm or 1.6 nm.
By use of OASIC (optical application specific integrated circuits) technology, thin film planar optical circuits can be formed to produce such a DWDM as discussed, on a single wafer or chip. Such a chip generally comprises a thin silicon wafer upon which a low refractive index silica glass lower cladding is deposited. A high index core layer is then deposited, patterned, and etched to form the optical waveguides, and then an upper cladding is deposited. Wafers for a variety of functions can be produced using the OASIC technology; however, the remainder of the discussion will be directed to the DWDM in the interest of simplicity and consistency. It should be understood that these other types of integrated circuits are by no means intended to be excluded.
One of the problems arising from the use of some OASIC devices, particularly the arrayed waveguide gratings in a DWDM, is their sensitivity to temperature changes, and to physical stresses which impair their reliability. For example, in the DWDM, because the operating wavelengths of the several individual channels differ by such a small degree, any expansion, contraction or bending due to temperature fluctuations, i.e. temperature fluctuations less than 1.degree. C., for instance, may degrade the optical performance and, in extreme cases, can cause circuit failure.
It has been found that degradation or failure can generally be prevented and reliability of the circuit improved if the temperature of the device is maintained at a predetermined temperature in a range of 75.degree. C. to 90.degree. C. This maintenance temperature, specific to the individual circuit, must be controlled to within a few degrees Celsius even though the ambient temperature may vary from, for example, 0.degree. C. to 70.degree. C. Thus, some sort of protective housing must be provided for the wafer, i.e. circuit, to maintain it within the desired temperature range.
Maintaining various types of electronic devices at an even temperature by housing them in sealed containers is well known in the prior art. Typically, these enclosures, such as those configured for housing an OASIC chip or dye, are injected molded and include an upper half and a lower half, with the halves being engagable to form the enclosure. An OASIC chip typically is mounted on the lower half of the enclosure with various housed components, such as fibers, heating elements, and electrical pin-outs. The upper half is then position and fastened thereto so as to form an assembled package. After assembly, the enclosure and its internally housed components must be optically tested, both before and after thermal shock tests, in order to detect potentially unreliable devices and to determine if additional components, such as resistors, must be added to the package in order that the package can meet the desired performance criteria.
In order for the aforementioned testing to yield characteristic optical performance results, the assembled OASIC package must be sealed with all its internal components in place. However, if the sealed package does not pass the tests, as well as meet the required performance criteria, the package must be reentered for rework. Since the assembled packages typically are sealed together by epoxy, reentering an assembled package for rework typically destroys the enclosure, thereby necessitating the remounting of the internal components within the lower half of a substitute enclosure.
In an effort to alleviate the need of providing substitute enclosures due to the destruction of the enclosures during reentry, a temporary sealing tape oftentimes is applied to the joint formed between upper and lower halves of the enclosures to allow for testing of the temporarily sealed package. However, even if the temporarily sealed package passes testing and meets the desired performance criteria, the temporarily sealed package must receive a final sealing, which typically includes sending the package to a sealing section of the assembly line, where the sealing tape is removed from the enclosure and the enclosure is sealed with epoxy.
Mechanical fasteners, such as screws, also have been used to fasten the upper and lower halves of the enclosures together. These fasteners allow the upper and lower halves to be separated prior to a rework process without destroying the enclosure; however, the additional assembly time required to carry out these steps can result in production inefficiencies. Furthermore, once the upper and lower halves of the enclosure are reassembled after the rework process, the screws typically are epoxied in position so that the manufacturer can detect when a customer has entered the enclosure, thus voiding most warranties associated with the assembled packages. Typically, the use of mechanical fasteners also includes sending the package to a sealing section of the assembly line for applying epoxy, as described hereinbefore.
Therefore, there is a need to provide improved enclosures for housing circuits that address these and other shortcomings of the prior art.
USPTO Backgrounds
USPTO Backgrounds