The present invention relates to a test apparatus for testing a semiconductor device, a substrate, a photomask (exposure mask), a liquid crystal, and the like having a fine pattern.
In recent years, as semiconductor integrated circuits are becoming finer and having higher integration, a pattern on semiconductor wafer is tested at the end of each of manufacturing processes of the semiconductor integrated circuits in order to detect, early or in advance, occurrence of an abnormality and a failure in the manufacturing processes. Test methods and apparatuses to detect a defect are being practically used. In the test apparatuses, a test is conducted by obtaining image information of an area to be tested with a scanning electron microscope (hereinbelow, abbreviated as SEM) using the electron beam technique.
Also in the control of the dimensions of a process pattern in the manufacture of a semiconductor integrated circuit, a critical-dimension SEM (called CD-SEM) as an SEM using the electron beam technique dedicated to semiconductors is used. The CD-SEM is used for observation of a process pattern and high-precision dimension measurement.
Also in the control of the yield and the like of a semiconductor integrated circuit, to detect a defect in a device pattern of a chip by an SEM using the electron beam technique, for example, a test apparatus such as a defect review SEM (DR-SEM) is used.
In the apparatuses each using an SEM, an electron beam is emitted with a predetermined accelerating voltage along plural scan lines to scan an area to be tested on a semiconductor wafer. Secondary electrons generated are detected to obtain image information of the area to be tested. On the basis of the obtained image information, the area to be tested is tested. In association with increase in the diameter of a semiconductor wafer and decrease in the size of a circuit pattern in recent years, higher throughput of an apparatus is being demanded. To realize higher throughput, it is necessary to increase the speed of a scan control for performing a scan with an electron beam and an imaging process for computing obtained image information.
On the other hand, a test apparatus that obtains an image by using an electron beam has a problem of the influence of a charge-up phenomenon. It is becoming difficult to obtain high-precision image information. The charge-up phenomenon is a phenomenon that, in the case of irradiating a sample with an electron beam, electrons which are incident on the sample lose their energy and are absorbed in the sample. When the sample is a conductive material, the electrons flow to a sample stage. In the case where the sample is a non-conductive sample, the electrons remain in the sample and charging occurs.
When charging occurs, the electron beam is bent due to repulsion of the charges remained at the time of emitting the electron beam to the sample and is deviated from an intended irradiation position. As a result, an obtained image is distorted. Since the generation amount of the secondary electrons changes due to the charging, a so-called potential contrast occurs such that an obtained image becomes partly light or dark due to variation in the secondary electron detection efficiency and disturbance of the track of the secondary electrons.
There are some methods to prevent the charging. Japanese Unexamined Patent Application Publication No. 2003-142019 discloses a technique of using two accelerating voltages at the time of emitting an electron beam. By irradiating at least scan lines with an electron beam at the second accelerating voltage prior to acquisition of an image of the scan lines, generation of secondary electrons is facilitated. In this case, there is the possibility that the area to be tested is unnaturally charged. In addition, since two accelerating voltages are used, the control in the apparatus becomes complicated, and there is consequently a problem that the apparatus is expensive.
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