1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device. Specifically, the present invention relates to a technique for reducing a punch-through current in a thin film transistor (TFT) which is formed using a silicon on insulator (SOI) substrate formed by a bonding technique.
2. Description of the Related Art
In recent years, in accordance with the improvement in characteristics of an integrated circuit, a semiconductor element such as a TFT has been miniaturized. However, various problems have arisen by fabrication of a submicron region.
As a typical problem, a phenomenon called a short-channel effect is known. The short-channel effect is a phenomenon in a semiconductor element having a channel formation region between a source region and a drain region, which is caused because, as the channel formation region is shortened, electric charge in a channel formation region is largely influenced not only by a gate voltage but also by electric charge of a depletion layer, an electric field, and electric potential distribution in the source region and the drain region.
As an influence of the short-channel effect on a semiconductor element, reduction in threshold voltage (Vth) and a punch-through current are known.
With reduction in threshold voltage, power consumption can be reduced. However, frequency characteristics do not generally become high with reduction in driving voltage of an integrated circuit. Thus, as a method for controlling the threshold voltage, a method is employed in which an impurity element imparting one conductivity type is added to the entire channel formation region in order to control the threshold voltage by the added amount of the impurity element. However, there is a problem in that carriers are scattered by the added impurity and thus the mobility of the carriers is lowered.
Furthermore, it is known that when the influence of a gate voltage on a drain current is reduced due to a punch-through current, subthreshold characteristics become worse and switching characteristics of a semiconductor element are deteriorated. As a method for suppressing a punch-through current, there is a method in which a channel formation region is formed to have a thin thickness; however, with the channel formation region formed to have a thin thickness, the following problem arises: resistance between a source region and a drain region is increased and an ON current of the semiconductor element is decreased.
As another method for suppressing a punch-through current, there is a method in which an impurity element imparting a conductivity type opposite to that of a source region and a drain region is implanted into a bottom portion of a channel formation region; however, it is difficult to implant the impurity element only into the bottom portion of the channel formation region from the surface of the channel formation region.
Furthermore, a method is known in which, using an SOI technique, an impurity element imparting a conductivity type opposite to that of a source region and a drain region is implanted into a silicon substrate, and then, the silicon substrate is bonded to a base substrate and polished, thereby forming an impurity-implanted region for suppressing a punch-through current in a bottom portion of a channel formation region of a semiconductor element which is formed over the base substrate (For example, see Reference 1: Japanese Published Patent Application No. H5-326962 and Reference 2: Japanese Published Patent Application No. H7-142738).
However, in the case of applying such a method, since the impurity element is implanted into the silicon substrate, after the bonding, the silicon substrate which is separated from the base substrate cannot be reused efficiently, and there is a problem of how to save resources.
USPTO Backgrounds
USPTO Backgrounds