1. Field of the Invention
The invention relates generally to a storage device and particularly to management of the memory array of storage device by a controller.
2. Description of the Prior Art
Memory media in a mass storage device is used partially by the controller of the device to store a variety of types of private data, i.e. data that is not intended for public access and is rather intended for a very limited access, in the memory media, that are critical to the device's performance and reliability. Examples of such data include boot code and tables, among others. The controller uses the rest of the memory media to store data from a host. Some of the data from the host are frequently accessed and are also critically important to the performance of the host incorporating the mass storage device. Hence the controller's efficient management of these data is most critical in optimizing the mass storage device's performance as well as providing pleasant user experience.
Controller private data, such as boot code, is not very large compare with user data but it requires a reliable storage media. Another example of private data is tables that are managed by the controller to locate logical block addresses within the memory array physical block addresses. These tables are most critical to functionality and performance of the device and are frequently accessed, as such they require media with high performance, reliability, and non-volatility.
Controllers sometimes store security parameters such as AES keys in their private data area which also requires reliable media. The security keys are used to protect the data of the memory array (part of the memory media) of the mass storage device. Any corruption of the keys will most likely render the storage device useless.
Certain host parameters, such as file allocation table (FAT) and directories are accessed and updated frequently as well and require a memory media type with high performance and high reliability for optimal performance. Other types of host data such as pictures, songs and movies typically require a very large amount of storage and occupy the majority of the memory media of the storage device but they do not require as reliable nor high performance by the memory media.
Current mass storage devices commonly utilize NAND flash memories for the storage media. NAND memories provide large amounts of storage at a reasonable price point but they fail to provide all the attributes required by the controller for achieving high performance and reliable system. NAND flash memories are inherently slow with limited reliability and endurance which makes them unattractive for controllers requiring those attributes.
NAND flash memory is a block-based non-volatile memory with each block organized into and made of various pages. After a block is programmed, it is erased prior to programming it again. Most flash memory requires sequential programming of pages within a block. Another limitation of flash memory is that blocks can be erased for a limited number of times, thus frequent erase operations reduce the life time of the flash memory. Accordingly, flash memory does not allow for in-place updates. That is, it cannot simply overwrite existing data with new data. The new data are written to an erased area (out-of-place updates) only, and the old data are invalidated for reclamation in the future. This out-of-place update causes the coexistence of invalid (i.e. outdated) and valid data in the same block. “Garbage collection”, as is well known to those in the art, is a process referred to in reclaiming the space occupied by invalid data and where valid data is moved to a new block and the old block is erased. Garbage collection generally and undesirably results in significant performance overhead as well as unpredictable operational latency.
As mentioned above, flash memory blocks can be erased for a limited number of times. Wear leveling is the process commonly employed to improve flash memory life time by evenly distributing erases over the entire flash memory (within a band). A typical Multi Level Cell_(MLC) NAND flash manufactured using 25 nano meter technology typically has a program/erase (PE) cycle in the range of 1500 to 3000 cycles. They require erasing prior to being programmed with typical programming time or duration being approximately 10 milli seconds (ms) and a program time for programming a 4 to 8 Kilo Byte page being approximately 1 to 2 ms.
Moreover, NAND flash memories are organized in large page sizes of 8 KB and 16 KB and block sizes of 512 KB to 1 MB. Large page size attribute of flash memories makes it undesirable for small I/O operations since the whole page has to be programmed in its entirety. Programming a partial page requires merging of the existing data on the page with the new data and writing it to a new page. The old page will no longer contain valid data and has to be reclaimed eventually. Since the data corresponding to the same logical address is written to a different physical address, controller has to also maintain a table that maps the logical address to the physical address.
NAND flash memories, despite all their deficiencies, are nevertheless the preferred medium of choice for solid state mass storage devices because of their capacity to save large amounts of data at reasonable prices.
As such, to enhance user experience yet achieve cost effectiveness, its best to complement NAND flash memories with higher performance, reliability and endurance and perhaps more expensive types of media such as MRAM in the same mass storage device. This allows the controller to optimize its performance, reliability, and user experience by using the higher grade media to store its critical data and host system data and using the NAND flash memories to store host non-critical data.
The controller may divide the MRAM array of the mass storage device into a number of partitions and assign them to its private area or user area and utilize them accordingly.
What is needed is a storage device that takes advantage of the use of different types of memories, such as NAND and MRAM, and is reliable, efficient, yet cost-effective.
USPTO Backgrounds
USPTO Backgrounds